CN110610683B - Pixel driving circuit, driving method thereof, display panel and display device - Google Patents
Pixel driving circuit, driving method thereof, display panel and display device Download PDFInfo
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- CN110610683B CN110610683B CN201910926673.2A CN201910926673A CN110610683B CN 110610683 B CN110610683 B CN 110610683B CN 201910926673 A CN201910926673 A CN 201910926673A CN 110610683 B CN110610683 B CN 110610683B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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Abstract
The invention provides a pixel driving circuit and a driving method thereof, a display panel and a display device, wherein the pixel driving circuit comprises a first light-emitting control unit, a threshold compensation unit, a second light-emitting control unit, a data writing-in unit, a resetting unit, a driving transistor and a light-emitting device, wherein the resetting unit is used for writing a reference voltage into a third node in a resetting stage, a compensation stage and a data writing-in stage; the first light-emitting control unit is used for writing the power supply voltage into the fourth node in a reset phase and a light-emitting phase; the data writing unit is used for writing the data voltage into the second node in the resetting stage and the compensation stage and writing the reference voltage into the second node in the data writing stage; the threshold compensation unit is used for conducting the first node and the fourth node in a reset stage, discharging the voltage of the first node to a first compensation voltage in a compensation stage, and boosting the voltage of the first node to a second compensation voltage in a data writing stage so as to control the driving transistor to drive the light-emitting device to emit light.
Description
Technical Field
The invention relates to the technical field of display, in particular to a pixel driving circuit, a driving method thereof, a display panel and a display device.
Background
In recent years, due to the excellent display effect of an Active-Matrix Organic Light-Emitting Diode (AMOLED) display, the AMOLED industry is rapidly developing at home and abroad, and pixel driving circuits of various AMOLED panels are developed successively. In actual production, Excimer Laser Annealing (ELA) and Doping (Doping) processes in a Low Temperature Polysilicon (LTPS) technology cannot ensure that a driving transistor DTFT of an AMOLED panel has good uniformity, so that a threshold voltage Vth deviation phenomenon exists.
Generally, an organic light emitting diode panel can emit light by current generated when a driving transistor is in a saturation state, but different driving currents are generated by different threshold voltages when the same gray scale voltage is input, resulting in current inconsistency.
In a conventional pixel driving circuit, for example, the most basic 2T1C pixel driving circuit, on the one hand, when the same Data (Data) signal is written, the luminance of each pixel is not uniform because each driving transistor DTFT has a different threshold voltage Vth. On the other hand, since the power voltage Vdd trace in an actual AMOLED display usually has a resistance Drop (IR Drop) phenomenon, the gate voltage of the driving transistor DTFT may be changed, and the voltage change may cause a difference in brightness of the AMOLED display. In addition, as the mobility of the AMOLED device is increased due to the change of the screen temperature of the AMOLED display, the driving current provided by the driving transistor DTFT is increased, so that the problem of screen brightness of the AMOLED display is caused, the power consumption is improved, the service life of the AMOLED device is prolonged, and the experience effect of a user is reduced.
Disclosure of Invention
The present invention is directed to at least one of the technical problems in the prior art, and provides a pixel driving circuit, a driving method thereof, a display panel, and a display device.
In order to achieve the above object, the present invention provides a pixel driving circuit, including a first light emitting control unit, a threshold compensation unit, a second light emitting control unit, a data writing unit, a resetting unit and a driving transistor, wherein the threshold compensation unit and a control electrode of the driving transistor are connected to a first node, a second electrode of the driving transistor, the threshold compensation unit, the data writing unit and the second light emitting control unit are connected to a second node, the resetting unit, the threshold compensation unit, the second light emitting control unit and a first electrode of a light emitting device are connected to a third node, the threshold compensation unit, the first electrode of the driving transistor and the first light emitting control unit are connected to a fourth node, and the second electrode of the light emitting device is connected to a first power supply terminal;
the first light-emitting control unit is connected with a second power supply end and a first control signal end and is configured to write a power supply voltage provided by the second power supply end into the fourth node in response to control of a first control signal provided by the first control signal end;
the data writing unit is connected with a second control signal terminal and a data signal terminal, and is configured to write a data voltage or a reference voltage provided by the data signal terminal into the second node in response to control of a second control signal provided by the second control signal terminal;
the reset unit is connected with the second control signal terminal and the reference signal terminal and configured to write a reference voltage provided by the reference signal terminal into the third node in response to control of a second control signal provided by the second control signal terminal;
the threshold compensation unit is connected to a third control signal terminal and configured to turn on the first node and the fourth node in response to control of a third control signal provided from the third control signal terminal to discharge a voltage of the first node to a first compensation voltage V1, wherein V1 is Vdata + Vth, Vdata is the data voltage, and Vth is a threshold voltage of the driving transistor; and configured to boost the voltage of the first node from the first compensation voltage to a second compensation voltage V2 in response to a change in the voltage of the second node, wherein V2 is V1+ Δ V, Δ V representing a predetermined compensation voltage;
the second light-emitting control unit is connected with a fourth control signal terminal and configured to switch on the second node and the third node in response to the control of a fourth control signal provided by the fourth control signal terminal;
the driving transistor is configured to output a corresponding driving current in response to control of the second compensation voltage provided by the first node.
Optionally, the data writing unit includes a first transistor;
the control electrode of the first transistor is connected with the second control signal end, the first electrode of the first transistor is connected with the data signal end, and the second electrode of the first transistor is connected with the second node.
Optionally, the threshold compensation unit includes a second transistor, a first capacitor and a second capacitor;
a control electrode of the second transistor is connected to the third control signal terminal, a first electrode of the second transistor is connected to the fourth node, and a second electrode of the second transistor is connected to the first node;
a first end of the first capacitor is connected to the first node, and a second end of the first capacitor is connected to the second node;
a first terminal of the second capacitor is connected to the first node, and a second terminal of the second capacitor is connected to the third node.
Optionally, the first lighting control unit includes a third transistor;
a control electrode of the third transistor is connected to the first control signal terminal, a first electrode of the third transistor is connected to the second power terminal, and a second electrode of the third transistor is connected to the fourth node.
Optionally, the second light emission control unit includes a fourth transistor;
a control electrode of the fourth transistor is connected to the fourth control signal terminal, a first electrode of the fourth transistor is connected to the second node, and a second electrode of the fourth transistor is connected to the third node.
Optionally, the reset unit comprises a fifth transistor;
a control electrode of the fifth transistor is connected to the second control signal terminal, a first electrode of the fifth transistor is connected to the reference signal terminal, and a second electrode of the fifth transistor is connected to the third node.
Optionally, all transistors in the pixel driving circuit are N-type transistors;
or all the transistors in the pixel driving circuit are P-type transistors.
To achieve the above object, the present invention provides a display panel including the pixel driving circuit provided in any one of the above embodiments.
In order to achieve the above object, the present invention provides a display device including the above display panel.
In order to achieve the above object, the present invention provides a pixel driving method, which is implemented based on the pixel driving circuit provided in any one of the above embodiments, and the pixel driving method includes:
in a reset phase, the reset unit writes the reference voltage to the third node in response to control of the second control signal; the second power supply terminal writes the power supply voltage to the first node through the first light emission control unit and the threshold compensation unit;
in a compensation phase, the data writing unit writes the data voltage to the second node in response to control of the second control signal; the threshold compensation unit discharges the voltage of the first node to a first compensation voltage in response to control of the third control signal, wherein V1 is Vdata + Vth, V1 denotes the first compensation voltage, Vdata is the data voltage, and Vth is the threshold voltage of the driving transistor;
in a data writing phase, the data writing unit writes the reference voltage to the second node in response to control of the second control signal; the threshold compensation unit boosts the voltage of the first node to a second compensation voltage in response to a change in the voltage of the second node, wherein V2 is V1 +. DELTA.V, V2 represents the second compensation voltage, and DELTA.V represents a preset compensation voltage;
in a light emitting stage, the driving transistor outputs a driving current to the light emitting device through the second light emitting control unit in response to the control of the second compensation voltage to drive the light emitting device to emit light.
Drawings
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the invention;
fig. 2 is a schematic structural diagram of a pixel driving circuit according to a second embodiment of the present invention;
FIG. 3 is a timing diagram illustrating the operation of the pixel driving circuit shown in FIG. 2;
fig. 4 is a flowchart of a pixel driving method according to a third embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the following describes the pixel driving circuit, the driving method thereof, the display panel, and the display device provided in the present invention in detail with reference to the accompanying drawings.
It should be noted that the transistor in the present invention may be a thin film transistor, a field effect transistor, or another switching device having the same characteristics. Transistors generally include three poles: the gate, source and drain, the source and drain in a transistor are symmetrical in structure, and the two may be interchanged as desired. In the present invention, the control electrode refers to a gate electrode of the transistor, and one of the first electrode and the second electrode is a source electrode and the other is a drain electrode.
Further, the transistors may be classified into N-type transistors and P-type transistors according to transistor characteristics; when the transistor is an N-type transistor, the on voltage of the transistor is high level voltage, and the off voltage of the transistor is low level voltage; when the transistor is a P-type transistor, the on voltage is a low level voltage and the off voltage is a high level voltage. In the invention, the "active level" refers to a voltage capable of controlling the turn-on of a corresponding transistor, and the "inactive level" refers to a voltage capable of controlling the turn-off of a corresponding transistor; therefore, when the transistor is an N-type transistor, the active level refers to a high level, and the inactive level refers to a low level; when the transistor is a P-type transistor, the active level refers to a low level and the inactive level refers to a high level.
In the following description of the embodiments of the present invention, an example is given in which each transistor (including a driving transistor) is an N-type transistor. At this time, the active level refers to a high level, and accordingly, the active level state refers to a high level state, the inactive level refers to a low level, and accordingly, the inactive level state refers to a low level state. It will be appreciated by those skilled in the art that the transistors in the embodiments of the present invention described below may also be P-type transistors.
In the present disclosure, the case that all transistors in the pixel circuit are simultaneously N-type transistors or simultaneously P-type transistors is only a preferred solution in the present disclosure, and at this time, all transistors in the pixel circuit can be simultaneously prepared based on the same process, which is beneficial to shortening the preparation period.
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention, and as shown in fig. 1, the pixel driving circuit includes a first light emitting control unit 11, a threshold compensation unit 12, a second light emitting control unit 13, a data writing unit 14, a resetting unit 15, and a driving transistor DTFT. The pixel driving circuit is used for driving the light-emitting device OLED; a control electrode of the driving transistor DTFT is connected to the first node N1, a second electrode of the driving transistor DTFT is connected to the second node N2, the second light emission control unit 13 and the first electrode of the light emitting device OLED are connected to the third node N3, the first electrode of the driving transistor DTFT is connected to the fourth node N4, and the second electrode of the light emitting device OLED is connected to the first power source terminal U1.
The first light emission controlling unit 11 is connected to the second power source terminal U2, the fourth node N4, and the first control signal terminal EM1, and is operable to write the power source voltage Vdd supplied from the second power source terminal U2 to the fourth node N4 in response to the control of the first control signal supplied from the first control signal terminal EM1 during the reset period T1 and the light emission period T4.
The data writing unit 14 is connected to the second control signal terminal G, the second node N2 and the data signal terminal DL, and is configured to write the data voltage Vdata provided by the data signal terminal DL to the second node N2 in response to the control of the second control signal provided by the second control signal terminal G during the reset period T1 and the compensation period T2; in the data writing phase T3, the reference voltage Vref provided by the data signal terminal DL is written to the second node N2 in response to the control of the second control signal provided by the second control signal terminal G.
The reset unit 15 is connected to the second control signal terminal G, the reference signal terminal Ref, and the third node N3, and is configured to write the reference voltage Vref provided by the reference signal terminal Ref to the third node N3 in response to the control of the second control signal provided by the second control signal terminal G during the reset period T1, the compensation period T2, and the data write period T3.
The threshold compensation unit 12 is connected to the third control signal terminal R, the first node N1, the second node N2, the third node N3 and the fourth node N4, and is configured to turn on the first node N1 and the fourth node N4 in response to the control of the third control signal provided by the third control signal terminal R during the reset period T1, so as to make the voltage V of the first node N1N1Voltage V charged to fourth node N4N4(ii) a In the compensation period T2, in response to the control of the third control signal provided by the third control signal terminal R, the first node N1 and the fourth node N4 are turned on to make the voltage V of the first node N1N1Discharging to a first compensation voltage V1, where V1 is Vdata + Vth, and V1 represents the first compensation voltage, Vdata is the data voltage provided by the data signal terminal DL, and Vth is the threshold voltage of the driving transistor DTFT; in the data writing phase T3, responding to the voltage V of the second node N2N2Will change the voltage V of the first node N1N1The voltage is increased from the first compensation voltage V1 to a second compensation voltage V2, wherein V2 is equal to V1 +. DELTA.v, V2 represents the second compensation voltage, and Δ V represents a preset compensation voltage.
The second light-emission control unit 13 is connected to the fourth control signal terminal EM2, the second node N2 and the third node N3, and is configured to turn on the second node N2 and the third node N3 in response to the control of the fourth control signal provided from the fourth control signal terminal EM2 during the light-emission period T4.
The driving transistor DTFT is used for responding to the first node during the light emitting period T4The control of the second compensation voltage V2 provided by the N1 turns on the fourth node N4 and the second node N2, and outputs the driving current I to the light emitting device OLED through the second light emission control unit 13oledTo drive the light emitting device OLED to emit light.
In the present embodiment, the signal provided by the first power source terminal U1 is a dc low level signal Vss; the power supply voltage Vdd provided by the second power supply U2 is a dc high level signal; the signal output by the first control signal terminal EM1 is a pulse signal, and the first control signal is a signal in an active level state in the pulse signal, that is, a high level signal; the second control signal end G is connected to a Gate line (Gate), and the output signal is a pulse signal, and the second control signal is a signal in an active level state in the pulse signal, that is, a high level signal; the Data signal terminal DL is connected to a Data line (Data), the Data voltage Vdata provided by the Data signal terminal DL is a pulse signal, and the reference voltage Vref provided by the Data signal terminal DL is a dc low-level signal; a reference voltage Vref provided by a reference signal terminal Ref is a direct-current low-level signal; the signal provided by the third control signal terminal R is a pulse signal, and the third control signal is a signal in an active level state in the pulse signal, that is, a high level signal; the signal provided by the fourth control signal terminal EM2 is a pulse signal, and the fourth control signal is a signal in an active level state, i.e., a high level signal, in the pulse signal.
In this embodiment, the first pole of the light emitting device OLED may be an anode, and the second pole may be a cathode.
In this embodiment, the operation process of the pixel driving circuit includes the following four stages:
in the reset period T1, the first light-emitting control unit 11 writes the power voltage Vdd supplied from the second power terminal U2 to the fourth node N4, and the threshold compensation unit 12 turns on the first node N1 and the fourth stage N4, thereby making the voltage V of the first node N1N1Voltage V charged to fourth node N4N4I.e. the supply voltage Vdd.
In the compensation period T2, the threshold compensation unit 12 turns on the first node N1 and the fourth node N4, and the driving transistor DTFT is equivalently diode-connected between the first and second poles thereof, so that the first node N1 is connected to the second node N3526Voltage VN1And discharging, wherein when the gate-source voltage Vgs of the driving transistor DTFT is equal to the threshold voltage Vth, the driving transistor DTFT is turned off, and at the same time, Vgs is equal to VN1-VN2Vth when the voltage V of the second node N2N2Is equal to the data voltage Vdata, so the voltage V of the first node N1 is at this timeN1＝VN2+ Vth + V1, so when the voltage V of the first node N1 is greater than VN1When discharging from the power supply voltage Vdd to the first compensation voltage V1, which is Vdata + Vth, Vgs becomes Vth, and the driving transistor DTFT is turned off.
The voltage V of the second node N2 from the compensation phase T2 to the data writing phase T3N2From the data voltage Vdata to the reference voltage Vref. In the data writing phase T3, the threshold compensation unit 12 is responsive to the voltage V of the second node N2N2Will change the voltage V of the first node N1N1The compensation voltage V is increased from the first compensation voltage V1 to a second compensation voltage V2, wherein V2 is V1 +/Δ V is Vdata + Vth +/Δ V, the predetermined compensation voltage Δ V may be a negative value or a positive value, and the specific value of Δ V may be determined according to the voltage V of the second node N2N2Is determined, wherein Vdata is greater than Vref. At this time, the gate-source voltage of the driving transistor DTFT is Vgs ═ VN1-VN2＝Vdata+Vth+△V-Vref。
In the light emitting period T4, in response to the control of the second compensation voltage V2, the driving transistor DTFT is turned on, and the voltage V of the second node N2N2Variations occur but the voltage V of the first node N1 due to the control of the threshold compensation unit 12N1Also follows the voltage V of the second node N2N2And the amount of change is the same, from the previous stage (data writing stage T3) to the light emission stage T4, the gate-source voltage Vgs of the driving transistor DTFT is equal to VN1-VN2No change will occur, i.e. the gate-source voltage of the driving transistor DTFT is still Vgs-V during the light emitting period T4N1-VN2Vdata + Vth +. DELTA.V-Vref. At this time, the saturated driving current formula of the driving transistor DTFT can be obtained: i isoled＝K*(Vgs-Vth)2＝K*(Vdata+Vth+△V-Vref-Vth)2＝K*(Vdata-Vref+△V)2。
Wherein, IoledA driving current outputted for the driving transistor DTFT, K being a constant related to process parameters and geometry of the driving transistor DTFT, K ═ 1/2 ×. mun*Cox(W/L), Vgs is the gate-source voltage of the driving transistor DTFT, and Vth is the threshold voltage of the driving transistor DTFT.
From the above analysis, it can be seen that, in the light emitting period T4, the on-current I of the light emitting device OLEDoledThe driving current I can be adjusted by the predetermined compensation voltage Δ V regardless of the data voltage Vdata, the reference voltage Vref and the predetermined compensation voltage Δ V, and regardless of the power voltage Vdd outputted from the second power source terminal U2 and the threshold voltage Vth of the driving transistor DTFToledThe size of (2). Therefore, the pixel driving circuit provided by the embodiment of the disclosure can compensate for the deviation and drift of the threshold voltage Vth of the driving transistor, eliminate the phenomenon of non-uniform display brightness caused by the difference of the threshold voltage Vth of the driving transistor DTFT, eliminate the phenomenon of difference of the display brightness of the display device caused by the attenuation of the power voltage Vdd input to the driving transistor DTFT due to the IR Drop phenomenon of the power voltage routing Vdd, and effectively avoid the problems of brightening of the screen and power consumption increase of the display device caused by the rise of the driving current, thereby effectively ensuring the service life of the display device and ensuring the experience effect of the user.
In practical applications, the magnitude of Δ V may be designed and adjusted according to actual needs to control the reduction amount of the driving current output by the driving transistor DTFT.
Fig. 2 is a schematic structural diagram of a pixel driving circuit according to a second embodiment of the present invention, and the pixel circuit shown in fig. 3 is a specific scheme based on the pixel circuit shown in fig. 2.
As shown in fig. 2, the data writing unit 14 optionally includes a first transistor T1; the control electrode of the first transistor T1 is connected to the second control signal terminal G, the first electrode of the first transistor T1 is connected to the data signal terminal DL, and the second electrode of the first transistor T1 is connected to the second node N2.
Alternatively, as shown in fig. 2, the threshold compensating unit 12 includes a second transistor T2, a first capacitor C1, and a second capacitor C2.
A control electrode of the second transistor T2 is connected to the third control signal terminal R, a first electrode of the second transistor T2 is connected to the fourth node N4, and a second electrode of the second transistor T2 is connected to the first node N1; a first terminal of the first capacitor C1 is connected to the first node N1, and a second terminal of the first capacitor C1 is connected to the second node N2; a first terminal of the second capacitor C2 is connected to the first node N1, and a second terminal of the second capacitor C2 is connected to the third node N3.
Alternatively, as shown in fig. 2, the first light emission control unit 11 includes a third transistor T3; a control electrode of the third transistor T3 is connected to the first control signal terminal EM1, a first electrode of the third transistor T3 is connected to the second power terminal U2, and a second electrode of the third transistor T3 is connected to the fourth node N4.
Alternatively, as shown in fig. 2, the second light emission control unit 13 includes a fourth transistor T4; a control electrode of the fourth transistor T4 is connected to the fourth control signal terminal EM2, a first electrode of the fourth transistor T4 is connected to the second node N2, and a second electrode of the fourth transistor T4 is connected to the third node N3.
Alternatively, as shown in fig. 2, the reset unit 15 includes a fifth transistor T5; a control electrode of the fifth transistor T5 is connected to the second control signal terminal G, a first electrode of the fifth transistor T5 is connected to the reference signal terminal Ref, and a second electrode of the fifth transistor T5 is connected to the third node N3.
Fig. 3 is a schematic timing diagram of an operation of the pixel driving circuit shown in fig. 2, and in order to facilitate better understanding of the technical solution of the present invention, the following will describe in detail an operation process of the pixel driving circuit provided in this embodiment with reference to fig. 2 and fig. 3.
In the reset period T1, the third transistor T3 is turned on under the control of the first control signal in an active level state provided from the first control signal terminal EM1, the second transistor T2 is turned on under the control of the third control signal in an active level state provided from the third control signal terminal R, and the second power source terminal U2 writes the power source voltage Vdd to the first node N1 through the turned-on second transistor T2 and the turned-on third transistor T3; meanwhile, the first transistor T1 is turned on under the control of the second control signal in an active level state provided by the second control signal terminal G, and the data signal terminal DL writes the data voltage Vdata to the second node N2 through the turned-on first transistor T1; meanwhile, the fifth transistor T5 is turned on under the control of the second control signal in an active level state provided from the second control signal terminal G, and the reference signal terminal Ref writes the reference voltage Vref to the third node N3 through the turned-on fifth transistor T5 to reset the potential of the third node N3. Meanwhile, since the signal provided by the fourth control signal terminal EM2 is in a non-active level state, the fourth transistor T4 is turned off, i.e., the second node N2 and the third node N3 are disconnected.
During the compensation period T2, the first transistor T1 is turned on under the control of the second control signal in an active level state provided by the second control signal terminal G, and the data signal terminal DL writes the data voltage Vdata to the second node N2 through the turned-on first transistor T1, at which time the voltage V at the second node N2N2Is a data voltage Vdata.
Meanwhile, in the compensation period T2, the second transistor T2 is turned on under the control of the third control signal in an active level state provided from the third control signal terminal R, and the driving transistor DTFT is turned on under the control of the voltage of the first node N1. However, since the first node N1 and the fourth node N4 are turned on, the first pole and the second pole of the driving transistor DTFT are equivalently a diode, so that the voltage V of the first node N1 (the control pole of the driving transistor DTFT) isN1And discharging until the first compensation voltage V1 is discharged. During the discharging process, when a voltage difference between the control electrode and the second electrode of the driving transistor DTFT, i.e., a gate-source voltage Vgs, is equal to a threshold voltage Vth, the driving transistor DTFT is turned off, and at this time, Vgs is equal to VN1-VN2Vth when the voltage V of the second node N2N2Is equal to the data voltage Vdata, so the voltage V of the first node N1 is at this timeN1＝VN2+ Vth + V1, so when the voltage V of the first node N1 is greater than VN1When discharging from the power supply voltage Vdd to the first compensation voltage V1, which is Vdata + Vth, Vgs which is Vth, the crystal is drivenTube DTFT closes off.
Meanwhile, in the compensation period T2, the fifth transistor T5 is turned on under the control of the second control signal in the active level state provided by the second control signal terminal G, and the reference signal terminal Ref writes the reference voltage Vref to the third node N3 through the turned-on fifth transistor T5 to continuously reset the potential of the third node N3. Meanwhile, since the signals provided by the first and fourth control signal terminals EM1 and EM2 are in a non-active level state, the third and fourth transistors T3 and T4 are turned off.
During the data writing period T3, the first transistor T1 is turned on under the control of the second control signal in an active level state provided by the second control signal terminal G, and the data signal terminal DL writes the reference voltage Vref into the second node N2 through the turned-on first transistor T1, at which time the voltage V at the second node N2N2For reference voltage Vref, the voltage V of the second node N2 from the compensation phase T2 to the data writing phase T3N2The voltage at the second end of the first capacitor C1 is varied by Vref-Vdata.
According to the capacitor bootstrap effect, the voltage variation of the first end of the first capacitor C1 should be (Vref-Vdata) × C1/(C1+ C2), where C1 is the capacitance of the first capacitor C1 and C2 is the capacitance of the second capacitor C2, that is, the voltage variation of the first node N1 is (Vref-Vdata) × C1/(C1+ C2), which is the aforementioned predetermined compensation voltage Δ V, that is, (Vref-Vdata) × C1/(C1+ C2). At this time, the voltage V of the first node N1N1From the first compensation voltage V1, the second compensation voltage V2 ═ V1+ ═ Δ V ═ Vdata + Vth + (Vref-Vdata) × C1/(C1+ C2). Gate-source voltage Vgs of driving transistor DTFT is VN1-VN2Vdata + Vth +. DELTA.V-Vref. Where, since Vref is smaller than Vdata, Δ V is a negative value.
Meanwhile, in the data writing period T3, the fifth transistor T5 is turned on under the control of the second control signal in the active level state provided by the second control signal terminal G, and the reference signal terminal Ref writes the reference voltage Vref to the third node N3 through the turned-on fifth transistor T5, so as to continuously reset the potential of the third node N3. Meanwhile, since the signals provided by the first, third and fourth control signal terminals EM1, EM2 are all in a non-active level state, the second, third and fourth transistors T2, T3 and T4 are all turned off.
In the light emitting period T4, the signals provided by the second control signal terminal G and the third control signal terminal R are all in the inactive level state, and thus, the first transistor T1, the second transistor T2 and the fifth transistor T5 are all turned off.
Meanwhile, in the light emitting period T4, the third transistor T3 is turned on under the control of the first control signal in an active level state provided by the first control signal terminal EM1, the fourth transistor T4 is turned on under the control of the fourth control signal in an active level state provided by the fourth control signal terminal EM2, the driving transistor DTFT is turned on under the control of the second compensation voltage V2, which is the voltage of the first node N1, and the gate-source voltage Vgs, which is the voltage difference between the control electrode and the second electrode of the driving transistor DTFT, is constant, that is, Vgs is VN1-VN2Vdata + Vth +. DELTA.V-Vref. Wherein Δ V ═ C1/(C1+ C2).
At this time, the saturated driving current formula of the driving transistor DTFT can be obtained: i isoled＝K*(Vgs-Vth)2＝K*(Vdata+Vth+△V-Vref-Vth)2＝K*(Vdata-Vref+△V)2。
Wherein, IoledA driving current outputted for the driving transistor DTFT, K being a constant related to process parameters and geometry of the driving transistor DTFT, K ═ 1/2 ×. mun*Cox(W/L), Vgs is the gate-source voltage of the driving transistor DTFT, and Vth is the threshold voltage of the driving transistor DTFT.
From the above analysis, it can be seen that, in the light emitting period T4, the on-current I of the light emitting device OLEDoledSince the driving voltage is adjusted by the data voltage Vdata, the reference voltage Vref, the capacitor C1 of the first capacitor C1, and the capacitance C2 of the second capacitor C2, and the power voltage Vdd outputted from the second power source terminal U2 and the threshold voltage Vth of the driving transistor DTFT, the driving voltage Vdata, the reference voltage Vref, the capacitor C1 of the first capacitor C1, and the second capacitor C2Current IoledThe size of (2). Therefore, the pixel driving circuit provided by the embodiment of the disclosure can compensate for the deviation and drift of the threshold voltage Vth of the driving transistor, eliminate the phenomenon of non-uniform display brightness caused by the difference of the threshold voltage Vth of the driving transistor DTFT, eliminate the phenomenon of difference of the display brightness of the display device caused by the attenuation of the power voltage Vdd input to the driving transistor DTFT due to the IR Drop phenomenon of the power voltage routing Vdd, and effectively avoid the problems of brightening of the screen and power consumption increase of the display device caused by the rise of the driving current, thereby effectively ensuring the service life of the display device and ensuring the experience effect of the user.
Fig. 4 is a flowchart of a pixel driving method according to a third embodiment of the present invention, and as shown in fig. 4, the pixel driving method is implemented based on the pixel driving circuit according to the first embodiment or the second embodiment, and the pixel driving method includes:
step S11, in the reset phase, the reset unit writes the reference voltage into the third node in response to the control of the second control signal; the second power supply terminal writes a power supply voltage to the first node through the first light emission control unit and the threshold compensation unit.
Step S12, in the compensation phase, the data writing unit writes the data voltage into the second node in response to the control of the second control signal; the threshold compensation unit discharges a voltage of the first node to a first compensation voltage in response to control of a third control signal.
Step S13, in the data writing phase, the data writing unit writes the reference voltage into the second node in response to the control of the second control signal; the threshold compensation unit boosts the voltage of the first node to a second compensation voltage in response to a change in the voltage of the second node.
Step S14, in the light emitting stage, the driving transistor outputs a driving current to the light emitting device through the second light emission control unit in response to the control of the second compensation voltage to drive the light emitting device to emit light.
Where V1 is Vdata + Vth, V1 represents a first compensation voltage, Vdata is a data voltage, and Vth is a threshold voltage of the driving transistor; v2 is V1 +. DELTA.V, V2 represents the second compensation voltage, and DELTA.V represents the preset compensation voltage.
For the detailed description of the above steps and the detailed description of the pixel driving circuit, reference may be made to the corresponding contents in any of the foregoing embodiments, and the detailed description is not repeated here.
A fourth embodiment of the present invention further provides a display panel, where the display panel includes a pixel driving circuit, and the pixel driving circuit adopts the pixel driving circuit provided in the first embodiment or the second embodiment.
In the present embodiment, the display panel may be an AMOLED display panel.
For a detailed description of the pixel driving circuit, reference may be made to the first embodiment or the second embodiment, which is not repeated herein.
Fifth, the embodiment of the present invention further provides a display device, which includes the display panel provided in the fourth embodiment.
In this embodiment, the display device may be an AMOLED display device.
For a detailed description of the display panel, reference may be made to the fourth embodiment, which is not repeated herein.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.
Claims (9)
1. A pixel driving circuit is characterized by comprising a first light emitting control unit, a threshold compensation unit, a second light emitting control unit, a data writing unit, a resetting unit and a driving transistor, wherein the threshold compensation unit and a control electrode of the driving transistor are connected to a first node;
the first light-emitting control unit is connected with a second power supply end and a first control signal end and is configured to write a power supply voltage provided by the second power supply end into the fourth node in response to control of a first control signal provided by the first control signal end;
the data writing unit is connected with a second control signal terminal and a data signal terminal, and is configured to write a data voltage or a reference voltage provided by the data signal terminal into the second node in response to control of a second control signal provided by the second control signal terminal;
the reset unit is connected with the second control signal terminal and the reference signal terminal and configured to write a reference voltage provided by the reference signal terminal into the third node in response to control of a second control signal provided by the second control signal terminal;
the threshold compensation unit is connected to a third control signal terminal and configured to turn on the first node and the fourth node in response to control of a third control signal provided from the third control signal terminal to discharge a voltage of the first node to a first compensation voltage V1, wherein V1 is Vdata + Vth, Vdata is the data voltage, and Vth is a threshold voltage of the driving transistor; and configured to boost the voltage of the first node from the first compensation voltage to a second compensation voltage V2 in response to a change in the voltage of the second node, wherein V2 is V1+ Δ V, Δ V representing a predetermined compensation voltage;
the second light-emitting control unit is connected with a fourth control signal terminal and configured to switch on the second node and the third node in response to the control of a fourth control signal provided by the fourth control signal terminal;
the driving transistor is configured to output a corresponding driving current in response to control of the second compensation voltage provided by the first node;
the threshold compensation unit comprises a second transistor, a first capacitor and a second capacitor;
a control electrode of the second transistor is connected to the third control signal terminal, a first electrode of the second transistor is connected to the fourth node, and a second electrode of the second transistor is connected to the first node;
a first end of the first capacitor is connected to the first node, and a second end of the first capacitor is connected to the second node;
a first terminal of the second capacitor is connected to the first node, and a second terminal of the second capacitor is connected to the third node.
2. The pixel driving circuit according to claim 1, wherein the data writing unit includes a first transistor;
the control electrode of the first transistor is connected with the second control signal end, the first electrode of the first transistor is connected with the data signal end, and the second electrode of the first transistor is connected with the second node.
3. The pixel driving circuit according to claim 1, wherein the first light emission control unit includes a third transistor;
a control electrode of the third transistor is connected to the first control signal terminal, a first electrode of the third transistor is connected to the second power terminal, and a second electrode of the third transistor is connected to the fourth node.
4. The pixel driving circuit according to claim 1, wherein the second emission control unit includes a fourth transistor;
a control electrode of the fourth transistor is connected to the fourth control signal terminal, a first electrode of the fourth transistor is connected to the second node, and a second electrode of the fourth transistor is connected to the third node.
5. The pixel driving circuit according to claim 1, wherein the reset unit includes a fifth transistor;
a control electrode of the fifth transistor is connected to the second control signal terminal, a first electrode of the fifth transistor is connected to the reference signal terminal, and a second electrode of the fifth transistor is connected to the third node.
6. The pixel driving circuit according to any one of claims 1 to 5, wherein all transistors in the pixel driving circuit are N-type transistors;
or all the transistors in the pixel driving circuit are P-type transistors.
7. A display panel comprising the pixel driving circuit according to any one of claims 1 to 6.
8. A display device comprising the display panel according to claim 7.
9. A pixel driving method based on a pixel driving circuit using the pixel driving circuit according to any one of claims 1 to 6, the pixel driving method comprising:
in a reset phase, the reset unit writes the reference voltage to the third node in response to control of the second control signal; the second power supply terminal writes the power supply voltage to the first node through the first light emission control unit and the threshold compensation unit;
in a compensation phase, the data writing unit writes the data voltage to the second node in response to control of the second control signal; the threshold compensation unit discharges the voltage of the first node to a first compensation voltage in response to control of the third control signal, wherein V1 is Vdata + Vth, V1 denotes the first compensation voltage, Vdata is the data voltage, and Vth is the threshold voltage of the driving transistor;
in a data writing phase, the data writing unit writes the reference voltage to the second node in response to control of the second control signal; the threshold compensation unit boosts the voltage of the first node to a second compensation voltage in response to a change in the voltage of the second node, wherein V2 is V1 +. DELTA.V, V2 represents the second compensation voltage, and DELTA.V represents a preset compensation voltage;
in a light emitting stage, the driving transistor outputs a driving current to the light emitting device through the second light emitting control unit in response to the control of the second compensation voltage to drive the light emitting device to emit light.
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| KR20210085540A (en) * | 2019-12-30 | 2021-07-08 | 엘지디스플레이 주식회사 | Pixel circuit and light emitting display device and driving method for the same |
| CN111508431A (en) * | 2020-04-29 | 2020-08-07 | 昆山国显光电有限公司 | Pixel driving circuit, method and display device |
| CN111599313B (en) * | 2020-06-01 | 2021-07-09 | 昆山国显光电有限公司 | Pixel driving circuit, driving method and display panel |
| CN112037717B (en) * | 2020-09-24 | 2022-01-11 | 京东方科技集团股份有限公司 | Pixel unit driving circuit, driving method, display panel and display device |
| CN113593475B (en) * | 2021-07-30 | 2022-12-02 | 京东方科技集团股份有限公司 | Pixel circuit, driving method and display device |
| CN114023261B (en) * | 2021-11-17 | 2023-01-31 | 厦门天马显示科技有限公司 | Display panel and display device |
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