CN110554728A - Low dropout linear voltage stabilizing circuit - Google Patents
Low dropout linear voltage stabilizing circuit Download PDFInfo
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- CN110554728A CN110554728A CN201910917473.0A CN201910917473A CN110554728A CN 110554728 A CN110554728 A CN 110554728A CN 201910917473 A CN201910917473 A CN 201910917473A CN 110554728 A CN110554728 A CN 110554728A
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- 230000000087 stabilizing effect Effects 0.000 title claims abstract description 35
- 230000003321 amplification Effects 0.000 claims abstract description 27
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 27
- 239000003990 capacitor Substances 0.000 claims description 26
- 238000010586 diagram Methods 0.000 description 10
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- 238000000034 method Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 230000033228 biological regulation Effects 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000009123 feedback regulation Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
the invention discloses a low dropout linear voltage stabilizing circuit. The device comprises an output voltage adjusting unit, a feedback unit, a differential amplifying unit and a compensating unit; the differential amplification unit comprises an input symmetrical tube, the input symmetrical tube comprises a first symmetrical tube and a second symmetrical tube, the control end of the first symmetrical tube is electrically connected with the first signal input end of the differential amplification unit, and the control end of the second symmetrical tube is electrically connected with the second signal input end of the differential amplification unit; the first end of the second symmetric tube is electrically connected with the output end of the differential amplifying unit; each symmetrical tube comprises two transistors; the first pole of one transistor in each symmetrical tube is electrically connected with the second pole of the other transistor and is used as the second end of the symmetrical tube; the second end of the second symmetric tube is electrically connected with the first end of the compensation unit, and the second end of the compensation unit is electrically connected with the output end of the low dropout linear voltage stabilizing circuit. The occupied area is reduced while the phase margin and the bandwidth are improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of voltage regulators, in particular to a low dropout linear voltage regulator circuit.
Background
Low dropout regulator (LDO) is widely used in electronic systems due to its advantages of small area, low power consumption, simple scheme, etc. Due to the characteristic of low power consumption of the LDO, the phase margin and the bandwidth of the LDO are difficult to balance. In the prior art, a miller capacitance compensation method is often adopted to improve the phase margin. Generally, when the miller capacitor is used for compensating the phase margin, in order to ensure the response speed of the LDO, the capacitance value of the miller capacitor is relatively small, and meanwhile, the miller resistor with a high resistance value is added to improve the compensation effect. The area occupied by the added resistor and the Miller capacitor in the compensation process is large, so that the application range of the low-dropout linear voltage stabilizing circuit is small.
Disclosure of Invention
The invention provides a low dropout linear voltage stabilizing circuit, which increases the phase margin and the bandwidth, reduces the area occupied by the elements increased when the phase margin and the bandwidth are compensated, improves the compensation effect and further improves the application range of the low dropout linear voltage stabilizing circuit.
In a first aspect, an embodiment of the present invention provides a low dropout linear voltage regulator circuit, including an output voltage adjustment unit, a feedback unit, a differential amplification unit, and a compensation unit;
the differential amplification unit comprises an input symmetrical tube, the input symmetrical tube comprises a first symmetrical tube and a second symmetrical tube, the control end of the first symmetrical tube is electrically connected with the first signal input end of the differential amplification unit, and the control end of the second symmetrical tube is electrically connected with the second signal input end of the differential amplification unit; the first end of the second symmetric tube is electrically connected with the output end of the differential amplification unit;
Each symmetrical tube comprises two transistors; the grid electrode of the transistor in each symmetrical tube is electrically connected and is used as the control end of the symmetrical tube; the first pole of one transistor is electrically connected with the second pole of the other transistor to serve as the second end of the symmetrical tube; the second end of the second symmetric tube is electrically connected with the first end of the compensation unit, and the second end of the compensation unit is electrically connected with the output end of the low-dropout linear voltage stabilizing circuit.
Optionally, the compensation unit comprises a compensation capacitor.
Optionally, the differential amplification unit further comprises a first transistor, a second transistor and a current source;
the first symmetrical tube comprises a third transistor and a fourth transistor, and the second symmetrical tube comprises a fifth transistor and a sixth transistor; the third transistor is electrically connected with the grid electrode of the fourth transistor and is used as the control end of the first symmetrical tube; a first pole of the third transistor is electrically coupled to a second pole of the fourth transistor, and a second pole of the third transistor is electrically coupled to a second pole of the first transistor; a first pole of the fourth transistor is electrically connected with a first end of the current source; the fifth transistor is electrically connected with the grid electrode of the sixth transistor and is used as the control end of the second symmetrical tube; a first pole of the fifth transistor is electrically connected with a second pole of the sixth transistor and is used as a second end of the second symmetrical tube; a second pole of the fifth transistor is electrically connected to a second pole of the second transistor and serves as an output end of the differential amplification unit; a first pole of the sixth transistor is electrically connected with a first end of the current source; the grid electrodes of the first transistor and the second transistor are electrically connected with the second pole of the first transistor, and the first poles of the first transistor and the second transistor are electrically connected with the first power supply input end of the low-dropout linear voltage stabilizing circuit; and the second end of the current source is electrically connected with the second power supply input end of the low-dropout linear voltage stabilizing circuit.
Optionally, the third transistor and the fourth transistor are the same, and the fifth transistor and the sixth transistor are the same.
optionally, the current source comprises a seventh transistor and an eighth transistor; a first pole of the seventh transistor is used as a first end of the current source, a second pole of the seventh transistor is electrically connected with a first pole of the eighth transistor, a second pole of the eighth transistor is electrically connected with the second power supply input end, and gates of the seventh transistor and the eighth transistor are electrically connected for inputting a first level signal.
Optionally, the system further comprises a power-on switch unit;
The control end of the power-on switch unit is used for inputting a power-on switch signal, the input end of the power-on switch unit is electrically connected with the first power supply input end of the low-dropout linear voltage stabilizing circuit, and the output end of the power-on switch unit is electrically connected with the output end of the low-dropout linear voltage stabilizing circuit.
Optionally, the power-up switching unit includes a power-up switching transistor and a first resistor;
The grid electrode of the power-on switch transistor is used as the control end of the power-on switch unit, the first electrode of the power-on switch transistor is used as the input end of the power-on switch unit, the second electrode of the power-on switch transistor is electrically connected with the first end of the first resistor, and the second end of the first resistor is used as the output end of the power-on switch unit.
Optionally, a clamping unit is further included; the first end of the clamping unit is electrically connected with the output end of the low-dropout linear voltage stabilizing circuit, and the second end of the clamping unit is electrically connected with the second power supply input end of the low-dropout linear voltage stabilizing circuit.
Optionally, the clamping unit comprises a plurality of cascaded transistors;
A first pole of the transistor of the first stage is used as a first end of the clamping unit, and a second pole of the transistor of the last stage is used as a second end of the clamping unit; the gate of the transistor of each stage is electrically connected to the second pole thereof, and the second pole of the transistor of the previous stage is electrically connected to the first pole of the transistor of the next stage.
Optionally, the feedback unit includes a first voltage-dividing resistor, a second voltage-dividing resistor, and a first capacitor;
The first end of the first divider resistor and the first end of the first capacitor are electrically connected and serve as the input end of the feedback unit, the second end of the first divider resistor and the second end of the first capacitor are electrically connected with the first end of the second divider resistor, and the second end of the second divider resistor is electrically connected with the second power supply input end of the low-dropout linear voltage stabilizing circuit.
According to the technical scheme of the embodiment of the invention, each symmetrical tube in the input pair tubes in the differential amplification unit comprises two transistors, the second end electrically connected with the two transistors in the second symmetrical tube is electrically connected with the first end of the compensation unit, and the second end of the compensation unit is electrically connected with the output end of the low-dropout linear voltage stabilizing circuit. When the low dropout linear voltage stabilizing circuit works, the equivalent output impedance of the transistor electrically connected with the output end of the differential amplifying unit in the second symmetrical tube is very large, and the equivalent output impedance can be equivalent to the series connection of a resistor and a capacitor in a compensation loop, so that the effect of splitting a pole by the Miller effect can be realized, the influence of a zero point offsetting a secondary pole can be generated, and the phase margin of the low dropout linear voltage stabilizing circuit is increased. In addition, the occupied area of the transistor electrically connected with the output end of the differential amplification unit in the second symmetrical tube is smaller than that of the large resistor, so that the occupied area of the low dropout linear voltage stabilizing circuit is reduced, and the application range of the low dropout linear voltage stabilizing circuit is enlarged. Moreover, the transistor electrically connected with the output end of the differential amplifying unit in the second symmetrical tube provides equivalent large impedance, and extra current bias or voltage bias is not needed, so that extra power consumption is not increased. In addition, because the equivalent output impedance of the transistor electrically connected with the output end of the differential amplification unit in the second symmetrical tube is very large, the driving current output by the differential amplification unit is more shunted to the control end of the output voltage adjustment unit, and the magnitude of the bandwidth is equivalent to that of the capacitor which is not added, so that the bandwidth of the low-dropout linear voltage stabilizing circuit is ensured. And no resistor-capacitor component in the shunt branch affects the transmission rate of the current, so that the driving current output by the differential amplification unit can be transmitted to the control end of the output voltage regulation unit more quickly, and the response speed of the low dropout linear voltage regulator circuit is improved.
Drawings
FIG. 1 is a schematic diagram of a conventional low dropout linear voltage regulator circuit;
FIG. 2 is a schematic diagram of a low dropout linear voltage regulator circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another low dropout linear voltage regulator circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another low dropout linear voltage regulator circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of another low dropout linear voltage regulator circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
FIG. 1 is a schematic diagram of a conventional low dropout linear voltage regulator circuit. As shown in fig. 1, the low dropout linear voltage regulator circuit includes a differential amplifier circuit 101, an output transistor 102, and a feedback circuit 103. The first input terminal VF1 of the differential amplifier circuit 101 is electrically connected to the output terminal of the feedback circuit 103 for inputting a feedback voltage, and the second input terminal VREF1 of the amplifier circuit 102 is for inputting a reference voltage. The gate of the output transistor 102 is electrically connected to the output terminal of the amplifier circuit 101, and the amplifier circuit 101 amplifies the difference between the feedback voltage and the reference voltage and outputs the amplified voltage to the gate of the output transistor 102 to control the voltage drop of the output transistor 102, thereby enabling the output transistor 102 to output a stable voltage. Illustratively, when the output voltage of the output transistor 102 decreases, the feedback voltage decreases, the difference between the feedback voltage and the reference voltage increases, and the voltage output by the amplifying circuit 101 increases, so that the driving current of the output transistor 102 increases, the voltage drop of the output transistor 102 decreases, and the output voltage increases. When the output voltage of the output transistor 102 increases, the feedback voltage increases, the difference between the feedback voltage and the reference voltage decreases, and the voltage output by the amplifying circuit 101 decreases, so that the driving current of the output transistor 102 decreases, the voltage drop of the output transistor 102 increases, and the output voltage decreases. In addition, the low dropout amplifying circuit further comprises a miller capacitor C0, and the miller capacitor C0 is connected in series between the gate and the source of the output transistor 102, so that the difference between the main pole and the secondary pole of the low dropout linear voltage regulating circuit is increased, and the miller capacitor splits the poles. In the compensation process, a resistor Rc is connected in series at one end of the Miller capacitor C0, and a low-frequency zero point of the low dropout linear voltage regulator circuit is increased, so that the phase margin of the low dropout linear voltage regulator circuit is compensated, and the bandwidth is improved. However, in order to compensate for the phase margin and the bandwidth of the low dropout linear voltage regulator circuit, the added resistor Rc and the miller capacitor C0 consume a large area, which results in a large occupied area of the low dropout linear voltage regulator circuit and limits the application range of the low dropout linear voltage regulator circuit.
In view of the above problems, embodiments of the present invention provide a low dropout linear voltage regulator circuit. FIG. 2 is a schematic diagram of a low dropout linear voltage regulator circuit according to an embodiment of the present invention. As shown in fig. 2, the low dropout linear voltage regulating circuit includes an output voltage adjusting unit 110, a feedback unit 120, a differential amplifying unit 130 and a compensating unit 140; the differential amplifying unit 130 comprises an input symmetrical tube, the input symmetrical tube comprises a first symmetrical tube 131 and a second symmetrical tube 132, a control end ctrl1 of the first symmetrical tube 131 is electrically connected with a first signal input end VF of the differential amplifying unit 130, and a control end ctrl2 of the second symmetrical tube 132 is electrically connected with a second signal input end VREF of the differential amplifying unit 130; the first end a1 of the second symmetrical tube 132 is electrically connected to the output terminal VOUT1 of the differential amplifying unit 130; each symmetrical tube comprises two transistors; the grid electrode of the transistor in each symmetrical tube is electrically connected and is used as the control end of the symmetrical tube; the first pole of one transistor is electrically connected with the second pole of the other transistor to be used as the second end of the symmetrical tube; the second terminal a2 of the second symmetrical tube 132 is electrically connected to the first terminal of the compensation unit 140, and the second terminal of the compensation unit 140 is electrically connected to the output terminal VOUT of the low dropout linear voltage regulator circuit.
Specifically, the input terminal of the output voltage adjusting unit 110 is electrically connected to the first power input terminal VDD of the low dropout linear voltage regulator circuit; a first signal input end VF of the differential amplifying unit 130 is electrically connected to the output end of the feedback unit 120, and an output end VOUT1 of the differential amplifying unit 130 is electrically connected to the control end of the output voltage adjusting unit 110; the input terminal of the feedback unit 120 and the output terminal of the output voltage adjusting unit 110 are electrically connected to the output terminal VOUT of the low dropout linear voltage regulator circuit. The output voltage adjusting unit 110 may be a transistor, and the feedback unit 120 and the differential amplifying unit 130 form a feedback loop, and the feedback loop controls a voltage drop of the transistor, so as to realize that the low dropout linear voltage regulator circuit outputs a stable voltage.
The differential amplification unit 130 includes a first symmetric tube 131 and a second symmetric tube 132 each including two transistors. When the low dropout linear voltage regulator circuit operates, the transistor in the second symmetrical tube 132 electrically connected to the output terminal VOUT1 of the differential amplifying unit 130 operates in a saturation region, and the other transistor operates in a linear region, so that the equivalent output impedance of the transistor in the second symmetrical tube 132 electrically connected to the output terminal VOUT1 of the differential amplifying unit 130 is large. The second end a2 of the second symmetric tube 132 is electrically connected to the first end of the compensation unit 140, the transistor of the second symmetric tube 132 electrically connected to the output terminal VOUT1 of the differential amplification unit 130 and the compensation unit 140 form a compensation loop, and the compensation unit 140 may be a capacitor, for example. Therefore, the compensation circuit is equivalent to the series connection of a resistor and a capacitor, the effect of splitting the pole by the Miller effect can be realized, and the influence of the zero point offsetting the secondary pole can be generated, so that the phase margin of the low-dropout linear voltage stabilizing circuit is increased. On the basis, the occupied area of the transistor in the second symmetrical tube 132, which is electrically connected with the output terminal VOUT1 of the differential amplifying unit 130, is smaller than that of a large resistor, so that the occupied area of the low dropout linear voltage regulator circuit is reduced, and the application range of the low dropout linear voltage regulator circuit is increased. Moreover, the transistors in the second symmetrical tube 132 electrically connected to the output terminal VOUT1 of the differential amplifier unit 130 provide an equivalent large impedance, and no additional current bias or voltage bias is required, so that no additional power consumption is increased.
In addition, since the equivalent output impedance of the transistor in the second symmetric tube 132 electrically connected to the output terminal VOUT1 of the differential amplifying unit 130 is very large, the driving current output by the differential amplifying unit 130 is more shunted to the control terminal of the output voltage adjusting unit 110, and the magnitude of the bandwidth is equivalent to the magnitude of the capacitor not added, thereby ensuring the bandwidth of the low dropout linear voltage regulator circuit. And no capacitance-resistance device in the shunting branch affects the transmission rate of the current, so that the driving current output by the differential amplification unit 130 can be transmitted to the control end of the output voltage adjustment unit 110 more quickly, and the response speed of the low dropout linear voltage regulator circuit is improved.
Illustratively, with continued reference to fig. 2, the differential amplifying unit 130 further includes a first transistor T1, a second transistor T2, and a current source IA. The first transistor 131 includes a third transistor T3 and a fourth transistor T4, and the second transistor 132 includes a fifth transistor T5 and a sixth transistor T6; the third transistor T3 is electrically connected to the gate of the fourth transistor T4 and serves as the control terminal ctrl1 of the first transistor 131; a first pole of the third transistor T3 is electrically connected to a second pole of the fourth transistor T4, and a second pole of the third transistor T3 is electrically connected to a second pole of the first transistor T1; a first pole of the fourth transistor T4 is electrically connected to a first terminal of the current source IA; the fifth transistor T5 is electrically connected to the gate of the sixth transistor T6 and serves as the control terminal ctrl2 of the second symmetric tube 132; a first pole of the fifth transistor T5 is electrically connected to a second pole of the sixth transistor T6 and serves as a second terminal a2 of the second transistor 132; a second pole of the fifth transistor T5 is electrically connected to the second pole of the second transistor T2 and serves as the output terminal VOUT1 of the differential amplifying unit 130; a first pole of the sixth transistor T6 is electrically connected to a first terminal of the current source IA; the gates of the first transistor T1 and the second transistor T2 are electrically connected with the second pole of the first transistor T1, and the first poles of the first transistor T1 and the second transistor T2 are electrically connected with the first power input end VDD of the low dropout linear voltage regulator circuit; the second end of the current source IA is electrically connected with a second power input terminal VSS of the low dropout linear voltage regulator circuit.
specifically, when the low dropout linear voltage regulator circuit operates, the potential of the second pole of the fifth transistor T5 is equal to the voltage at the first power input terminal VDD input minus the conduction voltage drop of the second transistor T2, and the potential of the first pole of the fifth transistor T5 and the potential of the second pole of the sixth transistor T6 are equal to the voltage at the second voltage input terminal VSS input plus the conduction voltage drop of the sixth transistor T6. The voltage inputted from the first power input terminal VDD may be a positive power supply voltage, and the voltage inputted from the second voltage input terminal VSS may be a negative power supply voltage, so that the voltage difference between the first pole and the second pole of the fifth transistor T5 is large, i.e., the fifth transistor T5 operates in a saturation region, and may be equivalent to a large impedance. The compensation loop formed by the fifth transistor T5 and the compensation unit 140 includes equivalent large impedance and capacitance, so that the effect of splitting the pole by the miller effect can be achieved, and the influence of the zero point to cancel the secondary pole can be generated, so that the phase margin of the low dropout linear voltage regulator circuit is increased, and the bandwidth is ensured.
On the basis of the above technical solution, the third transistor T3 is the same as the fourth transistor T4, and the fifth transistor T5 is the same as the sixth transistor T6.
Specifically, the channel lengths and widths of the third transistor T3 and the fourth transistor T4 may be equal, and the channel lengths and widths of the fifth transistor T5 and the sixth transistor T6 may be equal. In the process of manufacturing the transistors, the transistors in the input pair transistors in the existing differential amplification can be equivalent to two same transistors, so that the process difficulty can be reduced, the two same transistors have the same performance, when a first power supply and a second power supply are respectively applied to a first pole and a second pole of a symmetrical tube, one transistor can work in a saturation region, and the other transistor can work in a linear region, so that a compensation loop in the low-dropout linear voltage stabilizing circuit has large equivalent output impedance.
In addition, since the first symmetrical tube 131 and the second symmetrical tube 132 constitute an output pair tube, the first symmetrical tube 131 and the second symmetrical tube 132 need to be the same, that is, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 may be the same.
with continued reference to fig. 2, the feedback unit 120 includes a first voltage dividing resistor Rc1, a second voltage dividing resistor Rc2, and a first capacitor C1; a first terminal of the first voltage-dividing resistor Rc1 and a first terminal of the first capacitor C1 are electrically connected as input terminals of the feedback unit 120, a second terminal of the first voltage-dividing resistor Rc1 and a second terminal of the first capacitor C1 are electrically connected to a first terminal of the second voltage-dividing resistor Rc2, and a second terminal of the second voltage-dividing resistor Rc2 is electrically connected to the second power input terminal VSS of the low-dropout linear voltage regulator circuit.
Specifically, the first voltage dividing resistor Rc1 and the second voltage dividing resistor Rc2 divide the voltage output by the output terminal VOUT of the low dropout linear voltage regulator circuit, and then feed back to the first signal input terminal VF of the differential amplifying unit 130, so as to implement feedback regulation by comparing with the reference voltage. And the two ends of the first voltage dividing resistor Rc1 are connected in parallel with the first capacitor C1 to form a resonant circuit, so that the response speed of the feedback unit 120 to the voltage output by the low dropout linear voltage regulator circuit can be improved.
FIG. 3 is a schematic diagram of another low dropout linear voltage regulator circuit according to an embodiment of the present invention. As shown in fig. 3, the current source IA includes a seventh transistor T7 and an eighth transistor T8; a first pole of the seventh transistor T7 serves as a first terminal of the current source IA, a second pole of the seventh transistor T7 is electrically connected to a first pole of the eighth transistor T8, a second pole of the eighth transistor T8 is electrically connected to the second power input terminal VSS, and gates of the seventh transistor T7 and the eighth transistor T8 are electrically connected for inputting the first level signal VB.
specifically, the level value of the first level signal VB is constant for controlling the on-currents of the seventh transistor T7 and the eighth transistor T8 to be constant, so that a constant current can be supplied to the differential amplifying unit 130.
FIG. 4 is a schematic diagram of another low dropout linear voltage regulator circuit according to an embodiment of the present invention. As shown in FIG. 4, the low dropout linear voltage regulator circuit further includes a power-on switching unit 150; the control terminal ctrl3 of the power-on switch unit 150 is used to input a power-on switch signal, the input terminal of the power-on switch unit 150 is electrically connected to the first power input terminal VDD of the low dropout linear voltage regulator circuit, and the output terminal of the power-on switch unit is electrically connected to the output terminal VOUT of the low dropout linear voltage regulator circuit.
specifically, the power-on switching signal is used to control the conductive state of the power-on switching unit 150. Before the low dropout linear voltage regulator circuit is powered on, the power-on switch signal controls the power-on switch unit 150 to be turned on, so that the differential amplification unit 130, the output voltage adjustment unit 110 and the feedback unit 120 are all in a short-circuited state, and the malfunction of the low dropout linear voltage regulator circuit is avoided. After the low dropout linear voltage regulator circuit is powered on, the power-on switch signal controls the power-on switch unit 150 to be turned off, so that the differential amplification unit 130, the output voltage adjustment unit 110 and the feedback unit 120 are normally powered on, and the low dropout linear voltage regulator circuit normally works.
Illustratively, the power-on switching unit 150 includes a power-on switching transistor T51 and a first resistor R1; the gate of the power-up switch transistor T51 serves as the control terminal ctrl3 of the power-up switch unit 150, the first pole of the power-up switch transistor T51 serves as the input terminal of the power-up switch unit 150, the second pole of the power-up switch transistor T51 is electrically connected to the first terminal of the first resistor R1, and the second terminal of the first resistor R1 serves as the output terminal of the power-up switch unit 150. The power-up switch transistor T51 is illustratively shown in fig. 4 as a P-type transistor. Before the low dropout linear voltage regulator circuit is powered on, the power-on switch signal is at a low level, and the power-on switch transistor T51 is conducted, so that the misoperation of the low dropout linear voltage regulator circuit is avoided. After the low dropout linear voltage regulator circuit is powered on, the power-on switch signal is at a high level, the power-on switch transistor T51 is cut off, and the low dropout linear voltage regulator circuit works normally. The first resistor R1 can be used to limit the current flowing through the power-on switch unit 150, thereby preventing the power-on switch transistor T51 from being burned out.
FIG. 5 is a schematic diagram of another low dropout linear voltage regulator circuit according to an embodiment of the present invention. As shown in fig. 5, the low dropout linear voltage regulator circuit further includes a clamping unit 160; the first end of the clamping unit 160 is electrically connected to the output terminal VOUT of the low dropout linear voltage regulator circuit, and the second end of the clamping unit 160 is electrically connected to the second power input terminal VSS of the low dropout linear voltage regulator circuit.
specifically, the clamping unit 160 has a clamping function for limiting the voltage output by the output terminal VOUT of the low dropout linear voltage regulator circuit, and preventing the output voltage from being unstable due to an excessive output voltage.
illustratively, the clamping unit 160 includes a plurality of cascaded transistors; a first pole of the transistor of the first stage serves as a first terminal of the clamping unit 160, and a second pole of the transistor of the last stage serves as a second terminal of the clamping unit 160; the gate of the transistor of each stage is electrically connected to the second pole thereof, and the second pole of the transistor of the previous stage is electrically connected to the first pole of the transistor of the next stage. The transistor of each level is equivalent to a diode, when the voltage output by the output end VOUT of the low dropout linear voltage stabilizing circuit is too large, the transistor is conducted, so that the voltage output by the output end VOUT of the low dropout linear voltage stabilizing circuit flows to the second power supply input end VSS, the voltage output by the output end VOUT of the low dropout linear voltage stabilizing circuit is limited, and the output voltage is prevented from being unstable due to the fact that the output voltage is too large.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A low dropout linear voltage stabilizing circuit is characterized by comprising an output voltage adjusting unit, a feedback unit, a differential amplifying unit and a compensating unit;
The differential amplification unit comprises an input symmetrical tube, the input symmetrical tube comprises a first symmetrical tube and a second symmetrical tube, the control end of the first symmetrical tube is electrically connected with the first signal input end of the differential amplification unit, and the control end of the second symmetrical tube is electrically connected with the second signal input end of the differential amplification unit; the first end of the second symmetric tube is electrically connected with the output end of the differential amplification unit;
Each symmetrical tube comprises two transistors; the grid electrode of the transistor in each symmetrical tube is electrically connected and is used as the control end of the symmetrical tube; the first pole of one transistor is electrically connected with the second pole of the other transistor to serve as the second end of the symmetrical tube; the second end of the second symmetric tube is electrically connected with the first end of the compensation unit, and the second end of the compensation unit is electrically connected with the output end of the low-dropout linear voltage stabilizing circuit.
2. The low dropout linear voltage regulator circuit of claim 1, wherein said compensation unit comprises a compensation capacitor.
3. the low dropout linear voltage regulator circuit of claim 1, wherein said differential amplification unit further comprises a first transistor, a second transistor, and a current source;
the first symmetrical tube comprises a third transistor and a fourth transistor, and the second symmetrical tube comprises a fifth transistor and a sixth transistor; the third transistor is electrically connected with the grid electrode of the fourth transistor and is used as the control end of the first symmetrical tube; a first pole of the third transistor is electrically coupled to a second pole of the fourth transistor, and a second pole of the third transistor is electrically coupled to a second pole of the first transistor; a first pole of the fourth transistor is electrically connected with a first end of the current source; the fifth transistor is electrically connected with the grid electrode of the sixth transistor and is used as the control end of the second symmetrical tube; a first pole of the fifth transistor is electrically connected with a second pole of the sixth transistor and is used as a second end of the second symmetrical tube; a second pole of the fifth transistor is electrically connected to a second pole of the second transistor and serves as an output end of the differential amplification unit; a first pole of the sixth transistor is electrically connected with a first end of the current source; the grid electrodes of the first transistor and the second transistor are electrically connected with the second pole of the first transistor, and the first poles of the first transistor and the second transistor are electrically connected with the first power supply input end of the low-dropout linear voltage stabilizing circuit; and the second end of the current source is electrically connected with the second power supply input end of the low-dropout linear voltage stabilizing circuit.
4. the low dropout linear voltage regulator circuit of claim 3 wherein said third transistor and said fourth transistor are identical and said fifth transistor and said sixth transistor are identical.
5. The low dropout linear voltage regulator circuit of claim 3 wherein said current source comprises a seventh transistor and an eighth transistor; a first pole of the seventh transistor is used as a first end of the current source, a second pole of the seventh transistor is electrically connected with a first pole of the eighth transistor, a second pole of the eighth transistor is electrically connected with the second power supply input end, and gates of the seventh transistor and the eighth transistor are electrically connected for inputting a first level signal.
6. The low dropout linear voltage regulator circuit of claim 1, further comprising a power-up switching unit;
The control end of the power-on switch unit is used for inputting a power-on switch signal, the input end of the power-on switch unit is electrically connected with the first power supply input end of the low-dropout linear voltage stabilizing circuit, and the output end of the power-on switch unit is electrically connected with the output end of the low-dropout linear voltage stabilizing circuit.
7. The low dropout linear voltage regulator circuit of claim 6, wherein said power-on switching unit comprises a power-on switching transistor and a first resistor;
The grid electrode of the power-on switch transistor is used as the control end of the power-on switch unit, the first electrode of the power-on switch transistor is used as the input end of the power-on switch unit, the second electrode of the power-on switch transistor is electrically connected with the first end of the first resistor, and the second end of the first resistor is used as the output end of the power-on switch unit.
8. The low dropout linear voltage regulator circuit of claim 1, further comprising a clamping unit; the first end of the clamping unit is electrically connected with the output end of the low-dropout linear voltage stabilizing circuit, and the second end of the clamping unit is electrically connected with the second power supply input end of the low-dropout linear voltage stabilizing circuit.
9. The low dropout linear voltage regulator circuit of claim 8, wherein said clamping unit comprises a plurality of cascaded transistors;
a first pole of the transistor of the first stage is used as a first end of the clamping unit, and a second pole of the transistor of the last stage is used as a second end of the clamping unit; the gate of the transistor of each stage is electrically connected to the second pole thereof, and the second pole of the transistor of the previous stage is electrically connected to the first pole of the transistor of the next stage.
10. The low dropout linear voltage regulator circuit of claim 1, wherein the feedback unit comprises a first voltage dividing resistor, a second voltage dividing resistor, and a first capacitor;
the first end of the first divider resistor and the first end of the first capacitor are electrically connected and serve as the input end of the feedback unit, the second end of the first divider resistor and the second end of the first capacitor are electrically connected with the first end of the second divider resistor, and the second end of the second divider resistor is electrically connected with the second power supply input end of the low-dropout linear voltage stabilizing circuit.
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| CN201910917473.0A CN110554728A (en) | 2019-09-26 | 2019-09-26 | Low dropout linear voltage stabilizing circuit |
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