CN110325005B

CN110325005B - splicing electronics

Info

Publication number: CN110325005B
Application number: CN201810651654.9A
Authority: CN
Inventors: 陈建志; 蔡善宏; 陈钦德; 温振富; 丁景隆
Original assignee: Innolux Display Corp
Current assignee: Innolux Corp
Priority date: 2018-03-29
Filing date: 2018-06-22
Publication date: 2021-03-12
Anticipated expiration: 2038-06-22
Also published as: KR20190114767A; CN110325005A; KR102729349B1

Abstract

The present invention relates to a spliced electronic device, comprising: a first electronic device, comprising: a first substrate, the first substrate having a first upper surface, a first lower surface opposite to the first upper surface, and a first side surface connecting the first upper surface and the first lower surface; and a first flexible substrate, the first flexible substrate comprising a first upper portion, a first lower portion, and a first connecting portion connecting the first upper portion and the first lower portion, wherein the first upper portion is arranged corresponding to the first upper surface, the first lower portion is arranged corresponding to the first lower surface, and the first connecting portion is arranged corresponding to the first side surface; and a second electronic device is arranged adjacent to the first electronic device and comprises: a second substrate, the second substrate having a second upper surface, a second lower surface opposite to the second upper surface, and a second side surface connecting the second upper surface and the second lower surface, wherein the second side surface is opposite to and adjacent to the first side surface, and the first connecting portion is located between the first side surface and the second side surface.

Description

Spliced electronic device

Technical Field

The present invention relates to a splicing electronic device, and more particularly, to a splicing electronic device with reduced seams.

Background

In the information age of today, how to acquire or transmit information more quickly or efficiently has been considered as one of the competitive indicators. For example, Public Information Display (PID) can provide real-time and multi-element Information, and has gradually replaced the conventional bulletin board nowadays, and the development of large-size and high-resolution Public Information Display is moving, so that each panel factory is focusing on developing large-size electronic devices and tiled electronic devices.

However, the conventional electronic devices usually use passive electronic devices, which require a large number of Integrated Circuit (IC) components and have disadvantages of high cost and high power consumption. Therefore, it is an important item to develop an active type electronic device with high resolution, reduced seams, and improved visual quality.

Disclosure of Invention

The invention provides a splicing electronic device, which is characterized by comprising: a first electronic device, comprising: a first substrate having a first upper surface, a first lower surface opposite to the first upper surface, and a first side surface connecting the first upper surface and the first lower surface; the first flexible substrate comprises a first upper part, a first lower part and a first connecting part for connecting the first upper part and the first lower part, wherein the first upper part is arranged corresponding to the first upper surface, the first lower part is arranged corresponding to the first lower surface, and the first connecting part is arranged corresponding to the first side surface; and a second electronic device disposed adjacent to the first electronic device and comprising: the second substrate is provided with a second upper surface, a second lower surface opposite to the second upper surface and a second side surface connecting the second upper surface and the second lower surface, wherein the second side surface is opposite to and adjacent to the first side surface, and the first connecting part is positioned between the first side surface and the second side surface.

Drawings

Fig. 1 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention.

Fig. 2 is a schematic diagram of a partially-tiled electronic device according to an embodiment of the invention.

Fig. 3 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention.

Fig. 4 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention.

Fig. 5 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention.

Fig. 6 is a cross-sectional view of a partially-tiled electronic device according to an embodiment of the invention.

Fig. 7 is a cross-sectional view of a partially-tiled electronic device according to an embodiment of the invention.

Fig. 8 is a cross-sectional view of a partially tiled electronic device according to an embodiment of the invention.

Fig. 9 is a cross-sectional view of a partially-tiled electronic device according to an embodiment of the invention.

Fig. 10 is a cross-sectional view of a partially-tiled electronic device according to another embodiment of the invention.

Fig. 11 is a cross-sectional view of a partially tiled electronic device according to another embodiment of the invention.

FIG. 12 is a schematic process diagram according to an embodiment of the present invention.

FIG. 13 is a schematic process diagram of another embodiment of the present invention.

Fig. 14A and 14B are partial schematic views of a tiled electronic device according to an embodiment of the invention. [ Main element ]

1. 3 first electronic device

11. 31 first substrate

111 first upper surface

112 first lower surface

113 first side surface

12. 32 first flexible substrate

122. 222 drive circuit layer

13. 23 Integrated Circuit

14. A first electronic unit

15. The first adhesion part

16. Protective layer

17. Third substrate

17a, 17c side edge surfaces

17b side edge surface

2 second electronic device

21 second substrate

211 second upper surface

212 second lower surface

213 second side surface

214 third side surface

22 second flexible substrate

24 second electronic unit

25 second adhesive member

26 packaging structure

33 display layer

34 fourth substrate

35 fifth base plate

36 rubber frame

4 backlight module

5 base plate

51. 52 substrate block

513. Lower surface

6 Flexible substrate

7 integrated circuit

8 Circuit board

A first upper part

A-A' tangent line

B first connecting part

B' flexible substrate connecting part

B11 first part outer surface

B12 first part inner surface

C first lower part

Lower part of C' flexible substrate

D second Upper part

E second connection part

F second lower part

G third connecting part

G' fourth connecting part

H third lower part

H' fourth lower part

G11 third part outer surface

G12 third part inner surface

D1 first distance

D2 second distance

DS1 substrate spacing

DB1 first edge distance

DB2 second edge distance

P cell pitch

P' first cell pitch

Intersection point of P1, P2 and P3

R1 first radius of curvature

R2 second radius of curvature

T1 first thickness

T2 second thickness

T3 third thickness

T4 fourth thickness

T5 fifth thickness

Sixth thickness T6

Seventh thickness of T7

Upper surface of US substrate

VD1 first virtual line

VD2 second virtual line

W1 electronic unit width

W2 first width

X first direction

Z second direction

Alpha first arc opening angle

Beta second arc opening angle

Detailed Description

The following description of the embodiments of the present invention is provided by way of specific examples, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.

Moreover, the use of ordinal numbers such as "first," "second," "third," "fourth," etc., in the specification and in the claims to modify a component of a request does not by itself connote or represent any preceding ordinal number of the request component, nor do they represent the order in which a requesting component and another requesting component are sequential or in order to facilitate a method of manufacture, but are used merely to distinguish one requesting component having a certain name from another requesting component having a same name.

Furthermore, references to positions in the specification and claims, such as "on," "over," or "above," may refer to the two components being in direct contact, or may refer to the two components not being in direct contact.

The following are exemplary embodiments of the invention, but the invention is not limited thereto and may be combined with other known structures to form further embodiments.

Referring to fig. 1 and fig. 2, fig. 1 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention. Fig. 2 is a schematic diagram of a partially-tiled electronic device according to an embodiment of the invention. The cross-sectional view of the tiled electronic device of fig. 1 is, for example, a cross-sectional view of the electronic device along the direction of line a-a' of fig. 2. The splicing electronic device of the present invention includes: a first electronic device 1, comprising: a first substrate 11, the first substrate 11 having a first upper surface 111, a first lower surface 112 opposite to the first upper surface 111, and a first side surface 113 connecting the first upper surface 111 and the first lower surface 112; and a first flexible substrate 12, the first flexible substrate 12 including a first upper portion a, a first lower portion C, and a first connecting portion B connecting the first upper portion a and the first lower portion C, wherein the first upper portion a is disposed corresponding to the first upper surface 111, the first lower portion C is disposed corresponding to the first lower surface 112, and the first connecting portion B is disposed corresponding to the first side surface 113; and a second electronic device 2 disposed adjacent to the first electronic device 1 and comprising: a second substrate 21, the second substrate 21 having a second upper surface 211, a second lower surface 212 opposite to the second upper surface 211, and a second side surface 213 connecting the second upper surface 211 and the second lower surface 212, wherein the second side surface 213 is opposite to and adjacent to the first side surface 113, and the first connecting portion B is located between the first side surface 113 and the second side surface 213. The two side surfaces are opposite and adjacent to each other, for example, other side surfaces may not be included between the two side surfaces, or other components may be included between the two side surfaces (for example, an adhesive, air, or other components may be included, but the invention is not limited thereto).

In some embodiments, the second electronic device 2 further includes a second flexible substrate 22, the second flexible substrate 22 includes a second upper portion D, a second lower portion F, and a second connecting portion E connecting the second upper portion D and the second lower portion F, the second upper portion D is disposed corresponding to the second upper surface 211, and the second lower portion F is disposed corresponding to the second lower surface 212. In some embodiments, the second connecting portion E is disposed corresponding to the second side surface 213 and located between the second side surface 213 and the first connecting portion B. In some embodiments, the second substrate 21 further includes a third side surface 214 opposite to the second side surface 213, the third side surface 214 may be connected to the second upper surface 211 and the second lower surface 212, for example, and the second connecting portion E is disposed corresponding to the third side surface 214 (as shown in fig. 1), but the invention is not limited thereto. In addition, as shown in fig. 1, two extension lines (refer to the dotted lines in the figure) respectively extend from the first upper surface 111 and the first lower surface 112 of the first substrate 11, the two extension lines may define a first connection portion B, the first flexible substrate 12 above the extension line extending from the first upper surface 111 (i.e., the portion of the first flexible substrate 12 disposed on the first upper surface 111) may be defined as a first upper portion a, and the first flexible substrate 12 below the extension line extending from the first lower surface 112 (i.e., the portion of the first flexible substrate 12 disposed below the first lower surface 112) may be defined as a first lower portion C. Similarly, the following related upper, connecting and lower portions are defined in a similar manner.

The first connecting portion B of the first flexible substrate 12 is disposed corresponding to the first side surface 113, and the first lower portion C is disposed corresponding to the first lower surface 112, such that the first connecting portion B is disposed between the first side surface 113 and the second side surface 213. By disposing the first connecting portion B between the first side surface 113 and the second side surface 213, the first upper surface 111 does not have to reserve some peripheral regions for bonding the integrated circuit or the circuit board, thereby improving the effect of reducing the seams.

In this embodiment, the first substrate 11 and/or the second substrate 21 may be, for example, a glass substrate, a quartz substrate, a sapphire substrate, a plastic substrate, other suitable substrates, or a combination thereof, but the invention is not limited thereto. The first substrate 11 and/or the second substrate 21 may be made of the same or different materials. In some embodiments, the first substrate 11 and/or the second substrate 21 may be, for example, a base material having a better resistance to high temperature (e.g., less expansion change at high temperature) or humidity (e.g., less water absorption change at high humidity). In some embodiments, the first substrate 11 and/or the second substrate 21 may be, for example, a substrate having a supporting property or a high hardness property. In some embodiments, the second flexible substrate 22 and/or the first flexible substrate 12 can be, for example, a flexible substrate or a film, and the material thereof can be Polycarbonate (PC), Polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), other suitable materials, or a combination thereof, but the invention is not limited thereto. The second flexible substrate 22 and/or the first flexible substrate 12 may be the same or different materials, for example.

In addition, the first substrate 11 and/or the second substrate 21 may have a first young's modulus (young's modulus), and the first flexible substrate 12 and/or the second flexible substrate 22 may have a second young's modulus (young's modulus), for example. In some embodiments, the first young's modulus may be, for example, greater than the second young's modulus. In some embodiments, the ratio of the first young's modulus to the second young's modulus may be, for example, between 10 and 150, but the invention is not limited thereto.

In some embodiments, the ratio of the thickness of the first substrate 11 to the thickness of the first flexible substrate 12 may be, for example, between 8 and 50 (8 ≦ first substrate thickness/first flexible substrate thickness ≦ 50). Similarly, the ratio of the thickness of the second substrate 21 to the thickness of the second flexible substrate 22 can be, for example, between 8 and 50 (8 ≦ second substrate thickness/second flexible substrate thickness ≦ 50). In some embodiments, the thickness of the first substrate 11 and/or the second substrate 21 can be, for example, 25 μm to 25mm (25 μm ≦ 25mm for the thickness of the first substrate and/or the second substrate). In some embodiments, the thickness of the first flexible substrate 12 and/or the second flexible substrate 22 can be, for example, 3 μm to 500 μm (3 μm ≦ 500 μm), but the invention is not limited thereto. In some embodiments, the thickness of the first flexible substrate 12 and/or the second flexible substrate 22 can be, for example, 3 μm to 30 μm (3 μm ≦ 30 μm).

In some embodiments, the first electronic device 1 further includes a driving circuit layer 122, and the driving circuit layer 122 may be disposed on the first upper portion a, the first lower portion C, and the first connecting portion B, for example, but the invention is not limited thereto. In some embodiments, as shown in fig. 1 and fig. 2, the first electronic device 1 further includes an Integrated Circuit (IC) 13 disposed corresponding to the first bottom surface 112 and coupled to the driving circuit layer 122. In some embodiments, coupling may refer to two elements being electrically connected to each other or two elements being electrically connected to each other through another element. In some embodiments, the integrated circuit 13 may be disposed on the first lower portion 112, for example. In some embodiments, the integrated circuit 13 may be coupled to the driving circuit layer 122, for example, through a circuit board (including a flexible circuit board or a rigid circuit board). In some embodiments, the integrated circuit 13 may be disposed between the first lower portion C and the first lower surface 112, for example. In some embodiments, the first electronic device 1 may be disposed on a substrate board (not shown) of a splicing device, the substrate board may have a groove structure, and the integrated circuit 13 may be disposed in the groove structure of the substrate board. In some embodiments, the integrated circuit 13 may be coupled with a driving circuit layer 122 disposed on the first lower portion C, for example. In detail, the integrated circuit 13 can be adhered to the driving circuit layer 122 by Anisotropic Conductive Film (ACF) or solder paste, for example.

Similarly, as shown in fig. 2, in some embodiments, the second electronic device 2 further includes a driving circuit layer 222, and the driving circuit layer 222 may be disposed on the second upper portion D, the second lower portion F, and the second connecting portion E, for example. In some embodiments, the second flexible substrate 22 further includes a third connecting portion G connected to the second upper portion D, the third connecting portion G is disposed corresponding to the second side surface 213, and the third connecting portion G is located between the second side surface 213 and the first connecting portion B. In some embodiments, the third connection portion G may be located between the first connection portion B and the second side surface 213, for example. In some embodiments, the second flexible substrate 22 further includes a third lower portion H, the third connecting portion G is connected between the second upper portion D and the third lower portion H, and the third lower portion H can be disposed corresponding to the second lower surface 212, for example. In some embodiments, the driving circuit layer 222 is not disposed corresponding to the third connection portion G.

In some embodiments, the second electronic device 2 further includes an integrated circuit 23 disposed corresponding to the second lower surface 212 and coupled to the driving circuit layer 222. In some embodiments, the integrated circuit 23 may be disposed on the second lower portion 212, for example. In some embodiments, the integrated circuit 23 may be coupled with a driving circuit layer 222 disposed on the second lower portion F, for example. The integrated circuit 23 is arranged in a similar manner to the integrated circuit 13 and will not be described again here. The driving circuit layer 122 and/or the driving circuit layer 222 may include, for example, active driving elements (e.g., switching transistors, driving transistors, or other transistors), data lines, scan lines, conductive pads, or dielectric layers or other lines, but the invention is not limited thereto. The conductive materials of the data lines, the scan lines and the conductive pads in the driving circuit layer 122 and/or the driving circuit layer 222 are not limited, and the materials thereof can be, for example, metal conductive materials or transparent conductive materials, but the invention is not limited thereto. The metallic conductive material may include, for example, copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, a copper alloy, an aluminum alloy, a molybdenum alloy, a tungsten alloy, a gold alloy, a chromium alloy, a nickel alloy, a platinum alloy, a titanium alloy, other suitable metals, or combinations thereof, but the present invention is not limited thereto. The transparent conductive material may include Indium Tin Oxide (ITO), Indium Gallium Zinc Oxide (IGZO), combinations thereof, or other conductive materials with good conductivity or low impedance, but the invention is not limited thereto.

In some embodiments, the second flexible substrate 22 may further include a connecting portion corresponding to other sides of the second substrate 21, such as other sides except the second side 213 and the third side 214, and the other sides may be sides connected to the second side 213 or the third side 214, for example, but the invention is not limited thereto. Here, the connection portion of the second flexible substrate 22 on which the driving circuit layer 222 is disposed is generally referred to as a second connection portion E, and the connection portion of the second flexible substrate 22 on which the driving circuit layer 222 is not disposed is generally referred to as a third connection portion G. In some embodiments, the second flexible substrate 22 can include at least one second connecting portion E, for example. In some embodiments, the second flexible substrate 22 may, for example, include at least one second connecting portion E and a second lower portion F connected thereto, wherein the second connecting portion E may, for example, be connected between the second upper portion D and the second lower portion F. In some embodiments, the second flexible substrate 22 may include at least one third connection portion G, for example. In some embodiments, the second flexible substrate 22 may, for example, include at least one third connecting portion G and a third lower portion H connected thereto, wherein the third connecting portion G may, for example, be connected between the second upper portion D and the third lower portion H.

As shown in fig. 2, in some embodiments, the first flexible substrate 12 is similar to the second flexible substrate 22, and the first flexible substrate 12 may further include at least a fourth connecting portion G', which may be connected to the first upper portion a, for example. In some embodiments, the first flexible substrate 12 further includes a fourth lower portion H ', the fourth connecting portion G' is connected between the first upper portion a and the fourth lower portion H ', and the fourth lower portion H' may be disposed corresponding to the first lower surface 112, for example. In some embodiments, the driving circuit layer 122 is not disposed corresponding to the fourth connection portion G'. Here, the connection portion of the first flexible substrate 12 on which the driving circuit layer 122 is disposed is generally referred to as a first connection portion B, and the connection portion of the first flexible substrate 12 on which the driving circuit layer 122 is not disposed is generally referred to as a fourth connection portion G'. In some embodiments, the flexible substrate 12 may include at least one first connecting portion B, for example. In some embodiments, the first flexible substrate 12 may, for example, include at least one first connecting portion B and a first lower portion C connected thereto, wherein the first connecting portion B may, for example, be connected between the first upper portion a and the first lower portion C. In some embodiments, the first soft base 12 may, for example, include at least one fourth connecting portion G'. In some embodiments, the first soft base 12 may, for example, include at least one fourth connecting portion G 'and a fourth lower portion H' connected thereto, wherein the fourth connecting portion G 'may, for example, be connected between the first upper portion a and the fourth lower portion H'.

In some embodiments, the second connection portion E may be disposed corresponding to the second side surface 213, for example. In detail, the second connection portion E connected with the second lower portion F may be located between the first connection portion B and the second side surface 213, for example, wherein the second lower portion F is coupled with the integrated circuit 23. At this time, the integrated circuits of the first electronic device 1 and the second electronic device 2 may be arranged in a mirror image manner, for example, but the invention is not limited thereto, and the details can be referred to the following fig. 6.

As shown in fig. 1, the first electronic device 1 further includes a plurality of first electronic units 14 disposed on the first upper surface 111, and the second electronic device 2 further includes a plurality of second electronic units 24 disposed on the second upper surface 211, wherein the first electronic unit 14 has an edge electronic unit 14 'adjacent to the second electronic device 2, a first distance D1 is provided between the edge electronic unit 14' and a nearest one of the second electronic units, a substrate spacing DS1 is provided between the first side surface 113 and the second side surface 213, and the substrate spacing DS1 may be, for example, smaller than or equal to the first distance D1. In detail, a minimum distance between one of the first electronic units 14 nearest to the second side surface 213 (i.e., the edge electronic unit 14 ') and one of the second electronic units 24 nearest to the edge electronic unit 14' is defined as a first distance D1 in the first direction X. The substrate spacing DS1 may be defined as the maximum distance between the first side surface 113 and the second side surface 213 in the first direction X. It should be noted that the first direction X may have different definitions under different conditions. For example, the first direction may be defined as a direction in which the first electronic device 1 and the second electronic device 2 are arranged, in other words, the first electronic device 1 and the second electronic device 2 may be arranged along the first direction. In the case that the included angle between the first side surface 113 and the first upper surface 111 is substantially a right angle (e.g., the angle is in the range of 85 ° to 95 °), the first direction X may be defined as a normal direction of the first side surface 113. In some embodiments, when the included angle between the first side surface 113 and the first upper surface 111 is not a straight angle (e.g., an angle other than 85 ° to 95 °), there may be a connecting corner edge between the first side surface 113 and the first upper surface 111, the connecting corner edge has an extending direction, and a direction perpendicular to the extending direction and parallel to the first upper surface 111 may be defined as the first direction X. Alternatively, in some embodiments, when the connection edge is an arc or an irregular edge, or the first electronic device 1 and the second electronic device 2 are staggered (for example, in a mosaic arrangement), a central point of the first upper surface 111 of the first electronic device 1 and a central point of the second upper surface 211 of the second electronic device 2 may be approximately connected to form a virtual connection line, and an extending direction of the virtual connection line may be defined as a first direction X. In some embodiments, as shown in fig. 1 and 2, the plurality of first electronic units 14 may be disposed on the first upper portion a, and the plurality of second electronic units 24 may be disposed on the second upper portion D.

In addition, a second distance D2 exists between two adjacent first electronic units 14 of the first electronic device 1, and a ratio of the first distance D1 to the second distance D2 is between 0.9 and 1.1(0.9 ≦ D1/D2 ≦ 1.1). In some embodiments, the ratio of the first distance D1 to the second distance D2 is between 0.95 and 1.05(0.95 ≦ D1/D2 ≦ 1.05). In some embodiments, the ratio of the first distance D1 to the second distance D2 is between 0.97 and 1.03(0.97 ≦ D1/D2 ≦ 1.03). In some embodiments, the ratio of the first distance D1 to the second distance D2 is between 0.98 and 1.02(0.98 ≦ D1/D2 ≦ 1.02). In some embodiments, the difference between the first distance D1 and the second distance D2 is within 10%. In some embodiments, the difference between the first distance D1 and the second distance D2 is within 5%. In some embodiments, the difference between the first distance D1 and the second distance D2 is within 3%. In some embodiments, the difference between the first distance D1 and the second distance D2 is within 2%. The second distance D2 can be defined as the minimum distance between two adjacent ones of the first electronic units 14 (or the second electronic units 24) in the first direction X. The electronic device of the present invention can visually reduce the seam effect by the design of the relationship between the first distance D1 and the second distance D2. In addition, the first electronic units 14 and/or the second electronic units 24 may have an electronic unit width W1, for example, and the electronic unit width W1 may be defined as a maximum width of the first electronic unit 14 and/or the second electronic unit 24 in the first direction X, for example. It should be noted that, in some embodiments, when the first electronic device 1 and the second electronic device 2 are display devices, the first electronic unit 14 and/or the second electronic unit 24 may include a plurality of light emitting units, for example, the plurality of light emitting units may have the same color or different colors, for example, the first electronic unit 14 and/or the second electronic unit 24 may include a blue light emitting unit, a green light emitting unit, and a red light emitting unit, for example, but the invention is not limited thereto. In some embodiments, the first electronic unit 14 and/or the second electronic unit 24 may include a white light emitting unit, for example. Each of the first electronic units 14 and/or the second electronic units 24 may, for example, frame a minimum rectangular outline, and a maximum width of the outline in the first direction X is defined as the electronic unit width W1.

In some embodiments, each of the blue light-emitting unit, the green light-emitting unit, and the red light-emitting unit may include at least one light-emitting element (not shown). For example, taking a micro light-emitting diode (micro light-emitting diode) electronic device as an example, the light-emitting unit areas of the light-emitting units with different colors can be defined by a packaging cup containing the micro light-emitting diode, and the packaging cup of the micro light-emitting diode can have at least one light-emitting element with the same color, but the invention is not limited thereto. In some embodiments, taking the micro led electronic device as an example, the light emitting unit areas of the light emitting units with different colors may be defined according to the opening portion of the patterned light shielding layer, and the light shielding layer may include (black matrix, BM) or a glue layer (cured) with light shielding property, for example, but the invention is not limited thereto. If the organic light emitting diode electronic device is taken as an example, the light emitting unit areas of the light emitting units of different colors can be defined by, for example, a Pixel Defining Layer (PDL), but the invention is not limited thereto. If the liquid crystal electronic device is taken as an example, the light emitting unit areas of the light emitting units with different colors can be defined according to the opening portion of the patterned light shielding layer, and the light shielding layer can include (black matrix, BM) or other material layers with light shielding function, or an area surrounded by the adjacent scan lines and the adjacent data lines, for example, but the invention is not limited thereto.

The first electronic units 14 have a unit pitch P therebetween, which is defined as a distance between one end of one of the two adjacent first electronic units 14 and an end of the other one of the two adjacent first electronic units 14 corresponding to the same position in the first direction X. Alternatively, the cell pitch P may be defined as a distance in the first direction X from the center of the blue electronic unit (or other electronic units with the same color) of two adjacent first electronic units 14. As mentioned above, the first electronic units 14 have a first unit pitch P 'between an edge electronic unit 14' adjacent to the second electronic device 2 and the second electronic unit 24 nearest to (and corresponding to) the edge electronic unit 14 ', and the first unit pitch P' can be defined as a distance in the first direction X between the edge electronic unit 14 'and one end (or a center point) of the second electronic unit 24 nearest to (and corresponding to) the edge electronic unit 14'. Alternatively, the first cell pitch P ' is a distance between a blue electronic unit (or other electronic units with the same color) in the edge electronic unit 14 ' and a blue electronic unit (or other electronic units with the same color) in the second electronic unit 24 nearest to the edge electronic unit 14 ', and one end (or a center point) of each of the two blue electronic units (or other electronic units with the same color) corresponding to the same position is located in the first direction X, but the invention is not limited thereto. In some embodiments, the ratio of the first unit pitch P 'to the unit pitch P can be, for example, between 0.9 and 1.1(0.9 ≦ P'/P ≦ 1.1). In some embodiments, the ratio of the first unit pitch P 'to the unit pitch P can be, for example, between 0.95 and 1.05(0.95 ≦ P'/P ≦ 1.05). In some embodiments, the ratio of the first cell pitch P 'to the cell pitch P can be, for example, between 0.97 and 1.03(0.97 ≦ P'/P ≦ 1.03). In some embodiments, the ratio of the first cell pitch P 'to the cell pitch P can be, for example, between 0.98 and 1.02(0.98 ≦ P'/P ≦ 1.02). In some embodiments, the difference between the first cell pitch P' and the cell pitch P may be, for example, within 10%. In some embodiments, the difference between the first cell pitch P' and the cell pitch P may be, for example, within 5%. In some embodiments, the difference between the first cell pitch P' and the cell pitch P may be, for example, within 3%. In some embodiments, the difference between the first cell pitch P' and the cell pitch P may be, for example, within 2%. Through the design of the relationship between the first unit pitch P' and the unit pitch P, the effect of splicing can be visually reduced.

It should be noted that the relationship between the first cell pitch P' and the cell pitch P needs to be defined under the same definition. For example, in one embodiment, if the distance between the center points of the blue electronic units in the two adjacent first electronic units 14 in the first direction X is defined as a unit pitch P, the blue electronic units in the edge electronic unit 14 ' and the blue electronic units in the second electronic unit 24 nearest to the edge electronic unit 14 ' are also defined as a first unit pitch P '. In another embodiment, if the distance between the center points of the respective green electronic units of the two adjacent first electronic units 14 in the first direction X is defined as a unit pitch P, the distance between the center points of the two green electronic units in the edge electronic unit 14 ' and the green electronic unit of the second electronic unit 24 nearest to the edge electronic unit 14 ' is also defined as a first unit pitch P '. If the electronic unit with other color is selected, and so on.

In addition, the following formula can be satisfied by designing the substrate spacing DS 1: DS1+ W1 ≦ P, at which time the tiled electronic device can visually reduce the effect of the seam.

The first electronic device 1 or the second electronic device 2 may include, for example, a display device, an antenna device, a detection (or sensing) device, a backlight device, and the like, and when the electronic device is applied to different situations, the structure of the electronic device may be adjusted according to the situations, but the invention is not limited thereto.

When the first electronic device 1 or the second electronic device 2 is an antenna device, it can be a device for transmitting or receiving radio waves or radiation, for example. When the first electronic device 1 or the second electronic device 2 is a display device, it can be used to display a picture or an image, for example. When the first electronic device 1 or the second electronic device 2 is a detecting (or sensing) device, it can be, for example, a device for detecting light (including X-ray, infrared light, or visible light, but the invention is not limited thereto) or a device for recognizing a biometric characteristic (fingerprint, human face, pupil, but the invention is not limited thereto).

The electronic device may include, for example, a Liquid Crystal (LC), an organic light-emitting diode (OLED), a quantum dot organic light-emitting diode (QOLED), a Quantum Dot (QD), a fluorescent (fluorescent) material, a phosphorescent (phosphor) material, a light-emitting diode (LED), a micro-light-emitting diode (micro-emitting diode or micro-light-emitting diode), or other materials, but the invention is not limited thereto. In some embodiments, the chip size of the light emitting diode is about 300 micrometers (μm) to 10 millimeters (mm), the chip size of the micro light emitting diode (mini LED) is about 100 micrometers (μm) to 300 micrometers (μm), and the chip size of the micro light emitting diode (micro LED) is about 1 micrometer (μm) to 100 micrometers (μm), but the invention is not limited thereto.

In some embodiments, the first electronic unit 14 and/or the second electronic unit 24 may include a micro light-emitting diode (micro-led) or a mini light-emitting diode (mini-led), for example, and the first electronic device 1 and/or the second electronic device 2 may be an Active Matrix (AM) operating electronic device, for example. For example, the first electronic units 14 on the first electronic device 1 have respective active driving components, and different active driving components can, for example, respectively control the on or off of the first electronic units 14, but the invention is not limited thereto.

In some embodiments, when the first electronic unit 14 and/or the second electronic unit 24 comprise micro light emitting diodes, for example, the first electronic device 1 and/or the second electronic device 2 may further comprise an encapsulation structure 26, for example, the encapsulation structure 26 may be used to protect the first electronic unit 14 (or the second electronic unit 24) from being impacted by external moisture, air, or other external forces to affect the display quality, but the invention is not limited thereto. The shape of the package structure 26 is not limited to that shown in the drawings. In some embodiments, the package structure 26 may be disposed on the first electronic unit 14 (or the second electronic unit 24), for example, along the structure of the first electronic unit 14 (or the second electronic unit 24). In some embodiments, the package structure 26 may be disposed on the first upper surface 111 and cover the first electronic unit 14, for example, but the invention is not limited thereto. In some embodiments, the package structure 26 may be disposed along the first flexible circuit board 12, but it should be noted that the package structure 26 needs to expose at least a portion of the driving circuit layer 122 correspondingly disposed on the first lower portion C, and the exposed driving circuit layers 122 may be coupled to the integrated circuit 13. In some embodiments, the package structure 26 may, for example, comprise a material having a different thickness. In some embodiments, the package structure 26 may further include another cover substrate (not shown), for example, and the package structure 26 may be used as a leveling layer. The package structure 26 may, for example, comprise a material having insulating properties that do not affect the short-circuiting of the first electronic units 14 to each other.

Fig. 3 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention. Fig. 3 is similar to the electronic device shown in fig. 1, except that the second flexible substrate 22 does not include the third connecting portion G, and the first flexible substrate 12 does not include the fourth connecting portion G'. More specifically, the second flexible substrate 22 may not be disposed between the second side surface 213 of the second substrate 21 and the first side surface 113 of the first substrate 11. In some embodiments, the second side surface 213 can be, for example, directly contacted with the first connecting portion B of the first flexible substrate 12, but the invention is not limited thereto. In some embodiments, when other devices (for example, a protective layer or an adhesive member, but not limited to the invention) are disposed on the first connecting portion B of the first flexible substrate 12, the second side surface 213 can be, for example, in contact with the other devices disposed on the first connecting portion B. In the embodiments of fig. 1 to 3, the first electronic unit 14 and/or the second electronic unit 24 may be substantially aligned with the first side surface 113 and/or the second side surface 213, respectively, for example, but the invention is not limited thereto. The term "aligned" means that a side of one of the first electronic unit 14 and/or the second electronic unit 24 substantially overlaps the first side surface 113 and/or the second side surface 213 in a second direction Z, wherein the second direction Z can be defined as a normal direction of the first upper surface 111, but the invention is not limited thereto.

Fig. 4 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention. Fig. 4 is similar to the electronic device shown in fig. 1, except that a first edge distance DB1 is located between one of the first electronic units 14 of the first electronic device 1, which is closest to the second side surface 213, and the first side surface 113 in the first direction X. In detail, the first edge distance DB1 may be, for example, the maximum distance between the edge electronic unit 14' (the one of the first electronic units 14 closest to the second side surface 213) and the first side surface 113 in the first direction X. Similarly, a second edge distance DB2 is provided between the second side surface 213 and one of the second electronic units 24 closest to the first side surface 113 of the second electronic device 2 in the first direction X, and the second edge distance DB2 may be, for example, the maximum distance between the second side surface 213 and one of the second electronic units 24 closest to the first side surface 113 in the first direction X. The term "nearest neighbor" may refer to one of the plurality of first electronic units 14 nearest to the second side surface 213 and/or one of the plurality of second electronic units 24 nearest to the first side surface 113 in a local area. As in the embodiment of fig. 4, the following equation may be satisfied by designing the substrate spacing DS 1: DS1+ W1+ DB1+ DB2 ≦ P, where the tiled electronic device can visually reduce the effect of the seam.

Fig. 5 is a cross-sectional view of a tiled electronic device according to an embodiment of the invention. Fig. 5 is similar to the electronic device shown in fig. 3, except that the driving circuit layer 122 is disposed on the first upper surface 111 of the first substrate 11, and a circuit (not shown) on the first flexible substrate 12 can be coupled to the first electronic unit 14, for example, through the driving circuit layer 122. The first electronic units 14 may be disposed on the first upper surface 111 and respectively coupled to one of a plurality of switching transistors (not shown) in the driving circuit layer 122, and the first electronic units 14 may be respectively coupled to one of a plurality of scan lines (not shown) in the driving circuit layer 122 and one of a plurality of data lines (not shown) in the driving circuit layer 122. In detail, the driving circuit layer 122 may, for example, include a plurality of conductive pads (not shown) correspondingly disposed on the first upper surface 111 adjacent to the first side surface 113, and the circuit on the first flexible substrate 12 also includes a plurality of conductive pads (not shown), and the plurality of conductive pads on the first upper surface 111 and the plurality of conductive pads on the first flexible substrate 12 may, for example, be coupled to each other.

In some embodiments, an adhesive element may be further disposed between the Conductive pads on the first upper surface 111 and the Conductive pads on the first flexible substrate 12, and the adhesive element may include Anisotropic Conductive Film (ACF), Acrylic resin (Acrylic resin), Acrylic polyol resin (Acrylic resin), or other suitable resin material combinations. While the adhesive component may include, for example, gold (Au), nickel (Ni), lead (Pd), silver (Ag), copper (Cu), tin (Sn), other suitable metals or conductive materials, or any combination thereof, the invention is not limited thereto. In some embodiments, a solder material may be further disposed between the conductive pads on the first top surface 111 and the conductive pads on the first flexible substrate 12, and the solder material may include, for example, gold (Au), nickel (Ni), lead (Pd), silver (Ag), copper (Cu), tin (Sn), other suitable metals or conductive materials, or any combination thereof, but the invention is not limited thereto.

In the embodiment of fig. 5, the first upper portion a of the first flexible substrate 12 can be disposed only on the first upper surface 111 adjacent to the first side surface 113, and the first connecting portion B and the first lower portion C of the first flexible substrate 12 are disposed corresponding to the first side surface 113 and the first lower surface 112, respectively, such that the first connecting portion B is disposed between the first side surface 113 and the second side surface 213. The effect of the seam can be visually reduced by the arrangement of the first connecting portion B and the first lower portion C. The first Flexible substrate 12 in the embodiment shown in fig. 5 can be, for example, a Flexible Printed Circuit (FPC), and the first Flexible substrate 12 can include, for example, an integrated Circuit or a conductive wire, but the invention is not limited thereto. In some embodiments, when the driving circuit layer 122 is disposed on the first upper surface 111 of the first substrate 11, the first flexible substrate 12 may not include the first upper portion a, i.e., the first flexible substrate 12 may include only the first connecting portion B or further include the first lower portion C, for example, in this embodiment, the driving circuit layer 122 may be further disposed on a portion of the first side surface 113.

Fig. 6 is a cross-sectional view of a partially-tiled electronic device according to an embodiment of the invention. Fig. 6 is similar to the electronic device shown in fig. 1, with the difference that the first electronic device 1 further includes a first adhesive 15, and the first adhesive 15 may be disposed between the first side surface 113 and the first connecting portion B, for example. Another difference between the electronic device shown in fig. 6 and the electronic device shown in fig. 1 is that the second connecting portion E (and the second lower portion F) is disposed at a different position. For example, the second connection portion E may be located between the first side surface 113 and the second side surface 213, for example. In some embodiments, the first adhesion member 15 may be disposed between the first lower portion C and the first lower surface 112, for example. In some embodiments, the first adhesion member 15 can be disposed between the first side surface 113 and the first connection portion B, and also disposed between the first lower portion C and the first lower surface 112, for example. In some embodiments, there may be air between the first side surface 113 and the first connection portion B, for example. In some embodiments, the first adhesion member 15 can be in contact with at least one of the first side surface 113 and the first lower surface 112 of the first substrate 11, for example. In some embodiments, the first adhesive 15 may be, for example, discontinuously disposed between the first substrate 11 and the first flexible substrate 12, and the first adhesive 15 may, for example, include adhesive materials of different materials. When the first adhesive 15 is disposed between the first lower surface 112 and the first lower portion C, the first lower portion C of the first electronic device 1 can be positioned or fixed, so as to reduce damage to the integrated circuit 13 disposed on the first lower portion C due to movement of the first lower portion C, or reduce deformation (e.g., deformation or fracture of the first connecting portion B) of the first flexible substrate 12 due to movement of the first lower portion C. By disposing the first adhesive 15 between the first lower surface 112 and the first lower portion C, the yield of the first electronic device 1 and the second electronic device 2 can be increased. In addition, when the first adhesion member 15 is disposed between the first side surface 113 and the first connection portion B, the adhesion between the first flexible substrate 12 and the first substrate 11 can be improved, and a gap between the first connection portion B and the first side surface 113 can be reduced, so that the shape of the first connection portion B is changed or broken due to external impact or impact, or the driving circuit layer above the first connection portion B is affected to affect the operation quality during the splicing device.

In some embodiments, the first adhesion member 15 can have a first thickness T1 in the first direction X, and the first thickness T1 can be defined as the maximum thickness of the first adhesion member 15 in the first direction X. In some embodiments, the first thickness T1 may be, for example, less than 300 micrometers (μm), although the invention is not limited thereto. In some embodiments, the first thickness T1 may be, for example, less than 100 micrometers (μm).

In some embodiments, the first connection portion B (including the driving circuit layer 122 disposed on the first connection portion B) has a second thickness T2 in the first direction X, and the second thickness T2 may be defined as a maximum thickness of the first connection portion B (including the driving circuit layer 122 disposed on the first connection portion B) in the first direction X. In some embodiments, the first upper portion a and the first connecting portion B of the first flexible substrate 12 have different thicknesses. In some embodiments, the thicknesses of the first lower portion C and the first connecting portion B of the first flexible substrate 12 are different. In some embodiments, the first connection portion B may have a plurality of thicknesses, for example, in the first direction X. In some embodiments, the first connecting portion B may have two end portions connected to the first lower portion C and the first upper portion a, respectively, and a middle portion connected to the two end portions, and the thickness of the middle portion in the first direction X is greater than that of the two end portions of the first connecting portion B in the first direction X. In some embodiments, when the thickness of the first connecting portion B is designed to be greater than that of the first upper portion a, the risk of fracture of the first connecting portion B caused by impact of an external force can be reduced. In some embodiments, when the thickness of the first connecting portion B is designed to be smaller than that of the first upper portion a, a problem of a seam generated by splicing can be reduced. The thickness of the first connecting portion B is designed to be adjusted according to the required purpose.

In some embodiments, when the third connecting portion G of the second flexible substrate 22 is not located between the first side surface 113 and the second side surface 213, the second side surface 213 may be opposite to or directly contact with the first connecting portion B, and the substrate spacing DS1 may, for example, substantially satisfy the following formula: DS 1-T1 + T2, but the invention is not limited thereto.

Yet another difference between the tiled electronic device of fig. 6 and fig. 1 is that the second connecting portion E is disposed at a different location. As in the embodiment of fig. 6, the second electronic device 2 may, for example, be similar to the first electronic device 1, but with its integrated circuit arrangement being a mirror image, the second connection portion E of the second electronic device 2 being arranged in correspondence with the second side surface 213. For example, a second connection portion E of the second flexible substrate 22 may be further disposed between the first side surface 113 and the second side surface 213, and the second lower portion F is connected to the second connection portion E and disposed corresponding to the second lower surface 212, wherein the integrated circuit 13 is coupled to the second lower portion F. The second electronic device 2 may further include a second adhesive 25, and the second adhesive 25 may be disposed between the second side surface 213 and the second connecting portion E, for example. At this time, the second adhesion member 25 may have, for example, a third thickness T3 in the first direction X, and the third thickness T3 may be defined as the maximum thickness of the second adhesion member 25 in the first direction X. The second connection portion E (including the driving circuit layer 222 disposed on the second connection portion E) has a fourth thickness T4 in the first direction X, and the fourth thickness T4 can be defined as the maximum thickness of the second connection portion E (including the driving circuit layer 222 disposed on the second connection portion E) in the first direction X. At this time, the substrate spacing DS1 may, for example, roughly satisfy the following equation: DS 1-T1 + T2+ T3+ T4, but the invention is not limited thereto. In the above examples, the thickness of the driving circuit layer 122 and/or the driving circuit layer 222 is very thin relative to the first connecting portion B and/or the second connecting portion E, for example, the ratio of the thickness of the driving circuit layer 122 and/or the driving circuit layer 222 relative to the first connecting portion B and/or the second connecting portion E is less than about 0.05, but the invention is not limited thereto.

Here, the first adhesive 15 and/or the second adhesive 25 may include, for example, a double-sided tape, a silicone adhesive, a photo-curable adhesive (e.g., a UV adhesive), an Epoxy adhesive, an acrylic adhesive, a moisture-curable adhesive, an Optically Clear Adhesive (OCA), an Optically Clear Resin (OCR), or other polymers or combinations thereof, but the invention is not limited thereto. The first adhesive 15 and/or the second adhesive 25 can be, for example, the same material or different materials, and the invention is not limited thereto. In some embodiments, the first adhesion member 15 can comprise at least two portions, for example, and the materials of the first adhesion member 15 of different portions can be the same or different. In some embodiments, the first adhesion member 15 may, for example, comprise at least two portions, and the air may, for example, be sandwiched between the two portions. For example, in some embodiments, the first adhesive 15 attached between the first side surface 113 and the first connecting portion B may be, for example, a photo-curing adhesive (including a UV photo-curing adhesive) or a thermal-curing adhesive, and the first adhesive 15 attached between the first lower surface 112 and the first lower portion C may be, for example, a double-sided tape, a photo-curing adhesive (including a UV photo-curing adhesive), or a thermal-curing adhesive, but the invention is not limited thereto. In some embodiments, the first adhesive 15 may not be included between the first side surface 113 and the first connecting portion B, for example, and the first adhesive 15 may be adhered between the first lower surface 112 and the first lower portion C, for example, and the first adhesive 15 may be a double-sided tape, a photo-curable adhesive (including a UV photo-curable adhesive), or a thermal-curable adhesive, for example.

Fig. 7 is a cross-sectional view of a partially-tiled electronic device according to an embodiment of the invention. Fig. 7 is similar to the electronic device shown in fig. 1 to 5, except that the first connection portion B of the first flexible substrate 12 has an arc-shaped structure. In some embodiments, the arc-shaped structure of the first connection portion B may have different thicknesses, for example, in the first direction X. In some embodiments, the first connection portion B (including the driving circuit layer 122 disposed on the first connection portion B) may have, for example, a fifth thickness T5 in the first direction X, and the fifth thickness T5 may be defined as a maximum thickness of the first connection portion B (including the driving circuit layer 122 disposed on the first connection portion B) in the first direction X. The first connecting portion B has a first portion outer surface B11 away from the first side surface 113 and a first portion inner surface B12 adjacent to the first side surface 113, the first portion outer surface B11 is opposite to the first portion inner surface B12, and the first portion inner surface B12 may have a first radius of curvature R1 and a first arc opening angle α, for example. The first curvature radius R1 is defined as follows, the intersection point P1 and the intersection point P2 may be roughly drawn as a circle along the first portion inner surface B12 by two points (the intersection point P1 and the intersection point P2) where the first portion inner surface B12 intersects with the first upper portion a and the first lower portion C, respectively (refer to fig. 7), or the intersection point P1 and the intersection point P2 are connected to form a first virtual line VD1, and a second virtual line VD2 perpendicular to the first virtual line VD1 may intersect with the first portion inner surface B12 at the intersection point P3, where the second virtual line VD2 intersects with the center of the segment of the first virtual line VD1, and at this time, the intersection point along the point P1, the intersection point P2 and the intersection point P3 may be roughly drawn as a circle. The circle has a center point PC, wherein the center point PC has a radius of curvature R1, and the arc opening angle α is defined by the center point PC connected to the intersection point P1 and the intersection point P2, respectively. In addition, a first width W2 is defined between the first side surface 113 and the first portion outer surface B11 in the first direction X, and the first width W2 may be defined as a maximum width between the first side surface 113 and the first portion outer surface B11 in the first direction X. At this time, the first width W2 may satisfy the following formula, for example: w2 ═ R1(1-cos (α/2)) + T5. In some embodiments, the first portion inner surface B12 and the first side surface 113 may have the first adhesion element 15 therebetween, for example, as described above.

As shown in fig. 7, when the second flexible substrate 22 includes the third connecting portion G (or the second connecting portion E), the third connecting portion G (or the second connecting portion E) and the first connecting portion B also have an arc structure. Like the first connecting portion B of fig. 7, the third connecting portion G (or the second connecting portion E) has a second portion outer surface G11 away from the second side surface 213 and a second portion inner surface G12 adjacent to the second side surface 213, the second portion inner surface G12 has a second radius of curvature R2 and a second arc opening angle β, and a sixth thickness T6 between the third connecting portion G and the second portion outer surface G11 in the first direction X, wherein the sixth thickness T6 may be defined as the maximum thickness of the third connecting portion G in the first direction X. The second radius of curvature R2 and the second arc opening angle β are defined as described above with respect to the first radius of curvature R1 and the first arc opening angle α. In the above embodiment, the first spacing DS1 may satisfy the following equation: DS1 ═ R1(1-cos (α/2)) + T5+ R2 (1-cos (β/2)) + T6.

Fig. 8 is a cross-sectional view of a partially tiled electronic device according to an embodiment of the invention. Fig. 8 is similar to the electronic device shown in fig. 1 to 7, and the difference is that the first electronic device 1 further includes a protection layer 16, the protection layer 16 can be disposed on the first connecting portion B, for example, and the disposition of the protection layer 16 can improve the protection effect of the electronic device and reduce the risk of damage to the electronic device. In some embodiments, the protection layer 16 may be disposed on the first connection portion B and the first lower portion C, for example, but the invention is not limited thereto. The material of the protective layer 16 is not particularly limited, and any adhesive material, polymer, or other suitable material may be used. In some embodiments, the protection layer 16 may, for example, have high insulating properties, i.e. the protection layer 16 does not cause a short circuit between the first electronic device 1 and the second electronic device 2. In some embodiments, the protection layer 16 may contact a portion of the integrated circuit 13 or cover a portion of the integrated circuit 13, and the protection effect at the connection between the integrated circuit 13 and the driving circuit layer 122 can be improved by the above design. In addition, any one of the tiled electronic devices of fig. 1 to 7 may, for example, include a protection layer 16 to prevent the driving circuit layer disposed on the first connecting portion B or other first flexible substrate 12 or second flexible substrate 22 from being damaged, which may affect the normal operation of the electronic device (e.g., affect the display, sensing or detecting quality).

It should be noted that the passivation layer 16 has a seventh thickness T7 in the first direction X, and the seventh thickness T7 is defined as the maximum thickness of the passivation layer 16 in the first direction X. Therefore, when the first electronic device 1 includes the passivation layer 16, the aforementioned formula for the substrate spacing DS1 needs to be added to the seventh thickness T7 of the passivation layer 16, and the description thereof is omitted here. When other components are included between the first side surface 113 and the second side surface 213, the formula relating to the substrate spacing DS1 is added to the thickness of the other components. It should be noted that, no matter how many components are included between the first side surface 113 and the second side surface 213, it is still necessary to satisfy that the substrate spacing DS1 is smaller than or equal to the first distance D1, and the ratio of the first distance D1 to the second distance D2 is between 0.9 and 1.1(0.9 ≦ D1/D2 ≦ 1.1), or the ratio of the first cell spacing P 'to the cell spacing P is between 0.9 and 1.1(0.9 ≦ P'/P ≦ 1.1), so as to achieve the effect of reducing seams.

Fig. 9 is a cross-sectional view of a partially-tiled electronic device according to an embodiment of the invention. Fig. 9 is similar to the electronic device shown in fig. 1, and the difference is that the first electronic device 1 further includes a third substrate 17, the third substrate 17 is disposed corresponding to the first lower surface 112, and the first adhesive 15 is disposed between the first lower surface 112 and the third substrate 17. In some embodiments, the area of the third substrate 17 is smaller than the area of the first substrate 11. For example, in a direction looking down on the first electronic device 1 (i.e. a normal direction of the first upper surface 111), the first substrate 11 may overlap with the third substrate 17, for example, and the first substrate 11 covers the third substrate 17 in the direction looking down on the first electronic device 1. In some embodiments, the area of the third substrate 17 projected onto the first lower surface 112 may be, for example, smaller than or equal to the area of the first lower surface 112, but the invention is not limited thereto. When the third substrate 17 is designed to be smaller than the first substrate 11, the third substrate 17 may protrude from the first substrate 11 in a direction of looking down the first electronic device 1, and a seam may be reduced. The first lower portion C may be disposed corresponding to the third substrate 17, and the first lower portion C is disposed between the integrated circuit 13 and the third substrate 17, but the invention is not limited thereto. In some embodiments, the third substrate 17 and the first substrate 11 may be the same substrate material. In some embodiments, the third substrate 17 and the first substrate 11 may be different substrate materials. In some embodiments, the third substrate 17 may be a base material with better resistance to high temperature (e.g., less expansion change at high temperature), or humidity. In some embodiments, the third substrate 17 and the first substrate 11 may have different thicknesses, for example.

In some embodiments, the first adhesion member 15 can be disposed between a side surface 17a of the third substrate 17 and the first lower surface 112, for example, but the invention is not limited thereto. In some embodiments, the first adhesion member 15 may be disposed between the third substrate 17 and the first lower surface 112, for example. In some embodiments, the first adhesion member 15 can be in contact with another side surface 17c opposite to the side surface 17a of the third substrate 17, for example. In some embodiments, the first adhesion member 15 can be, for example, in contact with the side surface 17a of the third substrate 17, a side upper surface 17b of the third substrate 17, the first lower surface 112, or the first flexible circuit board 12, but the invention is not limited thereto. The third substrate 17 can increase the bonding area of the first adhesive 15, thereby improving the mechanical properties of the first electronic device 1. In addition, since the adhesion capacities of the first adhesion member 15 to the first substrate 11 and the first flexible substrate 12 may be different, in the embodiment shown in fig. 9, when the materials of the first substrate 11 and the third substrate 17 are selected to be the same or similar, since the area of the third substrate 17 contacted by the first adhesion member 15 is large, the first adhesion member 15 may be selected to have a better adhesion capacity with the first substrate 11 and the third substrate 17, for example, but the invention is not limited thereto. In some embodiments, the first adhesive 15 may be, for example, a double-sided tape, a silicone adhesive, a light-cured adhesive (e.g., a UV adhesive), an Epoxy (Epoxy) adhesive, an acrylic adhesive, a moisture-cured adhesive, an Optically Clear Adhesive (OCA), an Optically Clear Resin (OCR), or other polymers or combinations thereof, but the invention is not limited thereto.

Fig. 10 is a cross-sectional view of a partially-tiled electronic device according to another embodiment of the invention. Fig. 10 is similar to the electronic device shown in fig. 1, except that the first adhesive 15 of the first electronic device 1 shown in fig. 10 is discontinuous and divided into at least two parts, one part is disposed between the first side surface 113 and the first connecting portion B, and the other part is disposed between the first lower surface 112 and the side edge surface 17B of the third substrate 17. In some embodiments, the first adhesive 15 may be disposed only between the first side surface 113 and the first connection portion B, or the first adhesive 15 may be disposed only between the first lower surface 112 and the third substrate 17, but the invention is not limited thereto. The adhesive 15 disposed between the first side surface 113 and the first connecting portion B may be, for example, a light-cured adhesive (including UC light-cured adhesive) or a heat-cured adhesive, and the first adhesive 15 disposed between the first lower surface 112 and the upper side surface 17B of the third substrate 17 may be, for example, a double-sided tape, a light-cured adhesive (including UV light-cured adhesive), or a heat-cured adhesive, but the invention is not limited thereto.

Fig. 11 is a cross-sectional view of a partially tiled electronic device according to another embodiment of the invention. Fig. 10 the tiled electronic device of fig. 1-9 is similar, with the difference that the electronic device includes a display layer. More particularly, the tiled electronic device includes: a first electronic device 3 and a backlight module 4, wherein the backlight module 4 is disposed opposite to the first electronic device 3. The first electronic device 3 includes a first substrate 31, a first flexible substrate 32 disposed on the first substrate 31, a display layer 33 disposed on the first flexible substrate, a fourth substrate 34 disposed on the display layer 33, and a fifth substrate 35 disposed on the fourth substrate 34, wherein the display layer 33 is disposed between the first flexible substrate 32 and the fourth substrate 34. The sealant 36 is disposed between the first flexible substrate 32 and the fourth substrate 34 and surrounds the display layer 33. The display layer 33 may include, for example, a Liquid Crystal (LC), an organic light-emitting diode (OLED), a quantum dot organic light-emitting diode (QOLED), a Quantum Dot (QD), a fluorescent (fluorescent) material, a phosphorescent (phosphor) material, or other suitable materials, but the present invention is not limited thereto. In some embodiments, the first lower portion C may be disposed corresponding to the backlight module 4, for example, but the invention is not limited thereto. In some embodiments, the fourth substrate 34 may be, for example, a color filter substrate, and in this embodiment, the fourth substrate 34 may include, for example, a color filter layer, a light shielding layer, and the like, but the invention is not limited thereto. In some embodiments, the fifth substrate 35 may be a protection substrate, for example, but the invention is not limited thereto. The backlight module 4 may include, for example, a backlight source, an optical film, a backlight frame, etc., but the invention is not limited thereto. In some embodiments, the backlight module 4 may be, for example, a direct-type backlight module or a side-type backlight module, but the invention is not limited thereto.

FIG. 12 is a schematic process diagram according to an embodiment of the present invention. First, a substrate 5 and a flexible substrate 6 are provided, wherein the substrate 5 and the flexible substrate 6 can be bonded to each other. In some embodiments, the flexible substrate 6 may be, for example, coated on the substrate 5, but the invention is not limited thereto; subsequently, in some embodiments, a circuit and an electronic device switch (not shown) may be formed on the flexible substrate 6, for example, by a film forming process, a photolithography process, a developing process, an etching process, etc.; subsequently, in some embodiments, portions of the substrate 5 may be removed, for example, by laser cutting or other cutting methods. For example, the embodiment of fig. 12 may remove the substrate block 51 of the substrate 5 corresponding to a flexible substrate connecting portion B 'and the substrate block 52 of the substrate 5 corresponding to a flexible substrate lower portion C', for example. Subsequently, an adhesive (not shown, refer to the aforementioned first adhesive 15) may be coated or disposed on at least one of the flexible substrate connecting portion B 'and the flexible substrate lower portion C', and the adhesive may be disposed on a lower surface 513 of a portion of the substrate 5, and then the flexible substrate lower portion C 'is opposite to the lower surface 513 by bending the flexible substrate connecting portion B', and the adhesive is cured. Here, the adhesive may be, for example, a glue material, which may be cured, for example, by UV light curing, thermal curing, moisture curing, or other curing methods, but the invention is not limited to these curing methods. Wherein the process further comprises a step of: a passivation layer (not shown, refer to the passivation layer 16 in fig. 8) is disposed on the outer sidewall of the flexible substrate connection portion B' away from the substrate 5, and the passivation layer may be disposed on a portion of the lower surface 513, but the invention is not limited thereto. The step of disposing a passivation layer is not particularly limited, and may be performed before bending the flexible substrate connection portion B 'or after bending the flexible substrate connection portion B', for example, and the invention is not limited thereto. The protective layer may be, for example, a protective adhesive coated on the substrate, and the protective adhesive may be cured to form a protective layer, but the invention is not limited thereto. Wherein the process further comprises a step of: the electronic unit is disposed on a surface (not labeled, refer to the first upper surface 111) opposite to the lower surface 513 of the substrate 5, and this step may be performed after removing a portion of the substrate 5 by laser cutting or other cutting methods, or after curing the adhesive, for example, but the invention is not limited thereto.

FIG. 13 is a schematic process diagram of another embodiment of the present invention. The process of fig. 13 is similar to that of fig. 12, except that the removed portion of the substrate 5 is different. For example, compared to fig. 12, the embodiment of fig. 13 only removes the substrate block 51 of the substrate 5 corresponding to the flexible substrate connecting portion B 'and leaves the substrate block 52 of the substrate 5 corresponding to the flexible substrate lower portion C', but the invention is not limited thereto. The subsequent coating or disposing of an adhesive is similar to that shown in fig. 12 and will not be described herein. After the fabrication of the electronic device is schematically completed by the process of fig. 13, the electronic device may be, for example, a first electronic device similar to that of fig. 9 or fig. 10.

Fig. 12 and 13 are only examples of having a single flexible substrate connection portion B ', but in embodiments having more flexible substrate connection portions B', other corresponding substrate portions may be removed. Fig. 14A and 14B are partial schematic views of a tiled electronic device according to an embodiment of the invention. The flexible substrate 6 may include at least one flexible substrate connecting portion B ', at least one flexible substrate connecting portion B' is connected to the flexible substrate lower portion C ', and the driving circuit layer on the at least one flexible substrate lower portion C' may be coupled to an integrated circuit 7, for example. In the exemplary embodiment of fig. 14A, the flexible substrate 6 may have, for example, four flexible substrate connecting portions B ' and four flexible substrate lower portions C ' respectively connected to the flexible substrate connecting portions B ', but the invention is not limited thereto. By arranging the four flexible substrate connecting parts B' corresponding to the four sides of the substrate 5 respectively, the collision of the four sides of the substrate 5 in the processes of splicing or carrying can be reduced, and the risk of fragment is reduced. In some embodiments, when there are a plurality of lower flexible substrate portions C ', the lower flexible substrate portions C ' may be, for example, staggered, not overlapped or not contacted with each other (as shown in fig. 14A), which may reduce the difference in height of the outer surface of the flexible substrate connecting portion B ' caused by the overlapping of the lower flexible substrate portions C ', or may cause the driving circuit layer (refer to the driving circuit layer 122) disposed on the flexible substrate connecting portion B ' or the lower flexible substrate portions C ' to be covered by other lower flexible substrate portions C ' to affect the disposition or coupling of the integrated circuit 7. In some embodiments, the lower portion C 'of the flexible substrate may have various shapes, for example, the outline of the lower portion C' of the flexible substrate projected onto the lower surface 513 of the substrate is rectangular or non-rectangular, and the non-rectangular shape may include a trapezoid, a triangle, a polygon, and an arc, for example, but the invention is not limited thereto. In some embodiments, the flexible substrate connection portion B' may partially correspond to or cover the side of the corresponding substrate 5.

In the exemplary embodiment of fig. 14B, the flexible substrate 6 may have, for example, two flexible substrate connecting portions B ' and two flexible substrate lower portions C ' respectively connected to the flexible substrate connecting portions B ', which may be, for example, respectively disposed adjacent to each other. That is, the two flexible substrate connecting portions B 'may be disposed corresponding to two adjacent sides of the substrate 5, respectively, and the two adjacent sides of the substrate 5 are two sides connected to each other, but the present invention is not limited thereto, and the two flexible substrate connecting portions B' may also be disposed corresponding to two opposite sides of the substrate 5 as invented in the foregoing embodiment. Alternatively, the flexible substrate connection portion B' may be provided, for example, corresponding to only one side surface of the substrate 5.

As shown in fig. 14A, the integrated circuit 7 may be disposed on the flexible substrate lower portion C 'connected to at least one of the flexible substrate connecting portions B', and the flexible substrate connecting portions B 'connected to the flexible substrate lower portions C' may be provided with a driving circuit layer (refer to the driving circuit layer 122), for example, through which the electronic unit (refer to the first electronic unit 14) may be coupled to the integrated circuit 7, but the invention is not limited thereto. As shown in fig. 14B, the integrated circuit 7 may be disposed on another circuit substrate 8 (which may include a flexible circuit board or a rigid circuit board, but the invention is not limited thereto), and the other circuit substrate 8 is coupled to the flexible substrate 6. The arrows in fig. 14A and 14B indicate the direction in which the flexible substrate connecting portion B 'and the flexible substrate lower portion C' are bent.

The first electronic device 1 and/or the second electronic device 2 of the present invention are only illustrated as a rectangle, for example, the first upper surface 111 and/or the second upper surface 121 are rectangular in area, but the present invention is not limited thereto. The first upper surface 111 of the first electronic device 1 may have other shapes, such as polygonal shapes, diamond shapes, or other shapes suitable for splicing. However, regardless of the shape, it is desirable that the substrate spacing DS1 is designed to be less than or equal to the first distance D1, and the difference between the first distance D1 and the second distance D2 is within 10%. The first upper surface 111 and the first side surface 113 or the first lower surface 112 and the first side surface 113 are illustrated as being at a substantially right angle, but the invention is not limited thereto. In some embodiments, the distance between the first upper surface 111 and the first side surface 113 or between the first lower surface 112 and the first side surface 113 may be, for example, in the range of 90 'to 30'. In some embodiments, the angle between the first upper surface 111 and the first side surface 113 or between the first lower surface 112 and the first side surface 113 may be, for example, in a range of 80' to 60 °. In some embodiments, a more curved or polygonal, pointed edge may also be present between the first upper surface 111 and the first side surface 113 or between the first lower surface 112 and the first side surface 113, for example.

In summary, in the tiled electronic device of the invention, the flexible substrate is bent to the back surface of the substrate, the substrate spacing DS1 is designed to be smaller than or equal to the first distance D1, and the ratio of the first distance D1 to the second distance D2 is between 0.9 and 1.1(0.9 ≦ D1/D2 ≦ 1.1), or the ratio of the first unit spacing P 'to the unit spacing P is between 0.9 and 1.1(0.9 ≦ P'/P ≦ 1.1), so that the effect of reducing seams can be achieved, or the risk of breaking pieces can be reduced, and the display quality can be improved.

The particular embodiments described above are to be construed as merely illustrative, and not limitative of the remainder of the disclosure in any way whatsoever.

Claims

1. a splicing electronic device is characterized in that comprising:

A first electronic device, comprising:

a first substrate, the first substrate has a first upper surface, a first lower surface opposite to the first upper surface, and a first side surface connecting the first upper surface and the first lower surface;

a first flexible substrate comprising a first upper portion, a first lower portion, and a first connecting portion connecting the first upper portion and the first lower portion; and

a plurality of first electronic units are disposed on the first upper surface;

Wherein, the first upper portion is arranged corresponding to the first upper surface, the first lower portion is arranged corresponding to the first lower surface, and the first connecting portion is arranged corresponding to the first side surface; and a second electronic device, the The second electronic device is disposed adjacent to the first electronic device and includes:

a second substrate, the second substrate has a second upper surface, a second lower surface opposite to the second upper surface, and a second side surface connecting the second upper surface and the second lower surface; as well as

a plurality of second electronic units are arranged on the second upper surface;

Wherein, the second side surface is opposite to and adjacent to the first side surface, and the first connecting portion is located between the first side surface and the second side surface, and the first electronic units have adjacent to the second side surface. an edge electronic unit of the device, there is a first distance between the edge electronic unit and one of the most adjacent second electronic units, and a substrate distance between the first side surface and the second side surface, The substrate spacing is less than or equal to the first distance.

2 . The splicing electronic device of claim 1 , wherein the first electronic device further comprises a driving circuit layer disposed on the first upper portion, the first lower portion and the first connecting portion. 3 .

3. The splicing electronic device of claim 2, wherein the driving circuit layer comprises an active driving component.

4 . The splicing electronic device of claim 2 , wherein the first electronic device further comprises an integrated circuit, the integrated circuit is disposed corresponding to the first lower surface and coupled to the driving circuit layer. 5 .

5 . The splicing electronic device of claim 1 , wherein the first electronic device further comprises a first adhesive member, and the first adhesive member is disposed at least between the first side surface and the first connecting portion. 6 .

6. The splicing electronic device of claim 1, wherein the first electronic device further comprises a third substrate and a first adhesive member, the third substrate is disposed corresponding to the first lower surface, and the first adhesive The component is disposed between the first lower surface and the third substrate.

7 . The splicing electronic device of claim 6 , wherein, in a normal direction of the first upper surface, an area of the third substrate is smaller than an area of the first substrate. 8 .

8. The splicing electronic device of claim 1, wherein the second electronic device further comprises a second flexible substrate, the second flexible substrate comprising a second upper portion, a second lower portion, and a connection A second connecting portion between the second upper portion and the second lower portion, the second upper portion is arranged corresponding to the second upper surface, and the second lower portion is arranged corresponding to the second lower surface.

9 . The splicing electronic device of claim 8 , wherein the second electronic device further comprises a driving circuit layer disposed on the second upper portion, the second lower portion and the second connecting portion. 10 .

10 . The splicing electronic device of claim 9 , wherein the second connecting portion is disposed corresponding to the second side surface, and the second connecting portion is located between the second side surface and the first connecting portion. 11 .

11. The splicing electronic device of claim 9, wherein the second substrate further comprises a third side surface opposite to the second side surface, the third side surface connecting the second upper surface and the second side surface the lower surface, and the second connecting portion is disposed corresponding to the third side surface.

12 . The splicing electronic device of claim 11 , wherein the second flexible substrate further comprises a third connecting portion, the third connecting portion is connected to the second upper portion, and the third connecting portion corresponds to the second connecting portion. 13 . The side surface is provided, and the third connection portion is located between the second side surface and the first connection portion.

13. The splicing electronic device of claim 12, wherein the driving circuit layer is not disposed on the third connection portion.

14. The splicing electronic device of claim 1 , wherein a second distance exists between two adjacent ones of the first electronic units, and a ratio of the first distance to the second distance is between 0.9 and 1.1 between.

15. The splicing electronic device of claim 1, wherein the first electronic device further comprises a protective layer disposed on the first connecting portion.

16. The splicing electronic device of claim 1, wherein the first electronic device or the second electronic device is a display device.

17. The splicing electronic device of claim 1, wherein the first electronic device or the second electronic device is an antenna device.