CN110297366B

CN110297366B - Display panel and driving method, display device and driving method

Info

Publication number: CN110297366B
Application number: CN201910579416.6A
Authority: CN
Inventors: 张明玮
Original assignee: Shanghai Tianma Microelectronics Co Ltd
Current assignee: Shanghai Tianma Microelectronics Co Ltd
Priority date: 2019-06-28
Filing date: 2019-06-28
Publication date: 2021-12-14
Anticipated expiration: 2039-06-28
Also published as: CN110297366A

Abstract

The invention provides a display panel, a driving method, a display device and a driving method, wherein the display panel comprises a plurality of pixel rows, each pixel row comprises two adjacent rows of pixel electrodes, and a reflecting electrode and the pixel electrodes are arranged in a stacking mode; the first thin film transistor is connected with a first pixel electrode positioned in one row, the second thin film transistor is connected with a second pixel electrode positioned in the other row, the reflective electrode stacked with the first pixel electrode is a first reflective electrode, the reflective electrode stacked with the second pixel electrode is a second reflective electrode, the overlapped area of the first reflective electrode and the first pixel electrode is a first overlapped area, the overlapped area of the second reflective electrode and the second pixel electrode is a second overlapped area, the areas of the first pixel electrode and the second pixel electrode positioned in the same column are equal, and the areas of the first overlapped area and the second overlapped area positioned in the same column are not equal.

Description

Display panel and driving method, display device and driving method

Technical Field

The present application relates to the field of display, and in particular, to a display panel and a driving method thereof, and a display device and a driving method thereof.

Background

The display screen is divided into reflective display, transmissive display and transflective display according to the path of the light source passing through the display screen during display, wherein the transflective display is widely applied to various fields because of combining the advantages of the reflective display and the transmissive display, for example: e-books, electronic tags, smart wear, etc. Particularly, for products worn intelligently and provided with electronic tags, timely charging cannot be achieved due to the limitation of use conditions. Therefore, how to reduce the power consumption of the display screen while achieving the desired display effect is a constant research challenge in the display field.

At present, in the prior art, the purpose of reducing power consumption is achieved by adjusting a driving chip (IC) to reduce unnecessary power consumption, however, the capability of reducing functions is limited in this way, and each product needs to develop different ICs according to application requirements, so that the solution for reducing power consumption is not only difficult in IC development, but also the production cost is increased.

Disclosure of Invention

In view of this, embodiments of the present invention provide a display panel, a driving method thereof, a display device and a driving method thereof, so as to reduce power consumption of the display panel and the display device, and simultaneously avoid using a complex IC and reduce production cost.

In one aspect, an embodiment of the present invention provides a display panel, including:

the array substrate to and with the relative counter substrate that sets up of array substrate, wherein, the array substrate includes:

a substrate base plate;

a plurality of gate lines on a first side of the substrate, the plurality of gate lines extending in a first direction and arranged in a second direction, the first direction and the second direction intersecting;

the data lines are positioned on the first side of the substrate base plate, extend along the second direction and are arranged along the first direction;

a plurality of thin film transistors including a plurality of first thin film transistors and a plurality of second thin film transistors;

a plurality of pixel rows arranged in a plurality of rows and columns;

the pixel electrodes are arranged in a plurality of rows and columns in an array mode, and each pixel row comprises two adjacent rows of the pixel electrodes;

a plurality of reflective electrodes, one of the reflective electrodes and one of the pixel electrodes being stacked;

the pixel electrodes of the two adjacent rows comprise a first row of pixel electrodes and a second row of pixel electrodes, the first row of pixel electrodes and the second row of pixel electrodes are arranged along the second direction, the drain electrode of the first thin film transistor is connected with the first pixel electrode, and the drain electrode of the second thin film transistor is connected with the second pixel electrode, wherein the first pixel electrode is a pixel electrode in the first row of pixel electrodes, and the second pixel electrode is a pixel electrode in the second row of pixel electrodes;

the reflective electrode stacked on the first pixel electrode is a first reflective electrode, the reflective electrode stacked on the second pixel electrode is a second reflective electrode, a region where the first reflective electrode overlaps with the first pixel electrode is a first overlap region, and a region where the second reflective electrode overlaps with the second pixel electrode is a second overlap region;

the areas of the first pixel electrode and the second pixel electrode in the same column are equal, the areas of the first overlapping area and the second overlapping area in the same column are not equal, the area of the first overlapping area is smaller than that of the first pixel electrode, and the area of the second overlapping area is smaller than that of the second pixel electrode.

In another aspect, an embodiment of the present invention provides a display device, including the display panel with the above structure.

In another aspect, an embodiment of the present invention provides a driving method for the display panel, including a transmissive display mode and a reflective display mode;

in the transmissive display mode, when no data signal is provided to the first pixel electrode and the second pixel electrode in the same row, a first gray scale is correspondingly displayed, when a data signal is provided to the first pixel electrode and no data signal is provided to the second pixel electrode, a second gray scale is correspondingly displayed, when a data signal is provided to the second pixel electrode and no data signal is provided to the first pixel electrode, a third gray scale is correspondingly displayed, and when a data signal is provided to the first pixel electrode and no data signal is provided to the second pixel electrode, a fourth gray scale is correspondingly displayed;

in the reflective display mode, when no data signal is provided to the first pixel electrode and the second pixel electrode in the same row, a first gray scale is correspondingly displayed, when a data signal is provided to the first pixel electrode and no data signal is provided to the second pixel electrode, a third gray scale is correspondingly displayed, when a data signal is provided to the second pixel electrode and no data signal is provided to the first pixel electrode, a second gray scale is correspondingly displayed, and when a data signal is provided to the first pixel electrode and no data signal is provided to the second pixel electrode, a fourth gray scale is correspondingly displayed.

In another aspect, an embodiment of the present invention provides a driving method for the display device, including an environment detection module and a determination module, where the environment detection module is configured to detect an intensity of an ambient light, and the determination module determines whether to turn off the backlight source according to an intensity of the ambient light provided by the environment detection module; if the backlight needs to be turned off, then:

if the first pixel electrode is provided with the data signal and the second pixel electrode is not provided with the data signal before the backlight source is turned off, turning off the backlight source, simultaneously stopping providing the data signal to the electrode of the first pixel, and starting providing the data signal to the second pixel electrode;

if the second pixel electrode is provided with the data signal and the first pixel electrode is not provided with the data signal before the backlight source is turned off, turning off the backlight source, simultaneously stopping providing the data signal to the electrode of the second pixel and starting providing the data signal to the first pixel electrode;

and if the second pixel electrode and the first pixel electrode are not provided with data signals or are provided with data signals before the backlight source is turned off, keeping the data signals unchanged after the backlight source is turned off.

Compared with the prior art, the display panel, the driving method, the display device and the driving provided by the embodiment of the invention have the following technical effects:

because the areas of two adjacent rows of pixel electrodes in the pixel rows are the same, and the overlapping areas of the reflective gold electrodes and the pixel electrodes are different, namely, the areas of the opening areas corresponding to the two adjacent rows of pixel electrodes are different in the transmission and reflection modes, the two adjacent rows of pixel electrodes can be controlled to work respectively, or work or do not work simultaneously, so that different gray scales are realized; in the display structure, the IC is not required to perform complex calculation so as to provide signals with different intensities for the data lines to realize gray scale, so that the structure provided by the embodiment of the invention does not need to use a complex IC, and simultaneously does not need to frequently switch the signals for the data lines, thereby greatly reducing the power consumption and the production cost.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;

FIG. 2 is a schematic structural diagram of the array substrate at the area PA in FIG. 1;

fig. 3 is an enlarged schematic view of the area DA1 in fig. 2;

FIG. 4 is a schematic cross-sectional view along AA' of FIG. 3;

FIG. 5 is a schematic cross-sectional view taken along aa' of FIG. 2;

FIG. 6 is a schematic cross-sectional view along bb' of FIG. 2;

FIG. 7 is a schematic view of another structure of the array substrate at the area PA in FIG. 1;

FIG. 8 is an enlarged view of the area DA2 in FIG. 7;

FIG. 9 is a schematic cross-sectional view along BB' of FIG. 8;

FIG. 10 is a schematic cross-sectional view taken along aa' of FIG. 7;

FIG. 11 is a schematic cross-sectional view along bb' of FIG. 7;

FIG. 12 is a schematic view of another enlarged structure of the area DA2 in FIG. 7;

FIG. 13 is a schematic cross-sectional view taken along line CC' of FIG. 12;

FIG. 14 is a schematic view of another display panel structure according to an embodiment of the present invention;

FIG. 15 is a schematic view of a further enlarged structure of the area DA2 in FIG. 7;

FIG. 16 is a schematic cross-sectional view taken along line DD' of FIG. 15;

FIG. 17 is a schematic view of a structure of the counter substrate at the area PA in FIG. 1;

FIG. 18 is a schematic view of another structure of the counter substrate at the area PA in FIG. 1;

FIG. 19 is a schematic view of another structure of the array substrate in the area PA of FIG. 1;

fig. 20 is an enlarged schematic view of the area DA3 in fig. 19;

fig. 21 is a schematic electrical structure diagram of a single pixel SP in fig. 19;

FIG. 22 is a schematic cross-sectional view taken along EE' of FIG. 20;

FIG. 23 is a schematic view of another structure of the array substrate in the area PA of FIG. 1;

fig. 24 is an enlarged schematic view of the area DA4 in fig. 23;

FIG. 25 is a schematic cross-sectional view taken along FF' of FIG. 24;

fig. 26 is a schematic structural diagram of a display device according to an embodiment of the present invention;

fig. 27 is a driving timing diagram of a display panel in a transmissive mode according to an embodiment of the invention;

FIG. 28 is a driving timing diagram of a display panel in a reflective mode according to an embodiment of the present invention;

fig. 29 is a schematic view of another array substrate structure according to an embodiment of the invention;

FIG. 30 is a timing diagram illustrating the gate line signal variation of the display panel during the display mode switching process according to the embodiment of the present invention;

fig. 31 is a schematic diagram of a driving module of a display device according to an embodiment of the invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1 to 4, an embodiment of the invention provides a display panel, as shown in fig. 1, the display panel includes an array substrate 10, an opposite substrate 20 disposed opposite to the array substrate 10, the display panel includes a display area AA and a frame area BA surrounding the display area, wherein the array substrate 10 includes a step area SA exceeding the opposite substrate 20, and a driver chip IC and a flexible circuit board FPC are both bound to the step area SA.

With reference to fig. 2 to 4, the array substrate 10 includes a substrate 110, a plurality of gate lines 112 disposed on a first side of the substrate 10, the plurality of gate lines 112 extending along a first direction X and being arranged along a second direction Y, the first direction X intersecting the second direction Y; a plurality of data lines 114 located on the first side of the substrate base plate 10, wherein the plurality of data lines 114 extend along the second direction Y and are arranged along the first direction X; a plurality of thin film transistors 116 including a plurality of first thin film transistors 1161 and a plurality of second thin film transistors 1162; the display device includes a plurality of pixel rows PP arranged in a plurality of rows and columns, as shown in fig. 2, the plurality of pixel rows PP are arranged along a second direction Y, the pixel rows PP include a plurality of pixels SP, and the plurality of pixels SP are arranged along a first direction.

The array substrate 10 further includes a plurality of pixel electrodes P arranged in a plurality of rows and columns, each pixel row PP includes two adjacent rows of pixel electrodes P, each two adjacent rows of pixel electrodes P includes a first row of pixel electrodes PP1 and a second row of pixel electrodes PP2, the first row of pixel electrodes PP1 and the second row of pixel electrodes PP2 are arranged along the second direction Y, a drain of the first thin film transistor 1161 is connected to the first pixel electrode P1, and a drain of the second thin film transistor 1162 is connected to the second pixel electrode, wherein the first pixel electrode P1 is a pixel electrode P in the first row of pixel electrodes PP1, and the second pixel electrode P2 is a pixel electrode P in the second row of pixel electrodes PP 2.

With continued reference to fig. 2 to 4, the array substrate 10 further includes a plurality of reflective electrodes R, and a reflective electrode R and a pixel electrode P are stacked; the reflective electrode R stacked with the first pixel electrode P1 is a first reflective electrode R1, the reflective electrode R stacked with the second pixel electrode P2 is a second reflective electrode R2, a region where the first reflective electrode R1 overlaps with the first pixel electrode P1 is a first overlap region D1, and a region where the second reflective electrode R2 overlaps with the second pixel electrode P2 is a second overlap region D2; the areas of the first pixel electrode P1 and the second pixel electrode P2 in the same column are equal, the areas of the first overlapping region D1 and the second overlapping region D2 in the same column are not equal, the area of the first overlapping region D1 is smaller than the area of the first pixel electrode P1, and the area of the second overlapping region D2 is smaller than the area of the second pixel electrode P2.

Note that "the areas of the first pixel electrode P1 and the second pixel electrode P2 are equal" means equal within a tolerance range, that is, even if the first pixel electrode P1 and the second pixel electrode P2 having the same area are intended to be manufactured due to the existence of process errors, the areas of the finally formed first pixel electrode P1 and the second pixel electrode P2 cannot be completely the same, and therefore, if the area difference between the first pixel electrode P1 and the second pixel electrode P2 is within the tolerance range in the final structure, the areas of the first pixel electrode P1 and the second pixel electrode P2 are considered to be equal. According to the current manufacturing process, if one wants to manufacture the first pixel electrode P1 and the second pixel electrode P2 with the same area, the percentage of the difference between the first pixel electrode P1 and the second pixel electrode P2 to the sum of the areas of the first pixel electrode P1 and the second pixel electrode P2 is less than five percent.

In the embodiment of the present invention, the display panel belongs to a transflective display (both a transmissive display mode and a reflective display mode), and thus, the area of the first overlap region D1 is smaller than that of the first pixel electrode P1, and the area of the second overlap region D2 is smaller than that of the second pixel electrode P2; based on transflective display, because the areas of the two adjacent rows of pixel electrodes are the same, that is, the areas of the first pixel electrode P1 and the second pixel electrode P2 are the same, and the overlapping areas of the reflective electrode and the first pixel electrode P1 and the second pixel electrode P2 are different, that is, the areas of the opening areas corresponding to the two adjacent rows of pixel electrodes are different in the transmissive and reflective modes, the two adjacent rows of pixel electrodes can be controlled to work respectively, or work or do not work simultaneously, so as to realize different gray scales; the display panel provided by the embodiment of the invention does not need an IC to perform complex calculation so as to provide signals with different intensities for the data lines to realize gray scale, so that the structure provided by the embodiment of the invention does not need to use a complex IC, and does not need to frequently switch signals for the data lines, thereby greatly reducing power consumption and reducing production cost.

Optionally, in some display panels provided in the embodiments of the present invention, in order to ensure that the reflectivity is high in the reflective display mode, an edge of the reflective electrode R may be selected to exceed an edge of the pixel electrode P. For example, referring to fig. 2, 5 and 6, the reflective electrode R has two opposite edges in the first direction X, and the two edges both exceed the corresponding edges in the first direction X displayed by the pixel electrode P; meanwhile, the reflective electrode R has two opposite edges in the second direction Y, one of the edges exceeds the corresponding edge of the pixel electrode P, and specifically, in the structure shown in fig. 2, the edge of the reflective electrode R on the side close to the thin film transistor 116 exceeds the edge of the pixel electrode P on the side close to the thin film transistor 116.

In some transflective display panels, the distance between adjacent pixel electrodes is already small, for example, the distance between adjacent pixel electrodes is one to three times of the safety distance, and the distance between adjacent reflective electrodes cannot be smaller than the safety distance, and at this time, the edge of the reflective electrode cannot exceed the edge of the pixel electrode; or, the requirements of the certain display screen on the reflectivity and the transmittance are not high due to the characteristics of the application environment, and at this time, the edge of the reflective electrode does not exceed the edge of the pixel electrode. Specifically, referring to fig. 7 to 11, in the display panel in the above embodiment, the area of the first reflective electrode R1 is equal to the area of the first overlapping region D1, and the area of the second reflective electrode R2 is equal to the area of the second overlapping region D2. In this case, as long as no short circuit occurs between adjacent pixel electrodes when the pixel electrodes are manufactured, a short circuit does not necessarily occur when the reflective electrode is manufactured. Meanwhile, the area of the overlapping area is equal to that of the reflecting electrode, even if the display panel is manufactured, the brightness difference of the product under different gray scales can be observed and calculated through an optical microscope, the parameter can be provided for other structures connected with the product, and the display panel and other multifunctional electronic devices can be matched for use. At this time, the edge of the reflective electrode R does not exceed the edge of the pixel electrode, for example, in the structure shown in fig. 7, since the transmittance of the reflective electrode R is low, for example, the transmittance of the metal reflective electrode is substantially zero, and in order to realize the transmissive display mode, the area of the reflective electrode R needs to be smaller than the area of the pixel electrode, so that the pixel has a region through which the backlight passes.

Optionally, referring to fig. 4 and fig. 9, in the display panel provided in the embodiment of the invention, the reflective electrode R is located on a side surface of the corresponding pixel electrode P away from the substrate 110, and is electrically connected to the corresponding pixel electrode P. Specifically, after the pixel electrode is formed, the reflective electrode is directly fabricated.

In the embodiment of the present invention, optionally, the pixel electrode P is Indium-Tin-Oxide (ITO), and the reflective electrode R is a metal, for example, Ag, Mo, Al, or the like. In the process of manufacturing the display panel, the pixel electrode P and the reflective electrode R both need to pass through a patterning process, and the process needs to perform an etching process, and corresponding etching solutions can be different due to the fact that the material type of the pixel electrode P is different from that of the reflective electrode R, so that even if the reflective electrode R is manufactured on the surface of the pixel electrode P, the shape and the electrical properties of the pixel electrode are not damaged in the etching process.

Optionally, with further reference to fig. 12 and 13, fig. 12 is another enlarged schematic structural diagram of the area DA2 shown in fig. 7, fig. 13 is a schematic structural diagram of a cross section CC' in fig. 12, the display panel provided in the embodiment of the present invention further includes a common electrode (not shown in the figure) and a storage capacitor conductor 115, the storage capacitor conductor 115 and the pixel electrode P are stacked, an insulating layer is disposed between the storage capacitor conductor 115 and the common electrode, and when the display panel operates, the storage capacitor conductor 15 is provided with the same potential as the common electrode 115. Specifically, as shown in fig. 12 and 13, insulating layers, for example, a gate insulating layer 113a and a planarization layer 113b are provided between the storage capacitor conductor 115 and the pixel electrode P, and the vertical projection of the pixel electrode P to the substrate base 110 is located within the vertical projection of the storage capacitor conductor 115 to the substrate base 110. At this time, the entire pixel electrode P can form a storage capacitance with the storage capacitance conductor 115, that is, the storage capacitance is maximized for a single pixel. The larger the storage capacitance is, the stronger the potential holding capability of the pixel electrode P is, and the phenomena of flicker, gradual luminance change and the like of a display picture are further reduced.

It should be noted that, when the storage capacitor conductor 115 is disposed, in the embodiment of the present invention, since the areas of the first overlapping region D1/the first reflective electrode R1 and the second overlapping region D2/the second reflective electrode R2 are different, and the areas of the first pixel electrode P1 and the second pixel electrode P2 are the same, the embodiment of the present invention can achieve low power consumption display, and at the same time, since the storage capacitors of the first pixel electrode and the second pixel electrode are the same, the storage capacitors are not different at different gray scales, and flicker is avoided.

It should be noted that, in the prior art, in order to implement low power consumption display, areas of the first pixel electrode and the second pixel electrode are set to be different, so that an aperture ratio of a pixel corresponding to the first pixel electrode is different from an aperture ratio of a pixel corresponding to the second pixel electrode, and finally, a gray scale is implemented by controlling the first pixel electrode and the second pixel electrode to be simultaneously supplied with signals or not supplied with signals, or to be partially supplied with signals. However, in such a display panel, since the areas of the first pixel electrode and the second pixel electrode are different, the storage capacitance when the signal is supplied to the first pixel electrode alone and the storage capacitance when the signal is supplied to the second pixel electrode alone are not the same, and the entire screen flickers.

Further alternatively, the thin film transistor 116 on the array substrate in the display panel includes a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, and the storage capacitor conductor 115 is disposed at the same layer as the gate electrode or the drain electrode of the thin film transistor 116. Specifically, as shown in fig. 13, taking the first thin film transistor 1161 as an example, the gate 1161g, the source 1161s, the drain 1161d, and the semiconductor layer 1161c are provided in the same layer, and the storage capacitor conductor 115 and the gate 1161g are provided in the same layer. It should be noted that, regardless of whether the storage capacitor conductor 115 is disposed on the same layer as the gate 1161g or on the same layer as the drain 1161d, the storage capacitor conductor 115 and the existing structure can share a mask plate and be formed in the same process, which can reduce the production cost and the manufacturing process.

Specifically, with further reference to fig. 14, fig. 14 shows another structure of the display panel in the embodiment of the present invention, in which the common electrode 226 is located on the opposite substrate 20, and in more detail, the opposite substrate 20 includes a plurality of color resistors 224; a black matrix 222 between adjacent color resists 224; an insulating layer 223 covering the black matrix 222 and the color resistor 224, wherein the insulating layer 223 may be an organic insulating layer, which can improve the flatness of the counter substrate 20 on the side close to the array substrate 10; the common electrode 226 is located on one side of the insulating layer 223 close to the array substrate 10; a liquid crystal layer 30 is disposed between the array substrate 10 and the opposite substrate 20, and the liquid crystal layer 30 is located in a space surrounded by the sealant. In order to make the storage capacitor conductor 115 and the common electrode 226 be supplied with the same potential when the display panel is in operation, a conductive structure 40 may be disposed in the frame area BA of the display panel, and the conductive structure 40 is used to connect the storage capacitor conductor 115 and the common electrode 226. Specifically, in conjunction with fig. 12 to 14, the storage capacitor conductor 115 provides a signal through the storage signal line 115s on the array substrate 10, the storage signal line 115s is electrically connected to the signal bus line 115c located in the frame area BA, and at this time, the common electrode 226 and the signal bus line 115c are electrically connected through the conductive structure 40 in the frame area BA, so that the common electrode 226 and the signal bus line 115c are provided with the same signal. Note that, in addition to the signal bus line 115c being disposed at the same layer as the data line 114 and the storage signal line 115s as in fig. 14, the signal bus line 115c may be disposed at the same layer as the gate line 112 in another mode of the embodiment of the present invention.

Further alternatively, referring to fig. 1, fig. 15 and fig. 16, fig. 15 is a schematic diagram of another enlarged structure of the area DA2 shown in fig. 7, fig. 16 is a schematic diagram of a cross-sectional structure DD' shown in fig. 15, the display panel includes a display area AA and a frame area BA surrounding the display area AA, the storage capacitor conductor 115 is integrated in the display area AA, and an opening 115h is formed at a position corresponding to the thin film transistor 116. The storage capacitor conductor 115 is provided with an opening 115h above the thin film transistor 116 to prevent a coupling capacitance from being generated with the thin film transistor 116, thereby affecting the electrical characteristics of the thin film transistor 116, for example, causing a threshold shift of the transistor. As shown in fig. 16, when the storage capacitor conductor 115 has an integral structure, it is not necessary to provide a storage signal line in the display region as in fig. 12, and it is only necessary to connect a signal line to the driver chip IC in the non-display region. At this time, referring to fig. 14 and 15, if the common electrode 226 on the opposite substrate and the storage capacitor conductor 115 on the array substrate are to be electrically connected, it is only necessary to extend the storage capacitor conductor 115 to the frame area BA and to extend it to the lower side of the frame glue, so as to realize the electrical connection through the conductive structure 40 in the frame glue. With continued reference to fig. 16, if the storage capacitor conductor 115 is provided over the entire surface, an insulating layer 113a is provided between the storage capacitor conductor 115 and the gate line 112, and an insulating layer 113c is provided between the storage capacitor conductor 115 and the data line 112.

Alternatively, with continued reference to fig. 2 and fig. 7, in one pixel row PP, the areas of the first pixel electrode P1 and the second pixel electrode P2 in any column are equal, and the areas of the first overlapping area D1 and the second overlapping area D2 in the same column are not equal. That is, in the display panel provided in the embodiment of the present invention, for a pixel row, gray scale display can be achieved by adjusting the charging amount of the pixel electrode in each column. Further, for any one of the pixel rows PP, the areas of the first pixel electrode P1 and the second pixel electrode P2 in an intended row are equal, and the areas of the first overlapping area D1 and the second overlapping area D2 in the same row are not equal, at this time, the pixels SP in the display area in the display panel can realize gray scales by adjusting the charging amount of the pixel electrodes. That is, the display area of the whole display panel can realize low-power display, the image displayed by the low power is not limited, and the application range is wider.

Optionally, in the embodiment of the present invention, the area of the first overlapping region D1 is S1, and the area of the second overlapping region D2 is S2, S1>1.5S 2. That is, the difference between the area S1 of the first overlapping region D1 and the area S2 of the second overlapping region D2 is greater than half of the area S2 of the second overlapping region D2, and in this case, since the signal transmitted by the data line has only one voltage (different voltages do not need to be supplied to realize gray scales) in the low power consumption mode, when the reflective display mode is performed with the same corresponding color resistance, the difference between the luminance when only the first pixel electrode P1 is supplied with the signal and the luminance when only the second pixel electrode P2 is supplied with the signal is greater, and the gray scale change can be clearly perceived by the viewer in the display. If there is no difference in other factors, if the luminance when only the first pixel electrode P1 is supplied with a signal is set to L1 and the luminance when only the second pixel electrode P2 is supplied with a signal is set to L2, L1/L2 becomes S1/S2. S1>0 and S2> 0. Further preferably, S1 is 2 × S2, and in the reflective mode, the gray scale when the data signal is supplied to both the first pixel electrode P1 and the second pixel electrode P2 is full gray scale, the gray scale when the data signal is supplied to only the first pixel electrode P1 is defined as 2/3 gray scale, the gray scale when the data signal is supplied to only the second pixel electrode P2 is defined as 1/3 gray scale, and the gray scale when the data signal is not supplied to both the first pixel electrode P1 and the second pixel electrode P2 is defined as zero gray scale. That is, the luminance of the display screen is divided into four levels, and in this case, the human eye has the highest sensitivity to the gray scale change due to the same attenuation or increase in luminance when any adjacent gray scale changes in the process of changing from bright to dark or from dark to bright.

Referring to fig. 14 and 17, a color film layer 224 is disposed on a side of the opposite substrate 20 facing the array substrate 10, the color film layer 224 includes a plurality of color resists, and the first pixel electrode P1 and the second pixel electrode P2 in the same column correspond to the color resists of the same color. Specifically, in the same column, if the color resistance corresponding to the first pixel electrode P1 is the red color resistance 224R, the color resistance corresponding to the second pixel electrode P2 is also the red color resistance 224R; the color resistors corresponding to the first row of pixel electrodes PP1 include a plurality of pixel units arranged along the first direction X, each pixel unit including a red color resistor 224R, a green color resistor 224G, and a blue color resistor 224B arranged along the first direction; similarly, the color resistor corresponding to the second row of pixel electrodes PP2 also includes a plurality of pixel units arranged along the first direction X, and each pixel unit includes a red color resistor 224R, a green color resistor 224G, and a blue color resistor 224B arranged along the first direction. The black matrix 222 is in a grid shape, the grid-shaped black matrix 222 corresponds to a plurality of openings, and one opening corresponds to one color resistor. With the structure shown in fig. 17, in actual production, since the color resists in the same column have the same color, the color resists in the same column are connected with each other to form a stripe-shaped color resist. In the embodiment of the present invention, since the first pixel electrode P1 and the second pixel electrode P2 in the same row correspond to color resistors of the same color, when controlling different luminances in the same picture (controlling gray scale change of the picture), only the gate line needs to be controlled, and no color resistor locking module needs to be arranged.

Of course, the arrangement of the color resistors in the embodiment of the present invention is not limited to that shown in fig. 17, and the first pixel electrode P1 and the second pixel electrode P2 in the same column may correspond to color resistors of different colors, as in fig. 18. However, if different luminances in the same picture need to be controlled (to control a gray scale change of the picture), a color resistance locking module needs to be provided, the color resistance locking module transmits a position corresponding to a color resistance of the same color to the driver chip IC, and then the driver chip IC controls a corresponding data line to transmit a signal according to the position.

With continued reference to fig. 7, 14, and 17, the black matrix 222 overlaps the data line 114, the gate line 112, and the thin film transistor 116. The black matrix 222 can prevent color mixing of adjacent color resists of different colors, and at the same time, since the data lines 114, the gate lines 112 and the tfts 116 are all opaque structures, the black matrix 222 can multiplex the positions occupied by the opaque structures, thereby avoiding a reduction in the aperture ratio in the transmissive display mode.

In the display panel provided by the above embodiments of the invention, the gate lines are disposed between two adjacent rows of pixel electrodes, however, the embodiments of the invention are not limited thereto. Referring to fig. 19 to 22, the plurality of thin film transistors 116 further includes a plurality of third thin film transistors 1163 and a plurality of fourth thin film transistors 1164 in addition to the plurality of first thin film transistors 1161 and the plurality of second thin film transistors 1162, in the second direction Y, a first gate line 112a, a second gate line 112b and a third gate line 112c are sequentially arranged between two adjacent rows of pixel electrodes P, the first gate line 112a controls the first thin film transistor 1161 to be turned on or off, the second gate line 112b controls the third thin film transistor 1163 and the fourth thin film transistor 1164 to be turned on or off, and the third gate line 112c controls the second thin film transistor 1162 to be turned on or off; the source of the first thin film transistor 1161 is connected to the drain of the third thin film transistor 1163, the source of the third thin film transistor 1163 is connected to the source of the fourth thin film transistor 1164, the drain of the fourth thin film transistor 1164 is connected to the source of the second thin film transistor 1162, and the data line 114 is connected to the source of the third thin film transistor 1163. In the present embodiment, as shown in fig. 20 and 21, the first thin film transistor 1161 and the fourth thin film transistor 1164 together control whether the first pixel electrode P1 is supplied with a signal, and the second thin film transistor 1162 and the third thin film transistor 116 together control whether the second pixel electrode P2 is supplied with a signal, that is, the pixel electrodes are both controlled by the double thin film transistors, so that the leakage current can be reduced.

Alternatively, referring to fig. 19, the distance between adjacent pixel rows PP is d1, the distance between the first row pixel electrode PP1 and the second row pixel electrode PP2 is d2, and d1< d 2. In the embodiment of the present invention, since the thin film transistors 116 for controlling whether the first and second pixel electrodes P1 and P2 are supplied with signals are both located between the first and second row pixel electrodes PP1 and PP2, so that no thin film transistor is disposed between the adjacent pixel rows PP, the distance between the adjacent pixel rows can be made smaller.

Further alternatively, referring to fig. 17, 18 and 19, the black matrix 222 of the bit counter substrate overlaps the data line 114, the gate line 112 and the thin film transistor 116. It should be noted that, in the embodiment of the present invention, even if the gate lines and the thin film transistors are not provided between the adjacent pixel rows PP, the black matrix needs to be provided on the opposite substrate at the corresponding position. The arrangement of the black matrix can improve the precision of image display, and particularly, the problems of fuzzy image outlines, color difference caused by color mixing of adjacent pixels and the like are prevented.

Also alternatively, with reference to fig. 19, in one pixel row PP, the areas of the first pixel electrode P1 and the second pixel electrode P2 in any column are equal, and the areas of the first overlapping area D1 and the second overlapping area D2 in the same column are not equal. That is, in the display panel provided in the embodiment of the present invention, for a pixel row, gray scale display can be achieved by adjusting the charging amount of the pixel electrode in each column. Further, for any one of the pixel rows PP, the areas of the first pixel electrode P1 and the second pixel electrode P2 in an intended row are equal, and the areas of the first overlapping area D1 and the second overlapping area D2 in the same row are not equal, at this time, the pixels SP in the display area in the display panel can realize gray scales by adjusting the charging amount of the pixel electrodes. Also alternatively, as shown in fig. 22, the reflective electrode R is located on a surface of the corresponding pixel electrode P on a side away from the substrate 110, and is electrically connected to the corresponding pixel electrode P. Specifically, after the pixel electrode is formed, the reflective electrode is directly fabricated.

Alternatively, with continued reference to fig. 20, the reflective electrode R is rectangular, and the first reflective electrode R1 is located at a side adjacent to the first tft 1161, and the second reflective electrode R2 is located at a side adjacent to the second tft 1162. Specifically, in the structure shown in fig. 20, since the thin film transistor connected to the first pixel electrode P1 and the thin film transistor connected to the second pixel electrode P2 are both located between the first row pixel electrode PP1 and the second row pixel electrode PP2, when the first reflective electrode R1 is adjacent to the first thin film transistor 1161 and the second reflective electrode R2 is adjacent to the second thin film transistor 1162, the reflective electrodes R in the pixel row PP are both located close to the thin film transistor 116, that is, the thin film transistors are both located close to the reflective region, thereby avoiding a decrease in the aperture ratio of the transmissive region of the pixel.

In the above-described embodiment of the present invention, the reflective electrode is rectangular in shape, but the embodiment of the present invention is not limited thereto, and in other embodiments of the present invention, the reflective electrode may be a closed ring shape. Specifically, referring to fig. 23 and 24, the reflective electrode R includes a hollow-out region Rh, and the reflective electrode R is disposed around the hollow-out region Rh to form a ring shape. It should be noted that the term "annular" in the embodiments of the present invention means that the reflective electrode has a hollow area, and the reflective electrode is disposed around the hollow area; the "ring shape" does not limit the shape of the edge of the reflective electrode, and for example, although the shape of the edge of the reflective electrode is rectangular in fig. 23 to 24, the edge of the reflective electrode may be a circle, an ellipse, a polygon, a closed figure formed by circular arcs and line segments, or the like in other embodiments of the present invention.

Optionally, at least a part of the edge of the reflective electrode R is aligned with the edge of the pixel electrode P. Specifically, in the structure shown in fig. 24 and 25, the reflective electrode R includes four edges, and two edges opposing in the second direction Y are aligned with the edges of the pixel electrode P. Further alternatively, two edges of the reflective electrode R opposite in the first direction X are also aligned with the edges of the pixel electrode P. By aligning at least part of the edge of the reflective electrode R with the edge of the pixel electrode: on one hand, short circuit between adjacent reflective electrodes can be prevented; on the other hand, the reflecting electrode is prevented from covering the side edge of the pixel electrode, so that the formation of an inclined plane reflecting area is avoided, and reflection light leakage or/and color mixing are further avoided.

On the other hand, referring to fig. 26, an embodiment of the present invention further provides a display device 1000, where the display device 1000 includes the display panel 06 provided in any one of the foregoing embodiments, and a backlight 00. As shown in fig. 26, the backlight 00 of the display device 1000 is of a side emission type, but the backlight may be of a bottom emission type in this embodiment. Further, the display device may further include a back frame 01, a reflective sheet 02, a light guide plate 03, a prism sheet 04, a brightness enhancement film 05, and a plastic frame 09. Further optionally, a cover 08 may be included, and the cover 08 may be bonded to the display panel 06 by an optical adhesive. The display panel 06 may be a liquid crystal display panel, an electrophoretic display panel, or the like.

In another aspect, an embodiment of the present invention further provides a driving method of a display panel. Specifically, the display panel according to the embodiment of the invention includes a transmissive display mode and a reflective display mode, as shown in fig. 27 and 28, in the transmissive display mode, when no data signal is provided to any of the first pixel electrode P1 and the second pixel electrode P2 in the same column, the first gray scale is correspondingly displayed, at this time, if no signal is required to be provided to any of the other pixel electrodes in the same column, the data line 114 may not transmit a signal, the data signal is provided to the first pixel electrode P1, the data signal is not provided to the second pixel electrode P2, the data signal is provided to the second pixel electrode P2, the data signal is not provided to the first pixel electrode P1, the third gray scale is correspondingly displayed, and the data signal is provided to both the first pixel electrode P1 and the second pixel electrode P2, the fourth gray scale is correspondingly displayed;

in the reflective display mode, when no data signal is provided to both the first pixel electrode P1 and the second pixel electrode in the same row, the first gray scale is displayed correspondingly, when no data signal is provided to the first pixel electrode P1, the third gray scale is displayed correspondingly, when no data signal is provided to the second pixel electrode P2, the second gray scale is displayed correspondingly, when a data signal is provided to the second pixel electrode P2, the data signal is not provided to the first pixel electrode P1, and the fourth gray scale is displayed correspondingly, when a data signal is provided to both the first pixel electrode P1 and the second pixel electrode P2.

That is, when the transmissive display mode is switched to the reflective display mode, data signal switching is required for the pixels at the second gray scale and the third gray scale. Wherein, the data signal switching can be controlled by the gate lines, for example: if the tft is of the N-type, the gate line controlling whether the first pixel electrode P1 is supplied with a signal is at a high level, the gate line controlling whether the second pixel electrode P2 is supplied with a signal is at a high level, the data line is not supplied with a potential signal, the gate line controlling whether the first pixel electrode P1 is supplied with a signal is at a high level, and the gate line controlling whether the second pixel electrode P2 is supplied with a signal is at a high level.

Further optionally, the display panel provided in the embodiment of the present invention includes a normal display mode and a low power consumption display mode, where the low power consumption display mode includes the foregoing transmissive display mode and the foregoing reflective display mode. Referring to fig. 29, the driving chip IC can control the pixel SP as the minimum display unit in the normal display mode, in which the gate line 112 connected to the gate electrode of the first thin film transistor 1161 and the gate line 112 connected to the gate electrode of the second thin film transistor 1162 are simultaneously supplied with electric signals as shown in fig. 12, and in the structure shown in fig. 20, the gate lines 112b connected to the third thin film transistor 1163 and the fourth thin film transistor 1164 are simultaneously supplied with signals in addition to the gate line 112a connected to the first thin film transistor 1161 and the gate line 112c connected to the second thin film transistor 1162; and in the low power consumption mode, the corresponding area of the single pixel electrode P is the minimum display unit. It should be noted that, in the structure of the present embodiment, in the same column, the color resistances corresponding to the first pixel electrode P1 and the second pixel electrode P2 are the same, that is, a single pixel SP corresponds to the color resistances of the same color, so that the preset image display is realized by notifying the display conditions of different pixels SP.

In addition to improving the driver chip IC, embodiments of the present invention provide other ways in which the driver chip may not be modified. Specifically, referring to fig. 29 and 30, a plurality of gate line control switches SW are disposed in a frame area BA of the display panel, specifically, if the frame area BA where the driving IC is disposed is a first frame, a second frame is disposed opposite to the first frame, the first frame and the second frame are disposed opposite to each other along the second direction Y, and then, the frames disposed opposite to each other in the first direction are a third frame and a fourth frame, in the structure shown in fig. 29, the plurality of gate line control switches SW are disposed in the third frame. Of course, in other embodiments of the present invention, a plurality of gate line control switches SW may be disposed on the fourth frame, or on both the third frame and the fourth frame. The gates of the gate line control switches SW are electrically connected to a mode switching signal line SWL for controlling the gate line control switches SW to be turned on and off. In the present embodiment, referring to fig. 29 and 30, in the normal display mode, taking the gate line control switch SW as an N-type as an example, the mode switching signal line SWL is at a high level, and the first gate line 112a and the third gate line 112c are turned on, thereby simultaneously turning on the first thin film transistor and the second thin film transistor. In the low power consumption display mode, the mode switching signal line SWL is at a low level, the first gate line 112a and the third gate line 112c are turned off, and the first thin film transistor and the second thin film transistor are independently turned on. In this embodiment, when the low power consumption display mode is switched to the normal display mode, the mode switching signal line SWL is only required to be supplied with a signal to turn on the gate line control switch SW, and the IC is not required to change the signal output modes of the data line and the gate line.

In another aspect, an embodiment of the present invention further provides a driving method for the display device, please refer to fig. 31, in which the display device includes an environment detection module and a determination module, the environment detection module is configured to detect an intensity of an ambient light, and the determination module determines whether to turn off the backlight source according to an intensity of the ambient light provided by the environment detection module; if the backlight needs to be turned off:

if the data signal is provided to the first pixel electrode and the data signal is not provided to the second pixel electrode before the backlight source is turned off, the data signal is stopped being provided to the electrode of the first pixel, and the data signal is started to be provided to the second pixel electrode;

if the data signal is provided to the second pixel electrode and the data signal is not provided to the first pixel electrode before the backlight source is turned off, the data signal is stopped being provided to the electrode of the second pixel, and the data signal is started to be provided to the first pixel electrode;

if the second pixel electrode and the first pixel electrode are not provided with the data signals or are provided with the data signals before the backlight source is turned off, the data signals are kept unchanged after the backlight source is turned off.

In short, in the driving method of the display device according to the embodiment of the invention, when the transmissive display mode (requiring a backlight) and the reflective display mode (not requiring a backlight) are switched, for the pixels having luminance but not the maximum luminance, it is necessary to change the signals of the data lines and/or the gate lines, please refer to fig. 29, because in one pixel SP, the areas of the first pixel electrode P1 and the second pixel electrode P2 are the same, but the areas of the first reflective electrode R1 and the second reflective electrode R2 are different, which means that if the opening area corresponding to the first pixel electrode P1 is larger than the opening area corresponding to the second pixel electrode P2 in the transmissive display mode, the opening area corresponding to the first pixel electrode P1 is smaller than the opening area corresponding to the second pixel electrode P2 in the reflective mode. Therefore, in order to ensure the consistency of the picture color during switching, the signals of the data lines and/or the gate lines need to be converted for the pixels at the second gray scale and the third gray scale.

In summary, in the embodiments provided in the embodiments of the present invention and the embodiments that are changed conventionally based on the embodiments of the present invention, since the areas of the two adjacent rows of pixel electrodes in the pixel rows are the same, and the overlapping areas of the reflective gold electrode and the pixel electrodes are different, that is, the areas of the opening areas corresponding to the two adjacent rows of pixel electrodes are different in the transmissive mode and the reflective mode, the two adjacent rows of pixel electrodes can be controlled to respectively operate, or simultaneously operate or do not operate, so as to implement different gray scales; in the display structure, the IC is not required to perform complex calculation so as to provide signals with different intensities for the data lines to realize gray scale, so that the structure provided by the embodiment of the invention does not need to use a complex IC, and simultaneously does not need to frequently switch the signals for the data lines, thereby greatly reducing the power consumption and the production cost. Furthermore, in some embodiments, the storage capacitors can be ensured to be consistent, the flicker of the picture can be reduced, and the display effect can be further improved.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, comprising:

a substrate base plate;

a plurality of pixel rows arranged in a plurality of rows and columns;

a storage capacitor conductor which is provided in a stacked manner with the plurality of pixel electrodes;

the areas of the first pixel electrode and the second pixel electrode in the same column are equal, the areas of the first overlapping area and the second overlapping area in the same column are not equal, the area of the first overlapping area is smaller than that of the first pixel electrode, and the area of the second overlapping area is smaller than that of the second pixel electrode;

the vertical projection of the pixel electrodes to the substrate base plate is positioned in the vertical projection of the storage capacitor conductor to the substrate base plate.

2. The display panel according to claim 1, wherein the thin film transistors further include a plurality of third thin film transistors and a plurality of fourth thin film transistors, a first gate line, a second gate line, and a third gate line are disposed between two adjacent rows of the pixel electrodes in the second direction, the first gate line, the second gate line, and the third gate line are sequentially arranged along the second direction, the first gate line controls the first thin film transistor to be turned on or off, the second gate line controls the third thin film transistor and the fourth thin film transistor to be turned on or off, and the third gate line controls the second thin film transistor to be turned on or off; the source electrode of the first thin film transistor is connected with the drain electrode of the third thin film transistor, the source electrode of the third thin film transistor is connected with the source electrode of the fourth thin film transistor, the drain electrode of the fourth thin film transistor is connected with the source electrode of the second thin film transistor, and the data line is connected with the source electrode of the third thin film transistor.

3. The display panel according to claim 1, wherein an area of the first reflective electrode is equal to an area of the first overlapping region, and an area of the second reflective electrode is equal to an area of the second overlapping region.

4. The display panel according to claim 1, further comprising a common electrode and a storage capacitor conductor, wherein the storage capacitor conductor and the pixel electrode are stacked, and an insulating layer is provided between the storage capacitor conductor and the common electrode, and the storage capacitor conductor is supplied with the same potential as the common electrode when the display panel is in operation.

5. The display panel according to claim 4, wherein the thin film transistor includes a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, and wherein the storage capacitor conductor is provided in the same layer as the gate electrode or the drain electrode of the thin film transistor.

6. The display panel according to claim 4, wherein the display panel comprises a display region and a frame region surrounding the display region, and the storage capacitor conductor is integrally formed in the display region and has an opening at a position corresponding to the thin film transistor.

7. The display panel according to claim 2, wherein a color film layer is disposed on a side of the opposite substrate facing the array substrate, the color film layer includes a plurality of color resists, and the first pixel electrode and the second pixel electrode in the same column correspond to the color resists of the same color.

8. The display panel according to claim 2,

the distance between the adjacent pixel rows is d1, the distance between the first row of pixel electrodes and the second row of pixel electrodes is d2, and d1< d 2.

9. The display panel according to claim 8, wherein the opposite substrate includes a black matrix overlapping the data line, the gate line, and the thin film transistor.

10. The display panel according to claim 1, wherein the reflective electrode is located on a surface of the corresponding pixel electrode on a side away from the substrate base plate, and is electrically connected to the corresponding pixel electrode.

11. The display panel according to claim 1, wherein in one of the pixel rows, the first pixel electrode and the second pixel electrode in any column have equal areas, and the first overlapping area and the second overlapping area in the same column have unequal areas.

12. The display panel according to claim 11, wherein the reflective electrode has a closed ring shape.

13. The display panel according to claim 12, wherein at least a part of an edge of the reflective electrode is aligned with an edge of the pixel electrode.

14. The display panel according to claim 11, wherein the reflective electrode has a rectangular shape, and wherein the first reflective electrode is located on a side adjacent to the first thin film transistor, and wherein the second reflective electrode is located on a side adjacent to the second thin film transistor.

15. The display panel according to claim 1, wherein the first overlapping region has an area of S1, and the second overlapping region has an area of S2, S1>1.5S 2.

16. A display device comprising the display panel according to any one of claims 1 to 15, and a backlight.

17. A driving method for the display panel of any one of claims 1 to 15, comprising a transmissive display mode and a reflective display mode;

18. The driving method according to claim 17, comprising a normal display mode and a low power consumption display mode, the low power consumption display mode comprising the transmissive display mode and the reflective display mode.

19. The driving method according to claim 18, wherein in the normal display mode, the gate line connected to the gate of the first thin film transistor and the gate line connected to the gate of the second thin film transistor are simultaneously supplied with an electric signal.

20. A driving method for the display device of claim 16, comprising an environment detection module for detecting an intensity of the ambient light and a judgment module for judging whether to turn off the backlight source according to the intensity of the ambient light provided by the environment detection module; if the backlight needs to be turned off, then:

if the first pixel electrode is provided with a data signal and the second pixel electrode is not provided with the data signal before the backlight source is turned off, the data signal is stopped being provided for the electrode of the first pixel, and the data signal is started to be provided for the second pixel electrode;

if the second pixel electrode is provided with the data signal and the first pixel electrode is not provided with the data signal before the backlight source is turned off, the data signal is stopped being provided for the electrode of the second pixel, and the data signal is started to be provided for the first pixel electrode;