CN110288942A - A kind of display panel and display device - Google Patents
A kind of display panel and display device Download PDFInfo
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- CN110288942A CN110288942A CN201910579417.0A CN201910579417A CN110288942A CN 110288942 A CN110288942 A CN 110288942A CN 201910579417 A CN201910579417 A CN 201910579417A CN 110288942 A CN110288942 A CN 110288942A
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- 238000012360 testing method Methods 0.000 claims description 16
- 238000006073 displacement reaction Methods 0.000 claims description 11
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- 230000005611 electricity Effects 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 11
- 230000002146 bilateral effect Effects 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 6
- 101150061474 ckb-2 gene Proteins 0.000 description 5
- 101150002381 ckb-1 gene Proteins 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 3
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- 238000012986 modification Methods 0.000 description 3
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- 230000007547 defect Effects 0.000 description 1
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- 238000005401 electroluminescence Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- 230000000750 progressive effect Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
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- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The invention discloses a kind of display panel and display devices, by being grouped to the first shift register in emission control circuit, and each first register group is electrically connected adjacent a plurality of LED control signal line, by the way that the first different frame start signal ends and the first different clock control signal ends is respectively set to each first register group, the LED control signal line of electrical connection is driven so as to independent control each first register group.Wherein, when display panel subregion is shown, by making the first register group of part work independently, so that corresponding region carries out display driving, without making remaining corresponding region of the first register group carry out display driving, so as to reduce power consumption.When display panel is integrally shown, by making each first register group sequential working, driving is shown line by line to the LED control signal line progress in display panel, so as to so that display panel realizes the function of integrally showing.
Description
Technical field
The present invention relates to field of display technology, espespecially a kind of display panel and display device.
Background technique
With the rapid development of display technology, display panel increasingly develops towards the direction of high integration and low cost.
Wherein, array substrate row drives (Gate Driver on Array, GOA) technology by thin film transistor (TFT) (Thin Film
Transistor, TFT) scanning drive of the gate switch circuit integration in the array substrate of display panel with formation to display panel
It is dynamic, so as to save the binding region (Bonding) of grid integrated circuits (Integrated Circuit, IC) and be fanned out to
(Fan-out) wiring space in region not only can reduce product cost, Er Qieke in terms of material cost and preparation process two
So that display panel accomplishes that both sides are symmetrical and the design for aesthetic of narrow frame.
Currently, general drive control circuit is made of multiple cascade shift registers, shift registers at different levels
It is connected respectively a drive signal line, is realized by shift registers at different levels from top to bottom successively to the driving signal of connection
Line inputs scanning signal to be progressively scanned, while source electrode drive circuit loads corresponding data-signal to pieces of data line,
To complete to show a picture.However, when display panel only needs to show the partial contents such as time, calendar, weather, due to driving
Dynamic control circuit needs to carry out each drive signal line in display panel progressive scan and carries out display driving, can just make display surface
Plate shows above content, and power consumption is caused to increase.
Summary of the invention
The embodiment of the present invention provides a kind of display panel and display device, to reduce the power consumption of display panel.
The embodiment of the invention provides a kind of display panel, the display panel includes: a plurality of LED control signal line, with
And the emission control circuit with multiple first shift registers；Wherein, first shift register is divided into the M successively to arrange
A first register group, each first register group is corresponding to be electrically connected adjacent a plurality of LED control signal line；Each institute
State each first shift register cascade setting in the first register group, and each first shift register and at least one
The electrical connection of LED control signal line；And each first register group is respectively from the first different frame start signal ends and not
The first same corresponding connection in clock control signal end；M is the integer greater than 1；
Portion when the display panel subregion is shown, in a vertical interval, in the M the first register groups
The first register group is divided to be used for the control in the signal at the first frame start signal end and the first clock control signal end of electrical connection
Lower autonomous working drives the LED control signal line of electrical connection line by line；Wherein, in addition to first register group of part,
What the signal at the first frame start signal end of remaining first register group electrical connection was electrically connected with first register group of part
The signal at the first frame start signal end is different, the letter at the first clock control signal end of each first register group electrical connection
Number timing it is identical；
When the display panel is integrally shown, in a vertical interval, each first register group is used for
The sequential working under the control of the signal at the first frame start signal end and the first clock control signal end of electrical connection, to described aobvious
Show that the LED control signal line in panel drives line by line；Wherein, each first register group electrical connection first when clock
The timing of the signal of signal end processed is identical, and in addition to first the first register group, the electrical connection of remaining first register group
The first shift register of afterbody in the signal at the first frame start signal end and upper first register group for arranged adjacent
The timing of the signal of output is identical.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, in the display
When panel carries out factory testing, in a vertical interval, each first register group is used for the first of electrical connection
It is worked at the same time under the control of the signal at frame start signal end and the first clock control signal end, to the LED control signal of electrical connection
Line drives line by line；Wherein, the timing phase of the signal at the first clock control signal end of each first register group electrical connection
Together, the timing of the signal at the first frame start signal end of each first register group electrical connection is identical.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, the display surface
Plate is divided into first area and second area；M=2, wherein the 1st the first register group in 2 first register groups is used
It is located at the LED control signal line in the first area in driving；2nd the first register group is located at described for driving
LED control signal line in two regions；Or,
The display panel is divided into first area, second area and third region；M=3, wherein described 3 first are posted
The 1st the first register group in storage group is used to drive the LED control signal line being located in the first area；2nd
One register group is used to drive the LED control signal line being located in the second area；3rd the first register group is for driving
The dynamic LED control signal line in the third region.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, described first is moved
Bit register includes multiple P-type transistors；
When the display panel subregion is shown, the first frame start signal of the first register group of part electrical connection
The corresponding load effective impulse signal in end is the pulse signal of low potential；In addition to first register group of part, remaining first
First frame start signal end of register group electrical connection loads fixed high potential signal.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, described first is moved
Bit register includes multiple N-type transistors；
When the display panel subregion is shown, the first frame start signal of the first register group of part electrical connection
The corresponding load effective impulse signal in end is the pulse signal of high potential；In addition to first register group of part, remaining first
First frame start signal end of register group electrical connection loads fixed low-potential signal.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, each first is moved
Bit register includes that the first shift register of left side for being respectively arranged at same LED control signal line both ends and right side first are moved
Bit register；And when the display panel entirety or subregion are shown, in first shift register work, it is located at
First shift register of left side and the first shift register of right side at same LED control signal line both ends work at the same time；Described
When display panel carries out factory testing, in first shift register work, it is located at same LED control signal line both ends
The first shift register of left side and the first shift register of right side select a job.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, the display surface
Plate further includes a plurality of gate line and gate driving circuit；The gate driving circuit has multiple the of cascade setting
Two shift registers；Each second shift register is electrically connected at least one gate line；First second displacement
Register is electrically connected with a second frame start signal end；Each second shift register and identical second clock control
Signal end electrical connection；
In a vertical interval, each second shift register be used for electrical connection the second frame start signal end and
Sequential working under the control of the signal of second clock control signal end drives the gate line of electrical connection line by line.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, each second is moved
Bit register includes that the second shift register of left side for being respectively arranged at same gate line both ends and the displacement of right side second are posted
Storage；And when the display panel entirety or subregion are shown, in second shift register work, it is located at same
Second shift register of left side and the second shift register of right side at gate line both ends work at the same time；In the display panel
When carrying out factory testing, in second shift register work, the left side second positioned at same gate line both ends is moved
Bit register and the second shift register of right side select a job.
In one possible implementation, in above-mentioned display panel provided in an embodiment of the present invention, the display surface
Plate further includes a plurality of data signal line, and the source electrode drive circuit being electrically connected with a plurality of data signal line；
When the display panel subregion is shown, in a vertical interval, the source electrode drive circuit is for only existing
When first register group of part works, valid data signal is loaded to a plurality of data signal line of electrical connection；Institute
When stating the work of remaining first register group, to the fixed low-potential signal of a plurality of data signal line load one of electrical connection.
On the other hand, the embodiment of the invention also provides a kind of display device, including it is provided in an embodiment of the present invention above-mentioned
Display panel.
The present invention has the beneficial effect that:
A kind of display panel provided in an embodiment of the present invention and display device, by being moved to first in emission control circuit
Bit register is grouped, and the first shift register in each first register group is using cascade setting, and each first posts
Storage group is electrically connected adjacent a plurality of LED control signal line, and different by the way that each first register group is respectively set
First frame start signal end and the first different clock control signal ends, so as to each first register group pair of independent control
The LED control signal line of electrical connection is driven.
Wherein, when display panel subregion is shown, pass through setting each first frame start signal end and clock when first
The signal of signal end processed so that the first register group of part works independently so that the corresponding region of the first register group of work into
Row display driving is posted by the way that the signal at the first frame start signal end of remaining first register group electrical connection is arranged with part first
The signal at the first frame start signal end of storage group electrical connection is different, the first clock control of each first register group electrical connection
The timing of the signal of signal end is identical, without making remaining corresponding region of the first register group carry out display driving, so as to
Reduce power consumption.When display panel is integrally shown, pass through setting each first frame start signal end and the first clock control signal
The signal at end is so that each first register group sequential working, shows drive to the LED control signal line progress in display panel line by line
It is dynamic, so as to so that display panel realizes the function of integrally showing.
Detailed description of the invention
Fig. 1 is one of the structural schematic diagram of display panel provided in an embodiment of the present invention；
Fig. 2 is the second structural representation of display panel provided in an embodiment of the present invention；
Fig. 3 is one of the structural schematic diagram of shift register provided in an embodiment of the present invention；
Fig. 4 is the second structural representation of shift register provided in an embodiment of the present invention；
Fig. 5 is one of circuit timing diagram provided in an embodiment of the present invention；
Fig. 6 is the two of circuit timing diagram provided in an embodiment of the present invention；
Timing diagram when Fig. 7 is subregion work in embodiment one provided in an embodiment of the present invention；
Timing diagram when Fig. 8 is overall work in embodiment one provided in an embodiment of the present invention；
Timing diagram when Fig. 9 is factory testing in embodiment one provided in an embodiment of the present invention；
Figure 10 is the third structural representation of display panel provided in an embodiment of the present invention.
Specific embodiment
In order to make the purpose of the present invention, the technical scheme and advantages are more clear, with reference to the accompanying drawing, to the embodiment of the present invention
The display panel of offer and the specific embodiment of display device are described in detail.It should be appreciated that disclosed below is excellent
Select embodiment only for the purpose of illustrating and explaining the present invention and is not intended to limit the present invention.And in the absence of conflict, the application
In embodiment and embodiment in feature can be combined with each other.
The embodiment of the invention provides a kind of display panels, and as depicted in figs. 1 and 2, display panel includes: a plurality of luminous control
Signal wire emit processed, and the emission control circuit VSR_EMIT with multiple first shift registers；Wherein, the first displacement is posted
Storage is divided into a first register group VSR_EMIT_m of the M successively to arrange, and (m is more than or equal to 1 and whole less than or equal to M
Number；Wherein, Fig. 1 is by taking M=2 as an example, and Fig. 2 is by taking M=3 as an example), the corresponding electrical connection of each first register group VSR_EMIT_m is adjacent
A plurality of LED control signal line emit；Each first shift register cascade in each first register group VSR_EMIT_m is set
It sets, and every one first shift register is electrically connected at least one LED control signal line emit；And each first register
Group VSR_EMIT_m respectively from the first different frame start signal end stv1_m and the first different clock control signal end ckv1_
The corresponding connection of m；M is the integer greater than 1；
When display panel subregion is shown, in a vertical interval, the part first in M the first register groups is posted
Storage group is used for the independent work under the control of the signal at the first frame start signal end and the first clock control signal end of electrical connection
Make, the LED control signal line of electrical connection is driven line by line；Wherein, in addition to the first register group of part, remaining first deposit
The first frame start signal end that the signal at the first frame start signal end of device group electrical connection is electrically connected with the first register group of part
Signal it is different, the signal of the first clock control signal end stv1_m of each first register group VSR_EMIT_m electrical connection
Timing is identical, i.e. the timing of the signal of ck1_m is identical, and the timing of the signal of ckb1_m is identical；
When display panel is integrally shown, in a vertical interval, each first register group VSR_EMIT_m is used for
Sequence work under the control of the signal of the first frame start signal end stv1_m and the first clock control signal end ckv1_m of electrical connection
Make, the LED control signal line emit in display panel is driven line by line；Wherein, each first register group VSR_EMIT_m electricity
The timing of the signal of first clock control signal end stv1_m of connection is identical, i.e. the timing of the signal of ck1_m is identical, ckb1_m
Signal timing it is identical；And in addition to first the first register group, the first frame of remaining first register group electrical connection is risen
The first shift register of afterbody is defeated in the signal of beginning signal end stv1_m and upper first register group for arranged adjacent
The timing of signal out is identical.
Specifically, display panel provided in an embodiment of the present invention, by the first shift LD in emission control circuit
Device is grouped, and the first shift register in each first register group is arranged using cascade, and each first register group
It is electrically connected adjacent a plurality of LED control signal line, and by the way that different first frames is respectively set to each first register group
Initial signal end and the first different clock control signal ends, so as to each first register group of independent control to electrical connection
LED control signal line driven.Wherein, when display panel subregion is shown, by the way that each first frame starting letter is arranged
Number end is with the signal at the first clock control signal end so that the first register group of part works independently, so that the first deposit of work
The corresponding region of device group carries out display driving, by the first frame start signal end that the electrical connection of remaining first register group is arranged
Signal is different from the signal at the first frame start signal end that the first register group of part is electrically connected, and each first register group is electrically connected
The timing of the signal at the first clock control signal end connect is identical, without showing remaining corresponding region of the first register group
Show driving, so as to reduce power consumption.When display panel is integrally shown, pass through setting each first frame start signal end and the
The signal of one clock control signal end is so that each first register group sequential working, carries out the drive signal line in display panel
Show driving, line by line so as to so that display panel realizes the function of integrally showing.
Optionally, in above-mentioned display panel provided in an embodiment of the present invention, when display panel carries out factory testing,
In one vertical interval, each first register group VSR_EMIT_m be used for electrical connection the first frame start signal end stv1_m and
Worked at the same time under the control of the signal of first clock control signal end ckv1_m, to the LED control signal line emit of electrical connection by
Row driving；Wherein, the signal of the first clock control signal end ckv1_m of each first register group VSR_EMIT_m electrical connection
Timing it is identical, the signal of the first frame start signal end stv1_m of each first register group VSR_EMIT_m electrical connection when
Sequence is identical.
Specifically, before display panel factory, it will do it pressure test, by emission control circuit VSR_EMIT to institute
Some LED control signal line emit load useful signal, make the transistor connecting with LED control signal line emit work in height
The enabled state of voltage can repair defect state in transistor in this way, reduce standoff voltage, make display panel after shipment,
The generation of bright spot is reduced as far as possible.When display panel carries out factory testing, each first register group VSR_ can control
EMIT_m is worked at the same time, to improve working efficiency.
In the specific implementation, display panel provided in an embodiment of the present invention can be electroluminescence display panel.Electroluminescent
In light emitting display panel, the pixel that is typically provided with multiple electroluminescent diodes and is connect with each electroluminescent diode
Driving circuit.Be provided in general pixel-driving circuit light emitting control transistor for controlling organic light-emitting diode and
For controlling the scan control transistor of data-signal input.The driving open signal of emission control circuit VSR_EMIT output is logical
It crosses LED control signal line emit and is transferred to light emitting control transistor, control light emitting control transistor is opened, control driving crystal
Pipe drives electroluminescent diode to shine, and display panel is made to realize display function.The drive of emission control circuit VSR_EMIT output
Dynamic shutdown signal shines for controlling the closing of light emitting control transistor to avoid driving transistor driving electroluminescent diode,
So as to show display panel, and then further decrease power consumption.Therefore, when subregion is shown, the of autonomous working
The light emitting control transistor that one register group can control its corresponding region is opened, to realize display function.And remaining first is posted
Storage group not output driving open signal, to the display of its corresponding region will not be made to shine, so as to save display panel
Power consumption.In practical applications, the specific structure of pixel-driving circuit can in the prior art have light emitting control transistor
Identical with the pixel-driving circuit of scan control transistor, therefore not to repeat here.
In the specific implementation, each in each first register group in display panel provided in an embodiment of the present invention
The cascade connection of a first shift register are as follows: risen with corresponding first frame at the input signal end of the first shift register of the first order
Beginning signal end is connected；In addition to the first shift register of the first order, the input signal end point of remaining the first shift register at different levels
The output signal end of the first shift register of upper level not adjacent thereto is connected.
In the specific implementation, in display panel provided in an embodiment of the present invention, as shown in Figure 3 and Figure 4, the first displacement is posted
Storage may include: first switch transistor M1, second switch transistor M2, third switching transistor M3, the 4th switch crystal
Pipe M4, the 5th switching transistor M5, the 6th switching transistor M6, the 7th switching transistor M7, the 8th switching transistor M8, first
Capacitor C1 and the second capacitor C2.The control electrode of first switch transistor M1 is connected with the first clock signal terminal CK, first switch
The first pole of transistor M1 is connected with input signal end In, and the second pole of first switch transistor M1 is connected with first node N1.
The control electrode of second switch transistor M2 is connected with the first clock signal terminal CK, the first pole and first of second switch transistor M2
Reference voltage signal end vref1 is connected, and the second pole of second switch transistor M2 is connected with second node N2.Third switchs crystal
The control electrode of pipe M3 is connected with the first reference voltage signal end vref1, the first pole of third switching transistor M3 and first node
N1 is connected, and the second pole of third switching transistor M3 is connected with third node N3.The control electrode of 4th switching transistor M4 and the
One node N1 is connected, and the first pole of the 4th switching transistor M4 is connected with the first clock signal terminal CK, the 4th switching transistor M4
The second pole be connected with second node N2.
The control electrode of 5th switching transistor M5 is connected with second clock signal end CKB, and the of the 5th switching transistor M5
One pole is extremely connected with the second of the 6th switching transistor M6, and the second pole of the 5th switching transistor M5 is connected with first node N1.
The control electrode of 6th switching transistor M6 is connected with second node N2, and the first pole of the 6th switching transistor M6 is with second with reference to electricity
Signal end vref2 is pressed to be connected.The control electrode of 7th switching transistor M7 is connected with third node N3, the 7th switching transistor M7's
First pole is connected with second clock signal end CKB, the second pole and the first shift register cell of the 7th switching transistor M7
Output signal end Out is connected.The control electrode of 8th switching transistor M8 is connected with second node N2, the 8th switching transistor M8's
First pole is connected with the second reference voltage signal end vref2, the second pole of the 8th switching transistor M8 and the first shift register
The output signal end Out of unit is connected.The first end of first capacitor C1 is connected with third node N3, the second end of first capacitor C1
It is connected with the output signal end Out of the first shift register cell.The first end of second capacitor C2 is connected with second node N2, the
The second end of two capacitor C2 is connected with the second reference voltage signal end vref2.The above is only illustrate the present invention embodiment to mention
The specific structure of the first shift register supplied, in the specific implementation, the specific structure of the first shift register is not limited to this hair
The above structure that bright embodiment provides, can also be skilled person will appreciate that other structures, be not limited thereto.
In the specific implementation, in display panel provided in an embodiment of the present invention, as shown in figure 3, above-mentioned each switch crystal
Pipe can be P-type transistor, and P-type transistor is connected under the signal control of low potential, under the signal control of high potential
Cut-off.Alternatively, as shown in figure 4, above-mentioned each switching transistor may be N-type transistor, and N-type transistor is in high potential
The lower conducting of signal control, ends under the signal control of low potential.And the control of above-mentioned each switching transistor extremely its grid,
According to the type of above-mentioned each switching transistor so that first extremely its source electrode, second extremely its drain, alternatively, make first extremely its
Drain electrode, second extremely its source electrode, herein without distinguishing.
In practical applications, the corresponding circuit timing diagram of the first shift register shown in Fig. 3 is Fig. 5, input signal end
In corresponds to the pulse signal in that effective impulse signal is low potential, and the first clock signal terminal CK corresponds to clock signal ck, when second
Clock signal end CKB corresponds to clock signal ckb, and output signal end Out corresponds to output drive signal out.At this point, clock signal ck with
The efficient clock signal of ckb within a clock cycle is low-potential signal within a clock cycle, a clock week
Low-potential signal in phase is used to generate the low-potential signal in driving signal out as driving open signal.However, inputting
When the corresponding signal of signal end In is fixed high potential signal, the 7th transistor M7 is not turned on, to make output drive signal
Out is always maintained at the fixed high potential signal of output.
The corresponding circuit timing diagram of first shift register shown in Fig. 4 is Fig. 6, and input signal end In corresponds to effective impulse
Signal is that the pulse signal in, the first clock signal terminal CK of high potential correspond to clock signal ck, and second clock signal end CKB is corresponding
Clock signal ckb, output signal end Out correspond to output drive signal out.At this point, clock signal ck and ckb is a clock week
Efficient clock signal in phase is high potential signal within a clock cycle, the high potential signal in a clock cycle
For generating the high potential signal in driving signal out as driving open signal.However, in the corresponding letter of input signal end In
When number for fixed low-potential signal, the 7th transistor M7 is not turned on, so that it is solid so that output drive signal out is always maintained at output
Determine low-potential signal.The course of work and the course of work in the prior art of above-mentioned two first shift register are essentially identical,
It will be apparent to an ordinarily skilled person in the art that having, therefore not to repeat here, also should not be limiting for the invention.
In the specific implementation, the structure of the first shift register in display panel provided in an embodiment of the present invention is as schemed
When shown in 3 or Fig. 4, the first register group VSR_EMIT_m corresponding first clock control signal end combined with Figure 1 and Figure 2,
Ckv1_m may include two the first clock control subsignal ends: ck1_m and ckb1_m.In first register group VSR_EMIT_m
Each first shift register the first clock signal terminal and corresponding first clock control subsignal end between connection close
System can be with are as follows: the second of first clock signal terminal CK and 2c the first shift register of grade of 2c-1 the first shift register of grade
Clock signal terminal CKB is connected with the same first clock control subsignal end ck1_m, 2c-1 the first shift register of grade
First clock signal terminal CK of second clock signal end CKB and 2c the first shift register of grade with clock when same first
System signal end ckb1_m is connected, and c is positive integer.
In the specific implementation, in display panel provided in an embodiment of the present invention, as shown in figure 3, the first shift register
Including multiple P-type transistors, in order to make the first shift register in the first register group successively realize displacement output services, such as
Shown in Fig. 5, it is low potential that the first frame start signal end of first register group electrical connection, which can load effective impulse signal,
Pulse signal in.Also, the first clock control subsignal end of first register group electrical connection can load clock letter respectively
Number ck and ckb.However, this first in order to avoid the first shift register output in the first register group drives open signal
First frame start signal end of register group electrical connection can load fixed high potential signal, to avoid the P in shift register
Transistor npn npn is opened.Therefore, in the specific implementation, when subregion is shown, the first register group of part electrical connection of work
First frame start signal end can correspond to the pulse signal that load effective impulse signal is low potential, so that the part first is deposited
Device group can work normally to drive LED control signal line.And in addition to the first register group of part, remaining first register
First frame start signal end of group electrical connection can load fixed high potential signal, while remaining first register group is electrically connected
The first clock control signal end that the first clock control signal end load connect is electrically connected with the first register group of part of work
Identical signal, while reducing the interference between the first clock control signal line, so that first register of rest part
Group can be to avoid driving LED control signal line.
In the specific implementation, in display panel provided in an embodiment of the present invention, as shown in figure 4, the first shift register
Including multiple N-type transistors, in order to make the first shift register in the first register group successively realize displacement output services, such as
Shown in Fig. 6, it is high potential that the first frame start signal end of first register group electrical connection, which can load effective impulse signal,
Pulse signal in.Also, the first clock control subsignal end of first register group electrical connection can load clock letter respectively
Number ck and ckb.However, in order to avoid the first shift register output in the first register group drives open signal, the deposit
First frame start signal end of device group electrical connection can load fixed low-potential signal, to avoid the N in the first shift register
Transistor npn npn is opened.Therefore, in the specific implementation, when subregion is shown, the first frame of the first register group of part electrical connection
Initial signal end can correspond to the pulse signal that load effective impulse signal is high potential, so that first register group of part can
LED control signal line is driven to work normally.And in addition to the first register group of part, remaining first register group is electrically connected
The the first frame start signal end connect can load fixed low-potential signal, while the of remaining first register group electrical connection
The first clock control signal end that the load of one clock control signal end is electrically connected with the first register group of part of work is identical
Signal, while reducing the interference between the first clock control signal line, so that first register group of rest part can be with
Avoid driving LED control signal line.
In the specific implementation, in display panel provided in an embodiment of the present invention, the first shift register can be divided into
2 the first register groups successively arranged, i.e. M=2 can make display panel that two regions is divided to carry out driving in this way and show.Or
First shift register, can be divided into 3 the first register groups successively arranged by person, i.e. M=3 can make display surface in this way
Three regions of plate point carry out driving and show.It is of course also possible to which the first shift register is divided into successively arrange 4,5 ... a first
Register group can make display panel point multiple regions carry out driving and show.In practical applications, the numerical value of M is needed according to reality
Border application environment designs determination, is not limited thereto.
Separately below by taking M=2 and M=3 as an example, display panel provided in an embodiment of the present invention is illustrated.Under also,
Face is by taking the first shift register includes P-type transistor as an example.
Embodiment one,
By taking M=2 as an example, display panel is conventionally arranged for the pixel of display, and LED control signal line is along the row side of pixel
To extension.In the specific implementation, in display panel provided in an embodiment of the present invention, as shown in Figure 1, display panel can be divided into
Two regions, are respectively as follows: first area aa_1 and second area aa_2.The 1st first deposit in this 2 first register groups
Device group VSR_EMIT_1 is used to drive the LED control signal line emit being located in the aa_1 of first area, so that first area aa_1
In LED control signal line emit can be driven.2nd the first register group VSR_EMIT_2 is located at second for driving
LED control signal line emit in the aa_2 of region, so that the LED control signal line emit in second area aa_2 can be driven
It is dynamic.
General display panel can use the mode of bilateral driving to realize driving function, in the specific implementation, in this hair
In the display panel that bright embodiment provides, each first shift register may include being respectively arranged at same LED control signal
First shift register of the first shift register of left side and right side at the both ends line emit；And in display panel entirety or subregion
When display, in the work of the first shift register, the displacement of left side first positioned at the same both ends LED control signal line emit is posted
Storage and the first shift register of right side work at the same time, and display panel can be made to realize the function of bilateral driving in this way.It is showing
When panel carries out factory testing, in the work of the first shift register, positioned at the left side at the same both ends LED control signal line emit
The first shift register of side and the first shift register of right side select a job, to play the role of full frame driving, while not working
The first shift register of side can prolong the service life.Specifically, as shown in Figure 1, being with the first shift register SR1_1
Example, the first shift register SR1_1 include moving positioned at driving with the left side first of the LED control signal line emit of one-row pixels
Bit register SR1_1a and right side the first shift register SR1_1b.The specific setting of remaining the first shift register is referred to
The setting of first shift register SR1_1, therefore not to repeat here.
In the specific implementation, display panel provided in an embodiment of the present invention is when subregion is shown, wherein in first area
Aa_1 shows, and when second area aa_2 is not shown, the first frame start signal end stv1_1 can be with the signal in corresponding diagram 7
stv1.First clock control subsignal end ck1_1, ckb1_1 can respectively correspond ck1, ckb1 in Fig. 7.It can make to send out in this way
The 1st the first register group VSR_EMIT_1 in light control circuit its electrical connection the first frame start signal end stv1_1 with
It works under the control of the signal at the first clock control signal end (including the first clock control subsignal end ck1_1 and ckb1_1),
With output drive signal, the LED control signal line in the aa_1 of first area is driven, the electroluminescent in the aa_1 of first area is made
LED lighting realizes display function.2nd the first register group VSR_EMIT_2 corresponding first frame start signal end
Stv1_2 can load the stv2 in high potential signal corresponding diagram 7, and first clock control subsignal end ck1_2, ckb1_2 can be with
Respectively correspond ck2, ckb2 in Fig. 7.At the first frame start signal end stv1_2 of its electrical connection and clock control signal end
Not output drive signal under the control of the signal of (including clock control subsignal end ck_2 and ckb_2), to avoid the secondth area is made
Electroluminescent diode in the aa_2 of domain shines, and so as to avoid second area aa_2 from showing, and then reduces display panel
Power consumption.In first area, aa_1 is not shown, and when second area aa_2 display, the working principle of display panel and above-mentioned basic phase
Together, therefore not to repeat here.In integrally display, the 1st first register group VSR_EMIT_1 and the 2nd the first register group
VSR_EMIT_2 sequential working, to be driven line by line to the LED control signal line in display panel.At this point, the first frame start signal
End stv1_1 and stv1_2 can respectively correspond signal stv1 and stv2 in Fig. 8.First clock control subsignal end ck1_1,
Ckb1_1, ck1_2, ckb1_2 can respectively correspond ck1, ckb1, ck2, ckb2 in Fig. 8.In factory testing, the 1st
One register group VSR_1 is worked at the same time with the 2nd the first register group VSR_2, to the LED control signal in display panel
Line drives line by line.At this point, the first frame start signal end stv1_1 and stv1_2 can respectively correspond signal stv1 in Fig. 9 with
stv2.First clock control subsignal end ck_1, ckb_1, ck_2, ckb_2 can respectively correspond ck1, ckb1 in Fig. 8,
ck2、ckb2。
Embodiment two,
By taking M=3 as an example, in the specific implementation, in display panel provided in an embodiment of the present invention, as shown in Fig. 2, display
Panel can be divided into three regions, be respectively as follows: first area aa_1, second area aa_2 and third region aa_3.This 3
The 1st the first register group VSR_EMIT_1 in one register group is used to drive the light emitting control being located in the aa_1 of first area
Signal wire emit, so that the LED control signal line emit in the aa_1 of first area can be driven.2nd the first register group
VSR_EMIT_2 is used to drive the LED control signal line emit being located in second area aa_2, so that in second area aa_2
LED control signal line emit can be driven.3rd the first register group VSR_EMIT_3 is located at third region for driving
LED control signal line emit in A_3, so that the LED control signal line emit in the aa_3 of third region can be driven.
General display panel can use the mode of bilateral driving to realize driving function, in the specific implementation, in this hair
In the display panel that bright embodiment provides, each first shift register may include being respectively arranged at same LED control signal
First shift register of the first shift register of left side and right side at the both ends line emit；And in display panel entirety or subregion
When display, in the work of the first shift register, the displacement of left side first positioned at the same both ends LED control signal line emit is posted
Storage and the first shift register of right side work at the same time, and display panel can be made to realize the function of bilateral driving in this way.It is showing
When panel carries out factory testing, in the work of the first shift register, positioned at the left side at the same both ends LED control signal line emit
The first shift register of side and the first shift register of right side select a job, to play the role of full frame driving, while not working
The first shift register of side can prolong the service life.Specifically, as shown in Fig. 2, being with the first shift register SR1_1
Example, the first shift register SR1_1 include moving positioned at driving with the left side first of the LED control signal line emit of one-row pixels
Bit register SR1_1a and right side the first shift register SR1_1b.The specific setting of remaining the first shift register is referred to
The setting of first shift register SR1_1, therefore not to repeat here.
It is shown carrying out subregion, full screen display and driving method when factory testing are similar with embodiment one, herein not
It is described further.
Further, in the specific implementation, in above-mentioned display panel provided in an embodiment of the present invention, as shown in Figure 10,
Display panel can also include a plurality of gate line gate and gate driving circuit VSR_GATE；Gate driving circuit
VSR_GATE has multiple second shift register SR_n of cascade setting；Every one second shift register SR_n and at least one
Gate line gate electrical connection；First the second shift register is electrically connected with a second frame start signal end stv2；Often
A second shift register SR_n is electrically connected with identical second clock control signal end ckv2；
In a vertical interval, each second shift register SR_n is used at the second frame start signal end of electrical connection
Sequential working under the control of the signal of stv2 and second clock control signal end ckv2, to the gate line gate of electrical connection by
Row driving.
Specifically, the driving open signal of gate driving circuit VSR_GATE output is transferred to by gate line gate
Scan control transistor controls the open and close of scan control transistor.Wherein, driving open signal is for controlling scanning control
Transistor processed is opened, and driving shutdown signal is for controlling the closing of scan control transistor.
Specifically, in above-mentioned display panel provided in an embodiment of the present invention, not for gate driving circuit VSR_GATE
It is grouped, only with a set of second clock control signal end ckv2 and the second frame start signal end stv2, wiring can be saved.
It is shown in whether subregion, each second displacement when whole display or factory testing, in gate driving circuit VSR_GATE
The equal sequential working of register SR_n.When subregion is shown, not display area is carried out by emission control circuit VSR_EMIT
Not light emitting control influences narrow frame design to avoid being grouped gate driving circuit VSR_GATE to increase wiring.
Further, similarly, in above-mentioned display panel provided in an embodiment of the present invention, as shown in Figure 10, gate driving
Circuit VSR_GATE can also realize driving function by the way of bilateral driving, and specifically, each second shift register can
To include that left side the second shift register SR_na for being respectively arranged at the both ends same gate line gate and right side second shift
Register SR_nb；And when display panel entirety or subregion are shown, in the work of the second shift register, it is located at same
Second shift register of left side and the second shift register of right side at gate line both ends work at the same time, and can make to show in this way
Panel realizes the function of bilateral driving.When display panel carries out factory testing, in the work of the second shift register, it is located at same
Second shift register of left side and the second shift register of right side at one gate line both ends select a job, to play full frame drive
Dynamic effect, while the second shift register of idle side can prolong the service life.
Also, the source electrode drive circuit in practical applications, while scan control transistor is opened, in display panel
Corresponding display signal is loaded to pieces of data line, so that display panel completes one picture of display.The work of source electrode drive circuit
The process of work can with it is in the prior art identical, therefore not to repeat here.Therefore, in above-mentioned display surface provided in an embodiment of the present invention
In plate, display panel can also include a plurality of data signal line, and the source drive electricity being electrically connected with a plurality of data signal line
Road；
When display panel subregion is shown, in a vertical interval, source electrode drive circuit is used for only in part first
When register group works, valid data signal is loaded to a plurality of data signal line of electrical connection；In remaining the first register group work
When making, to the fixed low-potential signal of a plurality of data signal line load one of electrical connection, power consumption can be saved in this way.
Based on the same inventive concept, the embodiment of the invention also provides a kind of display devices, including the embodiment of the present invention to mention
The above-mentioned display panel supplied.The display device can be with are as follows: mobile phone, tablet computer, television set, display, laptop, number
Any products or components having a display function such as photo frame, navigator.For other essential compositions of the display device
Part is it will be apparent to an ordinarily skilled person in the art that having, and this will not be repeated here, also should not be used as to of the invention
Limitation.The implementation of the display device may refer to the embodiment of above-mentioned display panel, and overlaps will not be repeated.
Above-mentioned display panel provided in an embodiment of the present invention and display device, by being moved to first in emission control circuit
Bit register is grouped, and the first shift register in each first register group is using cascade setting, and each first posts
Storage group is electrically connected adjacent a plurality of LED control signal line, and different by the way that each first register group is respectively set
First frame start signal end and the first different clock control signal ends, so as to each first register group pair of independent control
The LED control signal line of electrical connection is driven.Wherein, when display panel subregion is shown, by the way that each first frame is arranged
The signal at initial signal end and the first clock control signal end is so that the first register group of part works independently, so that the of work
The corresponding region of one register group carries out display driving, by the first frame starting letter that the electrical connection of remaining first register group is arranged
Number end signal it is different from the signal at the first frame start signal end that the first register group of part is electrically connected, each first register
The timing of the signal at the first clock control signal end of group electrical connection is identical, without making remaining corresponding region of the first register group
Display driving is carried out, so as to reduce power consumption.When display panel is integrally shown, by the way that each first frame start signal is arranged
End with the signal at the first clock control signal end so that each first register group sequential working, to the light emitting control in display panel
Signal wire progress shows driving line by line, so as to so that display panel realizes the function of integrally showing.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of display panel, which is characterized in that the display panel includes: a plurality of LED control signal line, and is had more
The emission control circuit of a first shift register；Wherein, first shift register is divided into M first successively to arrange and posts
Storage group, each first register group is corresponding to be electrically connected adjacent a plurality of LED control signal line；Each described first posts
Each first shift register in storage group cascades setting, and each first shift register and at least one light emitting control
Signal wire electrical connection；And each first register group respectively from the first different frame start signal ends and different first
The corresponding connection in clock control signal end；M is the integer greater than 1；
When the display panel subregion is shown, in a vertical interval, part in the M the first register groups the
One register group is used under the control of the signal at the first frame start signal end and the first clock control signal end of electrical connection solely
Vertical work, drives the LED control signal line of electrical connection line by line；Wherein, in addition to first register group of part, remaining
First register group electrical connection the first frame start signal end signal be electrically connected with first register group of part first
The signal at frame start signal end is different, the signal at the first clock control signal end of each first register group electrical connection
Timing is identical；
When the display panel is integrally shown, in a vertical interval, each first register group is used in electricity
Sequential working under the control of the signal at the first frame start signal end and the first clock control signal end of connection, to the display surface
LED control signal line in plate drives line by line；Wherein, the first clock control letter of each first register group electrical connection
The timing of the signal at number end is identical, and in addition to first the first register group, the first of the electrical connection of remaining first register group
The first shift register output of afterbody in the signal at frame start signal end and upper first register group for arranged adjacent
Signal timing it is identical.
2. display panel as described in claim 1, which is characterized in that when the display panel carries out factory testing, in institute
It states in a vertical interval, each first register group is used for the clock at the first frame start signal end of electrical connection and first
It is worked at the same time under the control of the signal of signal end processed, the LED control signal line of electrical connection is driven line by line；Wherein, each described
The timing of the signal at the first clock control signal end of the first register group electrical connection is identical, each first register group electricity
The timing of the signal at the first frame start signal end of connection is identical.
3. display panel as described in claim 1, which is characterized in that the display panel is divided into first area and the secondth area
Domain；M=2, wherein the 1st the first register group in 2 first register groups is located at the first area for driving
In LED control signal line；2nd the first register group is used to drive the LED control signal being located in the second area
Line；Or,
The display panel is divided into first area, second area and third region；M=3, wherein 3 first registers
The 1st the first register group in group is used to drive the LED control signal line being located in the first area；2nd first is posted
Storage group is used to drive the LED control signal line being located in the second area；3rd the first register group is for driving position
LED control signal line in the third region.
4. display panel as described in claim 1, which is characterized in that first shift register includes multiple P-type crystals
Pipe；
When the display panel subregion is shown, the first frame start signal end pair of the first register group of part electrical connection
The pulse signal that effective impulse signal is low potential should be loaded；In addition to first register group of part, remaining first deposit
First frame start signal end of device group electrical connection loads fixed high potential signal.
5. display panel as described in claim 1, which is characterized in that first shift register includes multiple N-type crystal
Pipe；
When the display panel subregion is shown, the first frame start signal end pair of the first register group of part electrical connection
The pulse signal that effective impulse signal is high potential should be loaded；In addition to first register group of part, remaining first deposit
First frame start signal end of device group electrical connection loads fixed low-potential signal.
6. display panel as described in any one in claim 1-5, which is characterized in that each first shift register includes difference
It is set to first shift register of the first shift register of left side and right side at same LED control signal line both ends；And institute
When stating display panel entirety or subregion display, in first shift register work, it is located at same LED control signal
First shift register of left side and the first shift register of right side at line both ends work at the same time；Factory is carried out in the display panel
When test, in first shift register work, the displacement of left side first positioned at same LED control signal line both ends is posted
Storage and the first shift register of right side select a job.
7. display panel as described in claim 1, which is characterized in that the display panel further includes a plurality of gate line,
And gate driving circuit；The gate driving circuit has multiple second shift registers of cascade setting；Each described
Two shift registers are electrically connected at least one gate line；First the second shift register and the second frame starting are believed
Number end electrical connection；Each second shift register is electrically connected with identical second clock control signal end；
In a vertical interval, each second shift register is used at the second frame start signal end of electrical connection and second
Sequential working under the control of the signal at clock control signal end drives the gate line of electrical connection line by line.
8. display panel as claimed in claim 7, which is characterized in that each second shift register includes being respectively arranged at together
Second shift register of the second shift register of left side and right side at one gate line both ends；And it is whole in the display panel
When body or subregion are shown, in second shift register work, positioned at the left side second at same gate line both ends
Shift register and the second shift register of right side work at the same time；When the display panel carries out factory testing, described the
When two shift registers work, posted positioned at second shift register of left side at same gate line both ends and the displacement of right side second
Storage selects a job.
9. display panel as described in claim 1, which is characterized in that the display panel further includes a plurality of data signal line,
And the source electrode drive circuit being electrically connected with a plurality of data signal line；
When the display panel subregion is shown, in a vertical interval, the source electrode drive circuit is used for only described
When the first register group of part works, valid data signal is loaded to a plurality of data signal line of electrical connection；It is described its
When first register group of remaininging works, to the fixed low-potential signal of a plurality of data signal line load one of electrical connection.
10. a kind of display device, which is characterized in that including such as described in any item display panels of claim 1-9.
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| CN109686333A (en) * | 2019-02-01 | 2019-04-26 | 京东方科技集团股份有限公司 | Gate driving circuit and its driving method, display device |
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| CN111951714A (en) * | 2020-02-19 | 2020-11-17 | 友达光电股份有限公司 | Partial display driver method |
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| CN111402806B (en) * | 2020-04-26 | 2021-08-27 | 京东方科技集团股份有限公司 | Driving circuit, driving method thereof and display panel |
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Effective date of registration: 20211021 Address after: No.8 liufangyuan Road, Dongyi Industrial Park, Donghu New Technology Development Zone, Wuhan, Hubei Province Patentee after: WUHAN TIANMA MICROELECTRONICS Co.,Ltd. Patentee after: Wuhan Tianma Microelectronics Co.,Ltd. Shanghai Branch Address before: Room 509, building 1, 6111 Longdong Avenue, Pudong New Area, Shanghai 201201 Patentee before: SHANGHAI TIANMA AM-OLED Co.,Ltd. |