CN118538572A - Interactive phased closing device and method - Google Patents
Interactive phased closing device and method Download PDFInfo
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- CN118538572A CN118538572A CN202411008933.5A CN202411008933A CN118538572A CN 118538572 A CN118538572 A CN 118538572A CN 202411008933 A CN202411008933 A CN 202411008933A CN 118538572 A CN118538572 A CN 118538572A
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- 238000006243 chemical reaction Methods 0.000 claims abstract description 39
- 230000003993 interaction Effects 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 claims description 45
- 230000006870 function Effects 0.000 claims description 30
- 238000002955 isolation Methods 0.000 claims description 26
- 238000012546 transfer Methods 0.000 claims description 23
- 239000007787 solid Substances 0.000 claims description 19
- 239000003381 stabilizer Substances 0.000 claims description 15
- 230000009466 transformation Effects 0.000 claims description 9
- 238000009825 accumulation Methods 0.000 claims description 8
- 230000008569 process Effects 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 7
- 238000004364 calculation method Methods 0.000 claims description 4
- 238000005070 sampling Methods 0.000 claims description 4
- 241000764238 Isis Species 0.000 claims description 3
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- 101100489717 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) GND2 gene Proteins 0.000 description 2
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- 101100489713 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) GND1 gene Proteins 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H47/00—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current
- H01H47/02—Circuit arrangements not adapted to a particular application of the relay and designed to obtain desired operating characteristics or to provide energising current for modifying the operation of the relay
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0012—Control circuits using digital or numerical techniques
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
The application relates to an interactive phasing closing device and a method, wherein the interactive phasing closing device comprises a rectification module, an ADC (analog-to-digital conversion) module, a main control chip, an interactive control module and a solid-state relay module; the input voltage is rectified by the rectifying module and converted by the ADC module and then is input into the main control chip, the main control chip performs control operation by a phase-locked switching-on algorithm to control the solid-state relay module to execute switching-on operation, and interaction with a user is realized by the interaction control module. The application samples based on the mains supply, integrates each module highly, has low cost, can realize the output of alternating voltage with any initial phase angle, and overcomes the defects of large volume, large internal resistance and high price of the traditional device.
Description
Technical Field
The application relates to the technical field of power phase adjustment, in particular to an interactive phased closing device.
Background
In an ac circuit, the initial phase angle of the power supply signal has a significant effect on the operating state of the circuit. For example, a larger conduction angle may cause more higher harmonics and electromagnetic interference, and for some sensitive loads, such as motors or other inductive loads, different conduction angles may affect the start-up characteristics and the operating state. Different consumers have different requirements on the initial phase angle of the alternating current, so that a power supply with a phase adjustment function is required to be provided. The existing power supply with the phase adjustment function or a switching-on system based on a meter reading method is used for modulating the initial phase angle of the power supply, however, the accuracy of the adjustment mode is low; or using an inverter-based phase regulated power supply, such phase regulated power supplies are typically bulky, high in internal resistance, and expensive.
Disclosure of Invention
The invention aims to provide an interactive phased closing device and method, which can set the initial phase of an input power supply, realize the phased closing function by adopting a device with high integration level, small volume and low price, have high adjusting precision and overcome the defects of low adjusting precision, large volume, large internal resistance and high price of the existing phase adjusting power supply.
The invention adopts the following technical scheme: an interactive phased closing device comprises a rectification module, an ADC module, a main control chip, an interactive control module and a solid-state relay module; the rectification module is used for rectifying a voltage signal input in the main loop and comprises a power supply chip, a current source, a linear voltage stabilizer, an isolation type amplifier and an operational amplifier, wherein the output end of the power supply chip is connected with the input end of the current source, the input end of the isolation type amplifier is connected with the output end of the current source, and the output end of the isolation type amplifier is connected with the input end of the operational amplifier and the output end of the linear voltage stabilizer; the input end of the ADC module is connected with the rectification module, and the output end of the ADC module is connected with the main control chip and is used for converting the voltage signal output by the rectification module into a discrete digital signal and transmitting the discrete digital signal to the main control chip; the interaction control module is used for interacting with a user and comprises a display screen, an encoder and a button, wherein the display screen, the encoder and the button are all connected with the main control chip; and the DC port of the solid-state relay module is connected with the main control chip, and the AC port is connected with the main loop and is used for executing the control instruction of the main control chip.
Further, the power chip isolates the voltage signal input in the main loop and outputs the isolated voltage signal to supply power for a current source, a linear voltage stabilizer, an isolated amplifier and an operational amplifier; the current source forms two output ends through an external voltage-stabilizing diode and a voltage-dividing resistor, is marked as an S1 port and an S2 port, and generates sine waves at the S1 port and the S2 port; the input end of the isolation amplifier is connected with the S1 port and the S2 port, the output end of the isolation amplifier is marked as an S3 port, and the input end of the isolation amplifier is connected with the output end of the linear voltage stabilizer; the linear voltage stabilizer filters and converts voltage signals input in the main loop through an external capacitor, and output voltage is connected to an S3 port to supply power to the operational amplifier after being stabilized through an external circuit consisting of the capacitors.
Further, the main control chip calculates the digital signal converted by the ADC module through a phase-locked switching-on algorithm, and the specific process is as follows: the digital signal is passed through an orthogonal signal generator OSG to obtain two voltage signals, one of which isIs in phase with the digital signal converted by the ADC module, and is another voltage signalThe waveform of the digital signal is lagged behind the digital signal converted by the ADC analog-to-digital conversion module by 90 degrees; signal the voltageAnd a voltage signalInputting into a park conversion module to make the voltage signalAnd a voltage signalConverting from a signal on the X-Y axis to a signal on the D-Q axis; the phase lock is completed through the feedback of the loop filter LPF and the voltage-controlled oscillator VCO, the frequency and phase information of the main loop voltage is obtained according to the change of the angles of the D axis and the original X axis, the correct closing angle is judged through a closing algorithm, and a control signal is output to the solid state relay module to complete closing.
Further, the solid state relay module further comprises a double MOS driving module, the double MOS driving module is a double MOS tube electronic switch, the control end of the double MOS tube electronic switch is connected with the output end of the main control chip, and the driving end is connected with the DC port of the solid state relay module.
The invention adopts another technical scheme that: a phased closing method uses the interactive phased closing device described in the technical scheme to perform closing operation, and comprises the following steps:
S1: rectifying the voltage signal input in the main loop by using a rectifying module, converting the voltage signal rectified by the rectifying module into a discrete digital signal by using an ADC (analog-to-digital converter) module, and transmitting the discrete digital signal to a main control chip;
s2: the main control chip calculates the digital signal converted by the ADC module through a phase-locked switching-on algorithm, wherein the phase-locked switching-on algorithm comprises a phase-locked loop algorithm and a switching-on algorithm, and the specific steps are as follows:
S201: the digital phase-locked loop is established through a phase-locked algorithm to obtain the frequency and phase information of the main loop voltage, and the specific process is as follows: the digital signal is passed through an orthogonal signal generator OSG to obtain two voltage signals, one of which is Is in phase with the digital signal converted by the ADC module, and is another voltage signalThe waveform of the digital signal is lagged behind the digital signal converted by the ADC analog-to-digital conversion module by 90 degrees; signal the voltageAnd a voltage signalInputting into a park conversion module to make the voltage signalAnd a voltage signalConverting from a signal on the X-Y axis to a signal on the D-Q axis; the phase locking is completed through the feedback of the loop filter LPF and the VCO, and the frequency and phase information of the main loop voltage are obtained according to the change of the angles of the D axis and the original X axis;
s202: judging a correct closing angle through a closing algorithm, and outputting a control signal to the solid-state relay module to finish closing, wherein the specific process is as follows: for the included angle between the D axis and the X axis Presetting accumulation times and delay time; judging whether a button in the interactive control module is pressed or not, and when the button is pressed, forming an included angle between the D axis and the X axisAccumulating a count value i in the switching algorithm when the set value is reached; and after the set accumulation times are completed, delaying according to the set delay time, and sending a closing instruction to the solid-state relay module after the delay is completed to complete closing.
Further, after the digital signal passes through the orthogonal signal generator OSG, two transfer functions can be obtained，Wherein H v(s) represents a voltage signalAnd the transfer function between the digital signals converted by the ADC analog-to-digital conversion module, V represents the digital signals converted by the ADC analog-to-digital conversion module, K represents the gain of the system,Represents the natural vibration frequency, s represents the complex frequency, H qv(s) represents the voltage signalAnd the transfer function between the digital signals converted by the ADC module;
Discretizing by means of discretizing, i.e. making The method can obtain:
；
；
wherein z represents a complex variable, Representing the post-discretized transfer function H v(s),Ts represents the sampling time,Representing the discretized transfer function H qv(s);
Signal the voltage And a voltage signalThe input to the park transformation module is obtained according to park transformation formula:
；
；
wherein v v represents a voltage signal The resulting signal after park transformation, v qv, represents the voltage signalThe second signal obtained after park conversion is used as a voltage signalAs the X-axis of the stationary coordinate system, by voltage signalsAs the Y-axis of the stationary coordinate system,Representing the angle between the signal I and the X axis of the static coordinate system;
ignoring the voltage amplitude of the digital signal converted by the ADC module, there is ，Will be，，Substituting the calculation formulas of v v and v qv, there are:
；
；
Wherein, Representing the calculated value of the angle between the D axis and the X axis,Representing the included angle between the D axis and the X axis, and when in the feedback processCan be obtained at very low timeOutputting the phase angle difference to a loop filter LPF;
The loop filter LPF and the voltage-controlled oscillator VCO together form a second-order control system, phase angle information of the digital signal converted by the ADC analog-to-digital conversion module can be obtained through the loop filter LPF and the voltage-controlled oscillator VCO, and finally, the switching-on time when the system is most stable is judged through a switching-on algorithm, meanwhile, the phase angle information of the digital signal converted by the ADC analog-to-digital conversion module can be fed back to the park conversion module, and the transfer function H(s) expression of the second-order control system is as follows:
；
where K p is the scaling factor and K i is the integration factor.
The invention has the beneficial effects that:
(1) The invention can set the initial phase of the input power supply, and effectively overcomes the defect of lower precision of the initial phase angle of the power supply modulated by a closing system based on a meter reading method; the phase-locked switching-on algorithm built in the main control chip can enable the output phase and frequency to track the input signal well, and the solid-state relay module is controlled to execute corresponding actions at the set execution phase angle through the output end of the main control chip;
(2) The solid-state relay module used in the invention is of a DC-AC direct current control alternating current type, the response time is 24us when the input voltage of a DC end is 3.3V, and when the main control chip judges that the phase angle of the action is expected to be executed, the main control chip can cooperate with the built-in function in the main control chip to realize the execution operation of the same phase angle in the next power supply period, so that the influence of the execution time of a device on the system accuracy is reduced;
(3) The invention can be intensively designed on a PCB board, the controller has simple structure, small volume and easy installation, is suitable for various experimental environments, has changeable resistance value of the rectifying module, allows different main loops to be connected, can realize the experimental requirements of different rated voltages, and effectively overcomes the defects of large volume, large internal resistance and high price of the phase adjustment power supply based on the inverter.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic view of a device according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a portion A of a rectifier module according to an embodiment of the invention;
FIG. 3 is a circuit diagram of a portion B of a rectifying module according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of a portion C of a rectifying module according to an embodiment of the present invention;
FIG. 5 is a circuit diagram of a portion D of a rectifier module according to an embodiment of the present invention;
FIG. 6 is a circuit diagram of an interactive control module according to an embodiment of the invention;
FIG. 7 is a schematic diagram of a solid state relay according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a master control chip according to an embodiment of the present invention;
FIG. 9 is a flowchart of a phase locked loop algorithm according to an embodiment of the present invention;
FIG. 10 is a flowchart of a closing algorithm according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of a digital phase locked loop according to an embodiment of the present invention;
FIG. 12 is a schematic diagram of a quadrature signal generator according to an embodiment of the present invention;
FIG. 13 is a schematic diagram of an output waveform of a rectifying module acquired by an oscilloscope in an embodiment of the invention;
FIG. 14 is a phase contrast diagram of the output waveform of the rectifying module and the waveform of the commercial power according to the embodiment of the present invention;
FIG. 15 is a schematic diagram of waveforms for phase locking according to an embodiment of the present invention;
FIG. 16 is a phase contrast diagram of a voltage waveform and a commercial waveform with an initial phase angle of 30 ° output in an embodiment of the present invention;
FIG. 17 is a phase contrast diagram of a voltage waveform and a commercial waveform with an initial phase angle of 45 degrees output in an embodiment of the present invention;
FIG. 18 is a phase contrast diagram of a voltage waveform and a commercial waveform with an initial phase angle of 150 ° output in an embodiment of the present invention;
fig. 19 is a phase contrast diagram of a voltage waveform and a mains waveform with an initial phase angle of 270 ° output in an embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than as described herein, and therefore the present invention is not limited to the specific embodiments disclosed below.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and the like in the description and in the claims, are not used for any order, quantity, or importance, but are used for distinguishing between different elements. Likewise, the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate a relative positional relationship, which changes accordingly when the absolute position of the object to be described changes.
As shown in fig. 1, the embodiment of the invention provides an interactive phased closing device, which comprises a rectification module, an ADC analog-to-digital conversion module, a main control chip U6, an interactive control module and a solid state relay module SSR. The rectifying module is used for rectifying a voltage signal input in a main loop and is divided into four parts, wherein the part A comprises a power chip U5, the part B comprises a current source U2, the part C comprises an isolation amplifier U3 and an operational amplifier U1, and the part D comprises a linear voltage stabilizer U4; the output end of the power chip U5 is connected with the input end of the current source U2, the input end of the isolation type amplifier U3 is connected with the output end of the current source U2, the output end of the isolation type amplifier U3 is connected with the input end of the operational amplifier U1 and the output end of the linear voltage stabilizer U4, and the input voltage of the rectifying module can be changed by adjusting the resistance values of the eighth resistor R8, the ninth resistor R9, the tenth resistor R10 and the eleventh resistor R11 in the graph 3. The input end of the ADC analog-to-digital conversion module is connected with the rectification module, the output end of the ADC analog-to-digital conversion module is connected with the main control chip U6, and the ADC analog-to-digital conversion module is used for converting the voltage signal output by the rectification module after rectification into a discrete digital signal and transmitting the discrete digital signal to the main control chip U6. The interaction control module is used for interacting with a user and comprises a display screen U7, an encoder U8 and a button SW, wherein the display screen U7, the encoder U8 and the button SW are all connected with the main control chip U6; the DC port of the solid state relay module SSR is connected with the main control chip U6, and the AC port is connected with the main loop and used for executing the control instruction of the main control chip U6.
As shown in fig. 2, the a part of the rectifying module includes a power chip U5 and an epitaxial circuit composed of a capacitor and a zener diode, and the power chip U5 adopted in the embodiment of the present invention is an IB0505XT-W75R3 power chip. The VIN pin of the power chip U5 is connected with an external direct-current voltage VCC, and the external direct-current power supply VCC is a 5V direct-current power supply; the GND pin of the power chip U5 is grounded, and an eighteenth capacitor C18 and a nineteenth capacitor C19 which are 4.7uF are integrated between the VIN pin and the GND pin of the power chip U5 for filtering; an isolated 5-6V direct current voltage is generated between the +VO pin and the 0V pin of the power chip U5, so that the isolation of voltage signals input in a main loop is realized, the isolated 5-6V direct current voltage is used for supplying power to a subsequent current source U2 and an isolated amplifier U3, and a sixteenth capacitor C16 and a seventeenth capacitor C17 which are 4.7uF are also integrated between the +VO pin and the 0V pin of the power chip U5 for filtering; the 0V pin of the power chip U5 is used as an isolated PGND, a third zener diode D3 is further arranged at the +VO pin, the NC pin of the power chip U5 is suspended, the anode of the third zener diode D3 is connected with the +VO pin, and the cathode of the third zener diode D3 is used as an output port of the rectifying module A part, namely the isolated direct current power supply PVCC.
As shown in fig. 3, the part B of the rectifying module includes a current source U2 and an epitaxial circuit composed of a capacitor, a resistor and a zener diode, and the current source U2 adopted in the embodiment of the present invention is a LT3092EST current source. The isolated direct current power supply PVCC is connected into an IN pin of a current source U2 after being stabilized by an eleventh capacitor C11 of 0.1uF and a twelfth capacitor C12 of 1uF, the current source U2 generates direct current of 10 mu A, an eighth resistor R8 of 47k omega and a tenth capacitor C10 of 0.1uF are connected into a SET pin of the current source U2 IN parallel, an eleventh resistor R11 of 470 omega and a tenth resistor R10 of 100 omega are connected IN parallel with a ninth resistor R9 of 100 omega, and the eighth resistor R8 of 47k omega and the tenth capacitor C10 of 0.1uF are connected with two OUT pins of the current source U2. Under the combined action of the eighth resistor R8, the ninth resistor R9, the tenth resistor R10, the eleventh resistor R11, the tenth capacitor C10, the eleventh capacitor C11 and the twelfth capacitor C12, a current of 0.01A flows through the second zener diode D2, the current flows through the eighteenth resistor R18 of 100 Ω to generate a direct current voltage of 1V, the current input by the main circuit forms a loop among the thirteenth resistor R13, the fourteenth resistor R14, the fifteenth resistor R15, the sixteenth resistor R16, the seventeenth resistor R17, the nineteenth resistor R19 and the twelfth resistor R12 of 1.5kΩ, an alternating current with the amplitude of 0.25V is formed on the twelfth resistor R12, and a sine wave with the average value of 1V and the peak-peak value of 0.5V is generated at the S1 port and the S2 port through the superposition of the twelfth resistor R12, and the fifteenth resistor R15 and the nineteenth resistor R19 are respectively connected to the row needle H7 and the row needle H10.
As shown in FIG. 4, the C portion of the rectifying module includes an isolated amplifier U3, an operational amplifier U1, and an epitaxial circuit composed of a capacitor, a resistor and a zener diode, wherein the isolated amplifier U3 used in the embodiment of the invention is a ACPL-C870-000E isolated amplifier, and the operational amplifier U1 is an MCP6031T-E/OT operational amplifier. The SHDN pin of the isolation amplifier U3 is short-circuited with the GND1 pin and is connected with the S2 port; the VIN pin of the isolated amplifier U3 is connected to the S1 port, and a third capacitor C3 and zener diode D1 of 0.1uF are incorporated between the VIN pin and SHDN pin of the isolated amplifier U3. The VDD1 pin of the isolation amplifier U3 is connected to a first resistor R1 of 4.7kΩ and then connected to an isolated direct current power supply PVCC, a first capacitor C1 of 0.1uF is connected with a second capacitor C2 in parallel, one end of the first capacitor C1 is connected with the VDD1 pin and the VIN pin of the isolation amplifier U3, and the other end of the first capacitor C1 is connected with an S2 port; the fourth capacitor C4 of 0.1uF and the fifth capacitor C5 of 0.01uF are connected in parallel between the VDD2 pin and the GND2 pin of the isolation amplifier U3, the GND2 pin of the isolation amplifier U3 is grounded, the VDD2 pin of the isolation amplifier U3 is also connected with the second resistor R2 of 4.7kΩ, and the other end of the second resistor R2 is used as an output port of the C part of the rectifying module and is marked as an S3 port.
The VOUT+ pin and VOUT-pin of the isolation amplifier U3 output waveforms identical to sine waves at the S1 port and the S2 port, and the VOUT+ pin of the isolation amplifier U3 is connected with the VIN+ pin of the operational amplifier U1 after being connected with the fourth resistor R4 of 10kΩ, and the VOUT-pin of the isolation amplifier U3 is connected with the VIN-pin of the operational amplifier U1 after being connected with the third resistor R3 of 10K. A fifth resistor R5 of 10k omega is connected with a sixth capacitor C6 of 0.1uF in parallel, one end of the fifth resistor R5 is connected with a fourth resistor R4, and the other end of the fifth resistor R5 is grounded. The seventh capacitor C7 of 0.1uF and the eighth capacitor C8 of 0.01uF are connected in parallel, one end of the seventh capacitor C7 is grounded, the other end of the seventh capacitor C8 is connected with a sixth resistor R6 of 4.7kΩ and the VDD pin of the operational amplifier U1, and the other end of the sixth resistor R6 is connected with the S3 port. And after the ninth capacitor C9 of 0.1uF and the seventh resistor R7 of 10kΩ are connected in parallel, one end of the seventh resistor R7 is connected with the VIN-pin of the operational amplifier U1, the other end of the seventh resistor R is connected with the VOUT pin of the operational amplifier U1, and the VOUT pin of the operational amplifier U1 is also used as an S4 port of the rectifying module. The VSS pin of the operational amplifier U1 and GND are grounded together, and the voltage with the same waveform as that of the VOUT+ pin and the VOUT-pin of the isolation amplifier U3 is output at the VOUT pin of the operational amplifier U1.
As shown in fig. 5, the part D of the rectifying module includes a linear voltage regulator U4 and an epitaxial circuit composed of a resistor, a capacitor and an indicator light LED1, where the linear voltage regulator U4 adopted in the embodiment of the present invention is an AMS1117 linear voltage regulator. The external direct-current voltage VCC is connected to an IN pin of the linear voltage stabilizer U4 after being filtered by a twenty-second capacitor C20, a twenty-first capacitor C21, a twenty-second capacitor C22 and a twenty-third capacitor C23 of 10nF, which are connected IN parallel, of 10uF, and the other ends of the twenty-second capacitor C20, the twenty-first capacitor C21, the twenty-second capacitor C22 and the twenty-third capacitor C23, which are connected IN parallel, are grounded to an ADJ/GND pin of the linear voltage stabilizer U4. The two OUT pins of the linear voltage stabilizer U4 are short-circuited, the twenty-fourth resistor R20 and the indicator light LED1 are connected in series, then are connected with the twenty-fourth capacitor C24, the twenty-fifth capacitor C25, the twenty-sixth capacitor C26, the twenty-seventh capacitor C27 and the twenty-eighth capacitor C28 of the 10uF in parallel to form a filter circuit, the twenty-seventh resistor R20 of 470 omega and the indicator light LED1 are connected in series and then are connected in parallel to the filter circuit, the twenty-fourth resistor R20 is used for voltage division, the indicator light LED1 is used for indicating the working state of the circuit, one end of the filter circuit is connected with the two short-circuited OUT pins of the linear voltage stabilizer U4 and is connected to an S3 port, and the other end of the filter circuit is grounded. The OUT pin of the linear regulator U4 may provide a dc voltage of 3.3V for the C portion of the rectifying module.
The rectifying module is powered by the A part in a memory way, the input voltage of the main loop is input into the B part to generate a sine wave with the average value of 1V and the peak-to-peak value of 0.5V, the D part supplies 3.3V to the C part to supply power to the C part together with the A part, and finally the voltage generated by the B part is isolated by the C part to obtain a voltage waveform identical with the voltage waveform, and the voltage waveform is output to the ADC analog-to-digital converter to be a discrete digital signal transmitted to the main control chip U6. In the embodiment of the invention, the ADC module is configured as follows: starting an ADC clock; setting the ADC clock as 6 frequency division and 12 MHz; and setting an independent mode in the ADC initialization, triggering by software, continuously disabling, disabling scanning and enabling the number of channels to be 1.
As shown in fig. 6, the display screen U7 adopted in the embodiment of the present invention is an OLED display screen, and the encoder U8 is an EC11 rotary encoder. The display screen U7 is provided with four pins, wherein the VCC pin and the GND pin are respectively connected with external direct-current voltage VCC and ground, and the SCL pin and the SDA pin are connected with the main control chip U6. The encoder U8 has five pins, wherein the VCC pin and the GND pin are respectively connected with external direct-current voltage VCC and ground, the EC11_A pin and the EC11_B pin are connected with the main control chip U6, and the EC11_C pin is suspended. One end of the button SW is grounded, and the other end of the button SW is connected with the main control chip U6. The display screen U7 is connected with the main control chip U6 through the IIC, the main control chip U6 executes an input instruction of the encoder U8 in an external interrupt mode, and the button SW is used for controlling whether the main control chip U6 enters a closing state.
As shown IN fig. 7, the solid state relay module SSR adopted IN the embodiment of the present invention is a four-port solid state relay module SSR, where IN is an input terminal, i.e., a DC terminal of the solid state relay module SSR, and OUT is an output terminal, i.e., an AC terminal of the solid state relay module SSR. The resistor R 0 is a current-limiting resistor, the photoelectric coupler electrically isolates the input circuit from the output circuit, and V1 is a diode which is conducted in a bidirectional mode. The solid state relay module SSR is a DC-AC direct current control alternating current type solid state relay module SSR, the voltage of the input end is 3-32V direct current voltage, and the voltage of the output end is 24-480V alternating current voltage.
As shown in fig. 8, the main control chip U6 adopted in the embodiment of the present invention is an STCM32F103C8T6 integrated chip, where a 5V pin and a GND pin are respectively connected to an external DC voltage VCC and ground, a PA0 pin is connected to an S4 port of the rectifying module, a PA1 pin is connected to a DC end of the solid state relay module SSR, a PA2 pin is connected to a button end of the button SW, a PA6 pin is connected to an EC11_a pin of the encoder U8, a PA7 pin is connected to an EC11_b pin of the encoder U8, a PB9 pin is connected to an SDA pin of the display screen U7, and a PB8 is connected to an SCL pin of the display screen U7. The main control chip U6 calculates the digital signal converted by the ADC module through a phase-locked switching-on algorithm, and the specific process is as follows: the digital signal is passed through an orthogonal signal generator OSG to obtain two voltage signals, one of which isIs in phase with the digital signal converted by the ADC module, and is another voltage signalThe waveform of the digital signal is lagged behind the digital signal converted by the ADC analog-to-digital conversion module by 90 degrees; signal the voltageAnd a voltage signalInputting into a park conversion module to make the voltage signalAnd a voltage signalConverting from a signal on the X-Y axis to a signal on the D-Q axis; the phase locking is completed through the feedback of the loop filter LPF and the voltage-controlled oscillator VCO, the frequency and phase information of the main loop voltage is obtained according to the change of the angles of the D axis and the original X axis, the correct closing angle is judged through a closing algorithm, and a control signal is output to the solid state relay module SSR to complete closing.
In order to avoid that the output power of the main control chip U6 is smaller and the requirement of the solid state relay module SSR cannot be completely met, the embodiment of the invention is also provided with a double MOS driving module, and the solid state relay module SSR is driven by the double MOS driving module. The double-MOS driving module is a double-MOS tube electronic switch, the control end of the double-MOS tube electronic switch is connected with the output end of the main control chip, and the driving end is connected with the DC port of the solid state relay module SSR.
The embodiment of the invention also provides a phased closing method, which uses the interactive phased closing device to perform closing operation, and comprises the following steps:
S1: and rectifying the voltage signal input in the main loop by using a rectifying module, converting the voltage signal rectified by the rectifying module into a discrete digital signal by using an ADC (analog-to-digital converter) module, and transmitting the discrete digital signal to a main control chip U6.
S2: the main control chip U6 calculates the digital signal converted by the ADC module through a phase-locked switching-on algorithm, wherein the phase-locked switching-on algorithm comprises a phase-locked loop algorithm and a switching-on algorithm, and the specific steps are as follows:
s201: as shown in fig. 9 and 11, a digital phase-locked loop is established through a phase-locked algorithm, and the digital phase-locked loop comprises an orthogonal signal generator OSG, a park conversion module, a loop filter LPF and a voltage-controlled oscillator VCO, and frequency and phase information of a main loop voltage is obtained through the phase-locked algorithm, wherein the specific process is as follows: the digital signal is passed through an orthogonal signal generator OSG to obtain two voltage signals, one of which is Is in phase with the digital signal converted by the ADC module, and is another voltage signalThe waveform of the digital signal is lagged behind the digital signal converted by the ADC analog-to-digital conversion module by 90 degrees; signal the voltageAnd a voltage signalInputting into a park conversion module to make the voltage signalAnd a voltage signalConverting from a signal on the X-Y axis to a signal on the D-Q axis; and the phase locking is completed through the feedback of the loop filter LPF and the voltage-controlled oscillator VCO, and the frequency and phase information of the main loop voltage is obtained according to the change of the angles of the D axis and the original X axis.
As shown in fig. 12, after the digital signal passes through the quadrature signal generator OSG, two transfer functions can be obtained，Wherein H v(s) represents a voltage signalAnd the transfer function between the digital signals converted by the ADC analog-to-digital conversion module, V represents the digital signals converted by the ADC analog-to-digital conversion module, K represents the gain of the system,Represents the natural vibration frequency, s represents the complex frequency, H qv(s) represents the voltage signalAnd a transfer function between the digital signals converted by the ADC module.
Discretizing by means of discretizing, i.e. makingThe method can obtain:
；
；
wherein z represents a complex variable, Representing the post-discretized transfer function H v(s),Ts represents the sampling time,Representing the discretized transfer function H qv(s). In the embodiment of the present invention k=1.414,=314, T s =0.00002, the quadrature signal generator OSG has a better filtering function, and can still produce an ideal sine wave signal for the input of noisy mains.
Signal the voltageAnd a voltage signalThe input to the park transformation module is obtained according to park transformation formula:
；
；
wherein v v represents a voltage signal The resulting signal after park transformation, v qv, represents the voltage signalThe second signal obtained after park conversion is used as a voltage signalAs the X-axis of the stationary coordinate system, by voltage signalsAs the Y-axis of the stationary coordinate system,Representing the angle between signal one and the X-axis of the stationary coordinate system.
Ignoring the voltage amplitude of the digital signal converted by the ADC module, there is，Will be，，Substituting the calculation formulas of v v and v qv, there are:
；
；
Wherein, Representing the calculated value of the angle between the D axis and the X axis,Representing the included angle between the D axis and the X axis, and when in the feedback processCan be obtained at very low timeThe phase angle difference is output to the loop filter LPF.
The loop filter LPF and the voltage-controlled oscillator VCO together form a second-order control system, phase angle information of the digital signal converted by the ADC analog-to-digital conversion module can be obtained through the loop filter LPF and the voltage-controlled oscillator VCO, and finally, the switching-on time when the system is most stable is judged through a switching-on algorithm, meanwhile, the phase angle information of the digital signal converted by the ADC analog-to-digital conversion module can be fed back to the park conversion module, and the transfer function H(s) expression of the second-order control system is as follows:
。
according to Discretizing the transfer function H(s) of the second-order control system includes:
。
Where H (z) represents the discretized transfer function H(s), K p is the scale factor, and K i is the integral factor. In the embodiment of the invention, the adjusting time is set to be 30ms, the overshoot is 5 percent, and the damping ratio is 0.7, thereby obtaining = 166.66，=0.7, K p= 233,Ki =27775, wherein,The frequency of the self-oscillation is represented,Representing the damping ratio.
Let the transfer function H (z) be，Substituting K p= 233,Ki= 27775,Ts =0.00002 s into the formula yields B 0= 223,B1 = -221, where B 0 represents a constant term at the transfer function H (z) numerator and B 1 represents a first order term coefficient at the transfer function H (z) numerator.
S202: as shown in fig. 12, the correct closing angle is determined by a closing algorithm, and a control signal is output to the solid-state relay module to complete closing, which specifically includes: for the included angle between the D axis and the X axisPresetting accumulation times and delay time; judging whether a button in the interactive control module is pressed or not, and when the button is pressed, forming an included angle between the D axis and the X axisAccumulating a count value i in the switching algorithm when the set value is reached; and after the set accumulation times are completed, delaying according to the set delay time, and sending a closing instruction to the solid-state relay module after the delay is completed to complete closing. In the embodiment of the invention, the accumulation times are set to be 50 times, the delay time is set to be 1976us, and the unstable state of the system when the phase lock is just started can be effectively avoided through accumulation and delay operation.
The effectiveness of the interactive phased closing device and method according to the embodiments of the present invention is described below by experimental data:
(1) Output verification of rectifier module
Fig. 13 is a schematic diagram of an output waveform of a rectifying module in an embodiment of the present invention collected by an oscilloscope, and as can be seen from fig. 13, after an input mains voltage is rectified by the rectifying module, 220V ac power is changed into a sine wave with an amplitude of 0.25V, a mean value of 1.25V and a peak-to-peak value of 0.5V, which meets the collection requirement of an ADC analog-to-digital conversion module.
Fig. 14 is a phase contrast diagram of an output waveform of a rectifying module and a mains waveform in an embodiment of the present invention, wherein a light blue waveform is the output waveform of the rectifying module, a dark blue waveform is a mains voltage waveform after 200 times reduction, a red waveform is a waveform calculated by an oscilloscope Math function, and an expression of a calculation function f (t) is:
f(t)= Vgrid(t) -Vrec(t) + 1.25；
Wherein, V grid (t) is the mains voltage, V rec (t) is the voltage output by the rectifying module, and it can be seen from fig. 14 that the waveform zero point calculated by Math coincides with the mains waveform zero point, and no phase error occurs in the rectifying link.
(2) Phase lock condition verification
Fig. 15 is a schematic waveform diagram of a phase-locked state in an embodiment of the present invention, in which a deep blue sine wave is a rectified mains voltage, that is, a voltage output by a rectifying module, and a light blue sawtooth wave is a voltage waveform of phase angle information output by a main control chip U6, for checking whether phase locking is successful, and each period of waveform shows 0 to 360 °. It can be seen from fig. 15 that the 0 ° of the sawtooth wave coincides with the 0 ° of the sine wave, indicating that the locked phase angle of the digital phase locked loop coincides with the phase angle of the mains voltage sine wave.
(3) Phase adjustment condition verification
Fig. 16 to 19 are phase contrast diagrams of a load waveform and a mains waveform when the initial phase angles are 30 °, 45 °, 150 ° and 270 °, respectively, in an embodiment of the present invention. The waveform of deep blue is the voltage at two ends of the load, and the waveform of red is the mains voltage for comparison. As can be seen from fig. 16 to fig. 19, when the phase angle information is respectively 30 °, 45 °, 150 ° and 270 °, the phase angle is locked, the output voltage is 0 before the phase is locked, and the load voltage and the input voltage are in phase after the phase is locked, so as to meet the design requirement.
In summary, the embodiment of the invention can realize the synchronization and automatic locking change of the output signal frequency and the input signal frequency, can effectively adjust the starting phase angle of the voltage, has higher accuracy and stability, can effectively remove noise interference in the mains supply through a digital phase-locked loop, and can rapidly adjust the voltage phase angle through a phase-locked closing algorithm. The embodiment of the invention is used as a phase-adjustable alternating current power supply device, is used for sampling based on mains supply, integrates each module highly, has low cost, can realize alternating current voltage output of any initial phase angle, and overcomes the defects of large volume, high internal resistance and high price of the traditional device.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (6)
1. The interactive phased closing device is characterized by comprising a rectification module, an ADC (analog-to-digital conversion) module, a main control chip, an interactive control module and a solid-state relay module; the rectification module is used for rectifying a voltage signal input in the main loop and comprises a power supply chip, a current source, a linear voltage stabilizer, an isolation type amplifier and an operational amplifier, wherein the output end of the power supply chip is connected with the input end of the current source, the input end of the isolation type amplifier is connected with the output end of the current source, and the output end of the isolation type amplifier is connected with the input end of the operational amplifier and the output end of the linear voltage stabilizer; the input end of the ADC module is connected with the rectification module, and the output end of the ADC module is connected with the main control chip and is used for converting the voltage signal output by the rectification module into a discrete digital signal and transmitting the discrete digital signal to the main control chip; the interaction control module is used for interacting with a user and comprises a display screen, an encoder and a button, wherein the display screen, the encoder and the button are all connected with the main control chip; and the DC port of the solid-state relay module is connected with the main control chip, and the AC port is connected with the main loop and is used for executing the control instruction of the main control chip.
2. The interactive phased closing device of claim 1, wherein the power chip isolates the voltage signal input in the main loop and outputs the isolated voltage signal to power a current source, a linear voltage regulator, an isolated amplifier and an operational amplifier; the current source forms two output ends through an external voltage-stabilizing diode and a voltage-dividing resistor, is marked as an S1 port and an S2 port, and generates sine waves at the S1 port and the S2 port; the input end of the isolation amplifier is connected with the S1 port and the S2 port, the output end of the isolation amplifier is marked as an S3 port, and the input end of the isolation amplifier is connected with the output end of the linear voltage stabilizer; the linear voltage stabilizer filters and converts voltage signals input in the main loop through an external capacitor, and output voltage is connected to an S3 port to supply power to the operational amplifier after being stabilized through an external circuit consisting of the capacitors.
3. The interactive phased closing device of claim 2, wherein the main control chip operates on the digital signal converted by the ADC analog-to-digital conversion module by a phase-locked closing algorithm, and the specific process is as follows: the digital signal is passed through an orthogonal signal generator OSG to obtain two voltage signals, one of which isIs in phase with the digital signal converted by the ADC module, and is another voltage signalThe waveform of the digital signal is lagged behind the digital signal converted by the ADC analog-to-digital conversion module by 90 degrees; signal the voltageAnd a voltage signalInputting into a park conversion module to make the voltage signalAnd a voltage signalConverting from a signal on the X-Y axis to a signal on the D-Q axis; the phase lock is completed through the feedback of the loop filter LPF and the voltage-controlled oscillator VCO, the frequency and phase information of the main loop voltage is obtained according to the change of the angles of the D axis and the original X axis, the correct closing angle is judged through a closing algorithm, and a control signal is output to the solid state relay module to complete closing.
4. The interactive phased closing device of claim 3, further comprising a dual MOS drive module, the dual MOS drive module being a dual MOS tube electronic switch, a control terminal of the dual MOS tube electronic switch being connected to an output terminal of the main control chip, and a drive terminal being connected to a DC port of the solid state relay module.
5. A phased closing method for closing an electric vehicle using the interactive phased closing device according to any one of claims 1 to 4, comprising the steps of:
S1: rectifying the voltage signal input in the main loop by using a rectifying module, converting the voltage signal rectified by the rectifying module into a discrete digital signal by using an ADC (analog-to-digital converter) module, and transmitting the discrete digital signal to a main control chip;
s2: the main control chip calculates the digital signal converted by the ADC module through a phase-locked switching-on algorithm, wherein the phase-locked switching-on algorithm comprises a phase-locked loop algorithm and a switching-on algorithm, and the specific steps are as follows:
S201: the digital phase-locked loop is established through a phase-locked algorithm to obtain the frequency and phase information of the main loop voltage, and the specific process is as follows: the digital signal is passed through an orthogonal signal generator OSG to obtain two voltage signals, one of which is Is in phase with the digital signal converted by the ADC module, and is another voltage signalThe waveform of the digital signal is lagged behind the digital signal converted by the ADC analog-to-digital conversion module by 90 degrees; signal the voltageAnd a voltage signalInputting into a park conversion module to make the voltage signalAnd a voltage signalConverting from a signal on the X-Y axis to a signal on the D-Q axis; the phase locking is completed through the feedback of the loop filter LPF and the VCO, and the frequency and phase information of the main loop voltage are obtained according to the change of the angles of the D axis and the original X axis;
s202: judging a correct closing angle through a closing algorithm, and outputting a control signal to the solid-state relay module to finish closing, wherein the specific process is as follows: for the included angle between the D axis and the X axis Presetting accumulation times and delay time; judging whether a button in the interactive control module is pressed or not, and when the button is pressed, forming an included angle between the D axis and the X axisAccumulating a count value i in the switching algorithm when the set value is reached; and after the set accumulation times are completed, delaying according to the set delay time, and sending a closing instruction to the solid-state relay module after the delay is completed to complete closing.
6. A phased closing method according to claim 5, wherein two transfer functions are obtained after the digital signal has passed through an orthogonal signal generator OSG，Wherein H v(s) represents a voltage signalAnd the transfer function between the digital signals converted by the ADC analog-to-digital conversion module, V represents the digital signals converted by the ADC analog-to-digital conversion module, K represents the gain of the system,Represents the natural vibration frequency, s represents the complex frequency, H qv(s) represents the voltage signalAnd the transfer function between the digital signals converted by the ADC module;
Discretizing by means of discretizing, i.e. making The method can obtain:
；
；
wherein z represents a complex variable, Representing the post-discretized transfer function H v(s),Ts represents the sampling time,Representing the discretized transfer function H qv(s);
Signal the voltage And a voltage signalThe input to the park transformation module is obtained according to park transformation formula:
；
；
wherein v v represents a voltage signal The resulting signal after park transformation, v qv, represents the voltage signalThe second signal obtained after park conversion is used as a voltage signalAs the X-axis of the stationary coordinate system, by voltage signalsAs the Y-axis of the stationary coordinate system,Representing the angle between the signal I and the X axis of the static coordinate system;
ignoring the voltage amplitude of the digital signal converted by the ADC module, there is ，Will be，，Substituting the calculation formulas of v v and v qv, there are:
；
；
Wherein, Representing the calculated value of the angle between the D axis and the X axis,Representing the included angle between the D axis and the X axis, and when in the feedback processCan be obtained at very low timeOutputting the phase angle difference to a loop filter LPF;
The loop filter LPF and the voltage-controlled oscillator VCO together form a second-order control system, phase angle information of the digital signal converted by the ADC analog-to-digital conversion module can be obtained through the loop filter LPF and the voltage-controlled oscillator VCO, and finally, the switching-on time when the system is most stable is judged through a switching-on algorithm, meanwhile, the phase angle information of the digital signal converted by the ADC analog-to-digital conversion module can be fed back to the park conversion module, and the transfer function H(s) expression of the second-order control system is as follows:
；
where K p is the scaling factor and K i is the integration factor.
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