CN118033189B

CN118033189B - Wafer level burn-in test fixture and wafer level burn-in test device

Info

Publication number: CN118033189B
Application number: CN202410178868.4A
Authority: CN
Inventors: 周斌; 郭孝明; 廉哲; 黄建军; 胡海洋
Original assignee: Suzhou Lianxun Instrument Co ltd
Current assignee: Suzhou Lianxun Instrument Co ltd
Priority date: 2024-02-08
Filing date: 2024-02-08
Publication date: 2024-08-23
Anticipated expiration: 2044-02-08
Also published as: CN118033189A

Abstract

The invention provides a wafer-level burn-in test fixture and a wafer-level burn-in test device, and relates to the technical field of wafer testing. The wafer level burn-in fixture of the present invention includes a cover plate assembly and a lower seal assembly connected to form a test cavity for receiving a wafer. The cover plate assembly comprises a PCB, a test needle seat and at least one connector, wherein the test needle seat is provided with a plurality of test probes, one end of any test probe is contacted with a first contact point of the PCB, and the other end of any test probe is contacted with a wafer. The connector is arranged at the second area of the PCB board and is connected with an external testing device through a wire harness for performing burn-in test on the wafer. According to the invention, the connector is additionally arranged and the wire harness is utilized to connect the connector with the external testing device, so that the rigid connection in the prior art is replaced by the flexible connection, the relative positions of the wafer-level burn-in test clamp and the external testing device can be flexibly arranged, the number of channels for powering up the wafer can be increased, and the reliability of circuit connection is improved.

Description

Wafer level burn-in test fixture and wafer level burn-in test device

Technical Field

The present invention relates to the field of wafer testing technologies, and in particular, to a wafer level burn-in fixture and a wafer level burn-in device.

Background

At present, a probe is adopted to connect a PCB with an external testing device, the connection mode is rigid connection, the requirements on the positions and the structures of the PCB and the external testing device are high, the structures between the external testing device and the clamp have high relevance, the positions are fixed, the installation and the maintenance are relatively complex, and the flexibility of the structural layout is lacking.

In addition, a plurality of contact points between the probes and the PCB are arranged in the circuit link, the service life of the probes is limited, the damage of any one probe can influence the connection between the PCB and the external testing device, even the service life of the PCB and the external testing device is directly influenced, and the reliability and the stability are reduced.

The fixture is contacted with the contact on the surface of the fixture through one end of the probe, the other end of the probe is directly connected with an external testing device, so that the requirements on machining and mounting precision of related structures are high, the sizes of the related structures are limited, the sizes of wafers which can be accommodated by the fixture are small, and the number of powered channels is small.

Disclosure of Invention

An object of the first aspect of the present invention is to provide a wafer level burn-in fixture, so as to solve the technical problem that the number of power-up channels for powering up a wafer is small due to the probe connection in the prior art.

It is a further object of the first aspect of the present invention to avoid deformation of the test hub and the connector when they expand upon heating.

A still further object of the first aspect of the invention is to avoid damaging the PCB board when the compression force in the test cavity is too great.

An object of a second aspect of the present invention is to provide a wafer level burn-in apparatus including the above wafer level burn-in fixture.

According to an object of a first aspect of the present invention, there is provided a wafer level burn-in fixture, including a cover plate assembly and a lower seal assembly, the cover plate assembly and the lower seal assembly being connected to form a test cavity for receiving a wafer, the cover plate assembly including:

the PCB comprises a first area and a second area, wherein the first area and the second area are respectively positioned on different sides of the PCB, and any first contact arranged in the first area is electrically connected with a corresponding second contact arranged in the second area;

the test needle seat is positioned at the bottom of the PCB and connected with the PCB, the test needle seat is provided with a plurality of test probes, one end of any one test probe is contacted with the corresponding first contact, and the other end of the test probe is contacted with a wafer so as to perform wafer-level burn-in test on the wafer;

And at least one connector is arranged at the second area of the PCB, any connector is connected with the corresponding second contact, and any connector is connected with an external testing device through a wire harness and is used for performing wafer-level burn-in testing on the wafer.

Optionally, the plurality of connectors are arranged on the PCB in an array manner.

Optionally, the test needle stand is circular, and the wafer level burn-in test fixture further includes:

The connecting piece is annular and connected with the PCB, and the connecting piece is arranged around the periphery of the test needle seat and connected with the test needle seat.

Optionally, at least one groove is arranged at the edge of the test needle seat;

The connecting piece is provided with a supporting part for supporting the test needle seat, at least one positioning column is arranged on the supporting part, and each positioning column is correspondingly arranged with one groove so as to position the test needle seat.

Optionally, the groove openings are disposed towards the corresponding positioning posts.

Optionally, the PCB further comprises a round upper sealing cover, wherein the upper sealing cover is positioned at the top of the PCB; the wafer level burn-in fixture further includes a plurality of load bearing members arranged in spaced apart relation along a circumference of the upper seal cover, each of the load bearing members including:

And the bearing column penetrates through the PCB and is connected with the upper sealing cover, and the bearing column protrudes out of the bottom surface of the PCB.

Optionally, the height of the bearing column protruding from the bottom surface of the PCB board is any value ranging from 0.1mm to 0.2 mm.

Optionally, the force bearing component further includes:

And the at least one gasket is sleeved on the bearing column so as to adjust the height of the bearing column protruding out of the bottom surface of the PCB.

Optionally, the method further comprises:

And the heat dissipation part is arranged on the PCB and is positioned between the first area and the second area and used for isolating heat generated by the first area.

Optionally, the structure part is positioned at the top of the PCB and connected with the upper sealing cover; the wafer level burn-in fixture further includes:

the reinforcing pieces are positioned at the top of the PCB and are respectively arranged at the periphery of the structural part, the edge of the PCB and the second area.

According to an object of a second aspect of the present invention, there is provided a wafer level burn-in apparatus comprising:

the wafer-level burn-in test fixture;

The lifting mechanism is arranged to be controlled to stretch up and down, and is movably abutted with the wafer-level aging test clamp so as to drive the lower sealing assembly to move upwards to be connected with the cover plate assembly to form the test cavity.

According to the invention, the connector is newly added in the second area of the PCB and is connected with the external testing device by utilizing the wire harness, so that the mode of adopting the probe connection in the prior art is canceled, and the rigid connection is replaced by the flexible connection, thereby enabling the relative positions of the wafer-level burn-in test clamp and the external testing device to be respectively and flexibly arranged, and increasing the number of channels for powering up the wafer. In addition, the probe is connected with an external testing device, so that a plurality of contact points exist, the reliability of circuit connection is lower, and the wire harness connection is adopted, so that the contact points do not exist, and the reliability of circuit connection is improved.

Further, at least one groove is formed in the edge of the test needle seat, at least one positioning column is arranged on the supporting portion of the connecting piece, and each positioning column is correspondingly arranged with one groove so as to position the test needle seat. The cooperation of reference column and recess has limited the position of test needle file, and the recess is unblocked, and the reference column only contacts with two sides along the circumference of needle file on the recess, and when test needle file and connecting piece thermal expansion, the reference column can do a small amount of slip along the radial of test needle file in the recess, can not extrude the recess, has eliminated the stress when test needle file and connecting piece expand, avoids test needle file and connecting piece to take place to warp.

Furthermore, the invention is provided with the bearing column penetrating through the PCB, one end of the bearing column is connected with the upper sealing cover positioned at the top of the PCB, and the other end of the bearing column protrudes out of the bottom surface of the PCB. When the compression force in the test cavity is too large and the lower sealing cover is too close to the PCB, the force bearing column contacts the lower sealing cover before the PCB, and the compression force of the test cavity is born, so that the PCB is prevented from being damaged due to excessive pressure.

The above, as well as additional objectives, advantages, and features of the present invention will become apparent to those skilled in the art from the following detailed description of a specific embodiment of the present invention when read in conjunction with the accompanying drawings.

Drawings

Some specific embodiments of the invention will be described in detail hereinafter by way of example and not by way of limitation with reference to the accompanying drawings. The same reference numbers will be used throughout the drawings to refer to the same or like parts or portions. It will be appreciated by those skilled in the art that the drawings are not necessarily drawn to scale. In the accompanying drawings:

FIG. 1 is a schematic block diagram of a wafer level burn-in jig according to one embodiment of the invention;

FIG. 2 is a schematic exploded view of a wafer level burn-in jig according to one embodiment of the invention;

FIG. 3 is a schematic position diagram of a wafer level burn-in fixture and an external test apparatus according to one embodiment of the present invention;

fig. 4 is a schematic structural view of the PCB board shown in fig. 2;

Fig. 5 is a schematic block diagram of a test hub according to one embodiment of the present invention;

FIG. 6 is a schematic enlarged view at A in FIG. 5;

FIG. 7 is a schematic block diagram of a connector according to one embodiment of the invention;

FIG. 8 is a schematic enlarged view at B in FIG. 7;

FIG. 9 is a schematic position diagram of a load bearing member according to one embodiment of the invention;

FIG. 10 is a schematic block diagram of the load bearing member of FIG. 9;

Fig. 11 is a schematic structural view of an elevating mechanism according to an embodiment of the present invention.

Reference numerals illustrate:

100-wafer-level burn-in test fixture, 110-cover plate assembly, 120-lower seal assembly, 121-test cavity, 122-seal ring, 10-PCB board, 11-first area, 12-second area, 13-first contact, 14-second contact, 20-test hub, 21-test probe, 22-groove, 30-connector, 40-connector, 41-support, 42-positioning post, 50-upper seal cap, 60-load member, 61-load post, 62-spacer, 70-heat sink member, 80-structural member, 90-stiffener, 200-external test device, 300-harness, 400-lifting mechanism.

Detailed Description

Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative and intended to explain the present invention and should not be construed as limiting the invention.

In the description of the present invention, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "top", "bottom", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element in question must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the invention.

The terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature, i.e. one or more such features. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. When a feature "comprises or includes" a feature or some of its coverage, this indicates that other features are not excluded and may further include other features, unless expressly stated otherwise.

Unless specifically stated and limited otherwise, the term "coupled" and the like are to be construed broadly and may be, for example, fixedly coupled, detachably coupled, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. Those of ordinary skill in the art will understand the specific meaning of the terms described above in the present invention as the case may be.

Unless otherwise defined, all terms (including technical and scientific terms) used in the description of this embodiment have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

Fig. 1 is a schematic block diagram of a wafer level burn-in jig 100 according to an embodiment of the present invention, fig. 2 is a schematic exploded view of the wafer level burn-in jig 100 according to an embodiment of the present invention, fig. 3 is a schematic position diagram of the wafer level burn-in jig 100 and an external test device 200 according to an embodiment of the present invention, and fig. 4 is a schematic block diagram of the PCB board 10 shown in fig. 2. As shown in fig. 1-4, the wafer level burn-in fixture 100 includes a cover plate assembly 110 and a lower seal assembly 120, wherein the cover plate assembly 110 and the lower seal assembly 120 are connected to form a test cavity 121 for receiving a wafer. The cover assembly 110 includes a PCB board 10, a test hub 20, and at least one connector 30. The PCB board 10 includes a first area 11 and a second area 12, the first area 11 and the second area 12 are respectively located on different sides of the PCB board 10, and any first contact 13 disposed in the first area 11 is electrically connected to a corresponding second contact 14 disposed in the second area 12. The test socket 20 is located at the bottom of the PCB 10 and is connected to the PCB 10, and the test socket 20 has a plurality of test probes 21, one end of any test probe 21 contacts the corresponding first contact 13, and the other end contacts the wafer, so as to perform a wafer level burn-in test on the wafer. The connectors 30 are mounted at the second region 12 of the PCB board 10, any one of the connectors 30 is connected with a corresponding second contact 14, and any one of the connectors 30 is connected with the external test device 200 through the wire harness 300 for wafer level burn-in testing of the wafer.

Here, it will be understood that the test probe holder 20 is formed with a pin hole, the test probe 21 is a spring probe and is mounted in the pin hole, and the test probe 21 pierces the chip on the wafer to energize the chip. The first area 11 and the second area 12 are two areas which are not overlapped on the PCB board 10 and are electrically connected, a first contact 13 is arranged on the surface of the first area 11, any first contact is electrically connected with a corresponding second contact 14 arranged in the second area 12 through an internal circuit of the PCB board 10, the external testing device 200 is connected with a connector 30 on the second area 12 through a flexible wire harness 300 or a cable, the second area 12 transmits a testing signal to the first area 11, and the first area 11 transmits a signal to a wafer in the testing cavity 121 through a testing probe 21, so that wafer level burn-in testing is performed on the wafer. The connector 30 is flexibly connected with the external testing device 200, and has simple structure and flexible and reliable layout.

In this embodiment, by adding the connector 30 in the second area 12 of the PCB 10 and connecting the connector 30 with the external testing device 200 by using the wire harness 300, the manner of probe connection in the prior art is cancelled, which is equivalent to replacing the rigid connection with the flexible connection, so that the relative positions of the wafer-level burn-in test fixture 100 and the external testing device 200 can be flexibly arranged, the structural correlation between the wafer-level burn-in test device 100 and the external testing device 200 is reduced, and the number of channels for powering up the wafer can be increased. In addition, the probe is connected with the external test device 200, so that a plurality of contact points exist, which can lead to lower reliability of circuit connection, while the wire harness 300 is connected, so that the reliability of circuit connection is improved, and the wafer-level burn-in test fixture 100 can be independently and conveniently installed and detached, so that maintainability is improved.

The wafer level burn-in fixture 100 of the present invention is compact in structure, high in integration, and provides a large number of channels for connection with hardware in a small size, and can support a maximum of 8 inch SiC wafers for wafer level burn-in, and provide more than 2000 channels for power-up and wafer level burn-in.

In this embodiment, the connectors 30 are plural, and the plural connectors 30 are arranged in an array on the PCB board 10. The connectors 30 are densely arranged on the second area 12 and connected with the external testing device 200 through the flexible wire harness 300 or the cable, the connectors 30 are arranged in an array manner, the second area 12 of the PCB 10 can be fully utilized, the using area of the PCB 10 is saved, the number of power-on channels in a unit area can be further increased, and the wafer-level burn-in test of high-density multiple channels is realized.

Fig. 5 is a schematic structural view of the test hub 20 according to an embodiment of the present invention, fig. 6 is a schematic enlarged view of fig. 5 at a, fig. 7 is a schematic structural view of one connector 40 according to the present invention, and fig. 8 is a schematic enlarged view of fig. 7 at B. As shown in fig. 5 to 8, in this embodiment, the test socket 20 is circular, and the wafer level burn-in fixture 100 further includes a ring-shaped connecting member 40, wherein the connecting member 40 is connected to the PCB 10, and the connecting member 40 is sleeved on the outer circumference of the test socket 20 and connected to the test socket 20. Here, the connecting member 40 presses the test socket 20 to be clamped with the test socket 20, so that the test socket 20 is relatively fixed with the PCB 10, and structural stability of the wafer level burn-in fixture 100 is improved. In this embodiment, the connection member 40 is connected to the PCB board by bolts.

In this embodiment, the test hub 20 is made of a high-hardness, low-expansion-coefficient material. During the use of the wafer level burn-in fixture 100, the test socket 20 and the PCB 10 are fixed at a specific position, and there is no relative displacement, which may cause the test probes 21 on the test socket 20 to fail to contact the PCB 10 and break. The existing test needle stand 20 and the connecting piece 40 are positioned by matching the pin and the cylindrical hole. Because the environment temperature of the test needle base 20 is up to 200 ℃ when the test needle is used, the high temperature inevitably leads to expansion of the test needle base 20 and the connecting piece 40, the materials of the test needle base 20 and the connecting piece 40 are different, the expansion coefficient difference is large, and the pin and the cylindrical hole are mutually extruded to generate great stress, so that the test needle base 20 is extruded to be broken or the connecting piece 40 is deformed to be difficult to disassemble.

In this embodiment, at least one groove 22 is provided at the edge of the test hub 20. The connector 40 has a supporting portion 41 for supporting the test needle holder 20, and at least one positioning column 42 is disposed on the supporting portion 41, and each positioning column 42 is disposed corresponding to one of the grooves 22 to position the test needle holder 20. The cooperation of the positioning column 42 and the groove 22 limits the position of the test needle stand 20, when the test needle stand 20 and the connecting piece 40 are expanded by heating, the positioning column 42 can slide in the groove 22 a little, the groove 22 is not extruded, the stress when the test needle stand 20 and the connecting piece 40 are expanded is eliminated, and the deformation of the test needle stand 20 and the connecting piece 40 is avoided. In the present embodiment, the number of the grooves 22 and the positioning posts 42 is three, and the three grooves 22 are distributed at intervals at the edge of the needle holder along the circumferential direction of the test needle holder 20.

In this embodiment, the grooves 22 are open towards the corresponding positioning posts 42. Here, the groove 22 is not closed, the positioning column 42 is only in contact with two sides of the groove 22 along the circumferential direction of the needle holder, when the test needle holder 20 and the connecting piece 40 are expanded by heating, the positioning column 42 can slide in the groove 22 in a small amount along the radial direction of the test needle holder 20, the positioning column 42 cannot squeeze the groove 22, and the deformation caused by stress generated when the test needle holder 20 and the connecting piece 40 are expanded is avoided.

The cover plate assembly 110 is connected with the lower sealing assembly 120 to form an airtight sealed test cavity 121, a sealing ring 122 is arranged at the top of the lower sealing assembly 120, and when the lower sealing assembly 120 moves upwards, the sealing ring 122 is connected with the PCB 10 first, and then is compressed to form airtight seal. The test cavity 121 having air tightness has a certain air pressure to generate a pressing force to combine the lower sealing assembly 120 with the PCB board 10, but if the pressing force in the test cavity 121 is excessively large, the lower sealing assembly 120 contacts the PCB board 10 and transfers excessive force to the PCB board 10.

Fig. 9 is a schematic position diagram of the force bearing member 60 according to an embodiment of the present invention, and fig. 10 is a schematic structural diagram of the force bearing member 60 shown in fig. 9. As shown in fig. 9 and 10, in this embodiment, the wafer level burn-in jig 100 further includes an upper sealing cover 50 having a circular shape, and the upper sealing cover 50 is positioned on top of the PCB board 10. The wafer level burn-in fixture 100 further includes a plurality of force bearing members 60 arranged at intervals along the circumference of the upper sealing cover 50, each force bearing member 60 includes a force bearing post 61, and the force bearing posts 61 penetrate through the PCB board 10 and are connected with the upper sealing cover 50, and the force bearing posts 61 protrude from the bottom surface of the PCB board 10. Here, the upper sealing cover 50 is tightly coupled to the PCB board 10 by the sealing ring 122 of the lower sealing assembly 120, providing air tightness to the top of the first region 11. The force bearing columns 61 are arranged on the PCB 10 at intervals along the circumferential direction of the upper sealing cover 50, the force bearing columns 61 protrude out of the bottom surface of the PCB 10, when the compression force in the testing cavity 121 is too large, and the lower sealing cover 120 is too close to the PCB 10, the force bearing columns 61 are contacted with the lower sealing cover 120 before the PCB 10, so that the compression force of the testing cavity 121 is borne, and the PCB 10 is prevented from being subjected to excessive pressure.

In this embodiment, the height of the bearing post 61 protruding from the bottom surface of the PCB board 10 is any value ranging from 0.1mm to 0.2 mm. Too high a protruding height of the bearing post 61 from the bottom surface of the PCB 10 may affect the tightness between the PCB 10 and the lower sealing cover 120, and too low a protruding height may not easily exert the bearing effect. In this embodiment, the height of the bearing post 61 protruding from the bottom surface of the PCB 10 is 0.1mm, so that the PCB 10 can be connected with the lower sealing cover 120 before the test cavity 121 is excessively pressed, thereby avoiding the PCB 10 from being damaged due to excessive pressure.

In this embodiment, the bearing component 60 further includes at least one spacer 62 sleeved on the bearing post 61 to adjust the height of the bearing post 61 protruding from the bottom surface of the PCB board 10. In this embodiment, the thickness of each spacer 62 is 0.1mm, and the height of the bearing post 61 protruding from the bottom surface of the PCB 10 can be adjusted by adjusting the number of the spacers 62.

In this embodiment, the wafer level burn-in fixture 100 further includes a heat sink 70 mounted on the PCB board 10, the heat sink 70 being located between the first region 11 and the second region 12 for insulating heat generated by the first region 11. In the wafer level burn-in process, the wafer is continuously heated, the temperature of the first area 11 is high, heat is diffused to affect other areas of the PCB 10, and the high temperature can adversely affect the connector 30, thereby affecting the accuracy of the wafer level burn-in process. In order to avoid high temperature affecting the connector 30, the present invention provides a heat sink 70 between the first region 11 and the second region 12.

In the present embodiment, copper sheets are laid on the surface of the PCB board 10 where the heat dissipating part 70 is installed, so that the heat dissipated from the first region 11 is concentrated to the place where the heat dissipating part 70 is installed, and the heat dissipating part 70 includes a fan and a heat dissipating fin, the fan being located at one side edge of the PCB board 10 in the width direction, generating an air flow capable of taking away the heat. The air flow blows from one side of the PCB 10 along the width direction to the other side, and heat of the first region 11 is prevented from being diffused to the second region 12, so that high temperature can be prevented from affecting the connector 30, the wafer level burn-in fixture 100 can be protected, and accuracy of the wafer level burn-in test can be improved.

In this embodiment, the wafer level burn-in fixture 100 further includes a structural member 80 positioned on top of the PCB board 10 and coupled to the upper seal cap 50. The wafer level burn-in fixture 100 further includes a plurality of stiffeners 90 located on top of the PCB board 10, the plurality of stiffeners 90 being disposed at the perimeter of the structural member 80, at the edge of the PCB board 10, and at the second region 12, respectively. Here, the reinforcement members 90 are screwed around the PCB 10 and between adjacent groups of the connectors 30 on the second region 12, improving the structural strength of the wafer level burn-in jig 100. The structural member 80 is connected with the reinforcing member 90 on the first region 11 and the PCB 10 at the same time, so as to provide strength to the stressed portion of the PCB 10.

Fig. 11 is a schematic structural view of an elevating mechanism 400 according to an embodiment of the present invention. As shown in fig. 11, this embodiment also provides a wafer level burn-in apparatus including the wafer level burn-in jig 100 and the elevating mechanism 400. The lifting mechanism 400 is configured to controllably extend up and down, and the lifting mechanism 400 is movably abutted against the wafer level burn-in fixture 100 to drive the lower seal assembly 120 to move up to be connected with the cover plate assembly 110 to form the test cavity 121.

The wafer level burn-in fixture 100 of the present invention connects the connector 30 to the external test device 200 and the hardware loop prior to use. When the wafer level burn-in fixture 100 is in operation, the cover plate assembly 110 and the lower seal assembly 120 are connected to form a test cavity 121 with air tightness for performing wafer level burn-in testing on a wafer. Specifically, the wafer is placed in a specific position in the test cavity 121, the assembly plate assembly 110 is not moved, and the lower seal assembly 120 is lifted up from the lower direction of the test socket 20 until the sealing ring 122 of the lower seal assembly 120 is connected with the PCB board 10 and is slightly compressed, forming the hermetically sealed test cavity 121.

During the lifting process of the lower sealing assembly 120, the test probe 21 on the test needle stand 20 will puncture the test point at a specific position on the wafer surface, and the test probe 21 is a spring probe and will compress for a certain stroke. The tips of the test probes 21 contact the surface of the wafer and generate a certain pressure to form a circuit for power burn-in and test of the wafer, and at this time, the wafer can be power burned-in and tested. The lower sealing member 120 forms an airtight space together with the PCB board 10 and the upper sealing member 50, and a specific compressed gas may be filled into the airtight space to protect the wafer. In high pressure testing, the compressed gas may prevent the high voltage arc from damaging the test probe 21 or wafer.

By now it should be appreciated by those skilled in the art that while a number of exemplary embodiments of the invention have been shown and described herein in detail, many other variations or modifications of the invention consistent with the principles of the invention may be directly ascertained or inferred from the present disclosure without departing from the spirit and scope of the invention. Accordingly, the scope of the present invention should be understood and deemed to cover all such other variations or modifications.

Claims

1. The utility model provides a wafer level burn-in fixture, its characterized in that includes apron subassembly and lower seal assembly, the apron subassembly with lower seal assembly connects the test cavity that forms the acceptment wafer, the apron subassembly includes:

2. The wafer level burn-in jig of claim 1, wherein,

The connectors are multiple, and the connectors are arranged on the PCB in an array mode.

3. The wafer level burn-in fixture of claim 2, wherein the test hub is circular, the wafer level burn-in fixture further comprising:

4. The wafer level burn-in jig according to claim 3, wherein,

At least one groove is formed in the edge of the test needle seat;

5. The wafer level burn-in fixture of claim 4, wherein said recess openings are disposed toward corresponding ones of said positioning posts.

6. The wafer level burn-in fixture of claim 5, further comprising an upper seal cover having a circular shape, said upper seal cover being positioned on top of said PCB board; the wafer level burn-in fixture further includes a plurality of load bearing members arranged in spaced apart relation along a circumference of the upper seal cover, each of the load bearing members including:

7. The wafer level burn-in jig of claim 6, wherein,

The height of the bearing column protruding out of the bottom surface of the PCB is any value ranging from 0.1mm to 0.2 mm.

8. The wafer level burn-in fixture of claim 7, wherein said load bearing member further comprises:

9. The wafer level burn-in jig of any one of claims 1-8, further comprising:

10. The wafer level burn-in jig of any one of claims 6-8, further comprising a structural member positioned on top of said PCB board and connected to said upper seal cover; the wafer level burn-in fixture further includes:

11. A wafer level burn-in apparatus comprising:

the wafer level burn-in jig of any one of claims 1-10;