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CN117639046B - Control method for single-phase energy storage PCS and computer storage medium - Google Patents

Control method for single-phase energy storage PCS and computer storage medium Download PDF

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Publication number
CN117639046B
CN117639046B CN202311638874.5A CN202311638874A CN117639046B CN 117639046 B CN117639046 B CN 117639046B CN 202311638874 A CN202311638874 A CN 202311638874A CN 117639046 B CN117639046 B CN 117639046B
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current
voltage
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CN117639046A (en
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周超
董德智
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Tongling University
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Tongling University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/28—Arrangements for balancing of the load in a network by storage of energy
    • H02J3/32—Arrangements for balancing of the load in a network by storage of energy using batteries with converting means
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
    • H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
    • H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
    • H02M7/72—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/79—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/797—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Abstract

The invention discloses a control method for a single-phase energy storage PCS. The control method comprises a grid-connected control method and an off-grid control method, wherein the grid-connected control method generates a modulation signal in a PCS grid-connected mode through grid-side current control and capacitor voltage feedforward control. The off-grid control method constructs fundamental wave and harmonic voltage dq components of the inversion voltage, performs voltage outer loop control on the construction result and performs current inner loop control on the inductance current, so as to generate a modulation signal in a PCS off-grid mode. The control method of the invention constructs fundamental wave and each harmonic dq component in a special form by carrying out network side current and capacitor voltage, and then carries out operations such as differencing, proportional integral control, positive and negative Park conversion, filtering and the like on the construction result. Finally, the single-phase full bridge formed by IGBT devices is controlled by using the generated modulation signals in the grid-connected mode and the off-grid mode of the PCS, so that the PCS can output high-quality electric energy under the condition of grid connection and off-line of the power grid.

Description

Control method for single-phase energy storage PCS and computer storage medium
Technical Field
The present invention relates generally to the field of smart grids. More particularly, the present invention relates to a control method and computer-readable storage medium for a single-phase stored energy PCS.
Background
The micro-grid is a distributed energy supply system which combines a new energy power generation system, a local load, a power electronic-power conversion device and an energy storage system and is connected with a large power grid. The system can realize high-efficiency access of distributed power generation and improve the reliability of key load power supply, wherein the energy storage system plays an indispensable role in micro-grid control and energy management. The micro source in the micro power grid has the characteristics of small inertia, weak damping and the like, so that the anti-interference performance of the micro source is weak; meanwhile, the fluctuation and randomness of the distributed energy sources of the micro-grid also influence the safe and reliable operation of the system. Therefore, the power balance of the micro-grid can be realized through a Power Conversion System (PCS) based on the lithium battery, the superconducting energy storage, the super capacitor and other energy storage devices, so that various defects of the micro-grid are overcome, and the safety of large-scale wind power, photovoltaic and other power supply is improved.
For a medium and small power micro-grid system, a single-phase power supply mode is mainly adopted, and the micro-grid system has two working modes of off-grid operation and grid-connected operation. Further, in the micro-grid system using the energy storage as the networking power supply, the energy storage PCS can be switched between two modes of off-grid operation and grid-connected operation according to the power grid operation condition. Fig. 1 is a single-phase energy storage PCS structure and operational schematic diagram 100 including a battery, a single-phase full-bridge inverter, and a grid/load. The single-phase full-bridge converter comprises a single-phase full-bridge formed by a direct-current side filter capacitor C dc and 4 IGBT devices (T1-T4) and an LC filter. In fig. 1, U dc is a battery voltage, L 1 and C are an inverter side inductor and an inverter side filter capacitor, respectively, L 2 is a grid side inductor, U g is a grid voltage, i 1 is a current of the inductor L 1, i 2 is a current of the inductor L 2, U ab is an inverter side voltage, U c is a voltage of the filter capacitor C, and S is a mode selection switch.
As can be seen from fig. 1, in operation, when the grid is normal, the switch S is closed, and the PCS is operated in grid-connected mode and provides a certain active and reactive current to the grid; conversely, when the grid fails, switch S is open, and the PCS is operating in off-grid mode and providing a constant ac voltage to the local load. However, because of the large line and transformer impedances of the ac grid of the actual micro grid system, the distorted current will cause the grid voltage to generate large harmonics under nonlinear loading, thereby affecting the grid-connected current quality of the PCS. In addition, since the local load of the micro-grid may be a nonlinear load such as a large server and a thyristor rectifier, the supply voltage quality of the PCS may be affected, thereby reducing the operation life of the local load. In summary, the existing single-phase energy storage PCS faces a larger output power quality problem in both grid-connected and off-grid working modes.
Aiming at the problem of controlling the electric energy quality of the single-phase energy storage PCS, the prior art mainly comprises methods of repeated control, multi-resonance control, virtual orthogonal component construction, PI control and the like. However, these control methods have certain drawbacks. For example, for the repetitive control method, since the repetitive controller in the PCS feedback control loop includes a mathematical model describing an external input signal, although it can realize a dead-beat control of a sinusoidal signal, thereby improving the power quality of the PCS, the output of the repetitive controller only acts in the next fundamental wave period, so that the degradation of the dynamic performance of the system due to the control delay is always a big problem in the PCS application of the repetitive control method. For the multi-resonance control method, although the high gain of a PCS control loop at certain specific frequency can be realized, so that the tracking error of a frequency signal is reduced to zero, if the frequency of a controlled signal changes, the gain of the frequency of the signal is greatly reduced, and the control precision and stability of the PCS are affected. The PI control method is combined with the virtual orthogonal component structure, the characteristic of no static error tracking of PI control under the dq coordinate system of the three-phase converter is used, and the method has better control performance, but the common virtual orthogonal component structure is generally realized by adopting a differential or delay method, which can cause the problems of high-frequency noise amplification or control delay of a PCS system and the like, thereby influencing the dynamic performance of the PCS.
Disclosure of Invention
To solve one or more of the above-described problems in the background art, the present invention provides a control method for a single-phase stored energy PCS. Therefore, the control method of the invention provides that the single-phase energy storage PCS in the grid-connected working mode and the single-phase energy storage PCS in the off-grid working mode are respectively subjected to grid-connected mode control and off-grid mode control. Aiming at grid-connected mode control, the invention adopts the technical means of grid-side current control and capacitor voltage feedforward control; aiming at off-grid mode control, the invention adopts the technical means of constructing fundamental wave and harmonic voltage dq components of the inversion voltage, executing voltage outer loop control and executing current inner loop control on the inductance current in the single-phase full-bridge converter. Through the control of the two aspects, the technical scheme of the invention not only perfectly solves the influence of each harmonic on the single-phase energy storage PCS, but also enhances the robustness of the single-phase energy storage PCS on parameter change, thereby ensuring that the system outputs safe and stable electric energy to a load in a grid-connected or off-grid state. To this end, the present invention provides a solution by a number of embodiments as follows.
Specifically, in one aspect, the invention discloses a control method for a single-phase energy storage PCS, wherein the single-phase energy storage PCS comprises a battery, a single-phase full-bridge converter, a power grid and a load. The control method comprises a grid-connected control method and an off-grid control method, wherein the grid-connected control method comprises grid-side current control and capacitor voltage feedforward control. The grid-side current control includes: constructing fundamental wave and n-order harmonic current dq components of the grid-side current so as to generate positive and negative sequence fundamental wave current dq components and positive and negative sequence n-order harmonic current dq components; and respectively performing closed-loop control on the positive and negative sequence fundamental current dq components and the positive and negative sequence n-order harmonic current dq components so as to generate a current closed-loop control output signal. The capacitive voltage feedforward control includes: weighting and feedforward processing are carried out on the capacitor voltage in the single-phase full-bridge converter; and performing a difference operation on the capacitor voltage subjected to the weighted sum feedforward processing and the current closed-loop control output signal so as to generate a modulation signal in the single-phase energy storage PCS grid-connected mode. The off-grid control method comprises the following steps: constructing fundamental wave and n-order harmonic voltage dq components of the inversion output voltage so as to generate positive and negative sequence fundamental wave voltage dq components and positive and negative sequence n-order harmonic voltage dq components; and performing voltage outer loop control on the positive and negative sequence fundamental and n-order harmonic voltage dq components so as to generate a modulation signal in the single-phase energy storage PCS off-grid mode.
In one embodiment, said constructing the fundamental and n-harmonic current dq components of the grid-side current comprises: let the net side current be the alpha current component, 0 be the beta current component, merge the alpha current component and the beta current component into net side current alpha beta phasor; performing a difference operation on the grid-side current alpha beta phasors and the first superposition current phasors and the second superposition current phasors respectively to generate positive and negative sequence fundamental current phasors of an alpha beta coordinate system respectively; respectively performing Park conversion on positive and negative sequence fundamental wave current phasors of the alpha beta coordinate system to respectively generate positive and negative sequence fundamental wave current dq phasors, and acquiring positive and negative sequence fundamental wave current dq components from the positive and negative sequence fundamental wave current dq phasors; and respectively carrying out low-pass filtering and anti-Park conversion on the positive and negative sequence fundamental wave current dq phasors to respectively generate positive and negative sequence fundamental wave current phasors of the filtered alpha beta coordinate system.
Performing a difference operation on the grid-side current alpha beta phasors and the n-th superposition current phasor and the n+1-th superposition current phasor respectively to generate positive and negative sequence n-th harmonic current phasors of an alpha beta coordinate system; respectively performing Park conversion on positive and negative sequence n-order harmonic current phasors of the alpha beta coordinate system to respectively generate positive and negative sequence n-order harmonic current dq phasors, and acquiring positive and negative sequence n-order harmonic current dq components from the positive and negative sequence n-order harmonic current dq phasors; and respectively carrying out low-pass filtering and anti-Park conversion on the positive and negative sequence n-order harmonic current dq phasors to respectively generate positive and negative sequence n-order harmonic current phasors of the alpha beta coordinate system after filtering.
In another embodiment, the closed loop control of the positive and negative sequence fundamental current dq components and the positive and negative sequence n-order harmonic current dq components, respectively, comprises: performing a difference operation on the positive sequence fundamental current d-axis and q-axis components with the first d-axis current command signal and the first q-axis current command signal, respectively, to generate a first d-axis current difference signal and a first q-axis current difference signal, respectively; performing proportional-integral operation on the first d-axis current difference signal and the first q-axis current difference signal respectively to generate a first d-axis current control signal and a first q-axis current control signal respectively; and respectively performing inverse Park conversion on the first d-axis current control signal and the first q-axis current control signal to respectively generate a first current alpha-axis alternating current component and a first current beta-axis alternating current component.
Performing a difference operation on the negative sequence fundamental current d-axis and q-axis components with the second d-axis current command signal and the second q-axis current command signal, respectively, to generate a second d-axis current difference signal and a second q-axis current difference signal, respectively; performing proportional-integral operation on the second d-axis current difference signal and the second q-axis current difference signal respectively to generate a second d-axis current control signal and a second q-axis current control signal respectively; and respectively performing inverse Park conversion on the second d-axis current control signal and the second q-axis current control signal to respectively generate a second current alpha-axis alternating current component and a second current beta-axis alternating current component.
Performing a difference operation on the positive-sequence n-order harmonic current d-axis component and the q-axis component with an nth d-axis current command signal and an nth q-axis current command signal, respectively, to generate an nth d-axis current difference signal and an nth q-axis current difference signal, respectively; respectively performing proportional integral operation on the nth d-axis current difference signal and the nth q-axis current difference signal to respectively generate an nth d-axis current control signal and an nth q-axis current control signal; and respectively performing inverse Park conversion on the nth d-axis current control signal and the nth q-axis current control signal to respectively generate an nth current alpha-axis alternating component and an nth current beta-axis alternating component.
Performing a difference operation on the negative-sequence n-order harmonic current d-axis component and q-axis component with the n+1th d-axis current command signal and the n+1th q-axis current command signal to generate an n+1th d-axis current difference signal and an n+1th q-axis current difference signal, respectively; respectively performing proportional integral operation on the n+1th d-axis current difference signal and the n+1th q-axis current difference signal to generate an n+1th d-axis current control signal and an n+1th q-axis current control signal respectively; performing inverse Park transformation on the n+1th d-axis current control signal and the n+1th q-axis current control signal, respectively, to generate an n+1th current α -axis alternating current component and an n+1th current β -axis alternating current component, respectively; and performing a summation operation on the first, second, nth and n+1th current alpha-axis alternating components to generate the current closed loop control output signal.
In yet another embodiment, the constructing the inverted output voltage into fundamental and n-harmonic voltage dq components includes: the capacitor voltage in the single-phase full-bridge converter is made to be an alpha voltage component, 0 is made to be a beta voltage component, and the alpha voltage component and the beta voltage component are combined to form an inversion voltage alpha beta phasor; performing a difference operation on the inverted voltage alpha beta phasors and the first superimposed voltage phasors and the second superimposed voltage phasors respectively to generate positive and negative sequence fundamental voltage phasors of an alpha beta coordinate system respectively; respectively performing Park conversion on positive and negative sequence fundamental voltage phasors of the alpha beta coordinate system to respectively generate positive and negative sequence fundamental voltage dq phasors, and acquiring positive and negative sequence fundamental voltage dq components from the positive and negative sequence fundamental voltage dq phasors; and respectively carrying out low-pass filtering on the positive and negative sequence fundamental wave voltage dq phasors, and then respectively carrying out inverse Park conversion to respectively generate positive and negative sequence fundamental wave voltage phasors of the filtered alpha beta coordinate system.
Performing a difference operation on the inverted voltage alpha beta phasors and the n-th superimposed voltage phasor and the n+1-th superimposed voltage phasor respectively to generate positive and negative sequence n-th harmonic voltage phasors of an alpha beta coordinate system; respectively performing Park conversion on positive and negative sequence n-order harmonic voltage phasors of the alpha beta coordinate system to respectively generate positive and negative sequence n-order harmonic voltage dq phasors, and acquiring positive and negative sequence n-order harmonic voltage dq components from the positive and negative sequence n-order harmonic voltage dq phasors; and respectively carrying out low-pass filtering on the positive and negative sequence n-order harmonic voltage dq phasors, and then respectively carrying out inverse Park conversion to respectively generate the positive and negative sequence n-order harmonic voltage phasors of the alpha beta coordinate system after filtering.
In one embodiment, said performing voltage outer loop control of the positive and negative sequence fundamental and n-harmonic voltage dq components comprises: performing a difference operation on the positive-sequence fundamental voltage d-axis and q-axis components with the first d-axis voltage command signal and the first q-axis voltage command signal, respectively, to generate a first d-axis voltage difference signal and a first q-axis voltage difference signal, respectively; performing proportional-integral operation on the first d-axis voltage difference signal and the first q-axis voltage difference signal respectively to generate a first d-axis voltage control signal and a first q-axis voltage control signal respectively; performing inverse Park conversion on the first d-axis voltage control signal and the first q-axis voltage control signal, respectively, to generate a first voltage α -axis alternating current component and a first voltage β -axis alternating current component, respectively; and performing a difference operation on the first voltage alpha-axis alternating current component and the inductive current in the single-phase full-bridge converter, and performing proportional control adjustment to generate an inductive current control signal.
Performing a difference operation on the negative sequence fundamental voltage d-axis and q-axis components with the second d-axis voltage command signal and the second q-axis voltage command signal, respectively, to generate a second d-axis voltage difference signal and a second q-axis voltage difference signal, respectively; respectively performing proportional integral operation on the second d-axis voltage difference signal and the second q-axis voltage difference signal; to generate a second d-axis voltage control signal and a second q-axis voltage control signal, respectively; and respectively performing inverse Park conversion on the second d-axis voltage control signal and the second q-axis voltage control signal to respectively generate a second voltage alpha-axis alternating current component and a second voltage beta-axis alternating current component.
Performing a difference operation on the positive-order n-order harmonic voltage d-axis component and the q-axis component with the nth d-axis voltage command signal and the nth q-axis voltage command signal, respectively, to generate an nth d-axis voltage difference signal and an nth q-axis voltage difference signal, respectively; respectively performing proportional integral operation on the nth d-axis voltage difference signal and the nth q-axis voltage difference signal to respectively generate an nth d-axis voltage control signal and an nth q-axis voltage control signal; and respectively performing inverse Park conversion on the nth d-axis voltage control signal and the nth q-axis voltage control signal to respectively generate an nth voltage alpha-axis alternating current component and an nth voltage beta-axis alternating current component.
Performing a difference operation on the negative-sequence n-order harmonic voltage d-axis component and the q-axis component with the n+1th d-axis voltage command signal and the n+1th q-axis voltage command signal to generate an n+1th d-axis voltage difference signal and an n+1th q-axis voltage difference signal, respectively; respectively performing proportional integral operation on the n+1th d-axis voltage difference signal and the n+1th q-axis voltage difference signal to generate an n+1th d-axis voltage control signal and an n+1th q-axis voltage control signal respectively; performing inverse Park conversion on the n+1th d-axis voltage control signal and the n+1th q-axis voltage control signal, respectively, to generate an n+1th voltage α -axis alternating current component and an n+1th voltage β -axis alternating current component, respectively; and performing a summation operation on the inductor current control signal, the second voltage alpha-axis alternating current component, the nth voltage alpha-axis alternating current component and the n+1th voltage alpha-axis alternating current component so as to generate a modulation signal in the single-phase energy storage PCS off-grid mode.
On the other hand, the invention also discloses a computer readable storage medium, wherein the computer readable storage medium stores program instructions for controlling the single-phase energy storage PCS, and when the program instructions are executed by a processor, the program instructions enable the processor to realize the control method for the single-phase energy storage PCS.
As can be seen from the schemes described in the above embodiments, the present invention carefully designs the construction process of the net side fundamental wave and the voltage dq component of each harmonic current, the net side current control process, the capacitor voltage feedforward control process, the voltage outer loop control process, and the inductor current execution current inner loop control process. In the control processes, the invention skillfully combines the processes of Park conversion, inverse conversion, proportional integral operation, decoupling operation, filtering and the like, so that a system containing PCS can output high-quality electric energy in grid-connected and grid-off states, and finally, the safe and stable operation of load equipment is ensured.
Drawings
The above-described features and advantages of the present invention will be better understood, and its numerous objects, features, and advantages will be apparent to those skilled in the art by referencing the accompanying drawings. The drawings in the following description are only examples of embodiments of the present invention and other drawings may be derived from them without inventive effort for a person skilled in the art, wherein:
FIG. 1 is a schematic diagram illustrating a single phase energy storage PCS structure and operation;
FIG. 2 is a schematic diagram illustrating a single-phase stored energy PCS structure and operation in accordance with an embodiment of the present invention;
fig. 3 is an overall architecture diagram showing a control method for a single energy storage PCS according to an embodiment of the invention;
FIG. 4 is a flow chart showing the construction of the fundamental and n-harmonic current dq components on the net side according to an embodiment of the present invention;
FIG. 5 is a schematic diagram showing the construction of the fundamental and n-harmonic current dq components on the net side according to an embodiment of the present invention;
FIG. 6 is a flow chart illustrating closed loop control of the positive and negative sequence fundamental and n-order harmonic current dq components according to an embodiment of the present invention;
FIG. 7 is a schematic diagram illustrating a single-phase stored energy PCS grid-tie mode control process in accordance with an embodiment of the present invention;
fig. 8 is a flowchart showing the construction of fundamental and n-order harmonic voltage dq components of an inverted output voltage according to an embodiment of the present invention;
Fig. 9 is a schematic diagram showing the construction of fundamental and n-order harmonic voltage dq components of an inverted output voltage according to an embodiment of the present invention;
fig. 10 is a flowchart showing a process of performing voltage outer loop control on positive and negative sequence fundamental and n-order harmonic voltage dq components according to an embodiment of the present invention; and
Fig. 11 is a schematic diagram illustrating a single-phase stored energy PCS off-grid mode control process according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments according to the invention without any creative effort, are within the protection scope of the invention.
Fig. 2 is a schematic diagram 200 illustrating a single-phase stored energy PCS structure and operation in accordance with an embodiment of the invention. Fig. 3 is a general architecture diagram 300 illustrating a control method for a single energy storage PCS according to an embodiment of the invention. It will be appreciated that fig. 2 is an inventive modification to fig. 1, and that the description of the relevant structure and signals in fig. 1 applies equally to fig. 2. It will be further appreciated that the general architecture diagram 300 of fig. 3 is a specific embodiment of the working schematic diagram 200 of fig. 2, and in order to better understand the technical solution of the present invention, an application scenario including a dc power source and a load is also depicted in fig. 2, where the dc power source may be a new energy source such as wind power, photovoltaic and lithium power, and the load may include electric equipment such as a server, a computer and a storage device.
In the application scenario, the single-phase energy storage PCS control system can be composed of a grid-connected mode control module and an off-grid mode control module. In the working process, when the power grid is normal, on one hand, the switch S is closed, and the PCS enters a grid-connected working mode, and the input signal of the PCS consists of three parts: the fundamental angular frequency ω of the filter capacitor voltage u c, the grid-connected current i 2 and the grid voltage u g, where ω is output by the grid voltage phase-locked loop circuit PLL. Further, the output signal of the grid-connected mode control module is v r, the signal is selected by the mode selection module and is used as the input signal v of the sinusoidal pulse width modulation module SPWM, and after sinusoidal pulse width modulation processing, the driving signal for controlling the 4 IGBT devices (T 1～T4) is finally output, so that the control of the PCS in the grid-connected mode is realized. On the other hand, when the power grid fails, the switch S is turned off, and the PCS enters the off-grid control mode, and the input signals of the switch S are the filter capacitor voltage u c and the current i 1 on the filter inductor L 1. Further, the output signal of the off-grid mode control module is v s, the signal is selected by the mode selection module and is used as the input signal v of the sinusoidal pulse width modulation module SPWM, and after sinusoidal pulse width modulation processing, the driving signal for controlling the IGBT device is finally output, so that the control of the PCS in the off-grid mode is realized. The flow of the control method of the grid-connected control mode and the off-grid control mode of the present invention is described below with reference to fig. 3.
As shown in fig. 3, the control method 300 of the present invention adopts a current source control method in the grid-connected mode. The control method 300 may further include two parts, namely, grid-side current control and capacitor voltage feedforward control. Specifically, in the network-side current control process, step S310 is first performed. At this step, the net side current is subjected to fundamental and n-harmonic current dq component construction so as to generate positive and negative sequence fundamental current dq components and positive and negative sequence n-harmonic current dq components. Next, the network side current control process performs step S320. At this step, the above-described positive and negative sequence fundamental current dq components and positive and negative sequence n-order harmonic current dq components are respectively subjected to closed-loop control so as to generate current closed-loop control output signals. At the same time, the network side current control process also performs step S330 in parallel. At this step, the capacitor voltage in the single phase full bridge converter is weighted and feed forward processed. Finally, the network-side current control process ends at step S340. At this step, the capacitor voltage processed in step S330 and the current closed-loop control output signal processed in step S320 are subjected to a difference operation, so as to generate a modulation signal in the single-phase energy storage PCS grid-connected mode.
Further, the control method 300 of the present invention adopts a voltage source control mode in the off-grid mode, wherein the capacitor voltage in the single-phase full-bridge converter is the inversion output voltage. Specifically, during off-grid mode control, step S350 is first performed. At this step, the inverted output voltage is subjected to fundamental and n-order harmonic voltage dq component construction so as to generate positive and negative sequence fundamental voltage dq components and positive and negative sequence n-order harmonic voltage dq components. Next, the off-grid mode control process performs step S360. At this step, the above-described positive and negative sequence fundamental and n-order harmonic voltage dq components are subjected to voltage outer loop control to generate a modulated signal in the single-phase stored energy PCS off-grid mode. Further at this step, a process of performing current inner loop control of the inductor current in the single phase full bridge inverter may be included.
FIG. 4 is a flow chart 400 illustrating a net side fundamental and n-harmonic current dq component construction in accordance with an embodiment of the present invention; fig. 5 is a schematic diagram 500 showing the construction of the net side fundamental and n-harmonic current dq components according to an embodiment of the present invention. It will be appreciated that fig. 4 and 5 are both control methods describing the single-phase energy storage PCS grid-tie mode of operation of the present invention, and that the schematic diagram 500 of fig. 5 is a specific embodiment of the construction flow 400 of fig. 4. The working principle and flow of the network side fundamental wave and n-order harmonic current dq component construction of the control method of the present invention in the grid-connected operation mode will be described below with reference to fig. 4 and 5.
As shown in fig. 4 and 5, the control method of the present invention starts in step S410 with a network-side fundamental wave and n-order harmonic current dq component constructing process 400 in the grid-connected operation mode. At this step, let the net side current be the alpha current component, 0 be the beta current component, and combine the alpha and beta current components into a net side current alpha beta phasor. Specifically, the net side current i 2 is regarded as a current α component i α, let the quadrature component i β be 0, and further, i α and i β are combined into a net side current αβ phasor i αβ. Next, the construction flow 400 performs a process of the net-side wave dq component construction, and the construction flow 400 then performs step S420. At this step, a difference operation is performed on the net-side current αβ phasors with the first superimposed current phasors and the second superimposed current phasors, respectively, to generate positive and negative sequence fundamental current phasors of the αβ coordinate system, respectively. Specifically, in order to realize decoupling of net side positive and negative sequence fundamental wave currents and net side negative and positive sequence fundamental wave currents and other n-order harmonic currents, i αβ is respectively connected with a first superposition current phasor signalAnd a second superimposed current phasor signalThe differences are made to generate positive sequence fundamental current phasors i αβ1P and negative sequence fundamental current phasors i αβ1N, respectively, of the αβ coordinate system.
Next, the construction flow 400 executes step S421. At this step, the positive and negative sequence fundamental wave current phasors of the αβ coordinate system are respectively Park-transformed to generate positive and negative sequence fundamental wave current dq phasors, respectively, and the positive and negative sequence fundamental wave current dq components are obtained from the positive and negative sequence fundamental wave current dq phasors. Specifically, the positive sequence fundamental wave current phasor i αβ1P and the negative sequence fundamental wave current phasor i αβ1N of the αβ coordinate system generated in step S420 are respectively subjected to Park conversion processing with rotation angles ω and- ω to generate positive sequence fundamental wave current phasor i dq1P of the dq coordinate system and negative sequence fundamental wave current phasor i dq1N of the dq coordinate system, respectively, wherein the positive sequence fundamental wave current phasor i dq1P can be split into a positive sequence fundamental wave current d-axis component i d1P and a q-axis component i q1P, and the negative sequence fundamental wave current phasor i dq1N can be split into a negative sequence fundamental wave current d-axis component i d1N and a q-axis component i q1N.
Subsequently, the construction flow 400 proceeds to step S422. At this step, the positive and negative sequence fundamental current dq phasors are respectively low-pass filtered and respectively inverse Park transformed to generate the positive and negative sequence fundamental current phasors of the filtered αβ coordinate system, respectively. Specifically, i dq1P and i dq1N generated in step S421 are respectively filtered by a low-pass filter F (S) to obtain positive-sequence fundamental current phasors in the dq coordinate system after filteringAnd negative sequence fundamental current phasorsAnd then will be againAndRespectively carrying out inverse Park conversion treatment with rotation angle frequencies of omega and-omega; finally, respectively obtaining positive sequence fundamental wave current phasors under the alpha beta coordinate system after filteringAnd negative sequence fundamental current phasors
Similar to the generation of the positive and negative sequence fundamental current dq components described above, the construction flow 400 simultaneously executes step S430 in order to perform the construction of the n-th harmonic current dq component. At this step, a difference operation is performed on the net-side current αβ phasors with the n-th superimposed current phasor and the n+1-th superimposed current phasor, respectively, to generate positive and negative-sequence n-th harmonic current phasors of the αβ coordinate system, respectively. Specifically, in order to decouple the net side positive and negative sequence n-order harmonic current from the net side positive and negative sequence fundamental wave and other n-order harmonic currents, i αβ is respectively connected with the n-th superimposed current phasor signalAnd n+1th superimposed current phasor signalThe difference is made to generate positive-sequence n-order harmonic current phasors i αβnP and negative-sequence n-order harmonic current phasors i αβnN of the αβ coordinate system, respectively.
Next, the construction flow 400 executes step S431. At this step, park transformation is performed on the positive and negative sequence n-order harmonic current phasors of the αβ coordinate system, respectively, to generate positive and negative sequence n-order harmonic current dq phasors, respectively, and the positive and negative sequence n-order harmonic current dq components are obtained from the positive and negative sequence n-order harmonic current dq phasors. Specifically, the positive-sequence n-order harmonic current phasor i αβnP and the negative-sequence n-order harmonic current phasor i αβnN of the αβ coordinate system generated in the step S430 are subjected to Park transformation processing with rotation angles of nω and-nω, respectively, so as to generate the positive-sequence n-order harmonic current phasor i dqnP of the dq coordinate system and the negative-sequence n-order harmonic current phasor i dqnN of the dq coordinate system, respectively, wherein the positive-sequence n-order harmonic current phasor i dqnP can be split into a positive-sequence n-order harmonic current d-axis component i dnP and a q-axis component i qnP, and the negative-sequence n-order harmonic current phasor i dqnN can be split into a negative-sequence n-order harmonic current d-axis component i dnN and a q-axis component i qnN. Wherein n is a natural number of 3 or more.
Subsequently, the construction flow 400 advances to step S432. At this step, the positive and negative sequence n-harmonic current dq phasors are respectively low-pass filtered and respectively inverse Park transformed to generate positive and negative sequence fundamental current phasors of the filtered αβ coordinate system, respectively. Specifically, i dqnP and i dqnN generated in step S431 are respectively filtered by a low-pass filter F (S) to obtain positive-order n-order harmonic current phasors in the dq coordinate system after filteringAnd negative sequence n-order harmonic current phasorsAnd then will be againAndRespectively carrying out inverse Park conversion treatment with rotation angle frequencies of nω and-nω; finally, respectively obtaining the positive sequence n-order harmonic current phasors under the alpha beta coordinate system after filteringAnd negative sequence n-order harmonic current phasors
As can be seen from the above-mentioned construction process of the fundamental wave and the dq component of the n harmonic current on the grid-connected operation mode, the present invention skillfully designs the decoupling process of each branch and the other branches in fig. 5, wherein the first to the n+1th superimposed current phasor signals are the sum of the outputs of the other branches, respectively, where n is a natural number greater than or equal to 3.
FIG. 6 is a flow chart illustrating closed loop control of the positive and negative sequence fundamental and n-order harmonic current dq components according to an embodiment of the present invention; fig. 7 is a schematic diagram showing a single-phase stored energy PCS grid-tie mode control process according to an embodiment of the invention. It will be appreciated that fig. 6 and 7 are both control methods describing the single-phase energy storage PCS grid-tie mode of operation of the present invention, and that the schematic diagram 700 of fig. 7 is a specific embodiment of the control flow 600 diagram of fig. 6. The working principle and flow of the control method of the present invention for closed-loop control of the positive and negative sequence fundamental wave and the n-order harmonic current dq component in the grid-connected operation mode will be described below with reference to fig. 6 and 7.
As shown in fig. 6 and 7, the control method of the present invention for performing closed-loop control on positive and negative sequence fundamental waves and n-order harmonic current dq components in the grid-connected operation mode may include: the method comprises the following 4 processes of performing closed-loop control on a positive sequence fundamental current dq component, performing closed-loop control on a negative sequence fundamental current dq component, performing closed-loop control on a positive sequence n-order harmonic current dq component and performing closed-loop control on a negative sequence n-order harmonic current dq component. First, the control flow 600 of the present invention starts in step S610 by performing closed-loop control for the positive-sequence fundamental current dq component. At this step, the positive-sequence fundamental current d-axis and q-axis components are subjected to a difference operation with the first d-axis current command signal and the first q-axis current command signal, respectively, to generate a first d-axis current difference signal and a first q-axis current difference signal, respectively. Specifically, i d1P and i q1P obtained in step S421 are used as feedback signals of the net side positive sequence fundamental current d-axis component and q-axis component control loops, which are respectively connected with the first d-axis current command signalsAnd a first q-axis current command signalDifferencing to generate a first d-axis current difference signal and a first q-axis current difference signal, respectively, where the command signalAndProvided by an energy management unit of the microgrid system.
Next, the control flow 600 executes step S611. At this step, the first d-axis current difference signal and the first q-axis current difference signal are respectively subjected to proportional-integral operation to generate a first d-axis current control signal and a first q-axis current control signal, respectively. Specifically, the first d-axis current difference signal and the first q-axis current difference signal are processed by PI controllers G d1P and G q1P, respectively, to generate a first d-axis current control signal v d1P and a first q-axis current control signal v q1P, respectively. Next, the control flow 600 proceeds to step S612. At this step, the first d-axis current control signal and the first q-axis current control signal are respectively subjected to inverse Park transformation to generate a first current α -axis alternating component and a first current β -axis alternating component, respectively. Specifically, v d1P and v q1P generated in step S611 are subjected to inverse Park transformation processing by an inverse Park transformation module dq/αβ, respectively, so as to generate a first current α -axis alternating component v α1P and a first current β -axis alternating component v β1P, respectively, where the rotation angular frequency of the inverse rotation transformation is ω.
Based on the same principle, the process of closed-loop control of the negative-sequence fundamental current dq component is similar to the above-described process. In this process, the control flow 600 sequentially performs steps S620, S621, and S622. The difference from the above procedure is that the angular frequency of rotation of the anti-rotation transformation is- ω at this time, and the modules and signals are numbered correspondingly for differentiation. Further, to eliminate the negative-sequence fundamental component of the grid-connected current, a second d-axis current command signal may be appliedAnd a second q-current command signal axisAre all set to 0. For the same generation principle and flow, please refer to the foregoing, and the details are not repeated here. Similarly, the process of closed-loop control of the positive and negative n-harmonic current dq components is similar to that described above. In this process, the control flow 600 sequentially executes steps S630, S631, S632 and steps S640, S641, S642, respectively. The difference from the above procedure is that the rotation angle frequencies of the anti-rotation transformation are now nω and-nω, respectively, and the modules and signals are numbered correspondingly for differentiation. Further, in order to eliminate the positive and negative n-order harmonic components of the grid-side current, the nth d-axis current command signal may be usedNth q-axis current command signalN+1th d-axis current command signalN+1th q-axis current command signalAre all set to 0, where n is a natural number of 3 or more. For the same generation principle and flow, please refer to the foregoing, and the details are not repeated here.
Finally, the present invention terminates the closed-loop control flow 600 for the positive and negative sequence fundamental and n-harmonic current dq components at step S650. At this step, a summation operation is performed on the first, second, nth and n+1th current alpha-axis alternating components to generate the current closed loop control output signal. Specifically, the first current α -axis alternating component v α1P generated in step S612, the second current α -axis alternating component v α1N generated in step S622, the nth current α -axis alternating component v αnP generated in step S632, and the (n+1) th current α -axis alternating component v αnN generated in step S642 are subjected to a summation operation so as to generate a current closed-loop control output signal v m.
Fig. 8 is a flowchart showing the construction of fundamental and n-order harmonic voltage dq components of an inverted output voltage according to an embodiment of the present invention; fig. 9 is a schematic diagram showing the construction of fundamental wave and n-order harmonic voltage dq components of an inverted output voltage according to an embodiment of the present invention. It will be appreciated that fig. 8 and 9 are both control methods describing the off-grid operation mode of the single-phase energy storage PCS of the present invention, and that the schematic diagram 900 of fig. 9 is a specific embodiment of the flowchart 800 of fig. 8. The fundamental wave and n-order harmonic voltage dq component construction operation principle and flow of the control method of the present invention in the off-grid operation mode are described below with reference to fig. 8 and 9.
As shown in fig. 8 and 9, the control method of the present invention starts in step S810 with a fundamental and n-harmonic voltage dq component construction flow 800 in the off-grid operation mode. At this step, let the capacitor voltage in the single-phase full-bridge converter be the alpha voltage component, 0 be the beta voltage component, and combine the alpha voltage component and the beta voltage component into an inverted voltage alpha beta phasor. Specifically, the inverted output voltage (i.e., the capacitor voltage u c in the single-phase full-bridge converter) is regarded as the voltage α component u α, the quadrature component u β is made 0, and further, u α and u β are combined into the inverted voltage αβ phasor u αβ. Next, the construction flow 800 performs a process of inverting the construction of the output fundamental voltage dq component, and the construction flow 800 then performs step S820. At this step, the inverting voltage αβ phasors are subjected to a difference operation with the first superimposed voltage phasors and the second superimposed voltage phasors, respectively, to generate positive and negative sequence fundamental voltage phasors of the αβ coordinate system, respectively. Specifically, to decouple the inverting output positive and negative sequence fundamental voltages from the negative and positive sequence fundamental voltages and other n-order harmonic voltages, u αβ is coupled with the first superimposed voltage phasor signalAnd a second superimposed voltage phasor signalThe differences are made to generate positive sequence fundamental voltage phasors u αβ1P and negative sequence fundamental voltage phasors u αβ1N, respectively, of the αβ coordinate system.
Next, the construction flow 800 executes step S821. At this step, the positive and negative sequence fundamental voltage phasors of the αβ coordinate system are respectively Park-converted to generate positive and negative sequence fundamental voltage dq phasors, respectively, and positive and negative sequence fundamental voltage dq components are obtained from the positive and negative sequence fundamental voltage dq phasors. Specifically, the positive sequence fundamental voltage phasor u αβ1P and the negative sequence fundamental voltage phasor u αβ1N of the αβ coordinate system generated in step S820 are respectively subjected to Park conversion processing with rotation angles ω and- ω to generate positive sequence fundamental voltage phasor u dq1P of the dq coordinate system and negative sequence fundamental voltage phasor u dq1N of the dq coordinate system, respectively, wherein the positive sequence fundamental voltage phasor u dq1P is split into a positive sequence fundamental voltage d-axis component u d1P and a q-axis component u q1P, and the negative sequence fundamental voltage phasor u dq1N is split into a negative sequence fundamental voltage d-axis component u d1N and a q-axis component u q1N.
Subsequently, the construction flow 800 proceeds to step S822. At this step, the positive and negative sequence fundamental voltage dq phasors are respectively low-pass filtered and then respectively inverse Park transformed to generate the positive and negative sequence fundamental voltage phasors of the filtered αβ coordinate system, respectively. Specifically, u dq1P and u dq1N generated in step S821 are respectively filtered by a low-pass filter F (S) to obtain positive-order fundamental voltage phasors in the dq coordinate system after filteringAnd negative sequence fundamental voltage phasorsAnd then will be againAndRespectively carrying out inverse Park conversion treatment with rotation angle frequencies omega 0 and-omega 0; finally, respectively obtaining positive sequence fundamental wave voltage phasors under the alpha beta coordinate system after filteringAnd negative sequence fundamental voltage phasors
According to fig. 8, the construction flow 800 may also perform steps S830, S831, S832 in parallel with steps S820, S821, S822 to implement the inverted output positive and negative sequence n-order harmonic voltage dq component construction. The process of constructing the dq component is similar to the process of generating the positive and negative sequence fundamental voltage dq component described above. The difference between them is that: the rotation angle frequency of the anti-rotation transformation in the construction process of the positive and negative sequence n-order harmonic voltage dq component is +/-nω 0 respectively, and each module and signal are numbered correspondingly for distinguishing. The same generation principle and flow are detailed in the foregoing, and are not repeated here.
As can be seen from the above-mentioned construction process of the inversion output fundamental voltage and the nharmonic voltage dq component in the off-grid operation mode, the present invention skillfully designs the decoupling process of each "branch" and "other branches" in fig. 9, where the first to n+1th superimposed voltage phasor signals are the sum of the outputs of the other branches, respectively, where n is a natural number greater than or equal to 3.
Fig. 10 is a flowchart showing a process of performing voltage outer loop control on positive and negative sequence fundamental and n-order harmonic voltage dq components according to an embodiment of the present invention; fig. 11 is a schematic diagram illustrating a single-phase stored energy PCS off-grid mode control process according to an embodiment of the invention. It will be appreciated that fig. 11 and fig. 10 are both control methods describing the off-grid operation mode of the single-phase energy storage PCS of the present invention, and that the schematic diagram 1100 of fig. 11 is a specific embodiment of the flowchart 1000 of fig. 10. The operation principle and flow of the control method of the present invention for performing the voltage outer loop control process on the positive and negative sequence fundamental and n-order harmonic voltage dq components in the off-grid operation mode will be described with reference to fig. 10 and 11.
As shown in fig. 10 and 11, the control method of the present invention starts in step S1010 with a voltage outer loop control flow 1000 for executing positive and negative sequence fundamental and n-order harmonic voltage dq components in the off-grid operation mode. At this step, the positive-sequence fundamental voltage d-axis and q-axis components are subjected to a difference operation with the first d-axis voltage command signal and the first q-axis voltage command signal, respectively, to generate a first d-axis voltage difference signal and a first q-axis voltage difference signal, respectively. Specifically, u d1P and u q1P obtained in step S821 are respectively used as feedback signals of the control loop for inverting and outputting the d-axis component and the q-axis component of the positive-sequence fundamental wave voltage, and are respectively combined with the first d-axis voltage command signalAnd a first q-axis voltage command signalDifferencing to generate a first d-axis voltage difference signal and a first q-axis voltage difference signal, respectively, where the command signalAndProvided by an energy management unit of the micro-grid system, can be provided withU m is the magnitude of the voltage command.
Next, the control flow 1000 executes step S1011. At this step, the first d-axis voltage difference signal and the first q-axis voltage difference signal are respectively subjected to proportional-integral operation to generate a first d-axis voltage control signal and a first q-axis voltage control signal, respectively. Specifically, the first d-axis voltage difference signal and the first q-axis voltage difference signal are processed by PI controllers W d1P and W q1P, respectively, to generate a first d-axis voltage control signal W d1P and a first q-axis voltage control signal W q1P, respectively. Next, the control flow 1000 advances to step S1012. At this step, the first d-axis voltage control signal and the first q-axis voltage control signal are respectively subjected to inverse Park transformation to generate a first voltage α -axis alternating current component and a first voltage β -axis alternating current component, respectively. Specifically, w d1P and w q1P generated in step S1011 are subjected to inverse Park transformation processing by an inverse Park transformation module dq/αβ, respectively, so as to generate a first voltage α -axis alternating current component w α1P and a first voltage β -axis alternating current component w β1P, respectively, where the rotation angle frequency of the inverse rotation transformation is ω 0.
Further, the control flow 1000 executes step S1013. At this step, a difference operation is performed between the first voltage α -axis alternating current component and the inductor current in the single-phase full-bridge inverter, and a proportional control adjustment is performed to generate an inductor current control signal. Specifically, the first voltage α -axis ac component w α1P is first used as a command signal for the control loop, and the difference operation is performed with the current i 1 of the inductor L 1 in the single-phase full-bridge converter. The result of this differencing operation is then adjusted by proportional controller C P to generate inductor current control signal v α1. It is understood that step S1013 may also be considered as a process of performing current inner loop control on the inductor current in the single-phase full-bridge inverter.
According to fig. 10, the construction flow 1000 may execute step S1020 in parallel with step S1010. At this step, the negative sequence fundamental voltage d-axis and q-axis components are subjected to a difference operation with the second d-axis voltage command signal and the second q-axis voltage command signal, respectively, to generate a second d-axis voltage difference signal and a second q-axis voltage difference signal, respectively. Specifically, u d1N and u q1N obtained in step S821 are respectively used as feedback signals of the control loop for inverting and outputting the d-axis component and the q-axis component of the negative-sequence fundamental wave voltage, and are respectively combined with the second d-axis voltage command signalAnd a second q-axis voltage command signalDifferencing to generate a second d-axis voltage difference signal and a second q-axis voltage difference signal, respectively, where the command signalAndMay be provided by an energy management unit of the micro grid system and provided with
Next, the control flow 1000 executes step S1021. At this step, proportional-integral operation is performed on the second d-axis voltage difference signal and the second q-axis voltage difference signal, respectively; to generate a second d-axis voltage control signal and a second q-axis voltage control signal, respectively. Specifically, the second d-axis voltage difference signal and the second q-axis voltage difference signal are processed by PI controllers W d1N and W q1N, respectively, to generate a second d-axis voltage control signal W d1N and a second q-axis voltage control signal W q1N, respectively. Next, the control flow 1000 advances to step S1022. At this step, the second d-axis voltage control signal and the second q-axis voltage control signal are respectively subjected to inverse Park transformation to generate a second voltage α -axis alternating current component and a second voltage β -axis alternating current component, respectively. Specifically, w d1N and w q1N generated in step S1021 are subjected to inverse Park transformation processing by an inverse Park transformation module dq/αβ, respectively, so as to generate a second voltage α -axis alternating current component w α1N and a second voltage β -axis alternating current component w β1N, respectively, where the rotation angular frequency of the inverse rotation transformation is- ω 0.
As shown in fig. 10, the construction flow 1000 may also execute steps S1130, S1131, S1132 and steps S1140, S1141, S1142 in parallel with executing steps S1120, S1121, S1122 to implement the voltage outer loop control on the positive and negative sequence n-order harmonic voltage dq components, respectively. The principles and processes of steps S1130 to S1132 and steps S1140 to S1142 are similar to those of steps S1120 to S1122, and are not repeated here. The difference is that: the rotation angle frequency of the anti-rotation transformation in steps S1130-S1132 is nω 0, the rotation angle frequency of the anti-rotation transformation in steps S1140-S1142 is-nω 0, and the modules and signals are renumbered for distinction. In order to eliminate the n-order harmonic of the inverted output voltage, the command signal may be usedAndAre all set to 0.
Finally, the flow 1000 of the present invention, which performs the voltage outer loop control process on the positive and negative sequence fundamental and n-order harmonic voltage dq components, terminates at step S1050. At this step, a summing operation is performed on the inductor current control signal, the second voltage α -axis ac component, the nth voltage α -axis ac component, and the n+1th voltage α -axis ac component to generate a modulated signal in the single-phase stored energy PCS off-grid mode. Specifically, the inductor current control signal v α1 generated in step S1013, the second voltage α -axis ac component w α1N generated in step S1022, the nth voltage α -axis ac component w αnP generated in step S1032, and the n+1th voltage α -axis ac component w αnN generated in step S1042 are subjected to a summation operation to generate the modulated signal v s in the single-phase stored energy PCS off-grid mode.
Based on the above description, it is to be understood that the present invention has been described for exemplary and concise purposes only as to the brief steps of a control method for a single-phase energy storage PCS, but the control method for a single-phase energy storage PCS may additionally include other steps according to different application scenarios. In addition, based on the above description, those skilled in the art will appreciate that the above control method for a single-phase energy storage PCS of the present invention may be implemented with the aid of hardware or software instructions. Therefore, when the control method of the energy storage PCS is completed through hardware, the invention also discloses a novel single-phase energy storage PCS, and the PCS can comprise an inverter bridge, an LC filter, a network side base wave current and harmonic current dq component construction module, an inverter output base wave voltage and harmonic voltage dq component construction module, a grid-connected mode control module, an off-grid mode control module and the like. In the working process of the novel single-phase energy storage PCS, the control method is utilized to respectively control the modules and the units, so that the novel energy storage PCS outputs high-quality electric energy to a load. On the other hand, when the control method of the energy storage PCS is completed by software, the invention also discloses a computer readable storage medium, on which program instructions for controlling the single-phase energy storage PCS are stored, which when executed by a processor, cause the implementation of the aforementioned control method for the single-phase energy storage PCS.
It should be understood that when the terms "first," "second," "third," and "fourth," etc. are used in the claims, the specification and the drawings of the present invention, they are used merely for distinguishing between different objects and not for describing a particular sequential order. The terms "comprises" and "comprising" when used in the specification and claims of the present invention are taken to specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification and claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should be further understood that the term "and/or" as used in the present specification and claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in this specification and the claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
Although the embodiments of the present invention are described above, the descriptions are merely examples for facilitating understanding of the present invention, and are not intended to limit the scope and application of the present invention. Any person skilled in the art can make any modification and variation in form and detail without departing from the spirit and scope of the present disclosure, but the scope of the present disclosure is defined by the appended claims.

Claims (2)

1. A control method for a single-phase stored energy PCS, wherein the single-phase stored energy PCS comprises a battery, a single-phase full-bridge inverter, a power grid and a load, characterized in that the control method comprises a grid-connected control method and an off-grid control method, wherein
The grid-connected control method comprises grid-side current control and capacitor voltage feedforward control, wherein
The grid-side current control includes:
Constructing fundamental wave and n-order harmonic current dq components of the grid-side current so as to generate positive and negative sequence fundamental wave current dq components and positive and negative sequence n-order harmonic current dq components; and
Respectively performing closed-loop control on the positive and negative sequence fundamental current dq components and the positive and negative sequence n-order harmonic current dq components so as to generate a current closed-loop control output signal;
the capacitive voltage feedforward control includes:
weighting and feedforward processing are carried out on the capacitor voltage in the single-phase full-bridge converter; and
Performing a difference operation on the capacitor voltage subjected to the weighted sum feedforward processing and the current closed-loop control output signal so as to generate a modulation signal in the single-phase energy storage PCS grid-connected mode;
the off-grid control method comprises the following steps:
constructing fundamental wave and n-order harmonic voltage dq components of the inversion output voltage so as to generate positive and negative sequence fundamental wave voltage dq components and positive and negative sequence n-order harmonic voltage dq components; and
Performing voltage outer loop control on the positive and negative sequence fundamental and n-order harmonic voltage dq components to generate a modulation signal in the single-phase energy storage PCS off-grid mode,
Wherein the constructing the fundamental wave and the n-harmonic current dq component of the grid-side current comprises:
let the net side current be the alpha current component, 0 be the beta current component, merge the alpha current component and the beta current component into net side current alpha beta phasor;
performing a difference operation on the grid-side current alpha beta phasors and the first superposition current phasors and the second superposition current phasors respectively to generate positive and negative sequence fundamental current phasors of an alpha beta coordinate system respectively;
respectively performing Park conversion on positive and negative sequence fundamental wave current phasors of the alpha beta coordinate system to respectively generate positive and negative sequence fundamental wave current dq phasors, and acquiring positive and negative sequence fundamental wave current dq components from the positive and negative sequence fundamental wave current dq phasors;
respectively carrying out low-pass filtering and inverse Park conversion on the positive and negative sequence fundamental wave current dq phasors to respectively generate positive and negative sequence fundamental wave current phasors of a filtered alpha beta coordinate system; the positive and negative sequence fundamental wave current phasors of the alpha beta coordinate system are respectively AndAnd
Performing a difference operation on the grid-side current alpha beta phasors and the n-th superposition current phasor and the n+1-th superposition current phasor respectively to generate positive and negative sequence n-th harmonic current phasors of an alpha beta coordinate system;
Respectively performing Park conversion on positive and negative sequence n-order harmonic current phasors of the alpha beta coordinate system to respectively generate positive and negative sequence n-order harmonic current dq phasors, and acquiring positive and negative sequence n-order harmonic current dq components from the positive and negative sequence n-order harmonic current dq phasors; and
Respectively carrying out low-pass filtering and anti-Park conversion on the positive and negative sequence n-order harmonic current dq phasors to respectively generate positive and negative sequence n-order harmonic current phasors of an alpha beta coordinate system after filtering; the positive and negative sequence n-order harmonic current phasors of the alpha beta coordinate system are respectivelyAnd
Wherein performing closed loop control on the positive and negative sequence fundamental current dq components and the positive and negative sequence n-order harmonic current dq components respectively includes:
performing a difference operation on the positive sequence fundamental current d-axis and q-axis components with the first d-axis current command signal and the first q-axis current command signal, respectively, to generate a first d-axis current difference signal and a first q-axis current difference signal, respectively;
performing proportional-integral operation on the first d-axis current difference signal and the first q-axis current difference signal respectively to generate a first d-axis current control signal and a first q-axis current control signal respectively;
performing inverse Park transformation on the first d-axis current control signal and the first q-axis current control signal, respectively, to generate a first current α -axis alternating current component and a first current β -axis alternating current component, respectively;
Performing a difference operation on the negative sequence fundamental current d-axis and q-axis components with the second d-axis current command signal and the second q-axis current command signal, respectively, to generate a second d-axis current difference signal and a second q-axis current difference signal, respectively;
performing proportional-integral operation on the second d-axis current difference signal and the second q-axis current difference signal respectively to generate a second d-axis current control signal and a second q-axis current control signal respectively;
Performing inverse Park transformation on the second d-axis current control signal and the second q-axis current control signal, respectively, to generate a second current α -axis alternating current component and a second current β -axis alternating current component, respectively;
Performing a difference operation on the positive-sequence n-order harmonic current d-axis component and the q-axis component with an nth d-axis current command signal and an nth q-axis current command signal, respectively, to generate an nth d-axis current difference signal and an nth q-axis current difference signal, respectively;
respectively performing proportional integral operation on the nth d-axis current difference signal and the nth q-axis current difference signal to respectively generate an nth d-axis current control signal and an nth q-axis current control signal;
Performing inverse Park transformation on the nth d-axis current control signal and the nth q-axis current control signal respectively to generate an nth current alpha-axis alternating component and an nth current beta-axis alternating component respectively;
Performing a difference operation on the negative-sequence n-order harmonic current d-axis component and q-axis component with the n+1th d-axis current command signal and the n+1th q-axis current command signal to generate an n+1th d-axis current difference signal and an n+1th q-axis current difference signal, respectively;
Respectively performing proportional integral operation on the n+1th d-axis current difference signal and the n+1th q-axis current difference signal to generate an n+1th d-axis current control signal and an n+1th q-axis current control signal respectively;
Performing inverse Park transformation on the n+1th d-axis current control signal and the n+1th q-axis current control signal, respectively, to generate an n+1th current α -axis alternating current component and an n+1th current β -axis alternating current component, respectively; and
Performing a summation operation on the first, second, nth and n+1th current alpha-axis alternating components to generate the current closed-loop control output signal;
Wherein the constructing the inverted output voltage by the fundamental wave and the n-order harmonic voltage dq component includes:
The capacitor voltage in the single-phase full-bridge converter is made to be an alpha voltage component, 0 is made to be a beta voltage component, and the alpha voltage component and the beta voltage component are combined to form an inversion voltage alpha beta phasor;
Performing a difference operation on the inverted voltage alpha beta phasors and the first superimposed voltage phasors and the second superimposed voltage phasors respectively to generate positive and negative sequence fundamental voltage phasors of an alpha beta coordinate system respectively;
Respectively performing Park conversion on positive and negative sequence fundamental voltage phasors of the alpha beta coordinate system to respectively generate positive and negative sequence fundamental voltage dq phasors, and acquiring positive and negative sequence fundamental voltage dq components from the positive and negative sequence fundamental voltage dq phasors; and
Respectively carrying out low-pass filtering on the positive and negative sequence fundamental wave voltage dq phasors, and then respectively carrying out inverse Park conversion to respectively generate positive and negative sequence fundamental wave voltage phasors of an alpha beta coordinate system after filtering; the positive and negative fundamental voltage phasors of the alpha beta coordinate system are respectivelyAndAnd
Performing a difference operation on the inverted voltage alpha beta phasors and the n-th superimposed voltage phasor and the n+1-th superimposed voltage phasor respectively to generate positive and negative sequence n-th harmonic voltage phasors of an alpha beta coordinate system;
Respectively performing Park conversion on positive and negative sequence n-order harmonic voltage phasors of the alpha beta coordinate system to respectively generate positive and negative sequence n-order harmonic voltage dq phasors, and acquiring positive and negative sequence n-order harmonic voltage dq components from the positive and negative sequence n-order harmonic voltage dq phasors; and
Respectively carrying out low-pass filtering on the positive and negative sequence n-order harmonic voltage dq phasors, and then respectively carrying out inverse Park conversion to respectively generate positive and negative sequence n-order harmonic voltage phasors of an alpha beta coordinate system after filtering; the positive and negative sequence n-order harmonic voltage phasors of the alpha beta coordinate system are respectivelyAnd
The performing voltage outer loop control of the positive and negative sequence fundamental and n-order harmonic voltage dq components includes:
Performing a difference operation on the positive-sequence fundamental voltage d-axis and q-axis components with the first d-axis voltage command signal and the first q-axis voltage command signal, respectively, to generate a first d-axis voltage difference signal and a first q-axis voltage difference signal, respectively;
Performing proportional-integral operation on the first d-axis voltage difference signal and the first q-axis voltage difference signal respectively to generate a first d-axis voltage control signal and a first q-axis voltage control signal respectively;
performing inverse Park conversion on the first d-axis voltage control signal and the first q-axis voltage control signal, respectively, to generate a first voltage α -axis alternating current component and a first voltage β -axis alternating current component, respectively;
Performing a difference operation on the first voltage alpha-axis alternating current component and an inductor current in the single-phase full-bridge converter, and performing proportional control adjustment to generate an inductor current control signal; and
Performing a difference operation on the negative sequence fundamental voltage d-axis and q-axis components with the second d-axis voltage command signal and the second q-axis voltage command signal, respectively, to generate a second d-axis voltage difference signal and a second q-axis voltage difference signal, respectively;
Respectively performing proportional integral operation on the second d-axis voltage difference signal and the second q-axis voltage difference signal; to generate a second d-axis voltage control signal and a second q-axis voltage control signal, respectively;
performing inverse Park conversion on the second d-axis voltage control signal and the second q-axis voltage control signal, respectively, to generate a second voltage α -axis alternating current component and a second voltage β -axis alternating current component, respectively; and
Performing a difference operation on the positive-order n-order harmonic voltage d-axis component and the q-axis component with the nth d-axis voltage command signal and the nth q-axis voltage command signal, respectively, to generate an nth d-axis voltage difference signal and an nth q-axis voltage difference signal, respectively;
respectively performing proportional integral operation on the nth d-axis voltage difference signal and the nth q-axis voltage difference signal to respectively generate an nth d-axis voltage control signal and an nth q-axis voltage control signal;
Performing inverse Park conversion on the nth d-axis voltage control signal and the nth q-axis voltage control signal respectively to generate an nth voltage alpha-axis alternating current component and an nth voltage beta-axis alternating current component respectively; and
Performing a difference operation on the negative-sequence n-order harmonic voltage d-axis component and the q-axis component with the n+1th d-axis voltage command signal and the n+1th q-axis voltage command signal to generate an n+1th d-axis voltage difference signal and an n+1th q-axis voltage difference signal, respectively;
Respectively performing proportional integral operation on the n+1th d-axis voltage difference signal and the n+1th q-axis voltage difference signal to generate an n+1th d-axis voltage control signal and an n+1th q-axis voltage control signal respectively;
Performing inverse Park conversion on the n+1th d-axis voltage control signal and the n+1th q-axis voltage control signal, respectively, to generate an n+1th voltage α -axis alternating current component and an n+1th voltage β -axis alternating current component, respectively; and
Performing a summation operation on the inductor current control signal, the second voltage alpha-axis alternating current component, the nth voltage alpha-axis alternating current component and the (n+1) th voltage alpha-axis alternating current component so as to generate a modulation signal in the single-phase energy storage PCS off-grid mode;
the first superimposed voltage phasor is The second superimposed voltage phasor isThe n-th superimposed voltage phasor isThe n+1th superimposed voltage phasor is
The first superimposed current phasor isThe second superimposed current phasor isThe n-th superimposed current phasor isThe n+1th superimposed current phasor is
2. A computer readable storage medium having stored thereon program instructions for controlling a single-phase stored energy PCS, which when executed by a processor, cause the control method of claim 1 to be implemented.
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CN113765137A (en) * 2020-06-03 2021-12-07 台达电子企业管理（上海）有限公司 Control method and device of three-phase alternating current system

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