CN117608505A - Graphical display method and graphical display device - Google Patents

Abstract

The invention discloses a graphic display method and a graphic display device, which belong to the technical field of embedded graphic display and comprise the following steps of 1) establishing a functional operation interface hardware layer and a graphic display hardware layer in a display engine; 2) Executing a graphical display function on the functional operation interface hardware layer and the graphical display hardware layer; 3) The functional operation interface hardware layer and the graphical display hardware layer are integrated by the display engine and then displayed on the display device; the functional operation interface hardware layers and the graphical display hardware layers are arranged in a stacking way up and down; the functional operation interface hardware layer is used for displaying interactive images for user operation, and the graphical display hardware layer is used for displaying equipment, equipment states and backgrounds. The invention reduces the cost of the embedded graphic display device product by the display application scheme and the high-efficiency graphic calculation method realized by the low-cost hardware in 2 hardware layers.

Description

Graphical display method and graphical display device

Technical Field

The present invention relates to the field of embedded graphics display technology, and in particular, to a graphics display method and a graphics display device.

Background

The demand for graphic display devices in the industrial control market is increasing, and the following two schemes are generally adopted in the common products at present.

The first scheme is a windows plus Inter platform industrial personal computer scheme. This solution is based on processor products (e.g., J1900) developed by intel corporation for the field of industrial computers and Windows operating system by microsoft corporation. The method has the advantages that the operation system is popular, the operation is simple, the memory and hard disk space are large, the graphic data processing capability of the GPU processor is high, and the GPU processor is commonly used for a high-end graphic display device, wherein the GPU can accelerate graphic calculation and display, and is very suitable for meeting the requirements of graphic display. However, the open system is adopted, viruses are easy to infect, the safety is problematic, sensitive data is easy to leak, only the finished product of the main board, the memory bank, the hard disk and other hardware can be purchased when the product is manufactured, the common interface customization requirement of the embedded product can not be realized rapidly, and the price of the whole product is very high.

The second scheme is a linux plus arm platform industrial personal computer scheme. This scheme is based on a multi-core arm processor and an embedded linux operating system, where the arm processor needs to be GPU-equipped. The scheme is very similar to the scheme of a windows plus Inter platform industrial personal computer on the whole, but a circuit board can be automatically designed according to the product requirement, and the cost is effectively controlled. However, at the same time, the defects are obvious, and the multi-core arm processor and the peripheral device mostly adopt high-speed signals for communication, 4 layers or even more layers of pcb design are needed, so that the hardware design difficulty is high; secondly, the inside of the multi-core arm processor is basically not integrated with the srram and the ddr, but is connected with the ddr with large capacity (more than 256 MB) in an outward expansion mode to meet the requirements of GPU, graphic open source library and the like on the memory capacity, so that the cost is increased; thirdly, the multi-core arm processor basically needs external expansion capacity storage (more than 256 MB), the capacity is large, the price is high, and most graphic display device products do not need the storage with large capacity, so that the cost is wasted.

Therefore, both of the conventional solutions have a problem of high equipment cost, and the problem of cost is gradually the biggest problem that users need to consider when using graphic display devices on a large scale.

Disclosure of Invention

The invention aims to provide a graphical display method and a graphical display device, which solve the performance problem of graphical display by utilizing a high-efficiency graphical algorithm based on a single-core arm processor with a display engine and assisting the characteristic of high-speed mixed display of the display engine and a hardware image layer thereof.

In order to achieve the above purpose, the technical scheme of the invention is as follows:

a graphical display method comprising the steps of: step S1, a functional operation interface hardware layer and a graphical display hardware layer are established in a display engine; step S2, executing a graphical display function on the functional operation interface hardware layer and the graphical display hardware layer; step S3, the functional operation interface hardware layer and the graphical display hardware layer are integrated by the display engine and then displayed on the display device; the functional operation interface hardware layers and the graphical display hardware layers are arranged in a vertically stacked mode, the functional operation interface hardware layers are close to a user, and the graphical display hardware layers are far away from the user; the functional operation interface hardware layer is used for displaying interactive images for user operation, and the graphical display hardware layer is used for displaying equipment, equipment states and backgrounds.

In the graphical display method, the functional operation interface hardware layer and the operation interface of the graphical display hardware layer comprise applying for distributing the layer interface, updating the hardware layer interface and releasing the hardware layer interface.

The executing step of the application for distributing the layer interface comprises the following steps of S11, calculating the size of a buffer area required for specification according to the layer width, the layer height and the ARGB single pixel byte number, wherein the stacking sequence between the layers is determined by the z-axis index number of the layer; step S12, applying a hardware layer data structure space in the stack, storing a layer X-axis starting point coordinate, a layer Y-axis starting point coordinate, a layer width, a layer height, a layer z-axis index number, a display buffer address and an operation buffer address in the hardware layer data structure, and setting a check field as 0xF0F1; step S13, notifying the display engine to enable the hardware layer designated by the layer z-axis index number; and step S14, returning the hardware layer data structure body address applied in the heap as a hardware layer handle value.

The step of updating the hardware layer interface includes the step S21 of converting the input hardware layer handle into a hardware layer data structure; step S22, checking whether the check field is 0xF0F1, and if not, exiting; step S23, checking the number of the failure areas in the failure area list, if the number of the failure areas is equal to 0, completely copying the buffer area to a display buffer area pointed in a hardware layer data structure body, and refreshing the image data of the whole visible area; step S24, if the number of the failure areas is greater than 0, the information of the failure areas is taken out one by one, and the image data corresponding to the failure areas on the buffer areas are copied to the areas with the same display buffer areas pointed in the hardware layer data structure body; step S25, the display engine is informed that the display buffer area is updated, and the display content is refreshed immediately according to the layer X-axis starting point coordinate, the layer Y-axis starting point coordinate, the layer width and the layer height parameters in the current hardware layer data structure body.

The execution step of releasing the hardware layer interface includes step S31, converting the input hardware layer handle into a hardware layer data structure; step S32, checking whether the check field is 0xF0F1, and if not, exiting; step S33, releasing the drawing buffer; step S34, releasing the display buffer.

The initializing step of the graphical display function by using the operation interface includes step S41, obtaining the pixel width of the current display device as the layer width; step S42, acquiring the pixel height of the current display device as the layer height; step S43, setting the background color of the display engine; step S44, a layer is allocated for the execution application of the function operation interface, and a hardware layer handle of the function operation interface is obtained; step S45, a layer is allocated for executing application of the device state refreshing function, and a device state hardware layer handle is obtained; step S46, a layer is allocated for the device function execution application, and a device hardware layer handle is obtained; step S47, a layer is allocated for the background function execution application, and a device hardware layer handle is obtained.

The step of updating the functional operation interface hardware layer includes step S51 of checking whether the functional operation interface management module needs to update the failure area, and ending the operation if the failure area does not exist; step S52, a drawing buffer area and a failure area list of the functional operation interface module are obtained; step S53, executing updating of the hardware layer area; in step S54, the functional operation interface module marks that the currently changed failure area has been updated.

The step of updating the graphical display hardware layer includes step S61, marking the full area refresh flag as 0; step S62, setting a global invalidation buffer list to be empty; step S63, checking whether the background module has an un-updated failure area, and if not, jumping to step S65; step S64, if the background module has an un-updated failure area, updating the graphic display buffer area by using the drawing function of the background module, and marking the full area refresh mark as 1; step S65, checking a full-area refreshing mark, if the full-area refreshing mark is equal to 1, completely updating the graphic display buffer area by using the drawing function of the device display module, and jumping to step S67; step S66, executing a local update checking function of the equipment module, if the local update checking function is changed, locally updating the graphical display buffer area, and geometrically merging a failure area list of the equipment display module with the global failure buffer area list; step S67, checking the full-area refreshing mark, if the full-area refreshing mark is equal to 1, completely updating the graphic display buffer area by using the drawing function of the equipment state display module, and jumping to step S69; step S68, executing a local update checking function of the equipment state display module, if the equipment state display module has a change, locally updating the graphical display buffer area, and geometrically merging a failure area list of the equipment state display module with the global failure buffer area list; step S69, the updating of the hardware layer area is performed.

In the graphical display method, the executing the graphical display function includes designating a background color, designating a background bitmap or a vector diagram, designating a device to display a device image at a specific two-dimensional coordinate position of a display device, dynamically designating a current state of the display device and displaying a corresponding device state image at the specific two-dimensional coordinate position of the display device, translating a graphical display area, and zooming the graphical display area.

And a graphic display device using the graphic display method described in the above.

The graphic display method and the graphic display device have the beneficial effects that the cost of the embedded graphic display device products is reduced by the low-cost hardware through the display application scheme and the high-efficiency graphic calculation method realized by 2 hardware layers, and the products with similar effects are realized by the cost of 10% -20% of the linux plus arm platform industrial personal computer scheme, so that the cost of the graphic display device is greatly reduced. The memory can be precisely controlled by matching with an efficient graphic algorithm, and the product requirement can be completely met. The method can realize more accurate control of the storage capacity of the memory without using linux operation, and can select the memory with proper capacity according to the final result of product development so as to optimize the product cost.

In order to make the above features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

FIG. 1 is a functional schematic of a display engine and hardware layers.

Fig. 2 is a schematic diagram of a general display effect of the graphic display device.

Fig. 3 is a functional diagram of dividing a display function of a graphic display device into 4 hardware layers.

Fig. 4 is a functional diagram of dividing a display function of a graphic display device into 2 hardware layers.

Detailed Description

In order to make the purpose and technical solutions of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. It will be apparent that the described embodiments are some, but not all, embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without creative efforts, based on the described embodiments of the present invention fall within the protection scope of the present invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The directional terms mentioned in the following embodiments are, for example: upper, lower, left, right, front, rear, bottom, top, etc., are only with reference to the directions of the attached drawings. Accordingly, the directional terminology is used for purposes of illustration and is not intended to be limiting of the invention.

In practical use, for a graphic display device, there are mainly the following basic requirements in performing a graphic display function: 1. a specified background color (i.e., the color of the graphical display area without any display content) is supported. 2. A specified background bitmap or vector map (vector map is mostly a building plan) is supported. 3. The display device image is supported to be displayed by the specified device at the specific two-dimensional coordinate position of the display device. 4. And supporting the dynamic specification of the current state of the equipment, and displaying corresponding equipment state images at specific two-dimensional coordinate positions of the display equipment. 5. Support panning and zooming the graphical display area.

The Display Engine (Display Engine) integrated in the arm chip is mainly responsible for unified management of the hardware layers, and is generally used for video player products. Most display engines support 2, 4 or more hardware layers, which are layered, with the upper layer closest to the user and the bottom layer furthest from the user. Fig. 1 is a functional schematic diagram of a display engine and hardware layers, as shown in fig. 1, when 4 hardware layers are adopted, the hardware layers 0 to 3 are arranged in a stacked manner from bottom to top, the hardware layer 3 is nearest to a user, the hardware layer 0 is farthest from the user, and the hardware layers 0 to 3 are integrated by the display engine and then displayed on a display device.

The hardware layer supports the image data of the pixels in the ARGB format, wherein each pixel uses 4 bytes to respectively store an A channel, an R channel, a G channel and a B channel (the value range of each byte is 0-255) in the image data. The values of the R, G, and B channels together determine the color of a pixel, while the a channel value determines the transparency of the pixel (0 is completely transparent, 255 is opaque). One way that the pixels of a non-upper layer can be fully seen by the user is to change the channel value of pixel a to be fully transparent (i.e., the a channel value is set to 0) at the same location of the other layers that are overlaid on the layer. Each hardware layer has two properties, namely a layer width and a layer height, wherein the layer width represents the number of pixels forming one row on the display device, the layer height represents the number of pixels forming one column on the display device, and the layer width and the layer height are generally set to be the same as the pixel width and the pixel height of the display device. Fig. 2 is a schematic diagram of a general display effect of the graphic display apparatus, in which, in an example, the value of a channel a of other pixels except for the area where the image is drawn is 0, so that the image after the images of the hardware layer 0 to the hardware layer 3 are superimposed can be displayed on the display device.

Each hardware layer needs to allocate 2 display buffers for alternate display, one for the current display and the other for content modification by the user. By sending a hardware control instruction to the display engine, the display engine can automatically refresh the display buffer of the designated hardware layer and complete the transmission operation of the display data to the display device. Therefore, a calculation formula of the memory demand capacity of the hardware layer for storing the display data is as follows:

layer buffering requirements = layer width x layer height x number of bytes of a single pixel

Single hardware layer cache demand = 2 x layer cache demand

Total memory usage for all hardware layers = number of enabled hardware layers x single hardware layer cache demand

The partial display engine allows to enable and specify a background color that is independent of all hardware layers, i.e. the color seen on the display device when all layers are not enabled, or all pixels for which layers have been enabled are completely transparent.

Generally, the operation steps of modifying the display contents of a single hardware layer by a conventional memory operation and displaying on a display device are as follows.

Step A1, a drawing buffer area of a designated hardware layer is obtained.

And step A2, finishing all image drawing operations in the drawing buffer area.

And step A3, copying the pixel data of the drawing buffer area to the display buffer area.

And step A4, sending a hardware layer video memory updating instruction to the display engine.

And step A5, the display engine executes the display cache validation operation of the hardware layer.

And step A6, the display engine performs superposition processing on the multi-layer data and sends the image data in the appointed format to the display equipment.

Step A7, the display device displays the image data.

The step A2 and the step A3 in the operation steps are key to influencing the performance.

The general drawing process of the graphic display function display scene supporting dynamic change is as follows.

Step B1, each pixel of the drawing buffer is set to a specific background color.

And step B2, drawing a background image (including vector graphic drawing) representing the geographic position or scene of the equipment in a drawing buffer area.

And step B3, drawing each device image in the drawing buffer area according to the screen two-dimensional coordinates of each device.

And step B4, drawing each device state image with the state in the drawing buffer area according to the two-dimensional coordinates of the screen of each device state.

And step B5, drawing the functional operation interface in the drawing buffer area.

And step B6, submitting the drawing buffer area to display equipment for display (displaying a user operation interface, and realizing user interaction by matching with a touch screen).

The process has simple logic implementation, and the same set of logic is used when the graphic display area needs to be refreshed due to operations such as initialization display, translation, scaling, equipment state change and the like. The implementation logic can obtain better execution effect on a multi-core arm chip and an x86 chip with higher performance, but the execution on a single-core arm chip with low cost can cause serious problems such as screen blocking, low system operation efficiency and the like.

The amount of processing data for the general rendering process is now measured by a refresh pixel ratio formula, with smaller refresh pixel ratios representing faster processing speeds. The formula is as follows:

refresh pixel ratio = sum of number of pixels of current drawing +.number of pixels of single display buffer +.

When the refresh pixel ratio is equal to 0, no refresh requirement exists in the current state, and no CPU resource is occupied. When the refresh pixel ratio is equal to 1.0, the time representing refreshing the current display data is approximately equal to the time refreshing the entire screen. When the refresh pixel ratio is greater than 1.0, this represents a situation in which repeated refreshes are performed on the same display area.

The sum of pixels of the general rendering process = number of display buffer pixels (i.e., each pixel of the reset buffer is a specific background color) +number of background image pixels (i.e., rendering a background image representing the geographic location or scene in which the device is located) +number of device image pixels × (i.e., rendering each device image) +number of device state image pixels × (i.e., rendering each device state image with state)

Refresh pixel ratio of general drawing procedure = (number of display buffer pixels+number of background image pixels+number of device state pixels×number of device state image pixels)/(number of display buffer pixels)

The result of the refresh pixel ratio of the general drawing process obtained by the above formula is always 1.0 or more.

When a Display Engine (Display Engine) based hardware layer is used to realize the graphic Display function of the graphic Display device, the function of the hardware layer needs to be planned according to the function requirement of a general product and the hardware layer merging capability of the Display Engine. Fig. 3 is a functional diagram of dividing a display function of a graphic display device into 4 hardware layers. As shown in fig. 3, if the display engine supports the hybrid display of 4 hardware layers, the hardware layers can be divided into 1 st layer and functional operation interface hardware layers according to the functions of the hardware layers from top to bottom; layer 2, device state hardware layer; layer 3, device hardware layer; and layer 4, background hardware layer.

Fig. 4 is a functional diagram of dividing a display function of a graphic display device into 2 hardware layers. As shown in fig. 4, if the display engine supports only the merged display of two hardware layers, the hardware layers may be divided into two layers, i.e., layer 1, the functional operation interface hardware layer, and layer 2, for graphically displaying the hardware layers according to the hardware layers from top to bottom. The functional operation interface hardware layer 1 is used for displaying interactive images for user operation, and the graphical display hardware layer 2 is used for displaying contents including equipment, equipment states and backgrounds.

It can be seen that the graphics function of conventional graphics display devices requires a maximum of 4 hardware layers, and that low cost single core arm chips with display engines on the market can be basically supported. The operation interfaces required by the hardware layers with different functions can be abstracted into the following three types:

1. applying for allocation of layer interfaces (layer X-axis start coordinates, layer Y-axis start coordinates, layer width, layer height, layer z-axis index, [ buffer address ]); return value: a hardware layer handle;

2. updating hardware layer interfaces (layer handles, buffer addresses, failure zone lists);

3. releasing the hardware layer interface (layer handle).

The execution flow of the three interfaces is as follows:

execution flow of application allocation layer interface:

step C1, starting;

and step C2, calculating the size of the buffer area required by the specification according to the layer width, the layer height and the ARGB single pixel byte number. Here, two buffers need to be applied, one for the display part needs to be applied in a Direct Memory Access (DMA) capable memory area, and the other buffer of the drawing buffer which is handed to the user for drawing operation is applied in a heap (heap); the z-axis index number of the layer determines the stacking sequence among layers, and is defined in the patent as that the larger the z-axis is, the closer the z-axis is to the user, the smaller the z-axis index is, the farther the z-axis index is from the user, and the layer with the larger z-axis index number is covered on the layer with the smaller z-axis index number.

The buffer address indicates that a memory image ARGB data space buffer area pointer which can be operated at any time and is applied in a heap (heel) is submitted to a user, so that the user can conveniently perform graphic operation on the buffer area according to the requirement;

step C3, applying a hardware layer data structure space in the stack, storing the layer X-axis starting point coordinate, the layer Y-axis starting point coordinate, the layer width, the layer height, the layer z-axis index number, the display buffer address and the operation buffer address in the hardware layer data structure, and setting a check field to be 0xF0F1;

step C4, notifying a Display Engine (Display Engine) to enable the hardware layer specified by the layer z-axis index number;

step C5, returning the address of the applied hardware layer data structure body in the heap as a hardware layer handle value;

and C6, ending.

The meaning of each parameter of the updated hardware layer interface is as follows, and the layer handle represents the handle returned by the application for distributing the layer interface; the buffer address represents the buffer address returned by the application allocation layer interface; the failure area list represents which areas in the image data described by the buffer address are failed, and each area is a rectangular area composed of four parameters, namely an area start point X coordinate, an area start point Y coordinate, an area width, and an area height.

The execution flow of the hardware layer interface is updated according to the area:

step D1, starting;

step D2, converting the input hardware layer handle into a hardware layer data structure body;

step D3, checking whether the check field is 0xF0F1, and if not, exiting;

step D4, checking the number of the failure areas in the failure area list, if the number of the failure areas is equal to 0, completely copying the buffer area to a display buffer area pointed in a hardware layer data structure body, and refreshing the image data of the whole visible area;

step D5, if the number of the failure areas is greater than 0, the information of the failure areas is taken out one by one, and image data corresponding to the failure areas on the buffer areas are copied to the areas with the same display buffer areas pointed in the hardware layer data structure body;

step D6, informing the display engine that the display buffer area is updated, and immediately refreshing the display content according to the layer X-axis starting point coordinate, the layer Y-axis starting point coordinate and the layer width and layer height parameters in the current hardware layer data structure;

and D7, ending.

Releasing the execution flow of the hardware layer:

step E1, starting;

e2, converting the input hardware layer handle into a hardware layer data structure body;

e3, checking whether the check field is 0xF0F1, and if not, exiting;

step E4, releasing the drawing buffer area;

step E5, releasing the display buffer area;

and E6, ending.

Assuming that the display engine supports 4 hardware layers, the z-axis index of the hardware layers from top to bottom is 3, 2, 1, 0, respectively.

The initialization flow for realizing the graphic display function by using the interface comprises the following steps:

step F1, starting;

step F2, acquiring the pixel width of the current display equipment as the layer width;

step F3, acquiring the pixel height of the current display equipment as the layer height;

step F4, setting the background color of the display engine;

step F5, allocating a layer (layer width, layer height, 3, [ function operation interface drawing buffer address ]) for the function operation interface execution application to obtain a function operation interface hardware layer handle;

step F6, allocating a layer (layer width, layer height, 2, [ device state drawing buffer address ]) for the device state refreshing function execution application to obtain a device state hardware layer handle;

step F7, allocating a layer (layer width, 1, [ device drawing buffer address ]) for the device function execution application to obtain a device hardware layer handle;

step F8, distributing layers (layer width, 0, [ background layer buffer address ]) for background function execution application to obtain a device hardware layer handle;

and F9, ending.

The process of updating the hardware layer of the functional operation interface is as follows:

step G1, starting;

step G2, checking whether an un-updated failure area exists in the functional operation interface module, and jumping to the step G6 if the failure area is not needed;

step G3, a drawing buffer area and a failure area list of the functional operation interface module are obtained;

step G4, executing updating hardware layer area (function operation interface hardware layer handle, function operation interface drawing buffer zone, function operation interface failure area list);

step G5, the functional operation interface module marks that the failure area which is changed currently is updated completely;

and G6, ending.

The process of updating the device state hardware layer is as follows:

step H1, starting;

step H2, checking whether the equipment state management module has an un-updated failure area, and if not, jumping to the step H6;

step H3, the equipment state module refreshes the equipment state display buffer area and the corresponding area list to be refreshed;

step H4, executing updating hardware layer areas (device state hardware layer handle, device state drawing buffer area, device state failure area list);

step H5, the equipment state management module marks that the failure area which is changed currently is updated completely;

and H6, ending.

The process of updating the hardware layer of the equipment is as follows:

step I1, starting;

step I2, checking whether an equipment module has an un-updated failure area, and if not, jumping to the step I6;

step I3, the equipment module refreshes the equipment state buffer area and the corresponding failure area list;

step I4, executing updating hardware layer areas (device hardware layer handles, device drawing buffers and device failure area lists);

step I5, the equipment module marks that the failure area which is changed currently is updated completely;

and step I6, ending.

The process of updating the background hardware layer is as follows:

step J1, starting;

step J2, checking whether a background module has an un-updated failure area, and if not, jumping to a step J6;

step J3, the background module updates the background drawing buffer area;

step J4, executing updating hardware layer areas (background hardware layer handle, background drawing buffer area, null value);

step J5, the background module marks that the current change is updated completely;

step J6, ending;

the flow of executing the amplifying function:

step K1, starting;

step K2, the equipment module executes amplification processing logic;

step K3, executing the flow of updating the hardware layer of the equipment;

step K4, the equipment state module executes amplification processing logic;

step K5, executing a hardware layer flow for updating the equipment state;

step K6, the background module executes amplification processing logic;

step K7, executing a background hardware layer updating process;

and step K8, ending.

The flow of executing the zoom-out function:

step L1, starting;

step L2, the device module executes the shrinking logic;

step L3, executing the flow of updating the hardware layer of the equipment;

step L4, the device state module executes the shrinking logic;

step L5, executing the flow of updating the hardware layer of the equipment state;

step L6, the background module executes the reduction processing logic;

step L7, executing a background hardware layer updating process;

and step L8, ending.

The process of executing the translation function:

step M1, starting;

step M2, the equipment module executes translation processing logic;

step M3, executing the flow of updating the hardware layer of the equipment;

step M4, the device state module executes translation processing logic;

step M5, executing the flow of updating the hardware layer of the equipment state;

step M6, the background module executes translation processing logic;

step M7, executing a background hardware layer updating process;

step M8, ending;

according to the above updating flow, the refresh pixel ratio of each hardware layer can be calculated independently, and the formula is as follows.

Refresh pixel ratio of functional operation interface hardware layer= (number of pixels per functional icon x number of states updated this time)/(functional operation interface hardware layer width x functional operation interface hardware layer height);

refresh pixel ratio of device state hardware layer= (number of pixels per device state icon x number of device states updated this time)/(device state hardware layer width x device state hardware layer height);

refresh pixel ratio of device hardware layer= (number of pixels per device icon x number of devices updated this time)/(device hardware layer width x device hardware layer height);

the refresh pixel ratio of the background hardware layer = 1.0 if the background changes, otherwise 0;

as can be seen from the above data of the refresh pixel ratio, if the background of the graphic display changes, the total refresh pixel ratio of the graphic display is always > =1.0; if the background of the graphical display does not change, the refresh pixel ratio is closely related to the specific change, and when there is only one device state change, the total refresh pixel ratio=the number of pixels of the device state icon +.f (device state hardware layer width×device state hardware layer height). Typically the number of icon pixels for a single device state will be less than 1/20 of the display device size, with a refresh pixel ratio=0.05.

If the display engine supports only 2 hardware layers, the z-axis index of the hardware layers from top to bottom is 1, 0, respectively.

The general initialization flow for the graphic display function by using the interface is as follows:

step N1, starting;

step N2, acquiring the pixel width of the current display equipment as the layer width;

step N3, acquiring the pixel height of the current display equipment as the layer height;

step N4, setting the background color (optional) of the display engine;

step N5, allocating a layer (layer width, layer height, 1, [ function operation interface drawing buffer address ]) for the function operation interface execution application to obtain a function operation interface hardware layer handle;

step N6, allocating a layer (layer width, layer height, 0, [ graphic display drawing buffer address ]) for the graphic display function execution application to obtain a graphic display hardware layer handle;

and step N7, ending.

The process of updating the hardware layer of the functional operation interface is as follows:

step O1, starting;

step O2, checking whether the functional operation interface management module needs to update a failure area, and jumping to step O6 if the failure area does not exist;

step O3, a drawing buffer area and a failure area list of the functional operation interface module are obtained;

step O4, executing updating hardware layer area (function operation interface hardware layer handle, function operation interface drawing buffer area, function operation interface failure area list);

step O5, the functional operation interface module marks that the failure area which is changed currently is updated completely;

and step O6, ending.

The process of updating the graphical display hardware layer is as follows:

step P1, starting;

step P2, marking the full-area refreshing mark as 0;

step P3, setting a global invalidation buffer list to be empty;

step P4, checking whether the background module has an un-updated failure area, and if not, jumping to step P6;

step P5, if the background module has an unexpired failure area, updating the graphic display buffer area by using the drawing function of the background module, and marking the full area refresh mark as 1;

step P6, checking the full-area refresh flag, if the full-area refresh flag=1, completely updating the graphic display buffer with the drawing function of the device display module, and jumping to step P8;

step P7, executing a local update checking function of the equipment module, if the local update checking function is changed, locally updating the graphical display buffer area, and geometrically combining a failure area list of the equipment display module with the global failure buffer area list;

step P8, checking the full-area refresh flag, if the full-area refresh flag=1, completely updating the graphic display buffer area with the drawing function of the device status display module, and jumping to step P10;

step P9, executing a local updating checking function of the equipment state display module, if the equipment state display module has a change, locally updating the graphical display buffer area, and geometrically combining a failure area list of the equipment state display module with a global failure buffer area list;

step P10, executing updating hardware layer areas (graphically displaying hardware layer handles, graphically displaying buffers, and a global failure buffer list);

step P11, end.

As can be seen from the above flow, the update flow implemented based on 2 hardware layers is more complex than the implementation flow based on 4 hardware layers, and the refresh pixel ratio based on 2 hardware layers and the refresh pixel ratio based on 4 hardware layers can be maintained at the same level by an efficient graphics algorithm. The pcb design of a single core arm chip is relatively simple, and a 2-layer pcb design is usually adopted. The low-price arm chip with the display engine in the current market often integrates ddr of 32MB, 64MB and 128MB, and can accurately control the use of the memory by matching with a high-efficiency graphic algorithm, so that the product requirement can be completely met. The method can realize more accurate control of the storage capacity of the memory without using linux operation, and can select the memory with proper capacity according to the final result of product development so as to optimize the product cost.

In summary, the invention reduces the cost of the embedded graphic display device products by the display application scheme and the high-efficiency graphic calculation method which are realized by the low-cost hardware through 2 hardware layers, realizes the products with similar effects by the 10% -20% of the cost of the linux plus arm platform industrial personal computer scheme, and greatly reduces the cost of the graphic display device.

Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto, but rather is capable of modification and variation without departing from the spirit and scope of the present invention.

Claims (10)

1. A graphical display method, comprising the steps of:

step S1, a functional operation interface hardware layer and a graphical display hardware layer are established in a display engine;

step S2, executing a graphical display function on the functional operation interface hardware layer and the graphical display hardware layer;

step S3, the functional operation interface hardware layer and the graphical display hardware layer are integrated by the display engine and then displayed on the display device;

the functional operation interface hardware layers and the graphical display hardware layers are arranged in a vertically stacked mode, the functional operation interface hardware layers are close to a user, and the graphical display hardware layers are far away from the user;

the functional operation interface hardware layer is used for displaying interactive images for user operation, and the graphical display hardware layer is used for displaying equipment, equipment states and backgrounds.

2. The method of claim 1, wherein the functional operation interface hardware layer and the operation interface of the graphical display hardware layer comprise applying for allocation of a layer interface, updating a hardware layer interface, and releasing a hardware layer interface.

3. The method of claim 2, wherein the step of applying for allocation of a layer interface comprises,

step S11, calculating the size of a buffer area required for specification according to the layer width, the layer height and the ARGB single pixel byte number, and determining the stacking sequence among layers by the z-axis index number of the layer;

step S12, applying a hardware layer data structure space in the stack, storing a layer X-axis starting point coordinate, a layer Y-axis starting point coordinate, a layer width, a layer height, a layer z-axis index number, a display buffer address and an operation buffer address in the hardware layer data structure, and setting a check field as 0xF0F1;

step S13, notifying the display engine to enable the hardware layer designated by the layer z-axis index number;

and step S14, returning the hardware layer data structure body address applied in the heap as a hardware layer handle value.

4. A method for graphical display as defined in claim 2, wherein the step of updating the hardware layer interface comprises,

step S21, converting the input hardware layer handle into a hardware layer data structure body;

step S22, checking whether the check field is 0xF0F1, and if not, exiting;

step S23, checking the number of the failure areas in the failure area list, if the number of the failure areas is equal to 0, completely copying the buffer area to a display buffer area pointed in a hardware layer data structure body, and refreshing the image data of the whole visible area;

step S24, if the number of the failure areas is greater than 0, the information of the failure areas is taken out one by one, and the image data corresponding to the failure areas on the buffer areas are copied to the areas with the same display buffer areas pointed in the hardware layer data structure body;

step S25, the display engine is informed that the display buffer area is updated, and the display content is refreshed immediately according to the layer X-axis starting point coordinate, the layer Y-axis starting point coordinate, the layer width and the layer height parameters in the current hardware layer data structure body.

5. A method for graphical display as defined in claim 2, wherein the step of releasing the hardware layer interface comprises,

step S31, converting the input hardware layer handle into a hardware layer data structure body;

step S32, checking whether the check field is 0xF0F1, and if not, exiting;

step S33, releasing the drawing buffer;

step S34, releasing the display buffer.

6. A method for graphical display as defined in claim 2, wherein the step of initializing the graphical display function using the operation interface comprises,

step S41, acquiring the pixel width of the current display equipment as the layer width;

step S42, acquiring the pixel height of the current display device as the layer height;

step S43, setting the background color of the display engine;

step S44, a layer is allocated for the execution application of the function operation interface, and a hardware layer handle of the function operation interface is obtained;

step S45, a layer is allocated for executing application of the device state refreshing function, and a device state hardware layer handle is obtained;

step S46, a layer is allocated for the device function execution application, and a device hardware layer handle is obtained;

step S47, a layer is allocated for the background function execution application, and a device hardware layer handle is obtained.

7. A method for graphical display as defined in claim 1, wherein updating the functional operator interface hardware layer comprises,

step S51, checking whether the functional operation interface management module needs to update a failure area, and ending the operation if the failure area does not exist;

step S52, a drawing buffer area and a failure area list of the functional operation interface module are obtained;

step S53, executing updating of the hardware layer area;

in step S54, the functional operation interface module marks that the currently changed failure area has been updated.

8. A method for graphical display as defined in claim 1, wherein updating the graphical display hardware layer comprises,

step S61, marking the full-area refreshing mark as 0;

step S62, setting a global invalidation buffer list to be empty;

step S63, checking whether the background module has an un-updated failure area, and if not, jumping to step S65;

step S64, if the background module has an un-updated failure area, updating the graphic display buffer area by using the drawing function of the background module, and marking the full area refresh mark as 1;

step S65, checking a full-area refreshing mark, if the full-area refreshing mark is equal to 1, completely updating the graphic display buffer area by using the drawing function of the device display module, and jumping to step S67;

step S66, executing a local update checking function of the equipment module, if the local update checking function is changed, locally updating the graphical display buffer area, and geometrically merging a failure area list of the equipment display module with the global failure buffer area list;

step S67, checking the full-area refreshing mark, if the full-area refreshing mark is equal to 1, completely updating the graphic display buffer area by using the drawing function of the equipment state display module, and jumping to step S69;

step S68, executing a local update checking function of the equipment state display module, if the equipment state display module has a change, locally updating the graphical display buffer area, and geometrically merging a failure area list of the equipment state display module with the global failure buffer area list;

step S69, the updating of the hardware layer area is performed.

9. A method of graphical display as recited in claim 1, wherein said performing a graphical display function includes designating a background color, designating a background bitmap or vector image, designating a device to display a device image at a display device specific two-dimensional coordinate location, dynamically designating a current state of the display device and displaying a corresponding device state image at the display device specific two-dimensional coordinate location, translating a graphical display area, and zooming the graphical display area.

10. A graphic display device characterized in that the graphic display method according to any one of claims 1-9 is used.