CN117544433A - Core particle, low-power consumption control method, chip and computer equipment - Google Patents

Abstract

The embodiment of the application provides a core particle, a low-power consumption control method, a chip and computer equipment, wherein a data stream is transmitted between the core particle and an interconnected opposite-end core particle, and the core particle comprises: a core interconnection interface; the core particle interconnection interface comprises: a link layer and a physical layer; the link layer is used for closing a data transmission path of the link layer in the transmission idle time of the data stream so that the link layer enters a low-power consumption state; wherein, the physical layer maintains the working state unchanged. According to the embodiment of the application, the power consumption of the core particle interconnection can be reduced in the core particle interconnection scene.

Description

Core particle, low-power consumption control method, chip and computer equipment

Technical Field

The embodiment of the application relates to the technical field of chips, in particular to a core particle, a low-power consumption control method, a chip and computer equipment.

Background

The core particle is a unit Chip which can realize a certain function and comprises an interconnection interface, and a plurality of core particles can be interconnected through the interconnection interface to form chips such as a System On Chip (SOC). The core interconnection refers to that on the basis that the interconnection interfaces of two cores are physically connected, an interconnection protocol is used for coordinating and scheduling communication between the two cores, so that interconnection and interworking between the two cores are realized.

In the core interconnection scene, the data transmission and processing between the cores need to consume larger power consumption, so how to provide a technical scheme to reduce the power consumption of the core interconnection becomes a technical problem to be solved by those skilled in the art.

Disclosure of Invention

In view of this, embodiments of the present application provide a core, a low power consumption control method, a chip, and a computer device, so as to reduce power consumption of core interconnection in a core interconnection scenario.

In a first aspect, embodiments of the present application provide a core particle for transmitting a data stream between the core particle and an interconnected counter-end core particle, the core particle comprising: a core interconnection interface; the core particle interconnection interface comprises: a link layer and a physical layer;

the link layer is used for closing a data transmission path of the link layer in the transmission idle time of the data stream so that the link layer enters a low-power consumption state;

wherein, the physical layer maintains the working state unchanged.

Optionally, transmitting the data stream between the core particle and the interconnected opposite core particle includes: the core particle transmits a data stream to the opposite core particle; the link layer is configured to close a data transmission path of the link layer in a transmission idle time of the data stream, and includes:

When the transmission idle time arrives, acquiring a low-power-consumption entry request;

responding to the low-power-consumption entering request, sending a low-power-consumption entering signal to the opposite-end core particle, and closing a data sending passage of the link layer;

the low-power-consumption entering signal is used for controlling the link layer of the opposite terminal core particle to close a data receiving path so that the link layer of the opposite terminal core particle enters a low-power-consumption state.

Optionally, transmitting the data stream between the core particle and the interconnected opposite core particle includes: the peer core sending a data stream to the core; the link layer, configured to close a data transmission path of the link layer during a transmission idle time of the data stream, includes:

when the transmission idle time arrives, acquiring an entering low-power-consumption signal sent by a link layer of the opposite terminal core particle;

and closing a data receiving path of a link layer in response to the entering low-power-consumption signal.

Optionally, the link layer closes the data transmission path of the link layer by closing the working clock of the data transmission path.

Optionally, the link layer is further configured to, at a transmission working time of the data stream, open a data transmission path of the link layer, so that the link layer exits from a low power consumption state.

Optionally, transmitting the data stream between the core particle and the interconnected opposite core particle includes: the core particle transmits a data stream to the opposite core particle; the link layer is configured to open a data transmission path of the link layer during a transmission working time of the data stream, and includes:

when the transmission working time arrives, a data transmission path of the link layer is started, and a low-power-consumption exiting signal is transmitted to the opposite end core particle;

the exit low-power consumption signal is used for controlling the link layer of the opposite-end core particle to restart the transmission of the data stream.

Optionally, transmitting the data stream between the core particle and the interconnected opposite core particle includes: the peer core sending a data stream to the core; the link layer is configured to open a data transmission path of the link layer during a transmission working time of the data stream, and includes:

when the transmission working time arrives, a data receiving path of a link layer is opened;

and acquiring an exit low-power-consumption signal sent by the link layer of the opposite end core particle, and restarting transmission of the data stream in response to the exit low-power-consumption signal.

Optionally, the link layer starts the data transmission path of the link layer by starting an operating clock of the data transmission path.

Optionally, the link layer uses the working clock of the link layer as a driving clock, and closes the data transmission path of the link layer or opens the data transmission path of the link layer.

Optionally, the length of the transmission idle time is a preset number of working clock cycles of the link layer.

Optionally, the link layer includes: low power consumption control logic;

the low power consumption control logic is configured to execute the step of closing a data transmission path of the link layer during the transmission idle time of the data stream, so that the link layer enters a low power consumption state; and executing the step of starting the data transmission path of the link layer in the transmission working time of the data stream so as to enable the link layer to exit the low-power consumption state.

In a second aspect, an embodiment of the present application provides a low power consumption control method, which is applied to the core particle in the first aspect, where a data stream is transmitted between the core particle and an interconnected opposite core particle; the method comprises the following steps:

closing a data transmission path of the link layer in the transmission idle time of the data stream so as to enable the link layer to enter a low-power consumption state;

and maintaining the working state of the physical layer unchanged.

Optionally, the method further comprises:

and opening a data transmission path of the link layer in the transmission working time of the data stream so as to enable the link layer to exit the low-power consumption state.

Optionally, transmitting the data stream between the core particle and the interconnected opposite core particle includes: the core particle transmits a data stream to the opposite core particle; and closing a data transmission path of a link layer in the transmission idle time of the data stream, wherein the method comprises the following steps:

when the transmission idle time arrives, acquiring a low-power-consumption entry request;

responding to the low-power-consumption entering request, sending a low-power-consumption entering signal to the opposite-end core particle, and closing a data sending passage of a link layer; the low-power-consumption entering signal is used for controlling the link layer of the opposite terminal core particle to close a data receiving path so as to enable the link layer of the opposite terminal core particle to enter a low-power-consumption state;

the opening the data transmission path of the link layer at the transmission working time of the data stream comprises the following steps:

when the transmission working time arrives, a data transmission path of a link layer is opened, and a low-power-consumption exiting signal is transmitted to the opposite terminal core particle; the exit low-power consumption signal is used for controlling the link layer of the opposite-end core particle to restart the transmission of the data stream.

Optionally, the closing the data transmission path of the link layer includes: the working clock period of the link layer is used as a driving clock, and the working clock of a data transmission path of the link layer is closed;

the data transmission path of the open link layer includes: and starting the working clock of the data transmission path of the link layer by taking the working clock period of the link layer as a driving clock.

Optionally, transmitting the data stream between the core particle and the interconnected opposite core particle includes: the peer core sending a data stream to the core; and closing a data transmission path of a link layer in the transmission idle time of the data stream, wherein the method comprises the following steps:

when the transmission idle time arrives, acquiring an entering low-power-consumption signal sent by a link layer of the opposite terminal core particle;

closing a data receiving path of a link layer in response to the enter low power consumption signal;

the opening the data transmission path of the link layer at the transmission working time of the data stream comprises the following steps:

when the transmission working time arrives, a data receiving path of a link layer is opened;

and acquiring an exit low-power-consumption signal sent by the opposite-end core particle, and restarting transmission of the data stream in response to the exit low-power-consumption signal.

Optionally, the closing the data receiving path of the link layer includes: the working clock period of the link layer is used as a driving clock, and the working clock of a data receiving path of the link layer is closed;

opening the data receiving path of the link layer comprises: and starting the working clock of the data receiving path of the link layer by taking the working clock period of the link layer as a driving clock.

In a third aspect, embodiments of the present application provide a chip comprising a plurality of interconnected core particles, the core particles being as described in the first aspect above.

In a fourth aspect, embodiments of the present application provide a computer device including a chip as described in the third aspect.

The core particle provided by the embodiment of the application can be used for a core particle interconnection scene, and data flow is transmitted between the core particle and the interconnected opposite core particle under the core particle interconnection scene. Based on this, the core particle provided by the embodiments of the present application may include a core particle interconnection interface, which may include: a link layer and a physical layer; the link layer is used for closing a data transmission path of the link layer in the transmission idle time of the data stream so that the link layer enters a low-power consumption state; wherein, the physical layer maintains the working state unchanged. Therefore, when the idle transmission time of the data stream arrives, the data transmission channel of the link layer of the core particle can be closed, so that the data transmission channel of the link layer of the core particle does not work, the link layer of the core particle enters a low-power consumption state, and the power consumption of the core particle is reduced. Meanwhile, the physical layer of the core particle is used as the next layer of the link layer, and the data transmission channel of the link layer of the core particle does not transmit data, so that the physical layer of the core particle can stop the data transmission work when the link layer enters a low-power-consumption state, the physical layer of the core particle can maintain the working state unchanged, the physical layer retraining process when the physical layer performs state switching is avoided, the power consumption of the physical layer is further reduced, the usable time (the increased time corresponds to the omitted physical layer retraining time) of data stream transmission is increased, and the data transmission efficiency is improved.

Therefore, the embodiment of the application can enter a low-power consumption state by controlling the link layer in the idle transmission time of the data streams of the core particle and the opposite core particle, and the physical layer maintains the working state unchanged, so that the low-power consumption control of the core particle is realized, and the power consumption of the core particle is reduced; and the retraining process of state switching caused by low-power control at the physical layer is avoided, the power consumption and time occupation caused by retraining at the physical layer are saved, and the time for data stream transmission can be prolonged. Therefore, the scheme provided by the embodiment of the application can reduce the power consumption of the core interconnection under the core interconnection scene, and improve the time used for data stream transmission and the data transmission efficiency by avoiding the retraining of a physical layer.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings may be obtained according to the provided drawings without inventive effort to a person skilled in the art.

FIG. 1 is a schematic diagram of an alternative structure of the interconnection of the core particles.

Fig. 2 is a schematic diagram of an alternative architecture of layering of a die interconnect protocol at a die interconnect interface.

Fig. 3 is a schematic diagram of another alternative structure of the interconnection of the core particles.

Fig. 4 is a schematic flow chart of an alternative low power consumption control method in a core interconnection scenario.

Fig. 5 is a schematic diagram of an alternative structure of the interconnection of the core particles provided in an embodiment of the present application.

Fig. 6 is an alternative flowchart of a low power consumption control method according to an embodiment of the present application.

Fig. 7 is a schematic flowchart of an alternative procedure for correspondingly entering a low power consumption state in the low power consumption control method provided in the embodiment of the present application.

Fig. 8 is a schematic flowchart of an alternative procedure for correspondingly exiting a low power consumption state in the low power consumption control method provided in the embodiment of the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

To facilitate an understanding of the pellet interconnection, taking pellets 1 and pellets 2 as examples, fig. 1 schematically illustrates an alternative structural schematic of the pellet interconnection. As shown in fig. 1, the core may include a core interconnection interface and a plurality of functional modules, where the core interconnection interface is connected to the plurality of functional modules through a system bus. And outside the core particle, the core particle 1 and the core particle 2 can realize communication interconnection through a core particle interconnection interface to transmit data streams. For any core particle, the opposite core particle of the core particle may be another core particle in communication with the core particle.

The two cores interconnected by the core interconnection interface may be any type of core, for example, two functional cores interconnected by the interconnection interface, a functional core and an interface core interconnected by the interconnection interface, or the like.

The form of the functional modules in the core that perform the function of the core may also vary based on the type of core. For example, the functional core may include a processor core (such as a CPU core), the functional modules in the processor core may be integrated processor core and Cache (Cache) modules, and so on. For another example, the interface core may be a core in which an interface module of a communication system such as a docking network communication, USB (Universal Serial Bus ) communication, PCIE (Peripheral Component Interconnect Express, high-speed serial computer expansion bus standard) communication, or the like is located.

When the core grains are interconnected through the core grain interconnection interface, the core grain interconnection protocol is used for defining a layering mechanism of data transmission of the interconnected core grains. The core particle interconnection protocol may include, from top to bottom, in layering of the core particles: an application layer, a protocol layer, a link layer, and a physical layer. It should be noted that, the application layer, the protocol layer, the link layer and the physical layer are circuit modules for core interconnection, which are implemented in the core based on layering of the core interconnection protocol; that is, the application layer, the protocol layer, the link layer, and the physical layer may be in the form of circuit modules, for example, an application layer circuit module (abbreviated application layer), a protocol layer circuit module (abbreviated protocol layer), a link layer circuit module (abbreviated link layer), and a physical layer circuit module (abbreviated physical layer). In a possible implementation, the link layer and the physical layer may be disposed at an interconnection interface of the core, as a circuit module in the interconnection interface; the application layer and the protocol layer may be disposed outside the interconnection interface of the core particle and configured as an upper layer circuit module of the link layer.

As an alternative implementation, the link layer and physical layer may be deployed at the core interconnect interface of the core. In one example, fig. 2 shows an alternative structural schematic diagram of layering of a core interconnection protocol at a core interconnection interface, as shown in fig. 2, where layering of the core interconnection protocol at the core interconnection interface may include a link layer (e.g., link layer 11 of core 1, link layer 21 of core 2 in fig. 2), and a physical layer (e.g., physical layer 12 of core 1, physical layer 22 of core 2 in fig. 2).

In the core, the link layer is used to provide reliability guarantees for inter-core communications, including but not limited to: error correction, verification, retransmission mechanisms, etc.

In the core, the physical layer is used to provide a physical transmission path (simply referred to as a path) for data transmission by the core.

In layering of the core interconnect protocol, the link layer and the physical layer may be connected by an adapted interface.

It should be further noted that, the layering of the core interconnection protocol may further include an application layer and a protocol layer. The application layer is the top hierarchy of the interconnect protocol, and software can run on the application layer. For example, the software may be executed by processor hardware of the core, such as the processor core of the core, and the like, and run at the application layer. The protocol layer is located below the application layer, is used for supporting the business protocol corresponding to the business carried by the core particle, is related to the type of the business carried by the core particle, and can also support the user-defined protocol.

In the direction of sending data by the core, the data of the application layer of the core is received by the protocol layer, the protocol layer sends the data to the link layer (for example, the protocol layer can divide the data into sub-data and transmit the sub-data to the link layer), and the link layer distributes the data to the physical layer for transmission through the corresponding interface.

One of the purposes of the inter-core particle interconnection is to enable communication between the cores, i.e. to enable data transmission between the cores. For example, when the data transmitted between the core grains is a data stream, the data stream transmission between the core grains needs to be realized. The data transmission direction of the core 1 will be described based on the layering of the core interconnection protocol shown in fig. 2. Inside the core 1, the link layer 11 acquires the data stream sent by the protocol layer, the link layer 11 transmits the data stream to the physical layer 12 through the data transmission path of the link layer, and the physical layer 12 of the core 1 transmits the data stream to the physical layer 22 of the opposite core 2 through the data transmission path. That is, in the data transmission direction of the core 1, the data stream is transferred layer by layer at the link layer 11 and the physical layer 12 of the core, and the data stream is transferred to the core 2 at the opposite end through the physical layer 12.

The data receiving direction of the core particle 2 will be described. The physical layer 22 of the core grain 2 receives the data stream sent by the physical layer 12 of the core grain 1 through a data transmission path; further, inside the core 2, the physical layer 22 transmits a data stream to the link layer 21 through a data transmission path of the physical layer. That is, in the data receiving direction of the core 2, after the physical layer 22 of the core 2 receives the data stream transmitted by the physical layer 12 of the core 1 at the opposite end, the data stream is transferred layer by layer at the physical layer 22 and the link layer 21 of the core 2.

It can be seen that the data transmission of the core particle is divided into transmission data and reception data, i.e. the core particle can be used as a transmitting party to transmit data information to the opposite core particle, and can be used as a receiving party to receive data information transmitted to the opposite core particle. Further, in the case where the data transmission of the core is divided into transmission data and reception data, the data transmission path of the core may be divided into a data transmission path and a data reception path. Referring to another alternative structural schematic of the core interconnection shown in fig. 3, the link layer of the core may include a Data transmission path (Tx Data Signal) and a Data reception path (Rx Data Signal); the data transmission path of the link layer is, for example, the data transmission path 111 of the link layer 11 of the core 1 and the data transmission path 212 of the link layer 21 of the core 2 in the figure; the data reception path of the link layer is, for example, the data reception path 112 of the link layer 11 of the core 1 and the data reception path 211 of the link layer 21 of the core 2 in the figure. The physical layer of the core may include a Data transmission path (Tx Data Lane) and a Data reception path (Rx Data Lane); the data transmission path of the physical layer is, for example, the data transmission path 121 of the physical layer 12 of the core 1 and the data transmission path 222 of the physical layer 22 of the core 2 in the figure; the data reception path of the physical layer of the core, for example, the data reception path 122 of the physical layer 12 of the core 1 in the figure, and the data reception path 221 of the physical layer 22 of the core 2.

The Tx indicates transmission and the Rx indicates reception. The core (for example, core 1) as the transmitting side can transmit data to the data receiving path of the core (for example, core 2) as the receiving side through the data transmitting path, thereby realizing the interconnection communication of the cores.

It should be further noted that, due to the difference of transmission paths and the difference of physical layer processing, delays of arrival of data at the receiving side are different, so that the data of different data transmission paths need to be aligned, for example: the data transmission path 111 of the link layer 11 in the core 1 needs to be aligned with the data transmission path 121 of the physical layer 12, and the data reception path 112 of the link layer 11 needs to be aligned with the data reception path 122 of the physical layer 12; the data reception path 211 of the link layer 21 in the core 2 needs to be aligned with the data reception path 221 of the physical layer 22, and the data transmission path 212 of the link layer 21 needs to be aligned with the data transmission path 222 of the physical layer 22. Under the core interconnection scene, the link layer of the core interconnection interface can control the training of the physical layer to finish the alignment processing of the data transmission path, so that the data can be accurately transmitted and received, and the correct sampling time point can be found.

The upper business module (such as protocol layer) in the core has business working state and business idle state, so the control of the power consumption of the core can be realized by the exit and entry of the low power consumption state in the business working state and business idle state. For example, when there is no data, the upper layer service module is in a service idle state, the data in the data stream transmitted by the data transmission path is null data, and the upper layer service module can control the core interconnection interface to enter a low power consumption state so as to close the data transmission function of the physical layer and reduce the power consumption. When data exists, the upper layer business module enters a business working state, the core particle interconnection interface can be controlled to exit a low-power consumption state, and normal data transmission is recovered.

Taking a core grain 1 with interconnected core grains as a sender and a core grain 2 as a receiver as an example, the core grain 1 can initiate a low-power-consumption entering process so as to enter a low-power-consumption state synchronously with the core grain 2; when it is desired to exit the low power consumption, the pellet 1 may initiate a low power consumption exit procedure to exit the low power consumption state in synchronization with the pellet 2. In an alternative implementation, taking the example of implementing entry and exit of the low power consumption state by controlling the physical layer, fig. 4 schematically illustrates an alternative flow diagram of the low power consumption control method in the core interconnection scenario.

As shown in fig. 4, upon entering the low power state, the link layer 11 of the core 1 sends an enter low power handshake signal to the link layer 21 of the core 2 to request the core 2 to enter the low power state.

When the core grain 2 receives the low power consumption entering handshake signal, if the core grain 2 supports entering the low power consumption state, the link layer 21 of the core grain 2 responds to the low power consumption entering handshake signal and sends the low power consumption entering handshake signal to the link layer 11 of the core grain 1, so that the handshake between the core grain 1 and the core grain 2 is successful, and the interaction of entering the low power consumption state is completed.

When the interaction of entering the low power consumption state is completed, the link layer 11 of the core particle 1 controls the physical layer 12 to enter the low power consumption state; meanwhile, the link layer 21 of the core 2 controls the physical layer 22 to enter a low power consumption state.

The link layer of the core particle controls the physical layer to enter a low power consumption state, and can close a data transmission path of the physical layer. For example, the physical layer 12 of the core 1 closes the data transmission path as the transmitter, and stops transmitting new data to the physical layer 21 of the core 2; the physical layer 22 of the core 2 closes the data reception path as the receiving side, and stops receiving the data transmitted from the physical layer 11 of the core 1.

When the low power consumption state is entered, the physical layer closes the data transmission path, so when the low power consumption state is exited, the link layer needs to control the physical layer to retrain and adjust the data transmission path so as to complete the data alignment and other treatments of the transmission channel, and the signal transmitted by the link layer can be accurately received and transmitted by the physical layer. Thus, upon exiting the low power state, the link layer 11 of the core 1 controls the physical layer 12 to retrain. At the same time, the link layer 21 of the core 2 controls the physical layer 22 retraining.

After physical layer retraining, the link layer 11 of core 1 sends an exit low power handshake signal to the link layer 21 of core 2.

When the core grain 2 receives the exiting low-power consumption handshake signal sent by the core grain 1, the link layer 21 of the core grain 2 sends the exiting low-power consumption handshake signal to the link layer 11 of the core grain 1 in response to the exiting low-power consumption handshake signal, interaction with the core grain 1 exiting the low-power consumption state is completed, and normal data stream transmission between the core grain 1 and the core grain 2 is restored.

It should be noted that, the physical layer training process is complicated, including alignment of data paths, alignment of clocks to data, data order preservation, and the like, which results in a longer training time, and the physical layer can be locked again after a longer microsecond (us) level time. Therefore, the physical layer enters the low-power-consumption state and exits the low-power-consumption state, so that the scheme for realizing the low-power-consumption control of the core particles is realized, and the physical layer is required to be retrained when exiting the low-power-consumption state, so that the time for entering and exiting the low-power-consumption control of the core particles and the operation complexity are increased, and the power consumption reduction of the interconnection of the core particles is not facilitated.

In view of this, the embodiments of the present application provide an improved low power control scheme in the core interconnection scenario, so that low power control is implemented based on the link layer, without changing the working state of the physical layer.

Based on the above idea, as an optional implementation, the embodiment of the present application may close the data transmission path of the link layer of the core particle when the transmission idle time of the data stream arrives, so that the data transmission path of the link layer of the core particle does not work, the link layer of the core particle enters a low power consumption state, and power consumption of the core particle is reduced. Meanwhile, the physical layer of the core particle is used as the next layer of the link layer, and the data transmission channel of the link layer of the core particle does not transmit data, so that the physical layer of the core particle can stop the data transmission work when the link layer enters a low-power-consumption state, the physical layer of the core particle can maintain the working state unchanged, the physical layer retraining process when the physical layer performs state switching is avoided, the power consumption of the physical layer is further reduced, the usable time (the increased time corresponds to the omitted physical layer retraining time) of data stream transmission is increased, and the data transmission efficiency is improved.

In order to achieve the above objective, as an optional implementation, the embodiments of the present application may improve the link layer, so that when the transmission idle time of the data stream arrives, the data transmission path of the link layer is closed, and when the transmission working time of the data stream arrives, the data transmission path of the link layer is opened. Wherein fig. 5 schematically illustrates an alternative structural schematic of the interconnection of the core particles according to an embodiment of the present application. As shown in fig. 5, in the core interconnection scenario, a data stream is transmitted between core 1 and interconnected core 2.

For any core (for example, core 1 or core 2), the core may include a core interconnection interface, and the core interconnection interface may include a link layer and a physical layer, where the link layer in the embodiment of the present application may be used to close a data transmission path of the link layer during a transmission idle time of a data stream, so that the link layer enters a low power consumption state. Wherein the physical layer of the core particle keeps the working state unchanged.

The transmission idle time of the data stream refers to the time of transmitting idle data in a service idle state by an upper layer service module of a link layer.

In case that the data transmission of the core is divided into transmission data and reception data, the data transmission path of the link layer may include a data transmission path and a data reception path.

In some embodiments, when the low power consumption control state is entered, the data transmission path of the link layer is closed, and in the embodiments of the present application, the link layer is further configured to open the data transmission path of the link layer during the transmission working time of the data stream, so that the link layer exits the low power consumption state.

For easy understanding of the manner in which the low power consumption control is performed by the link layer according to the embodiments of the present application, fig. 6 is an exemplary flowchart illustrating an alternative low power consumption control method according to the embodiments of the present application. Fig. 6 shows only one core particle as an example. As shown in fig. 6, the low power consumption control method applied to the core particle may include:

Step S100, the link layer closes the data transmission path of the link layer in the idle transmission time of the data stream.

Step S200, the link layer starts the data transmission path of the link layer in the transmission working time of the data stream.

With reference to fig. 5, a low power consumption control process will be described using a core 1 with interconnected cores as a transmitter and a core 2 as a receiver.

During the idle time of data stream transmission, as shown in fig. 5, the link layer 11 of the core 1 closes its data transmission path 111, so that the link layer 11 of the core 1 enters a low power consumption state, while the operation state of the physical layer 12 of the core 1 remains unchanged, the data transmission path 121 of the physical layer 12 of the core 1 remains in a channel aligned state, and since the data transmission path 111 of the link layer 11 of the core 1 does not transmit data, the physical layer 12 of the core 1 can stop the data transmission operation of the data transmission path 121 when the link layer 11 enters the low power consumption state.

The core 2 as the receiving side can enter a low power consumption state in synchronization with the core 1 as the transmitting side. In an alternative example, the link layer 11 of the core 1 may send a signal corresponding to entering the low power consumption state to the link layer 21 of the core 2 during the idle time of data stream transmission, so that the link layer 21 of the core 2 closes the data receiving path 211 thereof, and thus the link layer 21 of the core 2 enters the low power consumption state while the operation state of the physical layer 22 of the core 2 remains unchanged, the data receiving path 221 of the physical layer 22 of the core 2 remains in the channel alignment state, and since the data receiving path 211 of the link layer 21 of the core 2 does not receive data, the physical layer 22 of the core 2 may stop the data receiving operation of the data receiving path 221 when the link layer 21 enters the low power consumption state, thereby reducing the power consumption of the core.

At the time of data stream transmission operation, as shown in fig. 5, the link layer 11 of the core 1 opens its data transmission path 111, so that the link layer 11 of the core 1 exits the low power consumption state. Also, to restart transmission of the data stream, the link layer 11 of the core 1 may transmit an exit low power consumption signal to the link layer 21 of the core 2 through the data transmission path 111.

The core 2 as the receiving party and the core 1 as the sending party exit the low power consumption state synchronously, the data sending path 111 is opened based on the transmission working time of the link layer 11 of the core 1 in the data stream, and the link layer 21 of the core 2 can open the data receiving path 211 in the transmission working time of the data stream, so that the link layer 21 of the core 2 exits the low power consumption state. And, the data receiving path 211 of the link layer 21 of the core grain 2 may correspond to obtaining the exit low power consumption signal sent by the link layer 11 of the core grain 1 to restart the transmission of the data stream.

It should be noted that, in fig. 5, the process of using the core particle 2 as the sender and using the core particle 1 as the receiver to realize the low power consumption control may be referred to the above in the same manner, which is not repeated in the embodiment of the present application.

It can be seen that when the idle transmission time of the data stream arrives, the data transmission channel of the link layer of the core particle can be closed, so that the data transmission channel of the link layer of the core particle does not work, the link layer of the core particle enters a low-power consumption state, and the power consumption of the core particle is reduced. Meanwhile, the physical layer of the core particle is used as the next layer of the link layer, and the data transmission channel of the link layer of the core particle does not transmit data, so that the physical layer of the core particle can stop the data transmission work when the link layer enters a low-power-consumption state, the physical layer of the core particle can maintain the working state unchanged, the physical layer retraining process when the physical layer performs state switching is avoided, the power consumption of the physical layer is further reduced, the usable time (the increased time corresponds to the omitted physical layer retraining time) of data stream transmission is increased, and the data transmission efficiency is improved.

Therefore, in the embodiment of the application, the link layer is controlled to enter a low-power consumption state in idle transmission time of the data streams of the core particle and the opposite core particle, and the physical layer maintains the working state unchanged, so that the low-power consumption control of the core particle is realized, and the power consumption of the core particle is reduced; and the retraining process of state switching caused by low-power control at the physical layer is avoided, the power consumption and time occupation caused by retraining at the physical layer are saved, and the time for data stream transmission can be prolonged. Therefore, the scheme provided by the embodiment of the application can reduce the power consumption of the core interconnection under the core interconnection scene, and improve the time used for data stream transmission and the data transmission efficiency by avoiding the retraining of a physical layer.

In an alternative implementation, to implement the link layer to close its data transmission path during the idle time of data stream transmission, the link layer of the embodiments of the present application may set low power control logic (e.g. low power control logic 13 in core 1 and low power control logic 23 in core 2 in fig. 5). The function of the link layer of the core to enter and exit the low power consumption state can be realized by the low power consumption control logic arranged by the link layer of the core. The low-power consumption control logic is a logic circuit arranged in a link layer of the core particle, and can be used for controlling the link layer to close a data transmission channel of the link layer in idle transmission time of a data stream and controlling the link layer to open the data transmission channel of the link layer in working transmission time of the data stream. Thus, the link layer can realize entry and exit of the low power consumption state based on the control of the low power consumption control logic.

It can be understood that, under the condition of low power consumption control of the link layer and low power consumption control logic implementation based on the link layer, the working state of the physical layer of the core particle is maintained unchanged when the link layer of the core particle enters the low power consumption state, so that after the link layer starts the data transmission path, the link layer can transmit data streams to the data transmission path of the physical layer through the data transmission path, the physical layer retraining process when the physical layer of the core particle performs state switching is avoided, and the power consumption and the corresponding time of physical layer retraining are reduced.

The following describes the low power consumption control scheme of the embodiment of the present application in detail in the context of the interconnection of the core particles based on the core particles described above. Fig. 7 is a schematic flow chart illustrating an alternative procedure for correspondingly entering a low power consumption state in the low power consumption control method in the embodiment of the present application.

Based on the characteristics of the data transmission direction in the core particle interconnection scene, the core particle can send data flow to the opposite-end core particle, and the opposite-end core particle can also send data flow to the core particle.

As an alternative implementation, from the perspective of the core particle 1 shown in fig. 7, the core particle 2 serves as the opposite core particle of the core particle 1. In the case where the transmission data stream between the core particle and the interconnected counter-end core particle is the core particle 1 transmitting the data stream to the counter-end core particle 2, the following steps may be performed by the link layer 11 of the core particle 1 as shown in connection with fig. 7.

Step S101, when the transmission idle time arrives, a low power consumption entry request is acquired.

The low power access request may be sent to the link layer 11 by a protocol layer located above the link layer 11 to instruct the link layer 11 to enter a low power state.

And step S102, transmitting an entry low-power signal to the opposite-end core particle in response to the low-power entry request.

The low power consumption entering signal sent by the link layer 11 of the core particle 1 is used to control the link layer 21 of the opposite core particle 2 to close the data receiving path, so that the link layer 21 of the opposite core particle 2 enters a low power consumption state. In an alternative implementation, the link layer 11 of the core 1 sends an incoming low power signal to the link layer 21 of the opposite core 2 via a data transmission path.

In one implementation example, the low power control logic provided in the link layer of the core may send an enter low power signal to the core at the opposite end after receiving the low power enter request sent by the protocol layer of the core. For example, the low power control logic 13 provided in the link layer 11 of the core 1 may send an enter low power signal to the core 2 of the opposite end after receiving the low power enter request sent by the protocol layer of the core 1.

The link layer 11 may perform step S103 while the link layer 11 transmits an enter low power signal to the opposite core particle, closing the data transmission path.

In some embodiments, the link layer shutdown data transmission path of the core may be implemented based on an operating clock of the link layer. In one example, the link layer 11 of the core 1 may close the data transmission path of the link layer 11 by closing the operating clock of the data transmission path. In an alternative implementation, the low power control logic provided in the link layer of the core may send an operation clock shutdown notification to the data transmission path of the link layer of the core, so that the link layer of the core shuts down the data transmission path. For example, the low power consumption control logic 13 provided in the link layer 11 of the core 1 may send an operation clock off notification to the data transmission path of the link layer 11 of the core 1, so that the link layer 11 of the core 1 turns off the data transmission path.

In the case that the core particle transmits a data stream to the opposite core particle, the low power consumption control logic set in the link layer of the core particle may transmit a low power consumption entering signal to the core particle of the opposite end after acquiring the low power consumption entering request transmitted by the protocol layer of the core particle, and transmit an operation clock closing notification to the data transmission path of the link layer of the core particle, so that the link layer of the core particle closes the data transmission path. For example, in fig. 5, when the core 1 transmits a data stream, the link layer 11 of the core 1 closes the data transmission path 111 by closing the operation clock of the data transmission path 111. For example, the low power consumption control logic 13 provided in the link layer 11 of the core 1 may send an enter low power consumption signal to the core 2 at the opposite end after acquiring the low power consumption entry request sent by the protocol layer of the core 1, and send an operation clock off notification to the transmission path 111 of the link layer 11 of the core 1, so that the link layer 11 of the core 1 closes the data transmission path 111.

In some embodiments, the link layer may be configured to close the data transmission path of the link layer by driving the working clock of the link layer, where the closing of the data transmission path is achieved by closing the working clock of the data transmission path. For example, the low power control logic provided in the link layer of the core may be configured to send an operation clock off notification to the data transmission path of the link layer by using the operation clock of the link layer as a drive. For example, the link layer 11 of the core 1 may be a data transmission path 111 that is driven by an operation clock of the link layer 11 and is closed. For example, the low power consumption control logic 13 provided in the link layer 11 of the core 1 may send an operation clock off notification to the transmission path 111 of the link layer 11 of the core 1, with the operation clock of the link layer 11 as a drive, after acquiring the low power consumption entry request sent by the protocol layer of the core 1.

As another alternative implementation, from the perspective of the core particle 2 shown in fig. 7, the core particle 1 serves as the opposite core particle of the core particle 2. In the case where the transmission data stream between the core and the interconnected opposite core is the transmission data stream from the core 1 to the core 2, as shown in fig. 7, the opposite-end-based core 1 transmits an enter low-power signal to the core 2 when the transmission idle time arrives, and thus the link layer 21 of the core 2 may perform the following steps.

Step S104, when the transmission idle time arrives, acquiring an incoming low-power-consumption signal sent by the link layer of the opposite core particle.

Step S105, in response to the low power consumption entry signal, closes the data reception path.

It should be noted that, based on the data transmission characteristic that the data stream flows between two cores simultaneously in the core interconnection scenario, the closing of the data receiving path by the link layer 21 may be performed simultaneously with the closing of the data transmitting path by the link layer 11, so as to achieve that the opposite core 2 serving as the receiving party and the core 1 serving as the transmitting party enter the low power consumption state synchronously.

In an alternative implementation, the low power control logic provided in the link layer of the core may send an operation clock shutdown notification to the data transmission path of the link layer of the core, so that the link layer of the core shuts down the data transmission path. For example, the low power consumption control logic 23 provided in the link layer 21 of the core 2 may send an operation clock off notification to the data transmission path of the link layer 21 of the core 2, so that the link layer 21 of the core 2 closes the data transmission path.

In one example, the low power control logic provided in the core may obtain the incoming low power signal sent to the end core, so that the low power control logic in the core may send an operation clock close notification to the data transmission path of the link layer of the core, so that the link layer of the core closes the data transmission path. For example, taking the example that the core 2 receives the data stream sent by the core 1, the low power consumption control logic 23 set by the link layer 21 of the core 2 may receive the incoming low power consumption signal sent by the core 1 at the opposite end, so as to send an operation clock close notification to the data receiving path of the link layer 21 of the core 2, so that the link layer 21 of the core 2 closes the data receiving path.

In some embodiments, the link layer may be configured to close the data transmission path of the link layer by driving the working clock of the link layer, where the closing of the data transmission path is achieved by closing the working clock of the data transmission path. For example, the low power control logic provided in the link layer of the core may be configured to send an operation clock off notification to the data transmission path of the link layer by using the operation clock of the link layer as a drive. For example, the link layer 21 of the core 2 may be a data reception path 211 that is driven by an operation clock of the link layer 21 and is closed. For example, the low power consumption control logic 23 provided in the link layer 21 of the core 2 may send an operation clock off notification to the data reception path 211 of the link layer 21 of the core 2, driven by the operation clock of the link layer 21, after acquiring the incoming low power consumption signal sent to the core 1.

In some embodiments, based on the link layer taking the working clock of the link layer as the driving clock, the data transmission path of the link layer is closed, so that the speed of the link layer entering the low power consumption state can correspond to the working clock period of the link layer.

In some embodiments, the corresponding link layer enters a low power state and needs to exit the low power state when the transmission operating time arrives. Fig. 8 is a schematic flow chart illustrating an alternative method for controlling low power consumption according to an embodiment of the present application.

As an alternative implementation, from the perspective of the core particle 1 shown in fig. 8, the core particle 2 serves as the opposite core particle of the core particle 1. The data streams transmitted between the core and the interconnected, opposite core are: in case the core 1 transmits a data stream to the opposite core 2, the link layer 11 of the core 1 may perform the following steps.

In step S201, when the transmission operation time arrives, the data transmission path is opened.

As an alternative implementation, the link layer 11 of the core 1 may be a low power exit request based on a protocol layer, and the data transmission path is opened. In a specific example, the protocol layer sends a low power exit request to the link layer 11 of the core 1 to indicate that the transmission working time arrives, so that the link layer opens the data transmission path.

As another alternative implementation, the length of the transmission idle time may be preset to be a preset number of working clock cycles of the link layer, so that after the link layer of the core particle enters the low power consumption state, the arrival of the transmission working time of the data stream may be confirmed through the preset number of working clock cycles of the link layer, and then the link layer of the core particle may automatically open the data transmission path. In an alternative implementation, after the link layer of the core particle enters the low power consumption state, if the timing reaches the working clock period of the link layer of the preset number, the low power consumption control logic arranged in the link layer of the core particle can control the data transmission path in the link layer of the core particle to be opened. For example, the low power control logic provided in the link layer of the core may send an operation clock on notification to the data transmission path of the link layer of the core to control the data transmission path in the link layer of the core to be on.

For example, the link layer 11 of the core 1 may open the data transmission path 111, so that the data transmission path is opened by the link layer 11, and the data stream of the protocol layer in the core 1 can be transferred to the link layer, and thus to the physical layer 12.

While the link layer 11 turns on the data transmission path, the link layer 11 may perform step S202 to transmit an exit low power consumption signal to the opposite core particle.

Wherein the exit low power signal sent by the link layer 11 of the core 1 controls the transmission of the restart data stream to the link layer 21 of the end core 2.

In some embodiments, the link layer open data transmission path of the core may be implemented based on the link layer's operating clock. In one example, the link layer 11 of the core 1 may turn on the data transmission path of the link layer 11 by turning on an operation clock of the data transmission path. In an alternative implementation, the low power control logic provided in the link layer of the core may send an operation clock on notification to the data transmission path of the link layer of the core, so that the link layer of the core turns on the data transmission path. For example, the low power control logic 13 provided in the link layer 11 of the core 1 may send an operation clock on notification to the data transmission path of the link layer 11 of the core 1, so that the link layer 11 of the core 1 turns on the data transmission path.

When the core particle sends a data stream to the opposite core particle, the low power consumption control logic arranged in the link layer of the core particle can send a working clock start notification to the data transmission channel of the link layer of the core particle after the low power consumption exit request sent by the protocol layer of the core particle is acquired, so that the link layer of the core particle starts the data transmission channel. For example, in fig. 5, when the core 1 transmits a data stream, the link layer 11 of the core 1 turns on the data transmission path 111 by turning on the operation clock of the data transmission path 111, thereby realizing the data transmission path 111 of the link layer 11. For example, the low power consumption control logic 13 provided in the link layer 11 of the core 1 may send an operation clock start notification to the transmission path 111 of the link layer 11 of the core 1 after acquiring the low power consumption exit request sent by the protocol layer of the core 1, so that the link layer 11 of the core 1 starts the data transmission path 111.

In some embodiments, when the data transmission path is turned on based on the link layer by turning on the working clock of the data transmission path, the link layer may be to turn on the data transmission path of the link layer with the working clock of the link layer as a drive. For example, the low power control logic provided in the link layer of the core may be configured to send an operation clock on notification to the data transmission path of the link layer by using the operation clock of the link layer as a drive. For example, the link layer 11 of the core 1 may be a data transmission path 111 that is turned on by driving the operation clock of the link layer 11. For example, the low power consumption control logic 13 provided in the link layer 11 of the core 1 may send an operation clock on notification to the transmission path 111 of the link layer 11 of the core 1, with the operation clock of the link layer 11 as a drive, after acquiring the low power consumption exit request sent by the protocol layer of the core 1.

As an alternative implementation, from the perspective of the core particle 2 shown in fig. 8, the core particle 1 serves as the opposite core particle of the core particle 2. In the case where the transmission of the data stream between the core and the interconnected counter core is the transmission of the data stream from the counter core 1 to the core 2, the following steps may be performed by the link layer 21 of the core 2 based on the fact that the link layer opens the data transmission path when the transmission operation time of the counter core 1 arrives.

In step S203, when the transmission operation time arrives, the data receiving path is turned on.

As an alternative implementation, in the case that the preset number of operation clock cycles of the link layer is set in advance for the length of the transmission idle time, the arrival of the preset number of operation clock cycles of the link layer corresponding to the transmission idle of the data stream indicates that the transmission operation time arrives, and the link layer 21 of the core particle 2 automatically opens the data transmission path, for example, the link layer 21 of the core particle 2 opens the data reception path 211. Thus, the link layer 21 of the core 2 opens a data reception path, and the link layer 21 of the core 2 can receive information transmitted by the link layer 11 of the core 1.

In an alternative implementation, the low power control logic provided in the link layer of the core may send an operation clock on notification to the data transmission path of the link layer of the core, so that the link layer of the core turns on the data transmission path. For example, the low power control logic 23 provided in the link layer 21 of the core 2 may send an operation clock on notification to the data transmission path of the link layer 21 of the core 2, so that the link layer 21 of the core 2 turns on the data transmission path.

In some embodiments, when the data transmission path is turned on based on the link layer by turning on the working clock of the data transmission path, the link layer may be to turn on the data transmission path of the link layer with the working clock of the link layer as a drive. For example, the low power control logic provided in the link layer of the core may be configured to send an operation clock on notification to the data transmission path of the link layer by using the operation clock of the link layer as a drive. For example, the link layer 21 of the core 2 may be a data receiving path 211 that is turned on by driving an operation clock of the link layer 21. For example, the low power control logic 23 provided in the link layer 21 of the core 2 may send an operation clock on notification to the data receiving path 211 of the link layer 21 of the core 2, driven by the operation clock of the link layer 21 after a preset number of operation clock cycles.

Step S204, obtaining an exit low-power-consumption signal sent by a link layer of the opposite end core particle, and restarting transmission of the data stream in response to the exit low-power-consumption signal.

Normal data stream transmission can be resumed between the core grain 1 as the transmitting side and the core grain 2 as the receiving side based on the opening of the data transmission path of the link layer 11 of the core grain 1 and the opening of the data reception path of the link layer 21 of the core grain 2.

It can be seen that, in the core particle of the embodiment of the present application, in the idle time of transmission of the data streams of the core particle and the opposite core particle, the link layer is controlled to enter a low power consumption state, while the physical layer maintains the working state unchanged, so as to realize low power consumption control of the core particle and reduce power consumption of the core particle; and the retraining process of state switching caused by low-power control at the physical layer is avoided, the power consumption and time occupation caused by retraining at the physical layer are saved, and the time for data stream transmission can be prolonged. Therefore, the scheme provided by the embodiment of the application can reduce the power consumption of the core interconnection under the core interconnection scene, and improve the time used for data stream transmission and the data transmission efficiency by avoiding the retraining of a physical layer.

Embodiments of the present application also provide a chip comprising a plurality of interconnected core particles, which may be as provided by embodiments of the present application.

The embodiment of the application also provides a computer device, such as a server device or a terminal device, which may include the chip provided in the embodiment of the application.

The foregoing describes a number of embodiments provided by embodiments of the present application, and the various alternatives presented by the various embodiments may be combined, cross-referenced, with each other without conflict, extending beyond what is possible, all of which may be considered embodiments disclosed and disclosed by embodiments of the present application.

Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention shall be defined by the appended claims.

Claims (19)

1. A core particle for transmitting a data stream between the core particle and an interconnected pair of end core particles, the core particle comprising: a core interconnection interface; the core particle interconnection interface comprises: a link layer and a physical layer;

the link layer is used for closing a data transmission path of the link layer in the transmission idle time of the data stream so that the link layer enters a low-power consumption state;

wherein, the physical layer maintains the working state unchanged.

2. The core particle of claim 1, wherein transmitting a data stream between the core particle and an interconnected counter-end core particle comprises: the core particle transmits a data stream to the opposite core particle; the link layer is configured to close a data transmission path of the link layer in a transmission idle time of the data stream, and includes:

when the transmission idle time arrives, acquiring a low-power-consumption entry request;

Responding to the low-power-consumption entering request, sending a low-power-consumption entering signal to the opposite-end core particle, and closing a data sending passage of the link layer;

the low-power-consumption entering signal is used for controlling the link layer of the opposite terminal core particle to close a data receiving path so that the link layer of the opposite terminal core particle enters a low-power-consumption state.

3. The core particle of claim 1, wherein transmitting a data stream between the core particle and an interconnected counter-end core particle comprises: the peer core sending a data stream to the core; the link layer, configured to close a data transmission path of the link layer during a transmission idle time of the data stream, includes:

when the transmission idle time arrives, acquiring an entering low-power-consumption signal sent by a link layer of the opposite terminal core particle;

and closing a data receiving path of a link layer in response to the entering low-power-consumption signal.

4. A core particle according to any of claims 1-3, characterized in that the link layer closes the data transmission path of the link layer by closing the working clock of the data transmission path.

5. The core particle of claim 1, wherein the link layer is further configured to, at a transmission operating time of the data stream, open a data transmission path of the link layer to cause the link layer to exit a low power consumption state.

6. The core particle of claim 5, wherein transmitting a data stream between the core particle and an interconnected counter-end core particle comprises: the core particle transmits a data stream to the opposite core particle; the link layer is configured to open a data transmission path of the link layer during a transmission working time of the data stream, and includes:

when the transmission working time arrives, a data transmission path of the link layer is started, and a low-power-consumption exiting signal is transmitted to the opposite end core particle;

the exit low-power consumption signal is used for controlling the link layer of the opposite-end core particle to restart the transmission of the data stream.

7. The core particle of claim 5, wherein transmitting a data stream between the core particle and an interconnected counter-end core particle comprises: the peer core sending a data stream to the core; the link layer is configured to open a data transmission path of the link layer during a transmission working time of the data stream, and includes:

when the transmission working time arrives, a data receiving path of a link layer is opened;

and acquiring an exit low-power-consumption signal sent by the link layer of the opposite end core particle, and restarting transmission of the data stream in response to the exit low-power-consumption signal.

8. The core particle of any of claims 5-7, wherein the link layer opens the data transmission path of the link layer by opening an operating clock of the data transmission path.

9. The core particle of claim 5, wherein the link layer uses an operation clock of the link layer as a driving clock, and wherein the data transmission path of the link layer is closed or the data transmission path of the link layer is opened.

10. The core particle of claim 9, wherein the transmission idle time has a length of time that is a preset number of operating clock cycles of the link layer.

11. The core particle of claim 5, wherein the link layer comprises: low power consumption control logic;

the low power consumption control logic is configured to execute the step of closing a data transmission path of the link layer during the transmission idle time of the data stream, so that the link layer enters a low power consumption state; and executing the step of starting the data transmission path of the link layer in the transmission working time of the data stream so as to enable the link layer to exit the low-power consumption state.

12. A low power consumption control method, characterized by being applied to the core particle according to any one of claims 1-11, wherein a data stream is transmitted between the core particle and an interconnected counter-end core particle; the method comprises the following steps:

Closing a data transmission path of the link layer in the transmission idle time of the data stream so as to enable the link layer to enter a low-power consumption state;

and maintaining the working state of the physical layer unchanged.

13. The low power consumption control method according to claim 12, characterized by further comprising:

and opening a data transmission path of the link layer in the transmission working time of the data stream so as to enable the link layer to exit the low-power consumption state.

14. The low power consumption control method according to claim 13, wherein transmitting the data stream between the core particle and the interconnected counter-end core particle comprises: the core particle transmits a data stream to the opposite core particle; and closing a data transmission path of a link layer in the transmission idle time of the data stream, wherein the method comprises the following steps:

when the transmission idle time arrives, acquiring a low-power-consumption entry request;

responding to the low-power-consumption entering request, sending a low-power-consumption entering signal to the opposite-end core particle, and closing a data sending passage of a link layer; the low-power-consumption entering signal is used for controlling the link layer of the opposite terminal core particle to close a data receiving path so as to enable the link layer of the opposite terminal core particle to enter a low-power-consumption state;

The opening the data transmission path of the link layer at the transmission working time of the data stream comprises the following steps:

when the transmission working time arrives, a data transmission path of a link layer is opened, and a low-power-consumption exiting signal is transmitted to the opposite terminal core particle; the exit low-power consumption signal is used for controlling the link layer of the opposite-end core particle to restart the transmission of the data stream.

15. The method for controlling low power consumption according to any one of claims 12 to 14, wherein the closing the data transmission path of the link layer includes: the working clock period of the link layer is used as a driving clock, and the working clock of a data transmission path of the link layer is closed;

opening the data transmission path of the link layer comprises: and starting the working clock of the data transmission path of the link layer by taking the working clock period of the link layer as a driving clock.

16. The low power consumption control method according to claim 13, wherein transmitting the data stream between the core particle and the interconnected counter-end core particle comprises: the peer core sending a data stream to the core; and closing a data transmission path of a link layer in the transmission idle time of the data stream, wherein the method comprises the following steps:

when the transmission idle time arrives, acquiring an entering low-power-consumption signal sent by a link layer of the opposite terminal core particle;

Closing a data receiving path of a link layer in response to the enter low power consumption signal;

the opening the data transmission path of the link layer at the transmission working time of the data stream comprises the following steps:

when the transmission working time arrives, a data receiving path of a link layer is opened;

and acquiring an exit low-power-consumption signal sent by the opposite-end core particle, and restarting transmission of the data stream in response to the exit low-power-consumption signal.

17. The method of claim 16, wherein the closing the data reception path of the link layer comprises: the working clock period of the link layer is used as a driving clock, and the working clock of a data receiving path of the link layer is closed;

the data receiving path of the open link layer includes: and starting the working clock of the data receiving path of the link layer by taking the working clock period of the link layer as a driving clock.

18. A chip comprising a plurality of interconnected core particles, said core particles according to any one of claims 1-11.

19. A computer device comprising the chip of claim 18.