CN116450224A - Data recovery method, device and system based on clearing CMOS - Google Patents
Data recovery method, device and system based on clearing CMOS Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0632—Configuration or reconfiguration of storage systems by initialisation or re-initialisation of storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The embodiment of the application provides a recovery method of data based on clearing CMOS, wherein the method comprises the following steps: the server responds to the detected trigger event for triggering and clearing the CMOS, and basic product information in pluggable equipment is obtained; acquiring default information of hardware factory configuration from the basic product information; and the server restores the system variables stored in the flash read-only memory in the basic input/output system according to the default information of the factory configuration of the hardware. According to the method and the device, the problem that the system variable stored in the flash read-only memory in the basic input/output system can be recovered only through the instruction based on the intelligent platform management interface received by the main board management controller in the related technology is solved, and the effect of improving the convenience of server management is achieved.
Description
Technical Field
The embodiment of the application relates to the technical field of computers, in particular to a recovery method, a recovery device and a recovery system for data based on clearing CMOS.
Background
In the related art, after the removal of CMOS (Complementary Metal Oxide Semiconductor ) is completed, the process of recovering the system variables stored in the BIOS Flash ROM excessively depends on the use of the intelligent platform management interface (Intelligent Platform Management Interface, IPMI) environment by dividing a fixed RW Variable area and an RO Variable area among Flash ROM, wherein the RW area stores modification information of the Variable and the RO area stores initial default information of the Variable. If the CMOS function needs to be cleared for a specific server, the factory configuration of the server is restored, clear CMOS commands can only be carried through IPMI, and if the IPMI environment of the server room is paralyzed or the server itself does not support the baseboard management controller (Baseboard Management Controller, BMC) to be carried, the restoration of the system variables stored in the BIOS Flash ROM cannot be realized according to the related technology, thereby bringing a lot of inconvenience to the asset management and the backend operation and maintenance of the server user.
Disclosure of Invention
The embodiment of the application provides a recovery method, a device and a system based on clearing CMOS (complementary metal oxide semiconductor) data, which at least solve the problem that in the related art, system variables stored in a flash read-only memory in a basic input/output system can be recovered only through an instruction based on an intelligent platform management interface received by a main board management controller.
According to one embodiment of the present application, there is provided a recovery method of data based on a clear CMOS, including: the server responds to the detected trigger event for triggering and clearing the CMOS, and basic product information in pluggable equipment is obtained; acquiring default information of hardware factory configuration from the basic product information; and the server restores the system variables stored in the flash read-only memory in the basic input/output system according to the default information of the factory configuration of the hardware.
Optionally, the server detects whether pluggable equipment is connected to a slot of a high-speed serial computer expansion bus interface of the server in the nth starting process, wherein n is a positive integer; under the condition that the accessed pluggable equipment is detected in the nth starting process, determining whether hardware factory configuration default information is stored in an area for storing basic product information in the pluggable equipment; under the condition that the hardware factory configuration default information is stored in the area for storing the basic product information in the pluggable equipment, the target code in the basic input and output system of the server is written into the hardware factory configuration default information.
Optionally, under the condition that the server is detected not to be connected to the pluggable device in the nth starting process or under the condition that hardware factory configuration default information is not stored in an area for storing basic product information in the pluggable device, reading the hardware factory configuration default information from read-only information in the flash read-only memory through an object code in a basic input/output system of the server.
Optionally, in the case that the non-accessed pluggable device is detected in the nth startup process, the method further includes: and setting a first code zone bit for the basic input and output system, wherein the first code zone bit is used for indicating that pluggable equipment is not accessed.
Optionally, after setting the first code flag bit, the method further includes: the method comprises the steps that in the (n+1) th starting process, a server detects whether pluggable equipment is connected into a slot of a high-speed serial computer expansion bus interface of the server or not; and under the condition that the access pluggable equipment is detected in the n+1th starting process, all data in a storage area for storing basic product information in the pluggable equipment are cleared, and a second code zone bit is set for the basic input/output system, wherein the second code zone bit is used for indicating that the access pluggable equipment is accessed.
Optionally, detecting whether the server includes an intelligent platform management interface and a motherboard management controller supporting the intelligent platform management interface; under the condition that the server comprises an intelligent platform management interface and a main board management controller, the server recovers the system variables stored in the flash read-only memory in the basic input/output system through basic product information of pluggable equipment, or recovers the system variables stored in the flash read-only memory in the basic input/output system through an instruction based on the intelligent platform management interface and received by the main board management controller; and under the condition that the server does not comprise the intelligent platform management interface and the mainboard management controller, the server recovers the system variables stored in the flash read-only memory in the basic input/output system through the basic product information of the pluggable equipment.
Optionally, if the server is detected to include the intelligent platform management interface and the motherboard management controller, if the pluggable device is detected to be not accessed within the preset duration, the server recovers the system variable stored in the flash rom in the bios through the instruction based on the intelligent platform management interface received by the motherboard management controller.
Optionally, detecting an access event of the pluggable device in case the server is running live; in response to detecting the access event, the acquisition of the base product information from the pluggable device is triggered.
Optionally, the base product information includes: important product data VPD of the pluggable device.
Optionally, in the case that the pluggable device comprises a live erasable programmable read-only memory, the base product information is stored in the live erasable programmable read-only memory; in the case where the pluggable device does not include a charged erasable programmable read-only memory, the basic product information is stored in other non-volatile memory in the pluggable device.
Optionally, in the case that the pluggable device includes an electrified erasable programmable read-only memory, acquiring basic product information in the electrified erasable programmable read-only memory through the integrated circuit bus; in the case where the pluggable device does not include a charged erasable programmable read-only memory, basic product information is obtained in other non-volatile memories through a high-speed serial computer expansion bus.
Optionally, the pluggable device at least includes: hardware devices based on the high-speed serial computer expansion bus standard.
According to another embodiment of the present application, there is provided a recovery apparatus for clearing CMOS-based data, including: the first acquisition module is used for responding to the detected trigger event for triggering and clearing the CMOS and acquiring basic product information in the pluggable equipment; the second acquisition module is used for acquiring default information of the factory configuration of the hardware from the basic product information; and the recovery module is used for recovering the system variables stored in the flash read-only memory in the basic input/output system according to the default information of the factory configuration of the hardware.
According to another embodiment of the present application, there is provided a recovery system for clearing CMOS-based data, including: the system comprises a server and pluggable equipment, wherein the pluggable equipment is in pluggable connection with the server and is used for providing basic product information; the server is used for responding to the detected trigger event for triggering and clearing the CMOS, obtaining the basic product information in the pluggable equipment, obtaining the default information of the factory configuration of the hardware from the basic product information, and recovering the system variable stored in the flash ROM in the basic input and output system according to the default information of the factory configuration of the hardware.
Optionally, the server is further configured to detect, in an nth starting process, whether a pluggable device is connected to a slot of the high-speed serial computer expansion bus interface of the server, where n is a positive integer; under the condition that the accessed pluggable equipment is detected in the nth starting process, determining whether hardware factory configuration default information is stored in an area for storing basic product information in the pluggable equipment; under the condition that the hardware factory configuration default information is stored in the area for storing the basic product information in the pluggable equipment, the target code in the basic input and output system of the server is written into the hardware factory configuration default information.
Optionally, the server is further configured to read the hardware factory configuration default information from the read-only information in the flash rom through an object code in a basic input/output system of the server when it is detected that the server is not connected to the pluggable device in the nth starting process, or when no hardware factory configuration default information is stored in an area for storing basic product information in the pluggable device.
Optionally, the server is further configured to set a first code flag bit for the bios if the pluggable device is detected to be not connected in the nth startup process, where the first code flag bit is used to indicate that the pluggable device is not connected.
Optionally, the pluggable device at least includes: hardware devices based on the high-speed serial computer expansion bus standard.
Optionally, the server runs on a Windows operating system or a Linux operating system; the server comprises at least a basic input output system.
Alternatively, the pluggable device may be connected to or disconnected from the server's interface based on the high-speed serial computer expansion bus standard while the server is running live.
Optionally, the number of times of plugging the pluggable device in the preset time period does not exceed a preset value.
According to a further embodiment of the present application, there is also provided a computer readable storage medium having stored therein a computer program, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
According to a further embodiment of the present application, there is also provided an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
By the method, the system variable stored in the flash read-only memory in the basic input/output system is recovered by utilizing the default information of the factory configuration of the hardware of the basic product information in the pluggable equipment which is in pluggable connection. Therefore, the problem that the system variable stored in the flash read-only memory in the basic input/output system can be recovered only through the instruction based on the intelligent platform management interface received by the main board management controller can be solved, and the effect of improving the convenience of server management is achieved.
Drawings
Fig. 1 is a block diagram of a hardware structure of a mobile terminal based on a restoration method of data of a clear CMOS according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a method of restoring data based on clear CMOS in accordance with the related art;
FIG. 3 is a flow chart of a method of restoring data based on clear CMOS in accordance with an embodiment of the present application;
FIG. 4 is a flow chart of another method of restoring data based on clear CMOS in accordance with an embodiment of the present application;
FIG. 5 is a schematic diagram of a method of restoring data based on clear CMOS in accordance with an embodiment of the present application;
FIG. 6 is a block diagram of a device for recovering data based on a clear CMOS in accordance with an embodiment of the present application;
fig. 7 is a block diagram of a recovery system based on clearing CMOS data according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that the terms "first," "second," and the like in the description and claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
The method embodiments provided in the embodiments of the present application may be performed in a mobile terminal, a computer terminal or similar computing device. Taking the operation on a mobile terminal as an example, fig. 1 is a block diagram of a hardware structure of a mobile terminal according to an embodiment of the present application, which is based on a recovery method for removing CMOS data. As shown in fig. 1, a mobile terminal may include one or more (only one is shown in fig. 1) processors 102 (the processor 102 may include, but is not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA) and a memory 104 for storing data, wherein the mobile terminal may also include a transmission device 106 for communication functions and an input-output device 108. It will be appreciated by those skilled in the art that the structure shown in fig. 1 is merely illustrative and not limiting of the structure of the mobile terminal described above. For example, the mobile terminal may also include more or fewer components than shown in fig. 1, or have a different configuration than shown in fig. 1.
The memory 104 may be used to store a computer program, for example, a software program of application software and a module, such as a computer program corresponding to a method for recovering data based on clearing CMOS in the embodiment of the present application, and the processor 102 executes the computer program stored in the memory 104, thereby performing various functional applications and data processing, that is, implementing the above-mentioned method. Memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory remotely located relative to the processor 102, which may be connected to the mobile terminal via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device 106 is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, simply referred to as NIC) that can connect to other network devices through a base station to communicate with the internet. In one example, the transmission device 106 may be a Radio Frequency (RF) module, which is configured to communicate with the internet wirelessly.
Compared with the traditional BIOS and UEFI BIOS, the Coreboot+LinuxBoot is a new generation BIOS standard on a server main board, the setting mode of the Nvram variable is generally realized by storing the Nvram variable in a flash rom storing BIOS codes in the whole Coreboot design, and Nvarm information is determined by setting in the compiling period of BIOS bin files, and a certain section of area is fixed in the storage of the BIOS bin files during burning. However, in this setup state, once an unexpected problem occurs in the server environment and Clear CMOS is required in the case where a certain Nvram variable value is modified, coreboot itself often can only send Clear CMOS commands through IPMI commands. Therefore, there is a great interference in the use and maintenance of Clear CMOS functions in the case of a server that is not BMC-mounted and does not support IPMI, or in the case of an IPMI environment failure.
Fig. 2 is a schematic diagram of a method for restoring data based on clearing CMOS according to the related art, as shown in fig. 2, for example, after the Clear CMOS requirement occurs because of a server environment problem requiring restoration of factory settings, an out-of-band user sends an IPMI command to a BMC of the server, and the Clear CMOS command is sent to the BIOS through the BMC. The BIOS Code defaults to read initial default information of Variable in a RW area in BIOS Flash Rom; after receiving the Clear CMOS command, the BIOS Code reads the initial default information of the Variable in the RO area in the BIOS Flash Rom to complete the recovery of the system Variable stored in the Flash ROM in the basic input/output system.
However, it should be noted that, the part of the server does not support the BMC carrying and IPMI functions, so that the recovery of the system variables stored in the flash rom in the bios cannot be achieved according to the related art, and there are a lot of inconveniences for asset management and back-end operation of the server user.
In order to solve the above-mentioned problems, related solutions are provided in the embodiments of the present application, and the following detailed description is provided.
In this embodiment, a method for recovering data based on clearing CMOS operating on the mobile terminal is provided, and fig. 3 is a flowchart of a method for recovering data based on clearing CMOS according to an embodiment of the present application, as shown in fig. 3, where the flowchart includes the following steps:
in step S302, the server obtains basic product information in the pluggable device in response to the detected trigger event for triggering the removal of the CMOS.
As an alternative embodiment of the present application, the pluggable device includes basic product information therein, such as important product data (Vital Product Data, VPD), which is basic product information stored in the computer system, including information of product name, manufacturer name, serial number, part number, version, etc., which is generally used to identify the hardware device and manage its configuration. The VPD may be stored in a computer or other electronic device and may be queried and modified by specific commands or tools. In this embodiment, the VPD is stored in the VPD area of the pluggable device.
The pluggable device is a PCIe device, which is an external hardware device based on PCI Express (Peripheral Component Interconnect Express) bus standard. PCIe devices may connect with computer systems and servers through PCIe slots (slots) and allow for high speed data transfer. Common PCIe devices include graphics cards, network cards, sound cards, memory controllers, and the like, which can improve server performance and increase its functionality and extensibility. PCIe is a high-speed, point-to-point serial connection used to connect various devices in a computer system, such as a graphics card, network card, disk controller, etc. PCIe employs differential signaling techniques to achieve higher bandwidth and lower latency. PCIe has greater bandwidth and scalability and is easy to configure and manage than earlier versions of PCI bus used previously.
Step S304, obtaining default information of the factory configuration of the hardware from the basic product information.
First, the Nvram variable refers to a system setting variable stored in a nonvolatile random access memory (Nvram). The Nvram variable is generally responsible for server hardware information display, hardware configuration and responsibility for controlling various hardware functions, server information management is provided for server manufacturers and users, and servers are reasonably used and server errors are repaired. Nvram variables are commonly used to manage hardware and software settings such as power options, start-up sequences, clock rates, etc. The user can modify the set values of various Nvram variables during the use of the server.
When the server leaves the factory, default values are set for all the Nvram variables, and the default values are hardware factory configuration default information obtained from basic product information.
Step S306, the server recovers the system variables stored in the flash ROM of the basic input/output system according to the default information of the factory configuration of the hardware.
In Clear CMOS, recovery of system variables stored in BIOS Flash ROM is required. Among them, flash ROM is a type of programmable Read Only Memory (ROM) stored in a computer or electronic device. The system software is usually used for storing firmware, BIOS and the like, and can be burnt and updated by a specific tool. The Flash ROM has the advantages of easy erasing, high speed, low power consumption and the like, and supports multiple updating and modification, so that the Flash ROM is widely applied to various electronic devices.
Clear CMOS is a method to restore the motherboard BIOS settings, which can Clear all BIOS settings and restore them to factory defaults. Clear CMOS is typically used when repairing hardware problems, such as a start-up error or no device detected.
For example, the above steps are directed to recovery of system variables in the Flash ROM of the server BIOS under the Coreboot BIOS, and the recovery method discards the BMC and IPMI paths, and simply controls the implementation of the Clear CMOS function under the Coreboot platform by the plugging operation of the pluggable device. The Coreboot is an open-source firmware, is published based on a Linux first boot loader protocol, and has a plurality of advantages compared with a traditional closed BIOS. First, coreboot can significantly reduce computer boot time and also support custom operating system installation from a network, USB or hard drive. Secondly, during operation on the server side, coreboot can be used to meet enterprise-level scale requirements, thus eliminating the need for related dedicated firmware. Coreboot consists essentially of three components: 1. bootloader: the method is responsible for loading a Linux kernel and jumping to the kernel; 2. payload: the load module is an optional component, and other binary files except for a Linux core can be used as load configuration; 3. firmware Configuration: the main board interface and the firmware set the relevant information storage area.
BIOS refers to Basic Input/Output System (BIOS), which is a program of computer hardware, and is a program solidified on a computer motherboard, and is responsible for initializing and controlling computer hardware equipment. The BIOS is located before an Operating System (OS) and manages the various parts of the computer that are needed to interact with the CMOS chip. When the server is started, the BIOS is responsible for checking whether all relevant hardware devices work normally, running the safe starting process and other tasks.
Through the steps, the system variables stored in the flash read-only memory in the basic input/output system are restored by utilizing the default information of the factory configuration of the hardware of the basic product information in the pluggable equipment which is in pluggable connection, so that the problem that the system variables stored in the flash read-only memory in the basic input/output system can only be restored by an instruction based on an intelligent platform management interface received by a main board management controller is solved, and the convenience of server management is improved.
The main execution body of the above steps may be a server, but is not limited thereto.
Fig. 4 is a flowchart of another method for recovering data based on clear CMOS according to an embodiment of the present application, as shown in fig. 4, the flowchart includes the steps of:
Step S402, judging whether pluggable equipment is connected to a slot of a high-speed serial computer expansion bus interface of the server, and executing step S404 under the condition that pluggable equipment is connected to the slot of the high-speed serial computer expansion bus interface of the server; otherwise, step S408 is performed.
Step S404, judging whether the default information of the factory configuration of the hardware (namely, the default value of the Variable value) is stored in the area for storing the basic product information in the pluggable device, and executing step S406 under the condition that the default information of the factory configuration of the hardware is stored in the area for storing the basic product information in the pluggable device; otherwise, step S408 is performed.
In step S406, the server BIOS Code writes default information of the hardware factory configuration.
The BIOS Code is a series of instructions read and executed by a chip on a motherboard when the computer is started, and is used for initializing hardware devices, loading an operating system and providing basic system services. In CMOS located on a computer motherboard, it is generally not modifiable or removable.
In step S408, the BIOS Code reads the default value of the Variable value from the RO Variable area in Flash Rom.
The RO Variable area is an important part of the Flash ROM, and holds Read-Only (Read-Only) variables. These variables are initialized at system start-up and cannot be modified. The RO Variable area is used to store some fixed data or setting parameters, such as system hardware configuration information, product serial numbers, bootloader versions, etc. Since these data are read-only and stored in ROM rather than RAM, it can be ensured that their contents are not accidentally changed or attacked. When the device is booted, the operating system and applications may need to access the information in these RO Variable regions to do the relevant operations. Therefore, special care must be taken in designing Flash ROM to place the RO Variable region to ensure easy access and secure security.
According to an optional embodiment of the application, the server detects whether a pluggable device is connected to a slot of a high-speed serial computer expansion bus interface of the server in an nth starting process, wherein n is a positive integer; under the condition that the accessed pluggable equipment is detected in the nth starting process, determining whether hardware factory configuration default information is stored in an area for storing basic product information in the pluggable equipment; under the condition that the hardware factory configuration default information is stored in the area for storing the basic product information in the pluggable equipment, the target code in the basic input and output system of the server is written into the hardware factory configuration default information.
According to another optional embodiment of the present application, in a case that it is detected in the nth startup process that the server is not connected to the pluggable device, or in a case that no hardware factory configuration default information is stored in an area for storing basic product information in the pluggable device, the hardware factory configuration default information is read from the read-only information in the flash rom through an object code in the basic input output system of the server.
In some optional embodiments of the present application, in a case that a pluggable device is detected to be not accessed during the nth startup process, there is a need to: and setting a first code zone bit for the basic input and output system, wherein the first code zone bit is used for indicating that pluggable equipment is not accessed.
In an alternative embodiment, after setting the first code flag bit, it is also necessary to: the method comprises the steps that in the (n+1) th starting process, a server detects whether pluggable equipment is connected into a slot of a high-speed serial computer expansion bus interface of the server or not; and under the condition that the access pluggable equipment is detected in the n+1th starting process, all data in a storage area for storing basic product information in the pluggable equipment are cleared, and a second code zone bit is set for the basic input/output system, wherein the second code zone bit is used for indicating that the access pluggable equipment is accessed.
The method comprises the steps that in the starting process of a server, whether pluggable equipment is connected into a slot (slot) of a high-speed serial computer expansion bus interface of the server is detected; judging whether hardware factory configuration default information is stored in a VPD area in pluggable equipment under the condition that the pluggable equipment is detected to be accessed; under the condition that hardware factory configuration default information is stored in a VPD area in the pluggable equipment, the hardware factory configuration default information is written in through the BIOS Code.
Optionally, the server detects whether a pluggable device is connected to a slot (slot) of a high-speed serial computer expansion bus interface of the server in the starting process; under the condition that the pluggable device is not connected, the BIOS Code reads RO information of a default Variable value through a Flash Rom position of the BIOS Code, and meanwhile, a Code flag bit of the BIOS is set, for example, the BIOS Code is set to be 0. Continuously detecting whether pluggable equipment is connected into a slot (slot) of a high-speed serial computer expansion bus interface of the server in the next starting process; in the event that access to the pluggable device is detected, the VPD area of the pluggable device is cleared, while the code flag bit of the BIOS is set, e.g., to "1".
As an optional embodiment of the present application, detecting whether the server includes an intelligent platform management interface and a motherboard management controller supporting the intelligent platform management interface; under the condition that the server comprises an intelligent platform management interface and a main board management controller, the server recovers the system variables stored in the flash read-only memory in the basic input/output system through basic product information of pluggable equipment, or recovers the system variables stored in the flash read-only memory in the basic input/output system through an instruction based on the intelligent platform management interface and received by the main board management controller; and under the condition that the server does not comprise the intelligent platform management interface and the mainboard management controller, the server recovers the system variables stored in the flash read-only memory in the basic input/output system through the basic product information of the pluggable equipment.
It can be understood that, in the case that the server is loaded with the BMC and supports the IPMI, the BMC may receive the Clear CMOS command, and then send the Clear CMOS command to the BIOS through the BMC, and after receiving the Clear CMOS command, the BIOS Code reads the initial default information of the Variable in the RO area in the BIOS Flash Rom, so as to complete the recovery of the system Variable stored in the Flash Rom in the BIOS. The system variables stored in the flash ROM in the BIOS can also be recovered by the basic product information provided by the pluggable device.
In some optional embodiments of the present application, if it is detected that the server includes the intelligent platform management interface and the motherboard management controller, if it is detected that the pluggable device is not connected within a preset period of time, the server recovers the system variable stored in the flash rom in the bios through an instruction based on the intelligent platform management interface received by the motherboard management controller.
For example, after the server detects a trigger event for triggering Clear CMOS, no pluggable device is detected to be connected in within 10 minutes, or no default information of hardware factory configuration exists in the VPD area of the pluggable device, and the server is loaded with BMC and supports IPMI. At this time, the server recovers the system variable stored in the flash rom in the bios through the command based on the intelligent platform management interface received by the motherboard management controller.
As another optional embodiment of the present application, before the server obtains the basic product information of the pluggable device, the following method may be further implemented: detecting a trigger event for triggering the clearing of the CMOS; and under the condition that the trigger event is detected, acquiring basic product information in the pluggable equipment.
It will be appreciated that recovery of system variables stored in flash read-only memory in a basic input output system is typically required after detection of a trigger event for triggering the clearing of CMOS. Wherein the trigger event triggering Clear CMOS is as follows: 1. external hardware failure: such as insufficient voltage of a main board battery, overheat of a CPU and the like; 2. BIOS setup error: when a user changes BIOS settings, a Clear CMOS is needed when the system cannot be started; 3. failure of over-frequency: after the over-clocking of the CPU or GPU, a system crash and no response may occur. At this point, the default state can be restored by Clear CMOS; 4. viral infection: if the computer is infected by virus, the CMOS data area may be modified to influence the normal operation of the system; 5. CMOS memory failure: if the CMOS chip is damaged or severely wrong, it is also necessary to clear the CMOS in some cases to solve the problem; 6. in order to prevent program execution abnormality and ensure reliability in the event of unexpected power-off, operation failure, etc. during the upgrading of the BIOS firmware, it is necessary to remove old version of setting information.
In an alternative embodiment, the access event of the pluggable device is detected in case the server is running live; in response to detecting the access event, the acquisition of the base product information from the pluggable device is triggered.
In some alternative embodiments of the present application, an unplug event of a pluggable device is detected with the server running live; and in response to detecting the unplugging event, configuring the received hardware factory configuration default information as read-only information.
According to some preferred embodiments of the present application, the base product information comprises: important product data VPD of the pluggable device.
VPD is basic product information stored in a computer system, including information of product name, manufacturer name, serial number, part number, and version, which is generally used to identify hardware devices and manage their configuration. The VPD may be stored in a computer or other electronic device and may be queried and modified by specific commands or tools. In this embodiment, the VPD is stored in the VPD area of the pluggable device.
According to an alternative embodiment of the present application, in case the pluggable device comprises a live erasable programmable read only memory, the basic product information is stored in the live erasable programmable read only memory; in the case where the pluggable device does not include a charged erasable programmable read-only memory, the basic product information is stored in other non-volatile memory in the pluggable device.
An electrically erasable programmable read-Only Memory (EEPROM) is a programmable electronic Memory that is used to store data over a long period of time. EEPROM is nonvolatile (i.e., retains memory when powered down) and can be erased multiple times without damaging or losing data. EEPROM is commonly used in devices requiring stable, long-term data storage, such as microcontrollers, computer BIOS, and the like.
When EEPROM does not exist in PCIe structural design for storing Variable value, VPD information can be stored in other storage devices with no loss of power-down data, and the storage address and mode of the information are widely specified and easy to realize.
According to another alternative embodiment of the present application, where the pluggable device comprises an electrically charged erasable programmable read-only memory, the basic product information is obtained in the electrically charged erasable programmable read-only memory via the integrated circuit bus; in the case where the pluggable device does not include a charged erasable programmable read-only memory, basic product information is obtained in other non-volatile memories through a high-speed serial computer expansion bus.
In the case of pluggable devices comprising live eeprom, basic product information is obtained in the live eeprom via an integrated circuit bus (Inter-Integrated Circuit, I 2 C) The integrated circuit bus uses a bi-directional data transfer scheme in which one host can control multiple slaves. Each device has a unique address so that the host can identify and enter into itAnd (5) line communication. The protocol supports up to 127 slave devices to be simultaneously connected to a single bus, and has the advantages of power saving, high data reliability, easiness in implementation and the like.
In the case where the pluggable device does not include a charged eeprom, the basic product information is obtained in other non-volatile memories through a high-speed serial computer expansion bus, PCIe, which is a high-speed, point-to-point serial connection used to connect various devices in the computer system, such as a graphics card, a network card, a disk controller, etc. PCIe employs differential signaling techniques to achieve higher bandwidth and lower latency. PCIe has greater bandwidth and scalability and is easy to configure and manage than earlier versions of PCI bus used previously.
In some optional embodiments of the present application, the pluggable device includes at least: hardware devices based on the high-speed serial computer expansion bus standard.
The pluggable device at least comprises a PCIe device, which is an external hardware device based on the PCI Express (Peripheral Component Interconnect Express) bus standard. PCIe devices may connect with computer systems and servers through PCIe slots (slots) and allow for high speed data transfer. Common PCIe devices include graphics cards, network cards, sound cards, memory controllers, and the like, which can improve server performance and increase its functionality and extensibility.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk), comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method described in the embodiments of the present application.
FIG. 5 is a schematic diagram of a recovery method for clearing CMOS-based data, as shown in FIG. 5, in which an out-of-band user may choose to connect a pluggable device to a slot of a high-speed serial computer expansion bus interface of a server after a Clear CMOS requirement occurs, for example, because of a server environment problem requiring recovery from factory settings, according to an embodiment of the present application.
The server judges whether pluggable equipment is connected to a slot of the high-speed serial computer expansion bus interface, judges whether hardware factory configuration default information (namely, default value of Variable value) is stored in an area for storing basic product information in the pluggable equipment under the condition that pluggable equipment is connected to the slot of the high-speed serial computer expansion bus interface of the server, and writes the hardware factory configuration default information into the server BIOS Code under the condition that the hardware factory configuration default information is stored in the area for storing the basic product information in the pluggable equipment.
Under the condition that pluggable equipment is not connected to a slot of a high-speed serial computer expansion bus interface of a server, a BIOS Code reads a default value of a Variable value from an RO Variable area in Flash Rom.
When the default information of the factory configuration of the hardware is not stored in the area for storing the basic product information in the pluggable device, the BIOS Code reads the default value of the Variable value from the RO Variable area in the Flash Rom.
In this embodiment, a recovery device based on clearing CMOS data is further provided, and this device is used to implement the foregoing embodiments and preferred embodiments, and will not be described again. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.
Fig. 6 is a block diagram of a recovery device based on clearing CMOS data according to an embodiment of the present application, and as shown in fig. 6, the device includes:
the first obtaining module 62 is configured to obtain the basic product information in the pluggable device in response to the detected trigger event for triggering and clearing the CMOS.
As an alternative embodiment of the present application, the pluggable device includes basic product information therein, such as important product data (Vital Product Data, VPD), which is basic product information stored in the computer system, including information of product name, manufacturer name, serial number, part number, version, etc., which is generally used to identify the hardware device and manage its configuration. The VPD may be stored in a computer or other electronic device and may be queried and modified by specific commands or tools. In this embodiment, the VPD is stored in the VPD area of the pluggable device. The pluggable device is a PCIe device, which is an external hardware device based on PCI Express (Peripheral Component Interconnect Express) bus standard. PCIe devices may connect with computer systems and servers through PCIe slots (slots) and allow for high speed data transfer. Common PCIe devices include graphics cards, network cards, sound cards, memory controllers, and the like, which can improve server performance and increase its functionality and extensibility. PCIe is a high-speed, point-to-point serial connection used to connect various devices in a computer system, such as a graphics card, network card, disk controller, etc. PCIe employs differential signaling techniques to achieve higher bandwidth and lower latency. PCIe has greater bandwidth and scalability and is easy to configure and manage than earlier versions of PCI bus used previously.
The second obtaining module 64 is configured to obtain default information of the factory configuration of the hardware from the basic product information.
First, the Nvram variable refers to a system setting variable stored in a nonvolatile random access memory (Nvram). The Nvram variable is generally responsible for server hardware information display, hardware configuration and responsibility for controlling various hardware functions, server information management is provided for server manufacturers and users, and servers are reasonably used and server errors are repaired. Nvram variables are commonly used to manage hardware and software settings such as power options, start-up sequences, clock rates, etc. The user can modify the set values of various Nvram variables during the use of the server.
When the server leaves the factory, default values are set for all the Nvram variables, and the default values are hardware factory configuration default information obtained from basic product information.
And the recovery module 66 is used for recovering the system variables stored in the flash read-only memory in the basic input-output system according to the default information of the factory configuration of the hardware.
In Clear CMOS, recovery of system variables stored in BIOS Flash ROM is required. Among them, flash ROM is a type of programmable Read Only Memory (ROM) stored in a computer or electronic device. The system software is usually used for storing firmware, BIOS and the like, and can be burnt and updated by a specific tool. The Flash ROM has the advantages of easy erasing, high speed, low power consumption and the like, and supports multiple updating and modification, so that the Flash ROM is widely applied to various electronic devices.
Clear CMOS is a method to restore the motherboard BIOS settings, which can Clear all BIOS settings and restore them to factory defaults. Clear CMOS is typically used when repairing hardware problems, such as a start-up error or no device detected.
For example, for recovery of system variables in a server BIOS Flash ROM under the Coreboot BIOS, the recovery mode discards BMC and IPMI paths, and the Clear CMOS function under the Coreboot platform is controlled to be realized simply through plugging operation on pluggable equipment. The Coreboot is an open-source firmware, is published based on a Linux first boot loader protocol, and has a plurality of advantages compared with a traditional closed BIOS. First, coreboot can significantly reduce computer boot time and also support custom operating system installation from a network, USB or hard drive. Secondly, during operation on the server side, coreboot can be used to meet enterprise-level scale requirements, thus eliminating the need for related dedicated firmware. Coreboot consists essentially of three components: 1. bootloader: the method is responsible for loading a Linux kernel and jumping to the kernel; 2. payload: the load module is an optional component, and other binary files except for a Linux core can be used as load configuration; 3. firmware Configuration: the main board interface and the firmware set the relevant information storage area.
BIOS refers to Basic Input/Output System (BIOS), which is a program of computer hardware, and is a program solidified on a computer motherboard, and is responsible for initializing and controlling computer hardware equipment. The BIOS is located before an Operating System (OS) and manages the various parts of the computer that are needed to interact with the CMOS chip. When the server is started, the BIOS is responsible for checking whether all relevant hardware devices work normally, running the safe starting process and other tasks.
It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the above modules may be located in different processors in any combination.
By the device, the system variables stored in the flash ROM in the basic input/output system are restored by utilizing the default information of the factory configuration of the hardware of the basic product information in the pluggable equipment which is in pluggable connection, so that the problem that the system variables stored in the flash ROM in the basic input/output system can only be restored by an instruction based on an intelligent platform management interface received by a main board management controller is solved, and the convenience of server management is improved.
Fig. 7 is a block diagram of a recovery system based on clearing CMOS data, according to an embodiment of the present application, as shown in fig. 7, the system comprising: a server 72, and a pluggable device 74, wherein,
the pluggable device 74 is in pluggable connection with the server 72 for providing basic product information.
The server 72 is configured to obtain basic product information in the pluggable device 74 in response to the detected trigger event for triggering and clearing CMOS, obtain default information of the factory configuration of the hardware from the basic product information, and restore system variables stored in the flash rom in the bios according to the default information of the factory configuration of the hardware.
By the system, the system variable stored in the flash ROM in the basic input/output system is restored by utilizing the default information of the factory configuration of the hardware of the basic product information in the pluggable equipment which is in pluggable connection, so that the problem that the system variable stored in the flash ROM in the basic input/output system can only be restored by an instruction based on an intelligent platform management interface received by a main board management controller is solved, and the convenience of server management is improved.
As an alternative embodiment of the present application, the pluggable device includes basic product information therein, such as important product data (Vital Product Data, VPD), which is basic product information stored in the computer system, including information of product name, manufacturer name, serial number, part number, version, etc., which is generally used to identify the hardware device and manage its configuration. The VPD may be stored in a computer or other electronic device and may be queried and modified by specific commands or tools. In this embodiment, the VPD is stored in the VPD area of the pluggable device. The pluggable device is a PCIe device, which is an external hardware device based on PCI Express (Peripheral Component Interconnect Express) bus standard. PCIe devices may connect with computer systems and servers through PCIe slots (slots) and allow for high speed data transfer. Common PCIe devices include graphics cards, network cards, sound cards, memory controllers, and the like, which can improve server performance and increase its functionality and extensibility. PCIe is a high-speed, point-to-point serial connection used to connect various devices in a computer system, such as a graphics card, network card, disk controller, etc. PCIe employs differential signaling techniques to achieve higher bandwidth and lower latency. PCIe has greater bandwidth and scalability and is easy to configure and manage than earlier versions of PCI bus used previously.
Note that the Nvram variable refers to a system setting variable stored in a nonvolatile random access memory (Nvram). The Nvram variable is generally responsible for server hardware information display, hardware configuration and responsibility for controlling various hardware functions, server information management is provided for server manufacturers and users, and servers are reasonably used and server errors are repaired. Nvram variables are commonly used to manage hardware and software settings such as power options, start-up sequences, clock rates, etc. The user can modify the set values of various Nvram variables during the use of the server.
When the server leaves the factory, default values are set for all the Nvram variables, and the default values are hardware factory configuration default information obtained from basic product information.
Clear CMOS is a method to restore the motherboard BIOS settings, which can Clear all BIOS settings and restore them to factory defaults. Clear CMOS is typically used when repairing hardware problems, such as a start-up error or no device detected.
For example, for recovery of system variables in a server BIOS Flash ROM under the Coreboot BIOS, the recovery mode discards BMC and IPMI paths, and the Clear CMOS function under the Coreboot platform is controlled to be realized simply through plugging operation on pluggable equipment. The Coreboot is an open-source firmware, is published based on a Linux first boot loader protocol, and has a plurality of advantages compared with a traditional closed BIOS. First, coreboot can significantly reduce computer boot time and also support custom operating system installation from a network, USB or hard drive. Secondly, during operation on the server side, coreboot can be used to meet enterprise-level scale requirements, thus eliminating the need for related dedicated firmware. Coreboot consists essentially of three components: 1. bootloader: the method is responsible for loading a Linux kernel and jumping to the kernel; 2. payload: the load module is an optional component, and other binary files except for a Linux core can be used as load configuration; 3. firmware Configuration: the main board interface and the firmware set the relevant information storage area.
BIOS refers to Basic Input/Output System (BIOS), which is a program of computer hardware, and is a program solidified on a computer motherboard, and is responsible for initializing and controlling computer hardware equipment. The BIOS is located before an Operating System (OS) and manages the various parts of the computer that are needed to interact with the CMOS chip. When the server is started, the BIOS is responsible for checking whether all relevant hardware devices work normally, running the safe starting process and other tasks.
By the system, the system variable stored in the flash ROM in the basic input/output system is restored by utilizing the default information of the factory configuration of the hardware of the basic product information in the pluggable equipment which is in pluggable connection, so that the problem that the system variable stored in the flash ROM in the basic input/output system can only be restored by an instruction based on an intelligent platform management interface received by a main board management controller is solved, and the convenience of server management is improved.
According to an alternative embodiment of the present application, the server 72 is further configured to detect, during an nth start-up procedure, whether the pluggable device 74 is connected to the slot of the high-speed serial computer expansion bus interface of the server 72, where n is a positive integer; determining whether hardware factory configuration default information is stored in an area for storing basic product information in the pluggable device 74 under the condition that the accessed pluggable device 74 is detected in the nth starting process; in the case where hardware factory configuration default information is stored in the area for storing basic product information in the pluggable device 74, the target code in the basic input output system of the server 72 is written in the hardware factory configuration default information.
According to another optional embodiment of the present application, the server 72 is further configured to read, in a case where it is detected that the server 72 is not connected to the pluggable device 74 during the nth startup process, or in a case where no hardware factory configuration default information is stored in an area for storing basic product information in the pluggable device 74, the hardware factory configuration default information from the read-only information in the flash rom through an object code in the basic input/output system of the server 72.
Optionally, the server 72 is further configured to detect whether a pluggable device 74 is connected to a slot (slot) of the high-speed serial computer expansion bus interface of the server 72 during the power-on process; judging whether hardware factory configuration default information is stored in a VPD area in pluggable equipment 74 or not under the condition that the connected pluggable equipment 74 is detected; when hardware factory configuration default information is stored in the VPD area of the pluggable device 74, the hardware factory configuration default information is written in through the BIOS Code.
Optionally, the server 72 is further configured to detect whether a pluggable device 74 is connected to a slot (slot) of the high-speed serial computer expansion bus interface of the server 72 during the power-on process; in the case that the pluggable device 74 is detected not to be connected, the BIOS Code reads RO information of default Variable value through the Flash Rom position of the BIOS Code, and meanwhile, the Code flag bit of the BIOS is set to be 0. Continuing to detect whether the pluggable device 74 is connected to a slot (slot) of the high-speed serial computer expansion bus interface of the server 72 in the next starting process; in the event that access to the pluggable device 74 is detected, the VPD area of the pluggable device 74 is cleared, while the code flag bit of the BIOS is set, e.g., to "1".
Optionally, the server 72 is further configured to set a first code flag bit for the bios if the pluggable device is detected to be not connected in the nth startup process, where the first code flag bit is used to indicate that the pluggable device is not connected.
In some alternative embodiments of the present application, the pluggable device 74 includes at least: hardware devices based on the high-speed serial computer expansion bus standard.
The pluggable device 74 includes at least a PCIe device, which is an external hardware device based on the PCI Express (Peripheral Component Interconnect Express) bus standard. PCIe devices may connect to computer systems and servers 72 through PCIe slots (slots) and allow for high speed data transfer. Common PCIe devices include graphics cards, network cards, sound cards, memory controllers, and the like, which can improve the performance of the server 72 and increase its functionality and extensibility.
As an alternative embodiment of the present application, the server 72 runs on the Windows operating system or the Linux operating system; the server 72 includes at least a basic input output system.
The basic input output system (Basic Input Output System, BIOS), a program of computer hardware, is a program solidified on the computer motherboard, responsible for initializing and controlling the computer hardware device. The BIOS is located before an Operating System (OS) and manages the various parts of the computer that are needed to interact with the CMOS chip. When the server 72 is started, the BIOS is responsible for checking whether all relevant hardware devices are working properly, running secure boot processes, etc. The OS hosts and controls the server 72 to operate, exercise and run hardware, software resources, and interrelated system software programs that provide common services to organize user interactions. The OS in the server 72 may be an operating system such as Windows, shell or Linux.
In some alternative embodiments of the present application, the pluggable device 74 may be connected or disconnected from the high-speed serial computer expansion bus standard-based interface of the server 72 while the server 72 is running on power.
In an alternative embodiment, the access event of the pluggable device 74 is detected with the server 72 running live; in response to detecting the access event, the acquisition of the base product information from the pluggable device 74 is triggered.
In some alternative embodiments of the present application, the unplug event of pluggable device 74 is detected with server 72 running live; and in response to detecting the unplugging event, configuring the received hardware factory configuration default information as read-only information.
As another alternative embodiment of the present application, the number of insertions and removals of the pluggable device 74 within the preset time period does not exceed the preset value.
It should be noted that, to avoid false triggering of Clear CMOS functions, for example, only a device is simply plugged in and plugged out, and there is no need to restore system variables stored in the flash rom in the bios, the PCIe device storing the Variable value may be selected as a device with few plugs in, instead of a device such as a hard disk that is not limited to plug in.
Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
Embodiments of the present application also provide an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor, and an input/output device connected to the processor.
Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.
It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code executable by computing devices, so that they may be stored in a storage device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application should be included in the protection scope of the present application.
Claims (23)
1. A method for restoring data based on clear CMOS, comprising:
The server responds to the detected trigger event for triggering and clearing the CMOS, and basic product information in pluggable equipment is obtained;
acquiring default information of hardware factory configuration from the basic product information;
and the server restores the system variables stored in the flash read-only memory in the basic input/output system according to the default information of the factory configuration of the hardware.
2. The method according to claim 1, characterized in that it comprises:
the server detects whether the pluggable equipment is accessed into a slot of a high-speed serial computer expansion bus interface of the server in the nth starting process, wherein n is a positive integer;
determining whether the default information of the factory configuration of the hardware is stored in an area for storing the basic product information in the pluggable equipment under the condition that the pluggable equipment is detected to be accessed in the nth starting process;
and under the condition that the default information of the factory configuration of the hardware is stored in the area for storing the basic product information in the pluggable equipment, writing the target code in the basic input/output system of the server into the default information of the factory configuration of the hardware.
3. The method according to claim 2, characterized by comprising:
and under the condition that the server is not connected to the pluggable equipment in the nth starting process or the hardware factory configuration default information is not stored in the area for storing the basic product information in the pluggable equipment, reading the hardware factory configuration default information from read-only information in the flash read-only memory through the target code in the basic input and output system of the server.
4. A method according to claim 3, wherein in case that no access to the pluggable device is detected during the nth boot-up procedure, the method further comprises: and setting a first code zone bit for the basic input and output system, wherein the first code zone bit is used for indicating that the pluggable equipment is not accessed.
5. The method of claim 4, wherein after setting the first code flag bit, the method further comprises:
the server detects whether the pluggable equipment is accessed into a slot of a high-speed serial computer expansion bus interface of the server in the (n+1) th starting process;
And under the condition that the pluggable equipment is detected to be accessed in the n+1th starting process, all data in a storage area used for storing the basic product information in the pluggable equipment are cleared, and a second code zone bit is set for the basic input and output system, wherein the second code zone bit is used for indicating that the pluggable equipment is accessed.
6. A method according to claim 3, comprising:
detecting whether the server comprises an intelligent platform management interface or not and a mainboard management controller supporting the intelligent platform management interface;
in the case that the server is detected to include the intelligent platform management interface and the motherboard management controller, the server restores the system variable stored in the flash rom in the bios through the basic product information of the pluggable device, or
The server recovers the system variable stored in the flash read-only memory in the basic input/output system through the instruction based on the intelligent platform management interface received by the main board management controller;
And under the condition that the server does not comprise the intelligent platform management interface and the mainboard management controller, the server recovers the system variable stored in the flash read-only memory in the basic input/output system through the basic product information of the pluggable equipment.
7. The method according to claim 6, comprising:
and under the condition that the server comprises the intelligent platform management interface and the mainboard management controller, if the pluggable equipment is detected not to be accessed within the preset duration, the server recovers the system variable stored in the flash read-only memory in the basic input/output system through the instruction based on the intelligent platform management interface received by the mainboard management controller.
8. The method according to claim 1, characterized in that it comprises:
detecting an access event of the pluggable device under the condition that the server runs in a live mode;
and in response to detecting the access event, triggering the acquisition of the basic product information from the pluggable equipment.
9. The method of claim 1, wherein the base product information comprises: important product data VPD of the pluggable device.
10. The method according to claim 1, characterized in that it comprises:
in the case that the pluggable device includes a charged erasable programmable read-only memory, the basic product information is stored in the charged erasable programmable read-only memory;
in the case where the pluggable device does not include the live erasable programmable read-only memory, the base product information is stored in other non-volatile memory in the pluggable device.
11. The method according to claim 10, comprising:
acquiring the basic product information from the live erasable programmable read-only memory through an integrated circuit bus under the condition that the pluggable device comprises the live erasable programmable read-only memory;
and in the case that the pluggable device does not comprise the live erasable programmable read-only memory, acquiring the basic product information in the other nonvolatile memories through a high-speed serial computer expansion bus.
12. The method of claim 1, wherein the pluggable device comprises at least: hardware devices based on the high-speed serial computer expansion bus standard.
13. A device for recovering data based on a clear CMOS, comprising:
the first acquisition module is used for responding to the detected trigger event for triggering and clearing the CMOS and acquiring basic product information in the pluggable equipment;
the second acquisition module is used for acquiring default information of the factory configuration of the hardware from the basic product information;
and the recovery module is used for recovering the system variable stored in the flash read-only memory in the basic input/output system according to the default information of the factory configuration of the hardware.
14. A system for cleaning-up CMOS based data recovery, comprising: a server and a pluggable device, wherein,
the pluggable equipment is in pluggable connection with the server and is used for providing basic product information;
the server is used for responding to the detected trigger event for triggering and clearing the CMOS, obtaining basic product information in the pluggable equipment, obtaining hardware factory configuration default information from the basic product information, and recovering system variables stored in a flash read-only memory in the basic input/output system according to the hardware factory configuration default information.
15. The system according to claim 14, characterized by comprising:
the server is further configured to detect, in an nth starting process, whether the pluggable device is connected to a slot of the high-speed serial computer expansion bus interface of the server, where n is a positive integer;
determining whether the default information of the factory configuration of the hardware is stored in an area for storing the basic product information in the pluggable equipment under the condition that the pluggable equipment is detected to be accessed in the nth starting process;
and under the condition that the default information of the factory configuration of the hardware is stored in the area for storing the basic product information in the pluggable equipment, writing the target code in the basic input/output system of the server into the default information of the factory configuration of the hardware.
16. The system of claim 15, wherein the system further comprises a controller configured to control the controller,
the server is further configured to read, when it is detected in the nth startup process that the server is not connected to the pluggable device, or when the hardware factory configuration default information is not stored in the area for storing the basic product information in the pluggable device, the hardware factory configuration default information from the read-only information in the flash rom through the object code in the basic input/output system of the server.
17. The system of claim 16, wherein the system further comprises a controller configured to control the controller,
the server is further configured to set a first code flag bit for the bios when the pluggable device is detected to be not connected in the nth startup process, where the first code flag bit is used to indicate that the pluggable device is not connected.
18. The system of claim 14, wherein the system further comprises a controller configured to control the controller,
the pluggable device at least comprises: hardware devices based on the high-speed serial computer expansion bus standard.
19. The system according to claim 14, characterized by comprising:
the server runs on a Windows operating system or a Linux operating system;
the server at least comprises a basic input and output system.
20. The system of claim 14, wherein the system further comprises a controller configured to control the controller,
the pluggable device can be connected with or disconnected from an interface of the server based on a high-speed serial computer expansion bus standard when the server runs in a live state.
21. The system of claim 14, wherein the system further comprises a controller configured to control the controller,
the number of times of plugging the pluggable equipment in the preset time does not exceed a preset value.
22. A computer readable storage medium, characterized in that a computer program is stored in the computer readable storage medium, wherein the computer program, when being executed by a processor, implements the steps of the method according to any of the claims 1 to 12.
23. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method of any one of claims 1 to 12 when the computer program is executed.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117827554A (en) * | 2023-10-12 | 2024-04-05 | 宁畅信息产业(北京)有限公司 | Test method, test device, computer equipment and storage medium |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105302621A (en) * | 2015-12-09 | 2016-02-03 | 浪潮电子信息产业股份有限公司 | Method for remotely restoring initial value of server BIOS Setup |
CN106603307A (en) * | 2016-12-30 | 2017-04-26 | 北京奇艺世纪科技有限公司 | Method and device of configuration modification |
CN109582377A (en) * | 2018-12-04 | 2019-04-05 | 郑州云海信息技术有限公司 | BIOS option amending method, device, equipment and storage medium |
CN109582505A (en) * | 2018-12-06 | 2019-04-05 | 广东浪潮大数据研究有限公司 | A kind of recovery system, method and device of BIOS option default value |
CN115509622A (en) * | 2022-09-28 | 2022-12-23 | 苏州浪潮智能科技有限公司 | Configuration information updating method and device |
-
2023
- 2023-06-16 CN CN202310719327.3A patent/CN116450224A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105302621A (en) * | 2015-12-09 | 2016-02-03 | 浪潮电子信息产业股份有限公司 | Method for remotely restoring initial value of server BIOS Setup |
CN106603307A (en) * | 2016-12-30 | 2017-04-26 | 北京奇艺世纪科技有限公司 | Method and device of configuration modification |
CN109582377A (en) * | 2018-12-04 | 2019-04-05 | 郑州云海信息技术有限公司 | BIOS option amending method, device, equipment and storage medium |
CN109582505A (en) * | 2018-12-06 | 2019-04-05 | 广东浪潮大数据研究有限公司 | A kind of recovery system, method and device of BIOS option default value |
CN115509622A (en) * | 2022-09-28 | 2022-12-23 | 苏州浪潮智能科技有限公司 | Configuration information updating method and device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117827554A (en) * | 2023-10-12 | 2024-04-05 | 宁畅信息产业(北京)有限公司 | Test method, test device, computer equipment and storage medium |
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