CN115693403A - GaAs FP laser chip and preparation method thereof - Google Patents
GaAs FP laser chip and preparation method thereof Download PDFInfo
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- CN115693403A CN115693403A CN202310010500.2A CN202310010500A CN115693403A CN 115693403 A CN115693403 A CN 115693403A CN 202310010500 A CN202310010500 A CN 202310010500A CN 115693403 A CN115693403 A CN 115693403A
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Abstract
The invention provides a GaAs FP laser chip and a preparation method thereof, the laser chip sequentially comprises a substrate layer (101), a lower limiting layer (102), a lower waveguide layer (103), a quantum well active region (104), an upper waveguide layer (105), an upper limiting layer (106) and a ridge waveguide layer (107) along an epitaxial growth direction, a cathode electrode (109) is arranged below the substrate layer, an anode electrode (110) is arranged above the ridge waveguide layer (107), the GaAs FP laser chip is characterized in that the middle part of the ridge waveguide layer (107) protrudes to form step-shaped structures on two sides, high-insulation media (108) are arranged on the step-shaped structures, and the thickness of the high-insulation media (108) is equal to the depth of the step-shaped structures. According to the GaAs FP laser chip provided by the invention, the high-insulation medium is used in the step-shaped structures at the two sides of the ridge waveguide layer (107) of the GaAs-based laser chip, so that the transverse current can be inhibited, the device efficiency is improved, and the working performance of the laser chip is improved.
Description
Technical Field
The invention relates to the technical field of semiconductor laser chips, in particular to a GaAs FP laser chip and a preparation method thereof.
Background
Due to the advantages of the high-power semiconductor laser chip, the GaAs-based high-power semiconductor laser chip is widely applied to the fields of production and processing, laser communication, medical cosmetology, automatic control, military weapons and the like. In view of the wide application prospect of the GaAs-based high-power semiconductor laser chip, various countries rapidly implement the technical research and development plan of the high-power semiconductor laser chip and arrange the industry of the high-power semiconductor laser chip, so that the GaAs-based semiconductor laser chip and the related industries thereof can be rapidly developed.
Currently, the mainstream GaAs-based semiconductor laser chip includes a blue-violet laser chip using InGaN/GaN as an active region and an ultraviolet/deep ultraviolet laser chip using AlGaN/GaN as an active region. The common laser chip structure includes: FP-LD (fabry-perot laser chip) and VCSEL (vertical cavity surface emitting laser chip). The laser chip of any material and structure aims to reduce the fringe electric field, reduce the transverse current, improve the reliability and the current injection uniformity, reduce the threshold current, increase the stimulated radiation recombination rate of the active region and improve the power of the device. A series of studies were carried out by the researchers for this purpose. For example, chinese patent No. CN110854678B discloses a method for preparing a GaAs-based high-power laser chip, in which when growing a GaAs low-temperature buffer layer, an AlxGayAs lower limiting layer, an AlGaAs lower waveguide layer, a quantum well light emitting region, an AlGaAs upper waveguide layer, an AlxGayAs upper limiting layer, and a GaAs cap layer, firstly, an AsH3 gas is introduced, then, a TMAl gas defined by a composition is introduced, then, the TMAl gas and a TMGa gas defined by a composition are stopped being introduced, and then, the introduction of the AsH3 gas and the TMGa gas are stopped being stopped. Chinese patent No. CN113872051A discloses a GaAs-based high-power laser chip and a method for manufacturing the same, in which an aluminum-free GaAsP is used As a part of an active region of a quantum well, alGaAs with low aluminum composition is used As an upper waveguide layer and a lower waveguide layer, and AlxGayAs with large conduction band order and containing high aluminum composition are used As a lower limit layer and an upper limit layer.
However, the inventors of the present application found in long-term practice that the GaAs-based FP laser chip of patent No. CN110854678B and patent No. CN113872051A as shown in fig. 1 of the drawings has a problem that a strong electric field exists in the semiconductor at the edge of the electrode, causing current to be injected more biased from the edge of the electrode, thereby causing holes to easily spread to the side wall by non-radiative recombination or to spread beyond the lateral waveguide confinement region, thereby causing the efficiency of the laser chip to be lowered and the reliability to be lowered.
Disclosure of Invention
In order to solve the problems, the invention provides a GaAs FP laser chip and a preparation method thereof.
The invention provides a GaAs FP laser chip which sequentially comprises a substrate layer (101), a lower limiting layer (102), a lower waveguide layer (103), a quantum well active region (104), an upper waveguide layer (105), an upper limiting layer (106) and a ridge waveguide layer (107) along an epitaxial growth direction, wherein a cathode electrode (109) is arranged below the substrate layer, an anode electrode (110) is arranged above the ridge waveguide layer (107), the middle part of the ridge waveguide layer (107) protrudes to form step-shaped structures on two sides, high-insulation media (108) are arranged on the step-shaped structures, and the thickness of the high-insulation media (108) is equal to the depth of the step-shaped structures.
In some embodiments, the high insulation medium (108) has a dielectric constant greater than 20.
In some embodiments, the high insulating dielectric (108) is hafnium oxide (HfO 2) or tantalum pentoxide (Ta 2O 5).
In some embodiments, the step-like structure has a depth of 10nm to 500nm.
In some embodiments, the GaAs FP laser chip further includes a passivation layer (111), a reflective film (112) and an anti-reflection film (113), the passivation layer (111) covers the portions except for the cathode electrode and the anode electrode, the rear facet of the GaAs FP laser chip is plated with the reflective film (112), and the front facet of the GaAs FP laser chip is plated with the anti-reflection film (113).
In some embodiments, the substrate layer (101) is made of GaAs and has a thickness of 200nm, and the lower limiting layer (102) is made of AlGaAs and has a thickness of 0.3 μm; the lower waveguide layer (103) is made of AlGaAs and has the thickness of 0.5-3 mu m; the quantum well active region (104) is made of AlGaAs well layer-AlGaAs barrier layer which grows alternately and has the thickness of 0.1 mu m; the upper waveguide layer (105) is made of AlGaAs and has a thickness of 0.1-3 μm; the upper limiting layer (106) is made of AlGaAs and has the thickness of 0.3 mu m; the ridge waveguide layer (107) is made of GaAs and has the thickness of 0.3 mu m; the passivation layer (111) is made of SiO2 and has the thickness of 300nm; the cathode electrode (109) and the anode electrode (110) are made of Cr/Au, ti/Au or Ni/Au; the reflectivity of the reflecting film (112) is 50% -100%, and the reflectivity of the antireflection film (113) is less than or equal to 10%.
The second aspect of the invention provides a preparation method of a GaAs FP laser chip, which comprises the steps of epitaxially growing a GaAs FP laser chip epitaxial wafer through MOCVD; etching the ridge waveguide layer; etching steps on two sides of the ridge waveguide layer; depositing high-insulation medium on the steps on the two sides; plating an anode electrode and a cathode electrode; and depositing a passivation layer, plating a reflecting film on the rear end face of the GaAs FP laser chip, and plating an antireflection film on the front end face.
The beneficial effects of the invention are:
according to the invention, the flat high-insulation dielectric material is adopted at the ridge side wall step, the bending of the electrode is not increased, so that the partial pressure at the insulation dielectric below the electrode is reduced, the potential of the ridge waveguide layer below the electrode is increased, the energy bands inside the two sides of the ridge waveguide layer are bent, the barrier heights of the energy bands on the two sides are increased, the extension of transverse current is better limited, the efficiency of injecting holes into an active region is increased, the stimulated radiation recombination rate is improved, the power is improved, and the reliability and the stability of a device are enhanced.
Drawings
Fig. 1 is a schematic structural diagram of a conventional laser chip introduced in the background art of the present invention;
FIG. 2 is a cross-sectional view of an embodiment of a GaAs FP laser chip of the present invention;
FIG. 3 is a top view of an embodiment of a GaAs FP laser chip of the present invention;
FIG. 4 is a flowchart of an embodiment of a method for fabricating a GaAs FP laser chip of the present invention;
101, a substrate layer, 102, a lower limiting layer, 103, a lower waveguide layer, 104, a quantum well active region, 105, an upper waveguide layer, 106, an upper limiting layer, 107, a ridge waveguide layer, 108, a high-insulation medium, 109, a cathode electrode, 110, an anode electrode, 111, a passivation layer, 112, a reflecting film, and 113, an antireflection film.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly apparent, a semiconductor laser chip and a housing structure thereof according to the present invention are described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In the description of the present invention, "a plurality" means two or more unless otherwise specified; the terms "central," "longitudinal," "lateral," "upper," "lower," "left," "right," "inner," "outer," "front," "rear," "head," "tail," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in the indicated orientations and positional relationships based on the orientation shown in the drawings for ease of describing the invention and to simplify the description, but do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be construed as limiting the invention. Furthermore, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
At this time, please refer to fig. 2, fig. 2 is a cross-sectional view of an embodiment of a GaAs FP laser chip of the present invention, as shown in fig. 2, the GaAs FP laser chip sequentially includes a substrate layer (101), a lower confinement layer (102), a lower waveguide layer (103), a quantum well active region (104), an upper waveguide layer (105), an upper confinement layer (106), and a ridge waveguide layer (107) along an epitaxial growth direction, a cathode electrode (109) is disposed below the substrate layer, an anode electrode (110) is disposed above the ridge waveguide layer, a middle portion of the ridge waveguide layer (107) protrudes to form a step structure on two sides, a high insulating medium (108) is disposed on the step structure, and a thickness of the high insulating medium (108) is equal to a depth of the step structure.
Wherein the substrate layer (101) is a clean single crystal sheet having a specific crystal plane and suitable electrical, optical and mechanical properties for growing epitaxial layers. Further, lower limiting layer (102) is arranged on the substrate layer, lower waveguide layer (103) is arranged on lower limiting layer (102), quantum well active region (104) is arranged on lower waveguide layer (103), upper waveguide layer (105) is arranged on quantum well active region (104), upper limiting layer (106) is arranged on upper waveguide layer (105), ridge waveguide layer (107) is arranged on upper limiting layer (106), cathode electrode (109) is arranged below the substrate layer, and anode electrode (110) is arranged above the ridge waveguide layer.
Further, the middle part of the ridge waveguide layer (107) protrudes to form a step structure on two sides, the step structure is provided with a high-insulation medium (108), and the thickness of the high-insulation medium (108) is equal to the depth of the step structure. More specifically, step-like structures can be formed on two sides of the ridge waveguide layer through dry etching, when the GaAs FP laser chip operates, the high-insulation medium arranged on the step-like structures on the two sides of the ridge waveguide layer (107) can reduce the voltage division at the insulation medium positioned below the anode electrode (110), further, the electric potential borne by the ridge waveguide layer (107) below the high-insulation medium is increased, the energy band inside the step-like structures on the two sides of the ridge waveguide layer (107) is bent, the height of the energy band barrier of the step-like structures on the two sides is increased, so that the expansion of transverse current is limited, the efficiency of hole injection into an active region is increased, and the stimulated radiation recombination rate is improved.
Further, the High-K insulating medium (108) is made of a High-K insulating medium material (High-K medium material), wherein the K value in the High-K insulating medium material (High-K medium material) is a dielectric constant (permittivity), also called dielectric rate, and when the dielectric constant K of a certain material is greater than 3.9, the material is determined to be the High-K insulating medium material (High-K medium material).
It should be noted that the form of the high-insulation medium (108) may be a quadrangular prism with a rectangular bottom surface as shown in fig. 2, or may be set to other forms according to actual situations, which is not described herein again.
According to the GaAs FP laser chip in the embodiment, the phase-level high-insulation medium is arranged on the step-shaped structure of the ridge waveguide layer of the GaAs FP laser chip, so that transverse current can be inhibited, the efficiency of a device is improved, and the working performance of the GaAs FP laser chip is improved.
As described above, a High-K insulating dielectric material (High-K dielectric material) is determined when the dielectric constant K of a certain material is greater than 3.9, and in some embodiments, the dielectric constant of the High insulating medium (108) is greater than 20, i.e., the High insulating medium (108) is made of a material having a dielectric constant K greater than 20.
In some embodiments, the high insulating dielectric (108) is hafnium oxide (HfO 2) or tantalum pentoxide (Ta 2O 5).
Wherein hafnium oxide (HfO) 2 ) Is a ceramic material with wide band gap and high dielectric constant, and tantalum pentoxide (Ta 2O 5) is a raw material for producing tantalum metal, and is also a material with high dielectric constant, which is not described herein again.
In some embodiments, the depth of the step-like structure is 10nm-500nm, and the specific value can be set according to practical situations, for example: the depth of the step-like structure is selected according to the required voltage dividing capability, when the depth of the step-like structure is 500nm, the depth of the high-insulation medium (108) is also 500nm, and the voltage which can be shared by the high-insulation medium (108) is increased at the moment, which is not described herein again. In other words, a particular depth value may be selected based on the size of the highly insulating medium (108) when highly insulating mediums (108) of different depths or sizes are desired. It is understood that the thickness of the highly insulating dielectric (108) is equal to the depth of the step-like structure, i.e. the thickness of the highly insulating dielectric (108) is also in the range of 10nm-500nm.
In some embodiments, the GaAs FP laser chip further includes a passivation layer (111), a reflective film (112), and an anti-reflective film (113), the passivation layer (111) covers the portions except the cathode electrode (109) and the anode electrode (110), and the rear facet of the GaAs FP laser chip is plated with the reflective film (112), and the front facet of the GaAs FP laser chip is plated with the anti-reflective film (113). The passivation layer (111) can be used to protect other layers or elements of the GaAs FP laser chip from damage. The reflection film (112) is used for increasing the intensity of reflected light in a certain spectral region and improving the reflectivity, and the antireflection film (113) is used for weakening the intensity of the reflected light, improving the transmissivity and increasing the intensity of transmitted light.
At this time, referring to fig. 2 and fig. 3, fig. 2 is a cross-sectional view of an embodiment of a GaAs FP laser chip of the present invention, fig. 3 is a top view of an embodiment of a GaAs FP laser chip of the present invention, as shown in fig. 2 and fig. 3, a passivation layer (111) covers the portions except for a cathode electrode (109) and an anode electrode (110), a reflective film (112) is disposed on the rear end face of the GaAs FP laser chip, and an anti-reflective film (113) is disposed on the front end face of the GaAs FP laser chip, i.e., the emitting face of the laser.
In some embodiments, the substrate layer (101) is specifically GaAs, 200nm thick; the material of the lower limiting layer (102) is AlGaAs, and the thickness is 0.3 mu m; the lower waveguide layer (103) is made of AlGaAs and has a thickness of 0.5-3 μm; the quantum well active region (104) is an AlGaAs well layer-AlGaAs barrier layer which grows alternately and has the thickness of 0.1 mu m; the upper waveguide layer (105) is made of AlGaAs and has the thickness of 0.1-3 mu m; the upper limiting layer (106) is made of AlGaAs and has a thickness of 0.3 μm.
The ridge waveguide layer (107) is made of GaAs and has the thickness of 0.3 mu m; the passivation layer (111) is made of SiO2 and has the thickness of 300nm; the cathode electrode (109) and the anode electrode (110) are both made of Cr/Au, ti/Au or Ni/Au; the reflectivity of the reflecting film (112) is 50% -100%, and the reflectivity of the antireflection film (113) is less than or equal to 10%.
At this time, referring to fig. 4, fig. 4 is a flowchart of an embodiment of a method for fabricating a GaAs FP laser chip according to the present invention, as shown in the figure, the method includes:
step S41: and growing the GaAs FP laser chip epitaxial wafer through MOCVD epitaxy.
The following description will be made by taking as an example the epitaxial growth of a GaAs FP laser chip epitaxial wafer shown in fig. 2 by MOCVD: and (3) putting the GaAs substrate in a growth chamber of MOCVD equipment, and growing a lower limiting layer (102), a lower waveguide layer (103), a quantum well active region (104), an upper waveguide layer (105), an upper limiting layer (106) and a ridge waveguide layer (107) in sequence to obtain the epitaxial structure of the GaAs FP laser chip.
Wherein, MOCVD is a novel vapor phase epitaxy growth technique that has developed on vapor phase epitaxy growth (VPE) basis, it is not repeated here, limit layer (102) under growing in proper order, lower waveguide layer (103), quantum well active area (104), go up waveguide layer (105), go up limit layer (106), ridge waveguide layer (107), obtain the epitaxial structure of GaAs FP laser chip, furthermore, limit layer (102) set up on the substrate layer down, lower waveguide layer (103) set up on limit layer (102) down, quantum well active area (104) set up on lower waveguide layer (103), go up waveguide layer (105) and set up on quantum well active area (104), it sets up on last waveguide layer (105) to go up limit layer (106), ridge waveguide layer (107) set up on upper limit layer (106), limit layer under growing, for example: keeping the temperature in a growth chamber of MOCVD equipment at 680-720 ℃, and introducing TMGa (trimethyl gallium), TMAl (trimethyl aluminum) and AsH3 to grow a lower limiting layer on the substrate layer, wherein the lower limiting layer is an AlGaAs compound layer.
Further, the temperature in the growth chamber of the MOCVD equipment is reduced to 630-670 ℃, so that a lower waveguide layer (103) is grown on the upper surface of the lower limiting layer (102), and the lower waveguide layer (103) is an AlGaAs compound layer.
Further, keeping the temperature in the MOCVD equipment growth chamber between 630 ℃ and 670 ℃, and growing a quantum well active region (104) on the upper surface of the lower waveguide layer (103), more specifically, alternately growing an AlGaAs well layer and an AlGaAs barrier layer in the quantum well active region (104).
Further, the temperature in the growth chamber of the MOCVD equipment is kept between 630 ℃ and 670 ℃, an upper waveguide layer (105) is grown on the upper surface of the quantum well active region (104), and the upper waveguide layer (105) is an AlGaAs compound layer.
Further, the temperature in the growth chamber of the MOCVD equipment is raised to 680-720 ℃, an upper limiting layer (106) is grown on the upper surface of the upper waveguide layer (105), and the upper limiting layer (106) is an AlGaAs compound layer.
Further, the temperature in the growth chamber of the MOCVD equipment is reduced to 530-570 ℃, a ridge waveguide layer (107) is grown on the upper surface of the upper limiting layer (106), and the ridge waveguide layer (107) is a GaAs compound layer.
Step S42: the ridge waveguide layer is etched.
Etching the ridge waveguide layer (107), continuing with the example of fig. 2: the ridge structure is prepared on the ridge waveguide layer (107) through a photoetching technology and a dry etching technology, the height of the ridge can be selected according to the actual situation, for example, the ridge structure can be 280nm, more specifically, a ridge waveguide layer photoresist mask is prepared through a nano-imprinting or electron beam photoetching technology, then the etching depth is 280nm through dry etching, then the residual photoresist mask is removed, and the ridge waveguide layer (107) is prepared, and the height of the ridge waveguide layer (107) is 280nm.
Step S43: and etching steps on two sides of the ridge waveguide layer.
Etching steps on both sides of the ridge waveguide layer (107), for example: and forming step-like structures on two sides of the ridge waveguide layer (107) by photoetching and dry etching by taking the photoresist as a mask, wherein the depth of the step-like structures is 10nm-500nm in some embodiments, and the photoresist is reserved for subsequent operations after the step-like structures are formed.
Step S44: and depositing a high-insulation medium on the steps on the two sides.
And depositing a high-insulation medium (108) with the same thickness as the depth of the step-shaped structure through PECVD or magnetron sputtering, removing photoresist and stripping the high-insulation medium (108), and keeping the high-insulation medium (108) on the steps at two sides.
Step S45: plating an anode electrode and a cathode electrode.
Manufacturing a cathode electrode (109) and an anode electrode (110) by utilizing a photoetching technology and an e-beam evaporation process, more specifically, manufacturing the cathode electrode (109) on the lower surface of the substrate layer by utilizing the photoetching technology, and manufacturing the anode electrode (110) on the upper surface of the ridge waveguide layer by utilizing the e-beam evaporation process; and manufacturing a cathode electrode (109) and an anode electrode (110) by utilizing a photoetching technology and an e-beam evaporation process, wherein the cathode electrode (109) is distributed on the lower surface of the substrate layer (101), and the anode electrode (110) is distributed on the upper surface of the ridge waveguide layer (107).
Step S46: and depositing a passivation layer.
And depositing a SiO2 passivation layer (111) with the thickness of 300nm on the surface of the ridge waveguide layer (107) by using PECVD (plasma enhanced chemical vapor deposition), and removing the SiO2 passivation layer (111) on the surface of the ridge waveguide layer (107) by using a photoetching technology and BOE (boron organic etching) solution to form an electric injection window.
Step S47: and a reflecting film is plated on the rear end face of the GaAs FP laser chip, and an antireflection film is plated on the front end face.
A reflecting film (112) with the reflection coefficient of 50% -100% is plated on the rear end face of an active region of the GaAs FP laser chip through methods of chemical plating, electroplating and the like, and an antireflection film (113) with the reflection coefficient of less than or equal to 10% is plated on the front end face of the GaAs FP laser chip, wherein the front end face of the GaAs FP laser chip is a laser emitting face.
The raw materials related to the operation process in the preparation method of the GaAs FP laser chip provided in the embodiment can be obtained through a general way, and the preparation method is simple and reliable in process, strong in repeatability, low in production cost, suitable for industrial popularization and applicable to the field of laser chips.
In addition, the action effect of the GaAs FP laser chip is affected by the material, process and size change of the waveguide layer, the confinement layer and the active region in the laser chip, and thus, the GaAs FP laser chip needs to be optimized appropriately according to different device structures and process methods, so that the GaAs FP laser chip has the best effect.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. The GaAs FP laser chip is sequentially provided with a substrate layer (101), a lower limiting layer (102), a lower waveguide layer (103), a quantum well active region (104), an upper waveguide layer (105), an upper limiting layer (106) and a ridge waveguide layer (107) from bottom to top along an epitaxial growth direction, a cathode electrode (109) is arranged below the substrate layer, an anode electrode (110) is arranged above the ridge waveguide layer (107), and the GaAs FP laser chip is characterized in that the middle part of the ridge waveguide layer (107) protrudes out to form step-shaped structures on two sides of the ridge waveguide layer (107), high-insulation media (108) are arranged on the step-shaped structures, and the thickness of the high-insulation media (108) is equal to the depth of the step-shaped structures.
2. GaAs FP laser chip according to claim 1, characterized in that the dielectric constant of the high insulating medium (108) is greater than 20.
3. GaAs FP laser chip according to claim 2, characterized in that the high insulating dielectric (108) is hafnium oxide (HfO 2) or tantalum pentoxide (Ta 2O 5).
4. The GaAs FP laser chip of claim 1, wherein the step structure has a depth in a range of 10nm to 500nm.
5. The GaAs FP laser chip of claim 1, further comprising a passivation layer (111), a reflective film (112) and an anti-reflection film (113), wherein the passivation layer (111) covers the GaAs FP laser chip except for the cathode electrode and the anode electrode, and the rear end face of the GaAs FP laser chip is coated with the reflective film (112), and the front end face of the GaAs FP laser chip is coated with the anti-reflection film (113).
6. The GaAs FP laser chip of claim 5,
the substrate layer (101) is made of GaAs and is 200nm thick;
the lower limiting layer (102) is made of AlGaAs and has the thickness of 0.3 mu m;
the lower waveguide layer (103) is made of AlGaAs and has the thickness of 0.5-3 mu m;
the quantum well active region (104) is an AlGaAs well layer-AlGaAs barrier layer which grows alternately, and the thickness of the quantum well active region is 0.1 mu m;
the upper waveguide layer (105) is made of AlGaAs and has the thickness of 0.1-3 mu m;
the upper limiting layer (106) is made of AlGaAs and has the thickness of 0.3 mu m;
the ridge waveguide layer (107) is made of GaAs and has the thickness of 0.3 mu m;
the passivation layer (111) is made of SiO2 and has the thickness of 300nm;
the cathode electrode (109) and the anode electrode (110) are made of Cr/Au, ti/Au or Ni/Au;
the reflectivity of the reflecting film (112) is 50% -100%, and the reflectivity of the antireflection film (113) is less than or equal to 10%.
7. A preparation method of a GaAs FP laser chip comprises the steps of epitaxially growing a GaAs FP laser chip epitaxial wafer through MOCVD; etching the ridge waveguide layer; etching steps with the same depth on two sides of the ridge waveguide layer; depositing a high-insulation medium on the steps on the two sides; plating an anode electrode and a cathode electrode; depositing a passivation layer; and plating a reflecting film on the rear end face of the laser chip and plating an antireflection film on the front end face of the laser chip.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116316054A (en) * | 2023-04-27 | 2023-06-23 | 深圳市星汉激光科技股份有限公司 | Laser chip with current non-injection layer and preparation method thereof |
| CN117317798A (en) * | 2023-11-28 | 2023-12-29 | 深圳市星汉激光科技股份有限公司 | Integrated common-p type Peltier refrigeration high-power FP laser chip and preparation method thereof |
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| US5438584A (en) * | 1992-09-22 | 1995-08-01 | Xerox Corporation | Dual polarization laser diode with quaternary material system |
| CN109802296A (en) * | 2019-03-01 | 2019-05-24 | 太原理工大学 | Edge-emitting laser light beam reshaping structure, chip of laser and preparation method thereof |
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| US3935544A (en) * | 1973-12-27 | 1976-01-27 | Compagnie Generale D'electricite | Gas laser structure for eliminating parasitic arcing |
| JPH03196689A (en) * | 1989-12-26 | 1991-08-28 | Sanyo Electric Co Ltd | Semiconductor laser |
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| CN109802296A (en) * | 2019-03-01 | 2019-05-24 | 太原理工大学 | Edge-emitting laser light beam reshaping structure, chip of laser and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116316054A (en) * | 2023-04-27 | 2023-06-23 | 深圳市星汉激光科技股份有限公司 | Laser chip with current non-injection layer and preparation method thereof |
| CN117317798A (en) * | 2023-11-28 | 2023-12-29 | 深圳市星汉激光科技股份有限公司 | Integrated common-p type Peltier refrigeration high-power FP laser chip and preparation method thereof |
| CN117317798B (en) * | 2023-11-28 | 2024-02-20 | 深圳市星汉激光科技股份有限公司 | Integrated common-p type Peltier refrigeration high-power FP laser chip and preparation method thereof |
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