CN115149966A - Polar code decoding method and device, electronic equipment and storage medium - Google Patents

Abstract

The present disclosure provides a polar code decoding method and device, an electronic device and a storage medium, and relates to the technical field of mobile communications. The method includes: acquiring a polar code to be decoded with a length of N, dividing the polar code to be decoded into m subsections to be decoded with a length of n, where N, m and n are integer powers of 2; The m sub-segment decoders respectively perform SCL decoding on the m sub-segments to be decoded to obtain a split horizontal path; perform vertical sub-segment processing on the horizontal path to obtain multiple candidate paths; Perform horizontal sub-segment processing to obtain multiple candidate paths; check the multiple candidate paths to obtain a decoding path; and obtain a decoding result of the polar code to be decoded according to the decoding path. The present disclosure can perform global consideration through vertical sub-section processing, and avoid considering only the local probability of one of the sub-sections to be decoded when screening multiple alternative paths. Therefore, the present disclosure can improve the decoding performance of polar codes.

Description

Polar code decoding method and device, electronic device and storage medium

technical field

The present disclosure relates to the field of mobile communication technologies, and in particular, to a polar code decoding method and device, an electronic device, and a storage medium.

Background technique

In the field of mobile communication technology, the reliability of the data transmission process can be ensured by encoding and decoding data. Among them, polar code is a channel coding method that can theoretically prove to reach the Shannon limit. By decoding the polar code, the transmitted data can be acquired.

In the related art, the polar code can be divided into a plurality of subsections to be decoded, and then the plurality of subsections to be decoded can be decoded in parallel to obtain a path corresponding to each decoding subsection that satisfies the local optimum, thereby Get the complete decoding path.

However, the method provided by the related art can only screen the locally optimal paths corresponding to each decoding subsection, so the final complete decoding path may not satisfy the global optimality. Poor performance.

It should be noted that the information disclosed in the above Background section is only for enhancement of understanding of the background of the present disclosure, and therefore may contain information that does not form the prior art that is already known to a person of ordinary skill in the art.

SUMMARY OF THE INVENTION

The present disclosure provides a polar code decoding method and device, an electronic device and a storage medium, which overcome the problem of poor decoding performance of polar codes in the related art at least to a certain extent.

Other features and advantages of the present disclosure will become apparent from the following detailed description, or be learned in part by practice of the present disclosure.

According to an aspect of the embodiments of the present disclosure, a polar code decoding method is provided, including: acquiring a polar code to be decoded with a length of N, and dividing the polar code to be decoded into m polar codes with a length of n Subsections to be decoded, N, m, and n are integer powers of 2; the m subsections to be decoded are respectively subjected to SCL (Successive Cancellation List, serial elimination list) decoding by m subsection decoders The occurrence probability calculation of the code bit value and the path splitting are performed to obtain a split horizontal path; the vertical sub-segment processing is performed on the horizontal path to obtain a plurality of candidate paths; the horizontal sub-section processing is performed on the multiple candidate paths, Obtaining multiple candidate paths; checking the multiple candidate paths to obtain a decoding path; and obtaining the decoding result of the polar code to be decoded according to the decoding path.

In some embodiments of the present disclosure, the occurrence probability calculation and path splitting of the decoded bit values of the serial elimination list SCL decoding are performed on the m sub-segments to be decoded by the m sub-segment decoders respectively, and the split is obtained. The latter horizontal path includes: performing SCL decoding processing on the jth bit of the ith subsection to be decoded by the ith subsection decoder to obtain the occurrence probability of the jth bit and 21 _ij horizontal paths, Among them, i=1, 2, 3,..., m; j=1, 2, 3,..., n; 2l _ij is the split horizontal path corresponding to the j-th bit of the i-th subsection to be decoded quantity.

In some embodiments of the present disclosure, performing vertical subsection processing on the horizontal path to obtain a plurality of paths to be selected includes: processing the jth subsection of each subsection to be decoded among the m subsections to be decoded. bits form the j-th vertical sub-segment, so that the total length of any vertical sub-segment is m; the m bits in the j-th vertical sub-segment are path-split in order to obtain the split vertical path, where the The number of longitudinal paths corresponding to i bits is 2l _vij , when 2l _vij >=L _v , the L _v longitudinal paths with the largest path metric value are reserved, i=1, 2, 3, ..., m; j=1, 2 , _{3 , .} The vertical paths are verified, and the vertical paths of the j-th vertical subsection that pass the verification are reserved; according to the vertical paths of the j-th vertical subsection that have passed the verification, the 21 _ij horizontal paths are screened, and 1 are reserved. _ij or 2l _ij candidate paths.

In some embodiments of the present disclosure, performing horizontal sub-segment processing on the multiple candidate paths to obtain multiple candidate paths includes: performing horizontal sub-segment processing on the multiple candidate paths through m sub-segment decoders respectively. Sub-segment processing, wherein the i-th sub-segment decoder reserves l _hij candidate paths with the largest path metric value from l _ij or 2l _ij candidate paths. When l _ij or 2l _ij is less than L, l _hij is equal to l _ij or equal to 2l _ij , when l _ij or 2l _ij is greater than or equal to L, l _hij is equal to L, i=1, 2, 3, ..., m; j=1, 2, 3, ..., n; L is used for Indicates the number threshold of the alternative paths, L is a positive integer; the i-th subsection decoder decodes the j+1th bit of the i-th horizontal subsection on the basis of l _hij alternative paths Occurrence probability calculation and path splitting of code bit values, the horizontal subsection is a lateral path with a length of n; After that, multiple alternative paths of length n are obtained, and the path splitting ends;

The performing verification on the multiple candidate paths to obtain a decoding path includes: performing verification on the multiple candidate paths with the length n of the m subsection decoders, respectively, The candidate path that passes the check and has the largest path metric value in the decoder is used as the decoding path; if no alternative path passes the check in any subsection decoder, the path metric in the any subsection decoder will be used as the decoding path. The candidate path with the largest value is used as the decoding path.

In some embodiments of the present disclosure, the obtaining the decoding result of the polar code to be decoded according to the decoding path includes: performing a subsection on m decoding paths of the m subsection decoders Segment transformation to obtain m target decoding paths with a length of n; a target decoding path with a length of N is formed by m target decoding paths, and the decoding result of the polar code to be decoded is obtained after position replacement.

In some embodiments of the present disclosure, the 21 _ij horizontal paths are screened according to the vertical path of the j th vertical sub-segment that has passed the verification, and the 1 _ij or 21 _ij candidate paths are reserved, including: If the value of the i-th bit in the vertical path of the j-th vertical subsection that passes the verification is all 0, then only the l _ij candidate paths with the bit value of 0 are reserved in the 21 _ij horizontal paths; In the vertical path of the jth vertical subsection of the test, the value of the ith bit is all 1, then only the _candidate paths with the bit value of 1 are reserved in the 21 _ij horizontal paths; In the vertical paths of the j vertical subsections, the i-th bit has a value of 0 or 1, and 21 _ij candidate paths with a bit value of 0 or 1 are reserved in the 21 _ij horizontal paths.

In some embodiments of the present disclosure, the performing verification on the L _v longitudinal paths of the j th longitudinal sub-segment, and retaining the longitudinal paths of the j th longitudinal sub-segment that pass the verification, includes: verifying the Parity check or cyclic redundancy check is performed on the _Lv vertical paths of the jth vertical subsection, and the vertical paths of the jth vertical subsection that pass the check are reserved.

In some embodiments of the present disclosure, the sub-segment is transformed into an XOR operation on the m decoding paths.

In some embodiments of the present disclosure, the method further includes: verifying the _Lv vertical paths of the jth vertical sub-segment, and stopping decoding when all vertical paths fail the verification.

According to another aspect of the present disclosure, a polar code decoding apparatus is provided, comprising:

The polar code sequence acquisition module to be decoded is used to acquire the polar code to be decoded with a length of N, and divide the polar code to be decoded into m subsections of length n to be decoded, where N, m and n is an integer power of 2;

The lateral path determination module is used to calculate the occurrence probability of the decoded bit value of the serial elimination list SCL decoding and the path splitting of the m subsections to be decoded by the m subsection decoders, and obtain the split lateral path ;

a vertical sub-segment processing module, configured to perform vertical sub-segment processing on the horizontal path to obtain a plurality of paths to be selected;

a lateral subsection processing module, configured to perform lateral subsection processing on the multiple candidate paths to obtain multiple candidate paths;

a verification module, configured to verify the multiple alternative paths to obtain a decoding path;

A decoding result determining module, configured to obtain the decoding result of the polar code to be decoded according to the decoding path.

In some embodiments of the present disclosure, the lateral path determination module is configured to perform SCL decoding processing on the jth bit of the ith subsection to be decoded by the ith subsection decoder, to obtain the jth bit of the jth bit. Occurrence probability and 2l _ij lateral paths, where i=1, 2, 3, ..., m; j=1, 2, 3, ..., n; 2l _ij is the jth of the ith subsection to be decoded The number of lateral paths corresponding to the bits.

In some embodiments of the present disclosure, the vertical sub-segment processing module is configured to form the j-th vertical sub-segment with the j-th bit of each to-be-decoded sub-segment in the m sub-segments to be decoded, so that any vertical sub-segment The total length of the sub-segment is m; the m bits in the j-th vertical sub-segment are divided into paths in sequence, wherein the number of vertical paths corresponding to the i-th bit is 2l _vij , when 2l _vij >=L _v , Retain the L _v longitudinal paths with the largest path metric value, i=1, 2, 3, ..., m; j=1, 2, 3, ..., n; both L _v and l _vij are positive integers, any longitudinal path The path metric value is used to indicate the probability of occurrence of any longitudinal path; the L _v longitudinal paths of the j-th longitudinal subsection are verified, and the longitudinal paths of the j-th longitudinal subsection that pass the verification are reserved , according to the vertical path of the j-th vertical subsection that has passed the verification, the 21 _ij horizontal paths are screened, and the 1 _ij or 21 _ij candidate paths are reserved.

In some embodiments of the present disclosure, the horizontal sub-segment processing module is configured to perform horizontal sub-segment processing on the multiple candidate paths respectively through m sub-segment decoders, wherein the i-th sub-segment decoder starts from l _ij or Among the 2l _ij candidate paths, the l _hij candidate paths with the largest path metric value are reserved. When l _ij or 2l _ij is less than L, l _hij is equal to l _ij or equal to 2l _ij , and when l _ij or 2l _ij is greater than or equal to L , l _hij is equal to L, i=1, 2, 3, ..., m; j=1, 2, 3, ..., n; L is used to indicate the number threshold of the candidate paths, and L is a positive integer; the The i-th subsection decoder performs the occurrence probability calculation and path splitting of the decoded bit value on the j+1-th bit of the i-th horizontal subsection based on the l _hij alternative paths. The horizontal subsection is: A horizontal path with a length of n; when the occurrence probability calculation of the decoding bit value and path splitting are performed on the n-th bit in the i-th horizontal subsection, multiple alternative paths with a length of n are obtained, and the path splitting ends;

The verification module is used to verify the multiple candidate paths of the m subsection decoders with a length of n respectively, and respectively check the candidates of the m subsection decoders that have passed the verification and have the largest path metric value. The path is used as the decoding path; if no candidate path in any subsection decoder passes the check, the candidate path with the largest path metric value in the any subsection decoder is used as the decoding path.

In some embodiments of the present disclosure, the decoding result determination module is configured to perform sub-segment transformation on m decoding paths of the m sub-segment decoders to obtain m target decoding paths of length n; The m target decoding paths form a target decoding path of length N, and the decoding result of the polar code to be decoded is obtained after position replacement.

In some embodiments of the present disclosure, the vertical sub-segment processing module is configured to, if in the vertical path of the j-th vertical sub-segment passing the check, the value of the i-th bit is all 0, then in the 21 _ij horizontal paths Only the l _ij candidate paths with the bit value of 0 are reserved; if the i-th bit in the vertical path of the j-th vertical subsection passing the check is all 1, then only bits are reserved in the 2l _ij horizontal paths. l _ij candidate paths with a value of 1; if the value of the i th bit is 0 or 1 in the vertical path of the j th vertical subsection that passes the check, the reserved bit value in the 2 l _ij horizontal paths is 0 or 1 of 2l _ij candidate paths.

In some embodiments of the present disclosure, the longitudinal sub-segment processing module is configured to perform parity check or cyclic redundancy check on the L _v longitudinal paths of the j-th longitudinal sub-segment, and retain the j-th longitudinal paths that pass the check. The vertical path of the vertical subsegments.

In some embodiments of the present disclosure, the sub-segment is transformed into an XOR operation on the m decoding paths.

In some embodiments of the present disclosure, the verification module is further configured to: verify the _Lv vertical paths of the jth vertical subsection, and stop the translation when all the vertical paths fail the verification. code.

According to yet another aspect of the present disclosure, there is provided an electronic device comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to execute the executable instructions to The polar code decoding method described above is performed.

According to yet another aspect of the present disclosure, a computer-readable storage medium is provided on which a computer program is stored, and when the computer program is executed by a processor, the above-mentioned polar code decoding method is implemented.

The technical solutions provided by the embodiments of the present disclosure can perform vertical subsection processing on the horizontal path corresponding to each subsection to be decoded in the polar code to be decoded. Then, perform horizontal sub-segment processing on a plurality of candidate paths obtained by processing the vertical sub-segments. Therefore, the present disclosure can take global consideration through vertical sub-section processing, and avoid considering only the local probability of one of the sub-sections to be decoded when screening multiple alternative paths. Therefore, the present disclosure can improve the decoding performance of polar codes.

It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure.

Description of drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description serve to explain the principles of the disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and for those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort.

1 shows a schematic diagram of a system architecture of a polar code decoding method in an embodiment of the present disclosure;

FIG. 2 shows a flowchart of a polar code decoding method in an embodiment of the present disclosure;

3 shows a flowchart of a method for obtaining multiple paths to be selected in an embodiment of the present disclosure;

4 shows a flowchart of a method for obtaining multiple alternative paths in an embodiment of the present disclosure;

FIG. 5 shows a schematic diagram of a polar code decoding process in an embodiment of the present disclosure;

FIG. 6 shows a schematic diagram of a polar code decoding apparatus in an embodiment of the present disclosure; and

FIG. 7 shows a structural block diagram of an electronic device in an embodiment of the present disclosure.

Detailed ways

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments, however, can be embodied in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repeated descriptions will be omitted. Some of the block diagrams shown in the figures are functional entities that do not necessarily necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.

FIG. 1 shows a schematic diagram of an exemplary system architecture that can be applied to a polar code decoding method according to an embodiment of the present disclosure.

As shown in FIG. 1 , the system architecture 100 may include a terminal device 101 and a base station 102 .

The terminal device 101 may send the encoded polar code to be decoded to the base station 102 . The base station 102 may receive the polar code to be decoded, and decode the polar code to be decoded by using the method provided by the implementation of the present disclosure to obtain a decoding result of the polar code to be decoded.

Alternatively, the base station 102 may send the encoded polar code to be decoded to the terminal device 101 . The terminal device 101 can receive the polar code to be decoded, and decode the polar code to be decoded by using the method provided by the implementation of the present disclosure to obtain a decoding result of the polar code to be decoded.

The terminal device 101 may be various electronic devices, including but not limited to smart phones, tablet computers, laptop computers, desktop computers, wearable devices, augmented reality devices, virtual reality devices, and the like.

It should be noted that the base station 102 can be deployed in the wireless access network to provide a communication connection between the terminal device and the background server. The present disclosure does not limit the type of the base station 102. For example, the base station 102 can be a macro base station, a micro base station Wait. In an LTE (Long Term Evolution, Long Term Evolution) communication system, the base station 102 may be an eNodeB. Alternatively, in an NR (New Radio, new air interface) communication system, the base station 102 may be a gNB.

Those skilled in the art may know that the numbers of terminal devices 101 and base stations 102 in FIG. 1 are only illustrative, and according to actual needs, there may be any number of terminal devices 101 and base stations 102 . This embodiment of the present disclosure does not limit this.

The present exemplary implementation is described in detail below with reference to the accompanying drawings and embodiments.

First, a polar code decoding method is provided in the embodiments of the present disclosure, and the method can be executed by any electronic device with computing processing capability.

FIG. 2 shows a flowchart of a polar code decoding method in an embodiment of the present disclosure. As shown in FIG. 2 , the polar code decoding method provided in the embodiment of the present disclosure includes the following steps S201 to S204.

S202: Obtain a polar code to be decoded with a length of N, and divide the polar code to be decoded into m subsections of length n to be decoded, where N, m, and n are integer powers of 2.

Exemplarily, the polar code to be decoded can be represented as a sequence of log-likelihood ratios. Exemplarily, the polar code to be decoded may also be a polar code bit sequence. The embodiments of the present disclosure do not limit the length and content of the polar code to be decoded, and the length and content of the polar code to be decoded can be determined according to application scenarios.

In some embodiments, after obtaining the polar code to be decoded, the polar code to be decoded may be divided into sub-segments to be decoded to obtain m sub-segments to be decoded with a length of n. For example, the length of the polar code to be decoded is N, then m×n=N (both m and n can be an integer power of 2). For example, the polar code to be decoded can be firstly divided into m sub-segments of length n in sequence, and then the sub-segments after division can be transformed in reverse order to obtain m length of n to be decoded subsection.

S204 , the m sub-segment decoders respectively perform the occurrence probability calculation and path splitting of the decoded bit values of the SCL decoding on the m sub-segments to be decoded, so as to obtain a split horizontal path.

In a possible implementation manner, the occurrence probability calculation and path splitting of the decoded bit value of SCL decoding are performed on any subsection to be decoded, and a decoding tree can be obtained, and the decoding tree includes the decoded bit value to be decoded. Decode the multiple lateral paths obtained by SCL decoding of the subsection.

Exemplarily, after obtaining m subsegments of length n to be decoded, each subsegment to be decoded may be decoded in parallel by using m subsegment decoders respectively. In some embodiments, the occurrence probability calculation and path splitting of the decoded bit values of the m subsections to be decoded by performing SCL decoding on the m subsection decoders, respectively, to obtain a split horizontal path, which may include: The i-th subsection decoder performs SCL decoding on the j-th bit of the i-th subsection to be decoded, and obtains the occurrence probability of the j-th bit and 21 _ij horizontal paths, where i=1, 2, ₃ , .

In an exemplary embodiment, after dividing the polar code to be decoded with length N into subsections to be decoded, 8 subsections to be decoded with length n can be obtained. At this time, the occurrence probability calculation and path splitting of the decoded bit values of the SCL decoding can be performed on the eight sub-segments to be decoded by the eight sub-segment decoders, wherein each sub-segment decoder is responsible for any one of the Subsection to be decoded. For example, the third sub-segment decoder can first perform SCL decoding on the first bit of a sub-segment to be decoded, and obtain the occurrence probability that the bit value of the first bit takes 0 and 1, thereby obtaining Two lateral paths. After that, the third sub-segment decoder can perform SCL decoding processing on the second bit of the sub-segment to be decoded on the basis of the two horizontal paths in which the bit value of the first bit is 0 and 1 , to obtain the occurrence probability that the bit value of the second bit takes 0 and 1. Therefore, on the basis of the above two split paths, four split lateral paths are obtained by splitting. Similarly, by performing SCL decoding on the jth bit of the subsection to be decoded, 21 _ij split horizontal paths can be obtained, where lij is the _j -1th bit of the subsection to be decoded. The number of corresponding split lateral paths. Wherein, i=1, 2, 3,..., m; j=1, 2, 3,..., n. Therefore, taking i=2, j=3 as an example, l ₂₃ is the occurrence probability calculation of the decoded bit value of the SCL decoding performed by the second sub-segment decoder and the third sub-segment to be decoded for path splitting The number of split lateral paths corresponding to bits.

In the horizontal subsection, there are some bits whose bit value must be 0, which can be called constant 0 bits. These constant 0 bits are obtained by the exclusive OR operation of an even number of frozen bits. In the calculation of the occurrence probability of the decoded bit value and the path splitting of the sub-segment SCL decoding, when the decoded bit is a constant 0 bit, the occurrence probability of the bit value of 0 is 1, and the occurrence probability of the bit value of 1 is 0. Therefore, only the path with the bit value of 0 needs to be reserved, and no further path splitting is required. The above-mentioned horizontal sub-segment is a horizontal path with a length of n, that is, when any sub-segment to be decoded is subjected to SCL decoding The path is split to the end One bit, the resulting lateral path.

S206, perform vertical sub-segment processing on the horizontal path to obtain a plurality of paths to be selected.

In some embodiments, the split lateral paths may first be formed into corresponding longitudinal sub-segments. Then, according to the result of performing the SCL decoding process on each subsection to be decoded, vertical path splitting is performed on each vertical subsection to obtain a plurality of paths to be selected. As shown in FIG. 3 , the method for performing vertical sub-segment processing on a horizontal path to obtain a plurality of paths to be selected may include the following steps in S302 to S306 .

S302, the j-th bit of each of the m sub-segments to be decoded is formed into the j-th vertical sub-segment, so that the total length of any vertical sub-segment is m.

In the exemplary embodiment, taking 32 horizontal sub-segments as an example, the total length of any horizontal sub-segment may be 128. Therefore, the 32 to-be-decoded sub-segments may form a total of 128 vertical sub-segments. The total length of each longitudinal sub-segment is 32.

S304, perform path splitting on m bits in the jth vertical subsection in order to obtain a split vertical path, wherein the number of vertical paths corresponding to the ith bit is 2l _vij , and when 2l _vij >=L _v , retain the L _v longitudinal paths with the largest path metric value, i=1, 2, 3, ..., m; j=1, 2, 3, ..., n; both L _v and l _vij are positive integers, any longitudinal path The path metric of a path is used to indicate the probability of occurrence of any longitudinal path.

In a possible implementation manner, by performing path splitting on any vertical sub-segment, a decoding tree can be obtained, and the decoding tree includes a plurality of vertical paths obtained by performing path splitting on the vertical sub-segment.

In the exemplary embodiment, taking the first vertical sub-segment formed by the first bits of each horizontal sub-segment as an example, the m sub-segment decoders have respectively processed the first bits of the sub-segments to be decoded. After SCL decoding is performed, the probability of occurrence of 0 and 1 corresponding to the first bit of each subsection to be decoded can be divided into paths in order, and the first bit of the first horizontal subsection can be obtained. vertical path. Then, on the basis of the above two vertical paths, the second bit of the vertical sub-segment, that is, the first bit of the second horizontal sub-segment, is subjected to path splitting according to the corresponding occurrence probability of 0 and 1 to obtain For the corresponding four vertical paths, path splitting is performed on the other bits of the first vertical sub-segment in turn, and 21 _vi1 vertical paths can be obtained. Similarly, the path splitting is performed on m bits in the j-1th vertical sub-segment in order, and the 2l _vij vertical path can be obtained, and then the m bits in the j-th vertical sub-segment are split in order, and then the path is split. Get 2l _vij vertical path. Exemplarily, taking the 21 _vij vertical path corresponding to the j-1th vertical subsection as an example, in the 21 _vij split paths, the number of vertical paths with the bit value of any bit being 0 is 1 _vij0 , and any The number of vertical paths with a bit value of 1 for one bit is l _vij1 , and 2l _vij is equal to the sum of the numbers of l _vij0 and l _vij1 . Wherein, i=1, 2, 3,..., m; j=1, 2, 3,..., n. Therefore, taking i=2 and j=3 as an example, 21 _v23 is the number of vertical paths corresponding to the second bit in the third vertical subsection. Alternatively, 21 _v23 may also be referred to as the number of paths to be selected corresponding to the second bit in the third vertical subsection.

In an exemplary embodiment, a value of L _v may be set. When the number of longitudinal paths is greater than the value of L _v , the longitudinal paths need to be screened so that the number of longitudinal paths is always less than or equal to the value of L _v . The embodiments of the present disclosure do not limit the value of L _v , and the value of L _v will affect decoding performance, decoding complexity, and early stop timing, and may be set based on technical indicators or application scenarios.

In some embodiments, the longitudinal paths may be filtered by the size of the path metric value of each bit in each longitudinal path. Thus, L _v longitudinal paths with the largest path metric value can be reserved. This embodiment of the present disclosure does not limit the method for calculating the path metric value of each bit. Exemplarily, the path metric value of each bit can be calculated by using the signal-to-noise ratio when transmitting the polar code to be decoded. Exemplarily, taking the l _vij longitudinal path corresponding to the j-1 th longitudinal subsection as an example, when 2l _vij >=L _v , the 2l _vij split paths are screened, and the L with the largest path metric value is retained. _v vertical paths. In the L _v vertical paths, the number of vertical paths with the bit value of any bit being 0 is l _vij0 , the number of vertical paths with the bit value of any bit being 1 is l _vij1 , and 2l _vij is equal to the sum of l _vij0 and l _vij1 sum of numbers. This embodiment of the present disclosure does not limit the representation method of the path metric value. Exemplarily, the path metric value may be represented by a log-likelihood ratio. Since the probability of occurrence is prone to overflow and other problems in the program calculation, for example, when the length N of the polar code to be decoded is 1024, the probability of occurrence of any longitudinal path will be very small, so the log-likelihood ratio can be used instead. probability of occurrence.

S306, verify the _Lv longitudinal paths of the jth longitudinal subsection, and retain the longitudinal path of the jth longitudinal subsection that passed the verification; 2l _ij horizontal paths are screened, and l _ij or 2l _ij candidate paths are reserved.

In some embodiments, verifying the L _v longitudinal paths of the j th longitudinal sub-segment, and retaining the longitudinal paths of the j th longitudinal sub-segment that pass the verification, includes: checking the L _v of the j th longitudinal sub-segment A parity check (ParityCheck) or a cyclic redundancy check (Cyclic Redundancy Check, CRC) is performed on each vertical path, and the vertical path of the jth vertical subsection that passes the check is reserved. The embodiments of the present disclosure do not limit the verification steps of the parity check and the cyclic redundancy check. Alternatively, other applicable verification methods may also be used here to verify the L _v longitudinal paths of the j th longitudinal subsection.

The polar code decoding method provided by the embodiment of the present disclosure may further include: verifying the _Lv vertical paths of the jth vertical subsection, and stopping decoding when all vertical paths fail the verification. Exemplarily, if no vertical path passes the check, it is proved that the decoding fails. At this time, the early stop function in polar code decoding can be implemented, allowing the retransmission process to be started in advance without continuing to decode. Therefore, the embodiments of the present disclosure can reduce the calculation amount of polar code decoding, and shorten the waiting time for retransmission of error frames.

In some embodiments, 21 _ij horizontal paths are screened according to the vertical path of the j th vertical subsection that passes the verification, and the 1 _ij or 21 _ij candidate paths are reserved, including: if the j th vertical subsection passes the verification In the vertical paths of the vertical subsections, the value of the i-th bit is all 0, then only the l _ij candidate paths with the bit value of 0 are reserved in the 21 _ij horizontal paths; In the vertical path of the segment, the value of the i th bit is 1, then only the 1 _ij candidate paths with the bit value of 1 are reserved in the 21 _ij horizontal paths; In the path, the value of the i-th bit is 0 or 1, then 21 _ij candidate paths with the bit value 0 or 1 are reserved in the 21 _ij horizontal paths.

Exemplarily, taking 128 longitudinal sub-segments as an example, the total length of each longitudinal sub-segment is 32. When verifying the vertical paths corresponding to the sixth vertical subsection, it can be assumed that 9 vertical paths have passed the verification. In addition, the bit value of the 10th bit in the vertical path that has passed the check may all be 0. Therefore, when the 10th sub-segment SCL decoder performs the occurrence probability calculation and path splitting of the decoded bit value of the corresponding SCL decoding on the 7th bit, it can only be used when the bit value of the 10th bit is 0 On the basis of the 9 vertical paths, the occurrence probability calculation and path splitting of the decoded bit value of SCL decoding are performed.

Similarly, still taking the above 128 vertical sub-segments as an example, the total length of each vertical sub-segment is 32. When verifying the vertical paths corresponding to the 12th vertical subsection, it can be assumed that 10 vertical paths pass the verification. In addition, the bit value of the 18th bit in the above-mentioned 10 vertical paths that have passed the check can be all 1. Therefore, the 18th sub-segment SCL decoder is decoding the corresponding SCL decoding on the 13th bit. In the calculation of the occurrence probability of the bit value and the path splitting, the occurrence probability calculation and path splitting of the decoded bit value of the SCL decoding may be performed only on the basis of the 10 vertical paths whose bit value of the 18th bit is 1.

Similarly, still taking the above 128 vertical sub-segments as an example, the total length of each vertical sub-segment is 32. When verifying the vertical path corresponding to the third vertical subsection, it can be assumed that four vertical paths pass the verification. In addition, the bit value of the sixth bit in the above-mentioned four vertical paths that pass the check can include 0 and 1. Therefore, the sixth sub-segment SCL decoder is performing the corresponding SCL decoding on the fourth bit. When calculating the occurrence probability of the code bit value and the path splitting, the occurrence probability calculation and path of the decoding bit value of the SCL decoding can be performed only on the basis of the four vertical paths whose bit value of the sixth bit is 0 or 1. Split.

S208: Perform lateral sub-section processing on the multiple candidate paths to obtain multiple candidate paths.

In some embodiments, the method of performing horizontal sub-segment processing on multiple candidate paths to obtain multiple candidate paths may be as shown in FIG. 4 .

S402, perform horizontal subsegment processing on a plurality of paths to be selected by m subsegment decoders, wherein, the i th subsegment decoder retains the 1 _hij with the largest path metric value from the 1 _ij or 21 _ij paths to be selected There are alternative paths, when l _ij or 2l _ij is less than L, l _hij is equal to l _ij or equal to 2l _ij , when l _ij or 2l _ij is greater than or equal to L, l _hij is equal to L, i=1, 2, 3, … , m; j=1, 2, 3, ..., n; L is used to indicate the threshold of the number of candidate paths, and L is a positive integer.

Exemplarily, taking 16 sub-segment decoders for performing horizontal sub-segment processing on multiple paths to be selected respectively as an example, the total length of any path to be selected is 16. The 16 sub-segment decoders respectively correspond to a certain bit in each path to be selected. For example, the first sub-segment decoder may correspond to the first bit in each path to be selected. The first sub-segment decoder can further screen the multiple candidate paths obtained above. The above-mentioned screening method for obtaining the path to be selected may screen the horizontal sub-segments based on the path metric value of the horizontal sub-segment, and retain l _hij candidate paths with the largest path metric value. In exemplary embodiments, a value of L may be set. When the number of paths to be selected is greater than the value of L, the paths to be selected need to be screened so that the number of paths to be selected is always less than or equal to the value of L. This embodiment of the present disclosure does not limit the value of L, and the value of L may be set based on technical indicators or application scenarios.

S404, the i-th subsection decoder performs the occurrence probability calculation and path splitting of the decoding bit value on the j+1-th bit of the i-th horizontal subsection based on the l _hij alternative paths; After the occurrence probability calculation of the decoded bit value and path splitting are performed on the nth bit in the horizontal subsections, multiple candidate paths of length n are obtained, and the path splitting ends.

Exemplarily, through the above-mentioned horizontal sub-segment processing method, each sub-segment decoder can perform the occurrence probability calculation and path splitting of the decoded bit value for the next bit based on the alternative path corresponding to the previous bit, until Split to the last bit to get the final multiple alternative paths of length n.

S210, verifying the multiple candidate paths to obtain a decoding path.

In some embodiments, verifying multiple candidate paths to obtain a decoding path includes: performing verification on multiple candidate paths of m subsection decoders with a length of n respectively, The candidate path that passes the check and has the largest path metric value in the decoder is used as the decoding path; if no alternative path in any sub-segment decoder passes the check, the path metric value of any sub-segment decoder is the largest. The alternative path is used as the decoding path.

In a possible implementation manner, if no alternative path of any sub-segment decoder passes the check, it is proved that this decoding fails. This embodiment of the present disclosure does not limit the method for verifying multiple candidate paths here. Exemplarily, the method for verifying multiple candidate paths here may be the same as the above-mentioned method for verifying vertical paths. Similarly, it can be parity check or cyclic redundancy check or other suitable check methods.

S212, obtaining a decoding result of the polar code to be decoded according to the decoding path.

In some embodiments, obtaining the decoding result of the polar code to be decoded according to the decoding path includes: performing sub-segment transformation on m decoding paths of the m sub-segment decoders to obtain m targets of length n Decoding path: A target decoding path of length N is formed by m target decoding paths, and the decoding result of the polar code to be decoded is obtained after position replacement.

In some embodiments, the sub-segment is transformed into an XOR operation over m decoding paths. Exemplarily, the decoding paths (also referred to as decoding bit sequences) corresponding to the m sub-segment SCL decoders can be set as a. Therefore, the length of the m decoding bit sequences a after sub-segment transformation can be obtained as The m target decoding paths of n (which may also be referred to as target decoding bit sequences) can be set as v. The sub-segment conversion formula between a and v can be shown in Equation 1:

in,

另外，

是

阶克罗内克积。

in addition,

Yes

Order Kronecker product.

和

可以用于表示译码比特的判决值。并且，该判决值未必是发送端的原值。It should be noted,

and

Can be used to represent the decision value of the decoded bits. Moreover, the judgment value is not necessarily the original value of the sender.

After that, after expanding Equation 1, the target decoding bit sequence as shown below can be obtained:

It should be noted that the meaning of the decoding path and the decoding bit sequence is the same in this specification, so the target decoding path and the target decoding bit sequence have the same meaning, the alternative path and the alternative bit sequence have the same meaning, and the split path and split Bit sequences have the same meaning.

Exemplarily, if the encoding process of the polar code of length N includes the inverse order transformation, the position is replaced by the inverse processing of the inverse order transformation; if the encoding process of the polar code of length N does not include the inversion order transformation, the position permutation can keep the bit order in the decoding result of length N unchanged.

Exemplarily, if a subsection to be decoded with a length of n includes reverse order transformation in the polar code encoding process, then the sequence to be decoded is divided into m subsections to be decoded in sequence, and needs to be performed accordingly. Inverted sequence transformation to obtain the subsection to be decoded; if the subsection to be decoded with length n does not include the inverted sequence transformation in the polar code encoding process, then the sequence to be decoded is divided into m in order. After the subsection to be decoded, it is not necessary to perform reverse order transformation, and the position replacement can keep the bit order in the decoding result of the subsection to be decoded with a length of n unchanged.

The method provided by the embodiments of the present disclosure can perform vertical subsection processing on the split horizontal path corresponding to each subsection to be decoded in the polar code to be decoded. Then, perform horizontal sub-segment processing on a plurality of candidate paths obtained by processing the vertical sub-segments. Therefore, the present disclosure can take global consideration through vertical sub-section processing, and avoid considering only the local probability of one of the sub-sections to be decoded when screening multiple alternative paths. Therefore, the present disclosure can improve the decoding performance of polar codes.

Exemplarily, a schematic diagram of a polar code decoding process may be shown in FIG. 5 . For the polar code to be decoded with a length of N, the polar code to be decoded is divided into m subsections of length n to be decoded, and the m subsection SCL decoders can simultaneously perform SCL decoding, and each The occurrence probability calculation of the decoded bit value of the SCL decoded subsection to be decoded and the path splitting are performed to obtain the split horizontal path. Exemplarily, by performing SCL decoding processing on the jth bit of each subsection to be decoded, 21 _ij horizontal paths can be obtained. For this step, reference may be made to the above S204, and details are not repeated here.

Afterwards, vertical sub-segment processing can be performed on the horizontal path to obtain multiple paths to be selected. Exemplarily, for the jth bit of each subsection to be decoded, the jth bit of each subsection to be decoded in the m subsections to be decoded may be formed into a jth vertical subsection. Perform path splitting on m bits in the j-th vertical subsection in sequence, where the number of vertical paths corresponding to the i-th bit is 2l _vij , and when 2l _vij >=L _v , keep L _v with the largest path metric value vertical path. Then, the _Lv longitudinal paths of the j-th longitudinal subsection can be verified, and the longitudinal paths of the j-th longitudinal subsection that have passed the verification are retained. According to the longitudinal paths of the j-th longitudinal subsection that have passed the verification, 2l _ij lateral paths are screened, and l _ij or 2l _ij candidate paths are reserved. For this step, reference may be made to the above S206, and details are not repeated here.

After l _ij or 2l _ij of candidate paths are obtained, horizontal sub-segment processing may be performed on l _ij or 2l _ij of candidate paths to obtain multiple candidate paths. Exemplarily, horizontal sub-segment processing may be performed on the 1 _ij or 21 _ij candidate paths respectively through m sub-segment decoders, wherein the i-th sub-segment decoder is reserved from the 1 _ij or 21 _ij candidate paths. l _hij alternative paths with the largest path metric value, when l _ij or 2l _ij is less than L, l _hij is equal to l _ij or equal to 2l _ij , and when l _ij or 2l _ij is greater than or equal to L, l _hij is equal to L. For this step, reference may be made to the above S208, which will not be repeated here.

After the above-mentioned multiple alternative paths are obtained, the sub-segment SCL decoder can perform the next bit decoding process according to the multiple alternative paths obtained by the sub-segment SCL decoder. Exemplarily, the above-mentioned multiple candidate paths are multiple candidate paths obtained by the ith subsection decoder for the jth bit. When the number of the candidate paths is L, the number of lateral paths obtained by performing the SCL decoding process on the j+1th bit is 2L. Then, the j+1 th vertical subsection can be obtained according to the 2L horizontal paths corresponding to the j+1 th bit, and the above operation is repeated according to the j+1 th vertical subsection, and L or 2L candidate paths are reserved. After L or 2L candidate paths are obtained, the above operation may be repeated according to the L or 2L candidate paths to obtain L candidate paths.

Afterwards, the L candidate paths can be checked to obtain a decoding path that has passed the check. Exemplarily, the check can be a CRC check. By performing a position replacement operation on the decoding path, the final decoding result of the polar code to be decoded can be obtained. For this step, reference may be made to the above S210 and S212, which will not be repeated here.

Based on the same inventive concept, the embodiments of the present disclosure also provide a polar code decoding apparatus, as described in the following embodiments. Since the principle of solving the problem in this apparatus embodiment is similar to that in the foregoing method embodiment, the implementation of this apparatus embodiment may refer to the implementation of the foregoing method embodiment, and repeated details will not be repeated.

FIG. 6 shows a schematic diagram of a polar code decoding apparatus in an embodiment of the present disclosure. As shown in FIG. 6 , the apparatus includes:

The polar code sequence acquisition module 601 to be decoded is configured to acquire the polar code to be decoded with a length of N, and divide the polar code to be decoded into m subsections of length n to be decoded, N, m and n is an integer power of 2;

The lateral path determination module 602 is used to calculate the occurrence probability and path splitting of the decoded bit values of the serial elimination list SCL decoding on the m subsections to be decoded by the m subsection decoders, to obtain the split lateral path. path;

The vertical sub-segment processing module 603 is used to perform vertical sub-segment processing on the horizontal path to obtain a plurality of paths to be selected;

a lateral subsection processing module 604, configured to perform lateral subsection processing on a plurality of candidate paths to obtain a plurality of candidate paths;

A verification module 605, configured to verify multiple candidate paths to obtain a decoding path;

The decoding result determination module 606 is configured to obtain the decoding result of the polar code to be decoded according to the decoding path.

In some embodiments of the present disclosure, the lateral path determination module 602 is configured to perform SCL decoding processing on the jth bit of the ith subsection to be decoded by the ith subsection decoder to obtain the jth bit The occurrence probability of , and 2l _ij lateral paths, where i=1, 2, 3, ..., m; j=1, 2, 3, ..., n; 2l _ij is the jth of the ith subsection to be decoded The number of split lateral paths corresponding to bits.

In some embodiments of the present disclosure, the vertical sub-segment processing module 603 is configured to form the j-th vertical sub-segment with the j-th bit of each to-be-decoded sub-segment in the m sub-segments to be decoded, such that any The total length of the vertical sub-segment is m; path splitting is performed on m bits in the j-th vertical sub-segment in sequence, wherein the number of vertical paths corresponding to the i-th bit is 2l _vij , when 2l _vij >=L _v , retain the L _v longitudinal paths with the largest path metric value, i=1, 2, 3, ..., m; j=1, 2, 3, ..., n; both L _v and l _vij are positive integers, any longitudinal path The path metric value of the path is used to indicate the probability of occurrence of any longitudinal path; the L _v longitudinal paths of the j-th longitudinal subsection are verified, and the longitudinal paths of the j-th longitudinal subsection that pass the verification are retained. For the vertical path of the j-th vertical subsection of the verification, the 21 _ij split horizontal paths are screened, and the 1 _ij or 21 _ij candidate paths are reserved.

In some embodiments of the present disclosure, the horizontal sub-segment processing module 604 is configured to perform horizontal sub-segment processing on the multiple candidate paths through m sub-segment decoders, wherein the i-th sub-segment decoder starts from l _ij or 2l _ij candidate paths to retain l _hij alternative paths with the largest path metric value, when l _ij or 2l _ij is less than L, l _hij is equal to l _ij or equal to 2l _ij , when l _ij or 2l _ij is greater than or equal to L When , l _hij is equal to L, i=1, 2, 3,..., m; j=1, 2, 3,..., n; L is used to indicate the threshold of the number of alternative paths, L is a positive integer; the i-th sub The segment decoder is based on the l _hij alternative paths, and performs the occurrence probability calculation and path splitting of the decoded bit value for the j+1 bit of the i-th horizontal sub-segment. The horizontal sub-segment is a horizontal sub-segment of length n. path; after the occurrence probability calculation of the decoded bit value and the path splitting are performed on the nth bit in the ith horizontal subsection, multiple alternative paths of length n are obtained, and the path splitting ends;

The checking module 605 is configured to check the multiple candidate paths of the m sub-segment decoders with a length of n respectively, and respectively check the candidate paths of the m sub-segment decoders that pass the check and have the largest path metric value As a decoding path; if no candidate path of any subsection decoder passes the check, the candidate path with the largest path metric value in any subsection decoder is used as the decoding path.

In some embodiments of the present disclosure, the decoding result determination module 606 is configured to perform sub-segment transformation on m decoding paths of m sub-segment decoders to obtain m target decoding paths of length n; The target decoding paths form a target decoding path of length N, and the decoding result of the polar code to be decoded is obtained after position replacement.

In some embodiments of the present disclosure, the vertical sub-segment processing module 603 is configured to: if the value of the i-th bit in the vertical path of the j-th vertical sub-segment passing the check is all 0, then 21 _ij horizontal paths Only the l _ij candidate paths with the bit value of 0 are reserved in the 2l ij; if the i-th bit in the vertical path of the j-th vertical sub-segment that passes the check is all 1, then only the 2l _ij horizontal paths are reserved. l _ij candidate paths with a bit value of 1; if the i-th bit value is 0 or 1 in the vertical path of the j-th vertical subsection that passes the check, the reserved bit value in the 2l _ij horizontal paths is 2l _ij candidate paths of 0 or 1.

In some embodiments of the present disclosure, the vertical sub-segment processing module 603 is configured to perform parity check or cyclic redundancy check on the L _v vertical paths of the j-th vertical sub-segment, and retain the j-th ones that pass the check. The vertical path of the vertical subsegment.

In some embodiments of the present disclosure, the sub-segment is transformed into an XOR operation on m decoding paths.

In some embodiments of the present disclosure, the verification module 605 is further configured to: verify the _Lv vertical paths of the jth vertical subsection, and stop decoding when all vertical paths fail the verification.

The apparatus provided by the embodiment of the present disclosure can perform vertical subsection processing on the split horizontal path corresponding to each subsection to be decoded in the polar code to be decoded. Then, perform horizontal sub-segment processing on a plurality of candidate paths obtained by processing the vertical sub-segments. Therefore, the present disclosure can take global consideration through vertical sub-section processing, and avoid considering only the local probability of one of the sub-sections to be decoded when screening multiple alternative paths. Therefore, the present disclosure can improve the decoding performance of polar codes.

As will be appreciated by one skilled in the art, various aspects of the present disclosure may be implemented as a system, method or program product. Therefore, various aspects of the present disclosure can be embodied in the following forms: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or a combination of hardware and software aspects, which may be collectively referred to herein as implementations "circuit", "module" or "system".

An electronic device 700 according to this embodiment of the present disclosure is described below with reference to FIG. 7 . The electronic device 700 shown in FIG. 7 is only an example, and should not impose any limitation on the function and scope of use of the embodiments of the present disclosure.

As shown in FIG. 7, electronic device 700 takes the form of a general-purpose computing device. Components of the electronic device 700 may include, but are not limited to, the above-mentioned at least one processing unit 710 , the above-mentioned at least one storage unit 720 , and a bus 730 connecting different system components (including the storage unit 720 and the processing unit 710 ).

Wherein, the storage unit stores program codes, and the program codes can be executed by the processing unit 710, so that the processing unit 710 executes various exemplary embodiments according to the present disclosure described in the above-mentioned “Detailed Description of Embodiments” of this specification. Implementation steps.

The storage unit 720 may include a readable medium in the form of a volatile storage unit, such as a random access storage unit (RAM) 7201 and/or a cache storage unit 7202 , and may further include a read only storage unit (ROM) 7203 .

The storage unit 720 may also include a program/utility 7204 having a set (at least one) of program modules 7205 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, An implementation of a network environment may be included in each or some combination of these examples.

The bus 730 may be representative of one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local area using any of a variety of bus structures bus.

The electronic device 700 may also communicate with one or more external devices 740 (eg, keyboards, pointing devices, Bluetooth devices, etc.), with one or more devices that enable a user to interact with the electronic device 700, and/or with Any device (eg, router, modem, etc.) that enables the electronic device 700 to communicate with one or more other computing devices. Such communication may take place through input/output (I/O) interface 750 . Also, the electronic device 700 may communicate with one or more networks (eg, a local area network (LAN), a wide area network (WAN), and/or a public network such as the Internet) through a network adapter 760 . As shown, network adapter 760 communicates with other modules of electronic device 700 via bus 730 . It should be appreciated that, although not shown, other hardware and/or software modules may be used in conjunction with electronic device 700, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives and data backup storage systems.

From the description of the above embodiments, those skilled in the art can easily understand that the exemplary embodiments described herein may be implemented by software, or may be implemented by software combined with necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure may be embodied in the form of software products, and the software products may be stored in a non-volatile storage medium (which may be CD-ROM, U disk, mobile hard disk, etc.) or on the network , including several instructions to cause a computing device (which may be a personal computer, a server, a terminal device, or a network device, etc.) to execute the method according to an embodiment of the present disclosure.

In an exemplary embodiment of the present disclosure, a computer-readable storage medium is also provided, and the computer-readable storage medium may be a readable signal medium or a readable storage medium. A program product capable of implementing the above-described method of the present disclosure is stored thereon. In some possible implementations, various aspects of the present disclosure may also be implemented in the form of a program product comprising program code for causing the program product to run on a terminal device when the program product is run on a terminal device. The terminal device executes the steps according to various exemplary embodiments of the present disclosure described in the above-mentioned "Description of Embodiments" section of this specification.

More specific examples of computer-readable storage media in the present disclosure may include, but are not limited to, electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read only memory (ROM), Erasable programmable read only memory (EPROM or flash memory), optical fiber, portable compact disk read only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the above.

In the present disclosure, a computer-readable storage medium may include a data signal in baseband or propagated as part of a carrier wave, carrying readable program code therein. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the foregoing. A readable signal medium can also be any readable medium, other than a readable storage medium, that can transmit, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.

Alternatively, program code embodied on a computer-readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

In particular implementation, program code for performing operations of the present disclosure may be written in any combination of one or more programming languages, including object-oriented programming languages—such as Java, C++, etc., and also This includes conventional procedural programming languages - such as the "C" language or similar programming languages. The program code may execute entirely on the user computing device, partly on the user device, as a stand-alone software package, partly on the user computing device and partly on a remote computing device, or entirely on the remote computing device or server execute on. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any kind of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (eg, using an Internet service provider business via an Internet connection).

It should be noted that although several modules or units of the apparatus for action performance are mentioned in the above detailed description, this division is not mandatory. Indeed, according to embodiments of the present disclosure, the features and functions of two or more modules or units described above may be embodied in one module or unit. Conversely, the features and functions of one module or unit described above may be further divided into multiple modules or units to be embodied.

Additionally, although the various steps of the methods of the present disclosure are depicted in the figures in a particular order, this does not require or imply that the steps must be performed in the particular order or that all illustrated steps must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step for execution, and/or one step may be decomposed into multiple steps for execution, and the like.

Those skilled in the art can easily understand from the description of the above embodiments that the exemplary embodiments described herein can be implemented by software, or can be implemented by software combined with necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure may be embodied in the form of software products, and the software products may be stored in a non-volatile storage medium (which may be CD-ROM, U disk, mobile hard disk, etc.) or on the network , including several instructions to cause a computing device (which may be a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the method according to an embodiment of the present disclosure.

Other embodiments of the present disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common general knowledge or techniques in the technical field not disclosed by this disclosure . The specification and examples are to be regarded as exemplary only, with the true scope of the disclosure being indicated by the appended claims.

Claims (12)

1. A method for decoding a polar code, comprising:

acquiring a to-be-decoded polarization code with the length of N, dividing the to-be-decoded polarization code into m to-be-decoded subsections with the length of N, wherein N, m and N are integral powers of 2;

performing occurrence probability calculation and path splitting on the decoding bit values decoded by the SCL through m subsegments to be decoded by the m subsegments decoders respectively to obtain split transverse paths;

performing longitudinal sub-segment processing on the transverse path to obtain a plurality of paths to be selected;

performing transverse sub-section processing on the multiple paths to be selected to obtain multiple alternative paths;

checking the multiple alternative paths to obtain a decoding path;

and obtaining a decoding result of the polar code to be decoded according to the decoding path.

2. The method according to claim 1, wherein the calculating of the occurrence probability of the decoded bit value and the path splitting of the serial cancellation list SCL decoding are respectively performed on m subsections to be decoded by m subsection decoders to obtain split transverse paths, and the method comprises:

SCL decoding processing is carried out on the jth bit of the ith subsection to be decoded through the ith subsection decoder to obtain the occurrence probability of the jth bit and 2l _ij A bar transverse path, wherein i =1,2,3, …, m; j =1,2,3, …, n;2l _ij The number of the transverse paths corresponding to the jth bit of the ith sub-segment to be decoded.

3. The polar code decoding method according to claim 2, wherein the performing longitudinal sub-segment processing on the transverse path to obtain a plurality of paths to be selected includes:

forming the jth bit of each subsection to be decoded in the m subsections to be decoded into the jth longitudinal subsection so as to enable the total length of any longitudinal subsection to be m;

path splitting is carried out on m bits in the jth longitudinal subsegment in sequence to obtain a split longitudinal path, wherein the number of the longitudinal paths corresponding to the ith bit is 2l _vij When 2l _vij >＝L _v Then, the L with the largest path metric value is reserved _v A strip longitudinal path, i =1,2,3, …, m; j =1,2,3, …, n; l is a radical of an alcohol _v And l _vij The path metric values of any longitudinal path are used for indicating the occurrence probability of any longitudinal path;

l for the jth longitudinal sub-segment _v Checking the longitudinal paths, and reserving the longitudinal path of the jth longitudinal sub-section passing the checking;

according to the longitudinal path of the jth longitudinal subsection passing the verification, the 2l is processed _ij The strip is screened along the transverse path, retaining _ij Or 2l _ij And (6) selecting a path to be selected.

4. The polar code decoding method according to any one of claims 1 to 3, wherein the performing horizontal sub-segment processing on the multiple paths to be selected to obtain multiple alternative paths includes:

respectively carrying out horizontal subsection processing on a plurality of paths to be selected through m subsection decoders, wherein the ith subsection decoder is connected with the I-th subsection decoder _ij Or 2l _ij Reserving the path metric value with maximum l in the candidate path _hij Alternative path of strip, # when _ij Or 2l _ij When less than L, L _hij Is equal to l _ij Or equal to 2l _ij When l is _ij Or 2l _ij When L is greater than or equal to L, L _hij Equal to L, i =1,2,3, …, m; j =1,2,3, …, n; l is used for indicating the number threshold of the alternative paths, and is a positive integer;

the ith subsection decoder has a length of l _hij On the basis of alternative paths, toCarrying out occurrence probability calculation and path splitting on a decoding bit value on the j +1 th bit of the i transverse subsegments, wherein the transverse subsegments are transverse paths with the length of n;

when the occurrence probability calculation and the path splitting of the decoding bit value are carried out on the nth bit in the ith transverse subsection, a plurality of alternative paths with the length of n are obtained, and the path splitting is finished;

the checking the multiple candidate paths to obtain a decoding path includes:

respectively checking a plurality of alternative paths with the length of n of the m subsegment decoders, and respectively taking the alternative path which passes the checking and has the maximum path metric value in the m subsegment decoders as the decoding path; and if no alternative path passes the verification in any sub-section decoder, taking the alternative path with the maximum path metric value in any sub-section decoder as the decoding path.

5. The method for decoding the polar code according to claim 4, wherein the obtaining a decoding result of the polar code to be decoded according to the decoding path comprises:

performing sub-segment conversion on m decoding paths of the m sub-segment decoders to obtain m target decoding paths with the length of n;

and forming a target decoding path with the length of N by the m target decoding paths, and obtaining a decoding result of the polar code to be decoded after position replacement.

6. The polar code decoding method according to claim 3, wherein the 2l longitudinal subsegments are decoded according to the longitudinal path of the jth longitudinal subsegment passing the check _ij Screening the transverse path of the strip, reserving l _ij Or 2l _ij A candidate path comprising:

if the ith bit value is 0 in the checked longitudinal path of the jth longitudinal sub-section, 2l _ij Reserving only l with bit value 0 in a horizontal path _ij Selecting a path to be selected;

if the checked jth longitudinal subsection passes the ith ratioWhen all the bits are 1, 2l _ij Keeping only 1 with bit value 1 in the stripe horizontal path _ij Selecting a path to be selected;

if the ith bit value is 0 or 1 in the checked longitudinal path of the jth longitudinal sub-section, 2l _ij 2l with bit value of 0 or 1 reserved in a horizontal path _ij And (6) selecting a path to be selected.

7. The polar code decoding method according to claim 3, wherein L of said j longitudinal sub-segment _v The method for verifying the longitudinal path and reserving the longitudinal path of the jth longitudinal sub-section passing the verification comprises the following steps:

l for the jth longitudinal sub-segment _v And performing parity check or cyclic redundancy check on the strip longitudinal path, and reserving the longitudinal path of the jth longitudinal sub-section passing the check.

8. The polar-code decoding method according to claim 5, wherein the sub-segments are transformed into XOR operations for the m decoding paths.

9. The polar code decoding method according to claim 3, further comprising:

l for the jth longitudinal sub-segment _v And checking the longitudinal paths, and stopping decoding when all the longitudinal paths do not pass the check.

10. A polar code decoding apparatus, comprising:

the device comprises a to-be-decoded polarization code column acquisition module, a to-be-decoded polarization code decoding module and a decoding module, wherein the to-be-decoded polarization code column acquisition module is used for acquiring a to-be-decoded polarization code with the length of N, and dividing the to-be-decoded polarization code into m to-be-decoded subsegments with the length of N, and N, m and N are integral powers of 2;

the transverse path determining module is used for respectively carrying out probability calculation and path splitting on the decoding bit values of the serial elimination list SCL decoding on the m subsections to be decoded through the m subsection decoders to obtain split transverse paths;

the longitudinal sub-section processing module is used for performing longitudinal sub-section processing on the transverse paths to obtain a plurality of paths to be selected;

the transverse sub-section processing module is used for carrying out transverse sub-section processing on the multiple paths to be selected to obtain multiple alternative paths;

the checking module is used for checking the multiple alternative paths to obtain a decoding path;

and the decoding result determining module is used for obtaining the decoding result of the polarization code to be decoded according to the decoding path.

11. An electronic device, comprising:

a processor; and

a memory for storing executable instructions of the processor;

wherein the processor is configured to perform the polar code decoding method of any one of claims 1 to 9 via execution of the executable instructions.

12. A computer-readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, is adapted to carry out the polar code decoding method according to any one of claims 1 to 9.

Images