CN115064629A - Micro-LED device based on optoelectronic isolation and preparation method thereof - Google Patents

Abstract

The invention discloses a Micro-LED device based on photoelectric isolation and a preparation method thereof. The Micro-LED device comprises a substrate, an N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer sequentially arranged from bottom to top and electrodes, the multi-quantum well layer includes a plurality of separately arranged multi-quantum well structures, the p-type semiconductor layer includes a plurality of p-type semiconductor structures located on the multi-quantum well structure, and the multi-quantum well structure is also provided with a P-type semiconductor structure formed on the The isolation layer on the sidewall of the type semiconductor structure, the isolation layer and the sidewall of the multiple quantum well structure are provided with a reflective layer, and the electrode includes an N electrode electrically connected to the N type semiconductor layer and an N electrode electrically connected to the P type semiconductor structure. Sexually connected P electrode. The Micro-LED device in the present invention can achieve electrical isolation and optical isolation of the device by introducing an isolation layer and a reflective layer, improve the luminous efficiency and display contrast of the device, and reduce the optical crosstalk effect.

Description

Micro-LED device based on optoelectronic isolation and preparation method thereof

technical field

The invention belongs to the technical field of semiconductor display, and in particular relates to a Micro-LED device based on photoelectric isolation and a preparation method thereof.

Background technique

In the prior art, the preparation method of Micro-LED devices is to obtain LED micro-light-emitting devices with a size of micrometers through a micro-etching process on the basis of conventional LEDs. However, in the preparation process of the above-mentioned Micro-LED devices, the etching process A large number of sidewall damage and dangling bonds will be formed, which means that there are high density defect energy levels in the edge region of the Micro-LED device, and the dangling bonds correspond to the leakage paths of carriers, which will greatly limit the Micro-LED device. LED devices achieve better optoelectronic properties. In addition, there will be serious optical crosstalk between adjacent Micro-LED devices fabricated by conventional processes, which will seriously affect the micro-display effect of the devices. For example, the light emission of a single Micro-LED pixel will cause reflections on the side walls of adjacent Micro-LED pixels. When the light-emitting pixel needs to be surrounded by black in the micro-display process to improve contrast, the existence of the above-mentioned optical crosstalk problem will greatly reduce the display effect. . At the same time, optical crosstalk will also cause the dispersion of light transmission, thus greatly reducing the brightness of Micro-LED devices. If it is applied to the light signal of traffic lights, it will be seriously affected by strong sunlight, so that drivers can make Wrong operation will affect safe operation.

In order to improve the brightness and contrast of Micro-LED devices, it is necessary to continuously improve their luminous efficiency and reduce the optical crosstalk between adjacent Micro-LED devices. The damage of traditional etching methods is particularly significant for Micro-LED devices, and as the size of Micro-LED devices decreases, sidewall damage will greatly reduce the electro-optical conversion efficiency of the entire light-emitting array, and it will also pose a problem on device yield and process reliability. higher requirements.

Therefore, in view of the above technical problems, it is necessary to provide a Micro-LED device based on optoelectronic isolation and a preparation method thereof.

SUMMARY OF THE INVENTION

In view of this, the purpose of the present invention is to provide a Micro-LED device based on optoelectronic isolation and a preparation method thereof.

In order to achieve the above purpose, the technical solution provided by an embodiment of the present invention is as follows:

A Micro-LED device based on photoelectric isolation, the Micro-LED device comprises a substrate, an N-type semiconductor layer, a multi-quantum well layer, a P-type semiconductor layer and electrodes arranged in sequence from bottom to top, the multi-quantum well The layer includes a number of separately arranged multiple quantum well structures, the p-type semiconductor layer includes a number of p-type semiconductor structures located on the multiple quantum well structure, and the multiple quantum well structure is also provided with isolation formed on the sidewalls of the p-type semiconductor structure The isolation layer and the sidewalls of the multiple quantum well structure are provided with a reflective layer, and the electrodes include an N electrode electrically connected to the N-type semiconductor layer and a P electrode electrically connected to the P-type semiconductor structure.

In one embodiment, the height of the isolation layer is equal to the height of the P-type semiconductor structure; and/or, the sidewalls of the isolation layer are distributed flush with the sidewalls of the P-type semiconductor structure.

In one embodiment, the reflection layer covers at least the isolation layer and the sidewalls of the multiple quantum well structure, and the height of the reflection layer is greater than or equal to the sum of the height of the isolation layer and the height of the multiple quantum well structure.

In one embodiment, an N step is formed on the N-type semiconductor layer, and the N electrode is located on the N step; the reflective layer is also formed on the surface and sidewall of the N step, and the height of the reflective layer is It is equal to the sum of the height of the isolation layer, the height of the multiple quantum well structure and the depth of the N steps.

In one embodiment, a current diffusion layer is formed on the top surface of the P-type semiconductor structure, a P electrode is formed on the current diffusion layer, and the P electrode is electrically connected to the P-type semiconductor structure through the current diffusion layer.

In one embodiment, the current spreading layer is further formed on the top surface of the isolation layer and the reflective layer and on the sidewalls of all or part of the reflective layer.

In one embodiment, the substrate is a sapphire substrate; and/or,

The N-type semiconductor layer is an N-type GaN layer; and/or,

The P-type semiconductor layer is a P-type GaN layer, and the P-type semiconductor structure is a P-type GaN structure; and/or,

The multiple quantum well layer is an InGaN/GaN multiple quantum well layer; and/or,

The isolation layer is an H ⁺ ion isolation layer; and/or,

A buffer layer is formed between the substrate and the N-type semiconductor layer.

The technical solution provided by another embodiment of the present invention is as follows:

A preparation method of a Micro-LED device based on photoelectric isolation, the preparation method comprises:

provide a substrate;

epitaxially growing the N-type semiconductor layer, the multiple quantum well layer and the P-type semiconductor layer on the substrate in sequence;

performing ion implantation on the non-light-emitting region of the P-type semiconductor layer to form several ion implantation regions;

Etching part of the ion implantation region and the multiple quantum well layer below it to form a plurality of separately arranged multiple quantum well structures, and a P-type semiconductor structure and an isolation layer located thereon;

forming a reflective layer on the sidewall of the isolation layer and the multiple quantum well structure;

A P electrode is formed on the P-type semiconductor structure, and an N-electrode is formed on the N-type semiconductor layer.

In one embodiment, the ions implanted in the ion implantation step are H ⁺ ions.

In one embodiment, the preparation method further includes:

A current spreading layer is formed on the top surface of the P-type semiconductor structure and the isolation layer and the reflective layer, and a P electrode is formed on the current spreading layer; and/or,

Part of the N-type semiconductor layer is etched to form an N step, and an N electrode is formed on the N step.

The present invention has the following beneficial effects:

The Micro-LED device in the present invention can achieve electrical isolation and optical isolation of the device by introducing an isolation layer and a reflection layer, improve the luminous efficiency and display contrast of the device, and reduce the optical crosstalk effect.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments described in this application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without any creative effort.

1 is a schematic structural diagram of a Micro-LED device in a specific embodiment of the present invention;

FIG. 2 is a schematic flowchart of a method for preparing a Micro-LED device in a specific embodiment of the present invention;

3a-3f are process flow diagrams of the Micro-LED device in an embodiment of the present invention.

Detailed ways

In order to make those skilled in the art better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described The embodiments are only some of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

The invention discloses a Micro-LED device based on photoelectric isolation. The Micro-LED device comprises a substrate, an N-type semiconductor layer, a multi-quantum well layer, a P-type semiconductor layer and electrodes arranged in sequence from bottom to top. The well layer includes a number of separate multiple quantum well structures, the P-type semiconductor layer includes a number of P-type semiconductor structures located on the multiple quantum well structure, and the multiple quantum well structure is also provided with an isolation layer formed on the sidewall of the P-type semiconductor structure. The isolation layer and the sidewall of the multiple quantum well structure are provided with a reflective layer, and the electrodes include an N electrode electrically connected with the N-type semiconductor layer and a P electrode electrically connected with the P-type semiconductor structure.

The invention also discloses a preparation method of a Micro-LED device based on photoelectric isolation, comprising:

provide a substrate;

epitaxially growing the N-type semiconductor layer, the multiple quantum well layer and the P-type semiconductor layer on the substrate in sequence;

performing ion implantation on the non-light-emitting region of the P-type semiconductor layer to form several ion implantation regions;

Etching part of the ion implantation region and the multiple quantum well layer below it to form a plurality of separately arranged multiple quantum well structures, and a P-type semiconductor structure and an isolation layer located thereon;

forming a reflective layer on the sidewall of the isolation layer and the multiple quantum well structure;

A P electrode is formed on the P-type semiconductor structure, and an N-electrode is formed on the N-type semiconductor layer.

The Micro-LED device and the preparation method thereof of the present invention will be further described below with reference to specific embodiments.

Referring to FIG. 1 , a Micro-LED device in an embodiment of the present invention includes a substrate 10 , an N-type semiconductor layer 20 , a multiple quantum well layer 30 , a P-type semiconductor layer 40 and electrodes arranged in sequence from bottom to top.

Specifically, the multi-quantum well layer 30 includes a plurality of separate multi-quantum well structures 31, the P-type semiconductor layer 40 includes a plurality of P-type semiconductor structures 41 located on the multi-quantum well structure, and the multi-quantum well structure 31 is further provided with a The isolation layer 60 on the sidewall of the P-type semiconductor structure, the isolation layer 60 and the sidewall of the multiple quantum well structure 31 are provided with a reflective layer 70 . The electrodes include an N electrode 51 electrically connected to the N type semiconductor layer 20 and a P electrode 52 electrically connected to the P type semiconductor structure 31 .

Preferably, in this embodiment, the height of the isolation layer 60 is equal to the height of the P-type semiconductor structure 41 , and the sidewalls of the isolation layer 60 and the sidewalls of the P-type semiconductor structure 41 are distributed flush.

Further, in this embodiment, the N-type semiconductor layer 20 is etched to form an N-step, and the N-electrode 51 is located on the N-step. The reflective layer 70 covers the isolation layer 60 and the sidewalls of the multiple quantum well structure 31, and is also formed on the surface and sidewalls of the N steps. In the area other than the N steps, the height of the reflective layer is equal to the height of the isolation layer and the multiple quantum well structure. In the N-step region, the height of the reflective layer is equal to the sum of the height of the isolation layer, the height of the multiple quantum well structure and the depth of the N-step.

In addition, a current diffusion layer 80 is formed on the top surface of the P-type semiconductor structure 41 , a P electrode 52 is formed on the current diffusion layer, and the P electrode 52 is electrically connected to the P-type semiconductor structure 41 through the current diffusion layer 80 . Preferably, the current diffusion layer 80 in this embodiment is not only formed on the top surface of the P-type semiconductor structure 41 , but also formed on the top surface of the isolation layer and the reflective layer and on the sidewalls of the reflective layer.

Preferably, the substrate in this embodiment is a sapphire substrate, the N-type semiconductor layer is an N-type GaN layer, the P-type semiconductor layer is a P-type GaN layer, the P-type semiconductor structure is a P-type GaN structure, and the multiple quantum well layer is InGaN/GaN multiple quantum well layer, the isolation layer is an H ⁺ ion isolation layer, the current diffusion layer is an ITO current diffusion layer, and the electrode is a Cr/Al/Ti/Au metal electrode.

Preferably, a buffer layer 90 is formed between the substrate and the N-type semiconductor layer in this embodiment, and the buffer layer 90 may be an undoped GaN buffer layer or the like.

Of course, in other embodiments, the materials of the substrate, the N-type semiconductor layer, the P-type semiconductor layer, the multiple quantum well layer, the current diffusion layer, the electrode, and the buffer layer can also be selected from other materials in the art. For example, the substrate can also be a silicon substrate or a silicon carbide substrate, the P-type semiconductor layer/N-type semiconductor layer can also be P-type/N-type doped GaAs, InP, InGaAsP, and the current diffusion layer can also be IZO The current diffusion layer and the like will not be repeated here.

Referring to FIG. 2 in conjunction with FIG. 3a to FIG. 3f, the preparation method of the Micro-LED device in this embodiment includes the following steps:

3a, a substrate 10 is provided, and a buffer layer 90, an N-type semiconductor layer 20, a multiple quantum well layer 30 and a P-type semiconductor layer 40 are epitaxially grown on the substrate in sequence, wherein the substrate is a sapphire substrate, The buffer layer is an undoped GaN buffer layer, the N-type semiconductor layer is an N-type GaN layer, the P-type semiconductor layer is a P-type GaN layer, and the multiple quantum well layer is an InGaN/GaN multiple quantum well layer.

As shown in FIG. 3 b , H ⁺ ion implantation is performed on the non-light emitting region of the P-type semiconductor layer 40 to form a plurality of ion implantation regions 401 .

A high-resistance P-type isolation region can be formed by implanting ions into the P-type semiconductor layer 40 through an implantation mask, and the P-type semiconductor layer 40 is isolated by the ion-implanted region to form a plurality of P-type semiconductor structures 41 .

Referring to FIG. 3c, a dry etching process is used to etch part of the ion implantation region and the multiple quantum well layer below it to form a plurality of separately arranged multiple quantum well structures 31 and the p-type semiconductor structures 41 and 41 located thereon. isolation layer 60 .

In addition, a portion of the N-type semiconductor layer 20 is etched to form an N-step 201 .

As shown in FIG. 3d , a reflective layer 70 is formed on the sidewalls of the isolation layer 60 and the multiple quantum well structure 31 , and on a part of the surface and sidewalls of the N-step 201 .

The reflective layer can be prepared by a sputtering process, an evaporation process or an electroplating process.

Referring to FIG. 3e, a current diffusion layer 80 is deposited on the top surface of the P-type semiconductor structure 41, the isolation layer 60 and the reflection layer 70, and on the sidewall of the reflection layer 60, and the current diffusion layer is an ITO current diffusion layer.

As shown in FIG. 3 f , a P electrode is formed on the current diffusion layer 80 , and an N electrode is formed on the N step 201 .

Preferably, the ITO/P-GaN contact and the P/N electrode are also annealed in this embodiment.

Through the above process, a Micro-LED device with high energy efficiency and low optical crosstalk can be prepared, which can be applied to various terminal display fields such as mobile phones, computers and wearable devices.

In this embodiment, the ion implantation method is adopted, and ions are implanted in the non-light-emitting area to make it show a high resistance state, thereby realizing the electrical isolation of the Micro-LED device; in the ion implantation area, a dry etching process is used to introduce a sidewall structure, Coating a reflective layer on the sidewall reduces the optical crosstalk effect of adjacent light-emitting units and improves the display contrast of the device.

Ion implantation can be an effective method to realize high light-efficiency Micro-LED devices. By injecting high-energy ions into the non-emitting region, the lattice of semiconductor materials can be destroyed, and the electrical properties of the material can be significantly reduced. The material of the region is close to being electrically insulating and thus acts as an electrical isolation region between adjacent light emitting units. The preparation of Micro-LED devices by ion implantation isolation also has the important feature of being compatible with mainstream silicon processes, which has significant advantages in improving the yield and reducing costs of Micro-LED devices. As a preparation method with high repeatability, planarization and large-scale mass production, ion implantation is beneficial to simplify the preparation process of Micro-LED devices. It is worth mentioning that the ion implantation greatly reduces the non-radiative recombination probability of carriers. On this basis, the influence of optical crosstalk on the display effect can be effectively reduced by further adjusting the light-reflecting structure of the sidewall of the device.

As can be seen from the above technical solutions, the present invention has the following advantages:

The Micro-LED device in the present invention can achieve electrical isolation and optical isolation of the device by introducing an isolation layer and a reflection layer, improve the luminous efficiency and display contrast of the device, and reduce the optical crosstalk effect.

It will be apparent to those skilled in the art that the present invention is not limited to the details of the above-described exemplary embodiments, but that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments are to be regarded in all respects as illustrative and not restrictive, and the scope of the invention is to be defined by the appended claims rather than the foregoing description, which are therefore intended to fall within the scope of the claims. All changes within the meaning and scope of the equivalents of , are included in the present invention. Any reference signs in the claims shall not be construed as limiting the involved claim.

In addition, it should be understood that although this specification is described in terms of embodiments, not each embodiment only includes an independent technical solution, and this description in the specification is only for the sake of clarity, and those skilled in the art should take the specification as a whole , the technical solutions in each embodiment can also be appropriately combined to form other implementations that can be understood by those skilled in the art.

Claims (10)

1. The Micro-LED device based on photoelectric isolation is characterized by comprising a substrate, an N-type semiconductor layer, a multi-quantum well layer, a P-type semiconductor layer and electrodes, wherein the substrate, the N-type semiconductor layer, the multi-quantum well layer, the P-type semiconductor layer and the electrodes are sequentially arranged from bottom to top, the multi-quantum well layer comprises a plurality of separately arranged multi-quantum well structures, the P-type semiconductor layer comprises a plurality of P-type semiconductor structures located on the multi-quantum well structures, isolation layers formed on the side walls of the P-type semiconductor structures are further arranged on the multi-quantum well structures, reflection layers are arranged on the side walls of the isolation layers and the multi-quantum well structures, and the electrodes comprise N electrodes electrically connected with the N-type semiconductor layer and P electrodes electrically connected with the P-type semiconductor structures.

2. A Micro-LED device based on optoelectronic isolation according to claim 1, wherein the isolation layer has a height equal to the height of the P-type semiconductor structure; and/or the side wall of the isolation layer is distributed in a flush mode with the side wall of the P-type semiconductor structure.

3. A Micro-LED device based on optoelectronic isolation according to claim 1, wherein the reflective layer covers at least the isolation layer and the sidewalls of the multiple quantum well structure, and the height of the reflective layer is greater than or equal to the sum of the height of the isolation layer and the height of the multiple quantum well structure.

4. A Micro-LED device based on photoelectric isolation according to claim 3, wherein the N-type semiconductor layer is formed with N steps, and the N electrode is located on the N steps; the reflecting layer is also formed on the surface and the side wall of the N step, and the height of the reflecting layer is equal to the sum of the height of the isolating layer, the height of the multi-quantum well structure and the depth of the N step.

5. A Micro-LED device based on optoelectronic isolation as claimed in claim 1, wherein a current spreading layer is formed on the top surface of the P-type semiconductor structure, and a P-electrode is formed on the current spreading layer and electrically connected to the P-type semiconductor structure through the current spreading layer.

6. An opto-isolation based Micro-LED device according to claim 5, wherein said current spreading layer is further formed on top surfaces of the isolation layer and the reflective layer and on sidewalls of the totally or partially reflective layer.

7. A Micro-LED device based on opto-electric isolation according to claim 1, characterized in that the substrate is a sapphire substrate; and/or the presence of a gas in the gas,

the N-type semiconductor layer is an N-type GaN layer; and/or the presence of a gas in the gas,

the P-type semiconductor layer is a P-type GaN layer, and the P-type semiconductor structure is a P-type GaN structure; and/or the presence of a gas in the gas,

the multi-quantum well layer is an InGaN/GaN multi-quantum well layer; and/or the presence of a gas in the atmosphere,

the isolating layer is H ⁺ An ion isolation layer; and/or the presence of a gas in the gas,

and a buffer layer is formed between the substrate and the N-type semiconductor layer.

8. A method for preparing a Micro-LED device based on photoelectric isolation as claimed in any one of claims 1 to 7, wherein the method comprises:

providing a substrate;

sequentially epitaxially growing an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer on a substrate;

performing ion implantation on a non-light-emitting region of the P-type semiconductor layer to form a plurality of ion implantation regions;

etching part of the ion injection region and the multi-quantum well layer below the ion injection region to form a plurality of separately arranged multi-quantum well structures, and a P-type semiconductor structure and an isolation layer which are positioned on the multi-quantum well structures;

forming a reflecting layer on the isolating layer and the side wall of the multi-quantum well structure;

a P electrode is formed on the P-type semiconductor structure, and an N electrode is formed on the N-type semiconductor layer.

9. The method of claim 8, wherein the ions implanted in the ion implantation step are H ⁺ Ions.

10. The method of manufacturing according to claim 8, further comprising:

forming a current diffusion layer on the top surfaces of the P-type semiconductor structure and the isolation layer and the reflection layer, and forming a P electrode on the current diffusion layer; and/or the presence of a gas in the atmosphere,

and etching part of the N-type semiconductor layer to form an N step, and forming an N electrode on the N step.

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