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CN114975213A - Wafer alignment device and alignment method - Google Patents

Wafer alignment device and alignment method Download PDF

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Publication number
CN114975213A
CN114975213A CN202210883762.5A CN202210883762A CN114975213A CN 114975213 A CN114975213 A CN 114975213A CN 202210883762 A CN202210883762 A CN 202210883762A CN 114975213 A CN114975213 A CN 114975213A
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wafer
edge
image
alignment
imaging camera
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CN114975213B (en
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陆宏杰
杨青
庞陈雷
王智
王兴锋
牛春阳
郭晋竹
翟利军
刘旭
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Zhejiang Lab
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Zhejiang Lab
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The invention discloses a wafer alignment device and an alignment method. The system comprises a light source, an imaging camera, a light path system, an image processor, a wafer objective table and a two-dimensional motion platform; the installation positions of the illumination light source, the imaging camera, the optical path system and the image processor are fixed, a wafer to be aligned is arranged on a wafer objective table, and the two-dimensional movement of the wafer can be realized by installing the wafer objective table on a two-dimensional movement platform; the wide view field rapid imaging of the wafer on the wafer stage is realized through the camera, the wafer contour is recognized and fitted, high-precision wafer positioning information is obtained, and the wide view field imaging simultaneously avoids the problem that the wafer cannot be aligned due to overlarge wafer placing offset. According to the wafer alignment device and the wafer alignment method, the wafer can be positioned with high precision without adopting a wafer pre-aligner and secondary alignment, and the wafer is directly conveyed to the objective table from the material box through the manipulator, so that the number of working stations of the pre-aligner is reduced, and the wafer alignment efficiency can be improved.

Description

Wafer alignment device and alignment method
Technical Field
The invention belongs to the field of semiconductor wafer detection, and particularly relates to a wafer alignment device and an alignment method.
Background
According to the functional classification, the generalized semiconductor equipment system can be mainly divided into a process module and a transmission module, wherein the process module is mainly used for carrying out diffusion, photoetching, etching, film deposition, detection and other process treatments on wafers, and the transmission module comprises an Equipment Front End Module (EFEM), a vacuum lock cavity module, a wafer transmission robot and the like, and is mainly used for wafer transmission among equipment in a production line, so that the wafer transmission process is prevented from being polluted and the transmission precision of the wafers is ensured. The wafer process module usually has a very high requirement on the positioning accuracy of the wafer, if a nano-scale structure containing tens of layers is required to be formed in the photoetching process, any factor causing a large overlay error in the process can directly cause the die area of the wafer to be scrapped, and if a single wafer is required to be detected for many times by multiple detection devices in the semiconductor detection process, the detection result of the wafer must contain high-accuracy coordinate information, so that the wafer quality comparison and process control between the processes can be realized. Therefore, in semiconductor equipment, particularly, the position placement and identification before the wafer processing have extremely high precision requirements, for example, the wafer transfer robot is required to have high-precision repeated positioning capability. In order to compensate for the error of wafer placement in the wafer cassette, a wafer transfer robot is generally used to take out the wafer from the cassette and then place the wafer on an Aligner (Aligner) for alignment, find the notch or flat edge of the wafer, and correct the center position of the wafer. However, the Aligner usually has a requirement for the maximum offset of a wafer with a specific size, and patent CN113921437A proposes a mechanical pre-alignment device to avoid the situation that the Aligner (Aligner) cannot achieve alignment due to too large wafer offset, but this method increases wafer transfer stations and time at the same time, which is not favorable for achieving high-cycle and high-cycle rate in a semiconductor production line. The typical precision that Aligner (Aligner) can reach is the centre of a circle positioning accuracy of tens of microns and the angle positioning accuracy of <1 °, to having higher equipment to wafer positioning accuracy, then need carry out secondary alignment on the basis of the alignment of Aligner, secondary alignment often adopts the visual imaging method of little visual field, images wafer edge or mark point in several fixed coordinate positions of motion platform. If a single set of optical path camera system is adopted to match with the motion table for multiple imaging, the time cost of wafer alignment is further increased; if the patent CN102809903A fixed point multi-set optical path and camera system is adopted for imaging, the complexity and the cost of the system are increased.
The semiconductor industry is primarily concerned with the accuracy and efficiency of production or inspection equipment, typically expressed in terms of wph (wafer Per hour), which represents the number of wafers of a particular size that can be processed in a single hour, with the processing time Per wafer being the sum of the time the wafer spends in the process module and in the transport module. Therefore, there is a need for further compression of the time taken by the transmission module for high throughput detection devices. For example, if a semiconductor device is required to achieve a throughput of 100WPH (36 seconds/wafer), the wafer aligner typically takes about 15 seconds to complete wafer alignment, directly limiting the working time of other transport and processing steps.
Therefore, it is an urgent technical problem to be solved by those skilled in the art to provide a wafer alignment apparatus and method that is fast, highly accurate, and has a high tolerance for wafer placement deviation error.
Disclosure of Invention
In order to solve the problems in the background art, the invention provides a wafer alignment device and an alignment method.
The technical scheme adopted by the invention is as follows:
wafer alignment device
The marble imaging device comprises an illuminating light source, an imaging camera, a light path system, an image processor, a wafer objective table, a two-dimensional motion platform and a marble platform, wherein the two-dimensional motion platform is installed on the marble platform, the wafer objective table is installed on the two-dimensional motion platform, the light path system and the imaging camera are arranged above the wafer objective table, and the imaging camera is aligned to the light path system.
The semiconductor device comprises a process module, a wafer manipulator and a wafer material box, wherein the wafer aligning device is arranged in the process module, the wafer is taken out of the wafer material box through the wafer manipulator and placed on a wafer carrying platform of the wafer aligning device, and the wafer alignment is completed on the wafer aligning device.
The wafer to be aligned is placed on the wafer carrying table, the light of the illumination light source is emitted to the surface of the wafer through the optical path system, and the imaging camera clearly images the surface of the wafer through the optical path system.
The two-dimensional motion platform is a linear rail motion platform or an air-floatation motion platform, and the positioning precision of the two-dimensional motion platform is generally one order of magnitude higher than the indexes of the whole equipment such as processing or detection precision, wafer positioning precision and the like; the wafer carrying table is made of metal, alumina ceramic or silicon carbide ceramic, and the wafer is fixed in the form of electrostatic adsorption, vacuum adsorption or mechanical chuck, so that the wafer and the wafer carrying table cannot move relatively in the moving process of the two-dimensional moving table; the imaging camera adopts a linear array camera or an area array camera, and if the linear array camera is adopted, the motion direction of the linear array camera relative to the wafer needs to be vertical to the pixel arrangement direction of the camera.
The image processor is used for acquiring image data of the imaging camera and processing and calculating the image data; whether the wafer moves into the view field of the imaging camera or not can be obviously distinguished from the image obtained by the image processor, and if the coaxial bright field illumination is adopted, the imaging light intensity value of the wafer area is generally far higher than that of the noncircular area due to the mirror surface property of the wafer.
The illumination light source is a halogen lamp, a mercury xenon lamp or an LED light source; the lighting source can be arranged in a ring shape, a coaxial shape, a dome shape and the like;
the wafer to be calibrated is a non-pattern wafer (bare chip), a pattern wafer, a substrate slice, an epitaxial wafer and the like.
The optical path system is an imaging lens and is used for imaging the surface of the wafer onto a photosensitive area of the imaging camera; the magnification of the optical path system is 1X-50X, and a larger magnification corresponds to a smaller imaging view field and a higher object plane resolution, so that higher alignment accuracy can be obtained. The optical path system is provided with an automatic focusing module to realize the accurate focusing of the imaging camera on the surface of the wafer; the optical path system can also be installed on a structure with an automatic focusing function in the equipment.
Second, adopt the above-mentioned crystal aligning device to align the method
The method comprises the following steps:
step 1) taking out the wafer to be aligned from the wafer magazine through the wafer manipulator, placing the wafer on a wafer carrying table of the wafer alignment device,
step 2) driving the wafer to move along the Y-axis direction through a two-dimensional moving platform of the wafer alignment device, and simultaneously, starting the imaging camera to work to obtain a first wide view field image (comprising profile information of an upper part and a lower part along the Y-axis direction) containing profile information of the wafer to be detected;
wherein, the plane of the X axis and the Y axis is the wafer plane.
Step 3) driving the wafer to move for a certain distance along the X-axis direction through a two-dimensional moving table of the wafer alignment device; distance of movement of wafer along X-axis directionX offset Length greater than the wafer flat edge:X offset L flatedge namely, the offset of the two wide view field images in the X-axis direction is larger than the length of the flat edge of the wafer, so that the flat edge profile of the wafer in the two wide view field images only appears once at most.
Step 4) repeating the step 2) after completing the movement along the X-axis direction in the step 3, and obtaining a second wide view field image containing the outline information of the wafer to be detected;
step 5) identifying the wafer edge of the two wide view field images obtained in the step 2 and the step 4, thereby obtaining four single view field images containing the wafer edge contour (each edge position of the wafer corresponds to one single view field image containing the wafer edge contour);
step 6) extracting the outline of each single-view-field image containing the edge outline of the wafer obtained in the step 5 to obtain absolute coordinates of outline points of four edge positions of the wafer to be detected relative to the origin of a coordinate system of the two-dimensional motion platform;
step 7), performing circle fitting on the contour point coordinates of the three edge positions to obtain circle center coordinates, radius and circle fitting residual values of the four edge positions of the wafer to be tested, and optionally selecting three edge positions; the circle fitting algorithm adopts a minimum solving mode of geometric Euler distance or polynomial parameter distance, such as Levenberg-Marquardt fit, Kasa fit, Pratt fit and other algorithms;
step 8) selecting three different edge position combinations again, and repeating the step 7 until four times of circle fitting with different selected edge positions is carried out, so as to obtain residual values of four groups of circle fitting;
and 9) acquiring the center coordinates and the radius of the wafer according to the fitted residual values of the four groups of circles.
In the step 2): distance of movement of wafer along Y-axis directionSmovementGreater than the diameter of the waferDwaferAnd twice the maximum offset errorEplacementIs a sum ofSmovement>Dwafer+2*Eplacement
The maximum offset error is: the manipulator takes out the wafer from the wafer magazine for multiple times and places the wafer on the maximum position offset of the wafer objective table;
the wide field of view image is: and carrying out coordinate splicing on all single-view images shot by the imaging camera when the wafer moves along the Y-axis direction to obtain images.
The step 5) is specifically as follows: and carrying out threshold binarization on each single-view field image in the wide-view field image, selecting the single-view field image with the pixel value of 255 being between the minimum set threshold and the maximum set threshold, namely the image containing the edge contour of the wafer, and acquiring the center coordinate of the corresponding image.
For example, if all the monoscopic images are monoscopic images of the wafer area, the ratio of the number of pixels with a pixel value of 255 exceeds 90%; if all the single-view images are the single-view images of the non-wafer area, the pixel number ratio of the pixel value of 0 exceeds 90 percent; the ratio of the pixel value of the monoscopic image in the edge area of the wafer to 255 is between 10% and 90%, and the image containing the edge contour of the wafer can be judged and identified through the ratio.
The step 6) is specifically as follows:
6.1) extracting the outline of the single-view image containing the edge outline of the wafer by an edge detection algorithm to obtain the pixel coordinates of the outline point in a pixel coordinate system (x Lpixel ,y Lpixel ) The origin of the pixel coordinate system is the image center coordinate of the monoscopic image (x pixel0 ,y pixel0 ) (ii) a The edge detection algorithm adopts canny, sobel, laplacian and the like;
6.2) obtaining the origin of the center of the single-view image obtained in the step 5 relative to the coordinate system of the two-dimensional motion platformx motion0 ,y motion0 ) Absolute position coordinates of (a)x Tmotion ,y Tmotion );
6.3) calculating the absolute coordinates of the contour points relative to the origin of the coordinate system of the motion table (x Lmotion ,y Lmotion ):
x Lmotion = x Tmotion + x Lpixel * Wpx
y Lmotion = y Tmotion + y Lpixel * Wpy
Wpx and Wpy indicate that the size of a single pixel point in the monoscopic image corresponds to the width and length of the imaged surface of the wafer to be measured.
The step 9) is specifically as follows:
if three residual values are larger than the threshold value, and the remaining residual value is smaller than the threshold value, the edge profile information includes notch or flat edge of the wafer, and the circle fitting result corresponding to the minimum value in the four groups of residual values is the accurate center coordinate and the accurate radius of the wafer;
if all the four residual values are smaller than the threshold value, the edge information does not include the wafer notch or the flat edge, and accurate wafer center coordinates and wafer radius can be obtained according to the four groups of circle fitting results.
The invention has the following beneficial effects:
according to the wafer alignment device and the wafer alignment method, the camera is used for quickly imaging the wide view field of the wafer on the objective table in the process module, the wafer contour is identified and fitted, high-precision wafer positioning information is obtained, and the wide view field imaging avoids the problem that the wafer cannot be aligned due to overlarge wafer placement offset. The illumination light source, the object stage, the two-dimensional motion stage and other components mentioned in the invention exist in the process module of the semiconductor device, so that the components can be directly reused. According to the wafer alignment device and the wafer alignment method, the wafer can be positioned with high precision without adopting a wafer pre-aligner and secondary alignment, and the wafer is directly conveyed to the objective table from the material box through the manipulator, so that the number of working stations of the pre-aligner is reduced, and the wafer alignment efficiency can be improved.
Drawings
Fig. 1 is a schematic diagram of main functional blocks of a conventional semiconductor apparatus;
fig. 2 is a schematic diagram of main functional blocks of a semiconductor device according to the present invention;
FIG. 3 is a schematic structural view of embodiment 1;
FIG. 4 is a schematic diagram of a structure for realizing two-dimensional movement of a wafer;
FIG. 5 is a schematic illustration of the wafer versus imaging motion direction motion distance requirements;
FIG. 6 is a schematic diagram of two wide field of view images formed of the wafer surface;
FIG. 7 is a schematic illustration of wafer edge identification based on a wide field of view image;
FIG. 8 is a schematic diagram of contour extraction based on wafer edge recognition results for wide field of view images;
FIG. 9 is a schematic view of a wide field of view image including wafer flat edge information;
FIG. 10 is a schematic diagram including wafer flat edge contour points obtained based on a wide field of view image;
fig. 11 is a schematic diagram of the calculation for obtaining the absolute coordinates of the contour points with respect to the origin of the coordinate system of the motion stage.
In the figure: the system comprises a process module 100, a wafer mechanical arm 200, a wafer aligner 300, a wafer magazine 400, an illumination source 101, an imaging camera 102, an optical path system 103, an image processor 104, a wafer stage 105, a two-dimensional motion stage 106, a wafer 107, a marble stage 108, and a monoscopic image 109.
Detailed Description
The following describes a wafer alignment apparatus and an alignment method provided by the present invention in further detail.
The present invention will now be described in more detail with reference to the accompanying drawings, in which preferred embodiments of the invention are shown, it being understood that one skilled in the art may modify the invention herein described while still achieving the advantageous effects of the invention. Accordingly, the following description should be construed as broadly as possible to those skilled in the art and not as limiting the invention.
In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific details must be set forth in order to achieve the developer's specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art.
In order to make the objects and features of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. It is to be noted that the drawings are in a very simplified form and are all used in a non-precise ratio for the purpose of facilitating and distinctly aiding in the description of the embodiments of the invention.
The specific embodiment is as follows:
fig. 1 is a schematic diagram of main functional modules of a conventional semiconductor device, which includes a process module 100, a wafer handler 200, a wafer aligner 300 and a wafer magazine 400, wherein solid arrows and dotted arrows in the diagram respectively indicate station flows of loading and unloading of wafers in the semiconductor device, the wafer handler 200 takes out the wafers from the wafer magazine 400, the wafer handler 200 transfers the wafers to the wafer aligner 300, and after the alignment correction of the wafer aligner 300, the wafer handler 200 transfers the wafers from the wafer aligner 300 to the process module 100, so as to complete loading operation, and the unloading flow is similar but in the opposite direction.
Fig. 2 is a schematic diagram illustrating major functional modules of a semiconductor device according to the present invention, wherein the wafer robot 200 directly transfers the wafers in the wafer cassette 400 to the process module 100, and the wafer alignment process is performed in the process module 100 without the need of the work station of the wafer aligner 300 shown in fig. 1, which is advantageous for improving the throughput of the wafers in the semiconductor device.
Fig. 3 is a schematic diagram of an embodiment of the present invention, showing a wafer alignment apparatus installed in a process module 100, including an illumination source 101, an imaging camera 102, an optical path system 103, an image processor 104, a wafer stage 105, a two-dimensional motion stage 106, and a marble stage 108. The illumination source 101, the imaging camera 102, the optical path system 103, and the image processor 104 are fixed in position, and a wafer 107 to be aligned is placed on the wafer stage 105. As shown in fig. 4, the two-dimensional motion stage 106 is mounted with the wafer stage 105 to realize two-dimensional movement of the wafer 107, and the two-dimensional motion stage 106 is mounted on a marble stage 108. The illumination light source 101 is coaxially mounted, and an illumination light beam of the illumination light source is parallel to or coaxial with an imaging light beam of the imaging camera; the optical path system 103 includes a coaxial module, which can irradiate the light from the illumination light source 101 onto the surface of the wafer 107 and image the light onto the photosensitive area of the imaging camera 102. The image processor 104 acquires image data of the imaging camera and performs processing calculation on the image data. Whether the wafer 107 moves into the field of view of the imaging camera 102 can be clearly distinguished from the image obtained by the image processor 104, for example, with the coaxial bright field illumination described in this embodiment, the imaging light intensity value of the wafer area is generally much higher than that of the amorphous wafer area due to the mirror surface property of the wafer.
The imaging camera 102 may be a line camera or an area camera, and if the line camera is used, the moving direction of the camera relative to the wafer needs to be perpendicular to the pixel arrangement direction of the camera.
The magnification of the optical path system 103 can be selected, for example, between 1X and 50X, and a larger magnification corresponds to a smaller imaging field of view and a higher object plane resolution, so that higher alignment accuracy can be obtained. An automatic focusing module can be configured in the optical path system 103 to realize accurate focusing of the imaging camera 102 on the surface of the wafer 107; the optical path system 103 can also be installed on a structure with an automatic focusing function in the device; finally, the imaging camera 102 can clearly image the surface of the wafer 107 through the optical path system 103.
As shown in fig. 2, the wafer 107 is placed on the wafer stage 105 and is integrally mounted on the two-dimensional motion stage 106. The wafer stage 105 may be made of metal, alumina ceramic, silicon carbide ceramic, or the like, and the wafer is fixed by electrostatic adsorption, vacuum adsorption, or mechanical chuck, so as to ensure that the wafer 107 and the wafer stage 105 do not move relative to each other during the movement of the two-dimensional motion stage 106. The two-dimensional motion platform 106 is a linear rail motion platform or an air-floating motion platform, and the positioning accuracy of the two-dimensional motion platform 106 generally needs to be one order of magnitude higher than the indexes of the whole equipment, such as processing or detection accuracy, wafer positioning accuracy and the like.
The alignment method of the wafer alignment device comprises the following steps:
in the first step, the wafer handler 200 takes the wafer 107 to be tested out of the wafer cassette 400 and directly places the wafer 107 on the wafer stage 105 without passing through the wafer aligner 300.
Second oneUsing the wafer alignment apparatus as described above, the two-dimensional motion stage 106 moves the wafer 107 to be measured along the Y-axis direction, and the imaging camera 102 starts to work at the same time, so that the movement distance of the wafer 107 along the Y-axis is greater than the sum of the wafer diameter and twice the maximum offset error, as shown in fig. 5,Smovement>Dwafer+2*Eplacementso that the plurality of monoscopic images 109 taken by the imaging camera 102 include the profile information of the wafer 107 (the profile information of two positions above and below along the Y-axis direction);
the maximum offset error is the maximum amount of positional offset that the robot takes out a wafer from the wafer cassette 400 a plurality of times and places it on the wafer stage 105.
Thirdly, as shown in fig. 6 and 9, after the wafer 107 to be measured is moved by a certain distance along the X axis by the two-dimensional moving stage 106, the second step is repeated to obtain a second wide view field image containing the profile information of the wafer 107 to be measured.
The X-axis motion offset between the two wide field images is greater than the length of the wafer flat edge,X offset L flatedge therefore, the flat edge profile of the wafer in the two wide view field images only appears once at most; the wide-field image is obtained by coordinate stitching of all the monoscopic images 109 captured by the imaging camera 102 when the wafer moves along the Y-axis direction.
And fourthly, as shown in fig. 7, identifying the edge of the wafer according to the wide-field images obtained in the second and third steps, and then obtaining four single-field images containing the edge profile of the wafer.
The identification of the wafer edge can be carried out by performing threshold binarization on the monoscopic image and then judging the pixel number ratio of which the pixel value is 0 or 255, wherein the monoscopic image of the wafer edge contour is an image of which the ratio of the pixel value 255 is between the minimum set threshold and the maximum set threshold, is a monoscopic image containing the wafer edge contour, and the corresponding image center coordinate is obtained.
For example, if all the wafer area images are wafer area images, the pixel number ratio of the pixel value of 255 exceeds 90%, if all the wafer area images are noncircular area images, the pixel number ratio of the pixel value of 0 exceeds 90%, and the pixel value ratio of the image in the edge area of the wafer is 255 is between 10% and 90%, and the image including the edge contour of the wafer can be judged and identified according to the ratio.
Fifthly, as shown in fig. 8 and 10, the edge detection algorithm is used to extract the contour of the monoscopic image containing the wafer edge contour, and the contour point is obtained relative to the center of the image (x pixel0 ,y pixel0 ) Pixel coordinates of a coordinate system as an origin (x Lpixel ,y Lpixel ) The edge detection algorithm adopts canny, sobel, laplacian and the like;
(ii) obtaining the image center of the monoscopic image obtained in the fourth step with respect to the origin of the coordinate system of the motion stagex motion0 , y motion0 ) Absolute position coordinates of (a)x Tmotion ,y Tmotion );
The absolute coordinates of the contour points relative to the origin of the coordinate system of the motion table can be obtained by coordinate conversion (x Lmotion , y Lmotion ):
x Lmotion = x Tmotion + x Lpixel * Wpx
y Lmotion = y Tmotion + y Lpixel * Wpy
Wpx and Wpy indicate that the size of a single pixel in the monoscopic image corresponds to the size of the imaged surface of the wafer to be measured. A schematic diagram of the calculation of absolute coordinate scaling of the contour points is shown in fig. 11.
And sixthly, performing circle fitting on coordinates of the included edge contour points in any three of the four edge positions, and obtaining fitted residual values. The circle fitting algorithm can adopt a minimum solving mode of geometric Euler distance or polynomial parameter distance, such as Levenberg-Marquardt fit, Kasa fit, Pratt fit and other algorithms.
And step seven, reselecting the combination of different edge positions, and repeating the step six until the residual values of four times of circle fitting data and four groups of circle fitting are carried out.
Eighthly, judging whether all residual error values are smaller than a threshold value; if three residual values are larger than the threshold value, and the remaining residual value is smaller than the threshold value, the edge profile information includes a notch (notch) or a flat edge of the wafer, and the accurate center coordinate and the accurate radius of the wafer are obtained according to the circle fitting result corresponding to the minimum residual value; if all the four residual values are smaller than the threshold value, the edge information does not include the wafer notch or the flat edge, and accurate wafer center coordinates and wafer radius can be obtained according to the four circle fitting results.
Based on the schematic diagram of the wafer surface contour point obtained by testing an ideal wafer (the center coordinates and the radius size of the known wafer) by the alignment device and the alignment method provided by the invention, the imaging field of view of the optical path system is 1.5mm (the length and the width of the corresponding single-field-of-view image), the imaging resolution of the single field of view is 102 x 1024, in the wafer data obtained by fitting the wafer with the diameter of 100mm, the positioning error of the center coordinates is less than 2um, and the calculation error of the outer diameter size of the wafer is less than 0.5um, so that the high-precision wafer alignment data can be obtained.
In summary, the wafer alignment apparatus and the wafer alignment method of the present invention identify and fit the wafer profile by rapidly imaging the wide field of view of the wafer on the stage in the process module relative to the camera to obtain high-precision wafer positioning information, and the wide field of view imaging avoids the problem of alignment incapability due to too large wafer placement offset. The illumination light source, the object stage, the two-dimensional motion stage and other components mentioned in the invention exist in the process module of the semiconductor device, so that the components can be directly reused. According to the wafer alignment device and the wafer alignment method, the wafer can be positioned with high precision without adopting a wafer pre-aligner and secondary alignment, and the wafer is directly conveyed to the objective table from the material box through the manipulator, so that the number of working stations of the pre-aligner is reduced, and the wafer alignment efficiency can be improved.

Claims (10)

1. The utility model provides a wafer aligning device, characterized in that, including illumination source (101), imaging camera (102), optical path system (103), image processor (104), wafer objective table (105), two-dimensional motion platform (106) and marble platform (108), install two-dimensional motion platform (106) on marble platform (108), install wafer objective table (105) on two-dimensional motion platform (106), optical path system (103) and imaging camera (102) have been arranged to wafer objective table (105) top, imaging camera (102) aim at optical path system (103).
2. The wafer alignment apparatus as claimed in claim 1, wherein the semiconductor device comprises a process module (100), a wafer handler (200), and a wafer magazine (400), and the wafer alignment apparatus is installed in the process module (100), and the wafer (107) is taken out of the wafer magazine (400) by the wafer handler (200) and placed on a wafer stage (105) of the wafer alignment apparatus, and wafer alignment is performed on the wafer alignment apparatus.
3. A wafer alignment apparatus as claimed in claim 1, wherein the wafer (107) to be aligned is placed on the wafer stage (105), the light from the illumination source (101) is directed to the surface of the wafer (107) via the optical path system (103), and the imaging camera (102) images the surface of the wafer (107) clearly via the optical path system (103).
4. The wafer alignment device of claim 1,
the two-dimensional motion platform (106) is a linear rail motion platform or an air floatation motion platform;
the wafer stage (105) is made of metal, alumina ceramic or silicon carbide ceramic, and is used for fixing the wafer (107) in the form of electrostatic adsorption, vacuum adsorption or mechanical chuck;
the imaging camera (102) adopts a line-array camera or an area-array camera;
the image processor (104) is used for acquiring the image data of the imaging camera (102) and carrying out processing calculation on the image data.
5. The wafer alignment device of claim 1,
the optical path system (103) is an imaging lens and is used for imaging the surface of the wafer (107) onto a photosensitive area of the imaging camera (102);
the magnification of the optical path system (103) is between 1X and 50X;
the optical path system (103) is provided with an automatic focusing module, so that the imaging camera (102) can accurately focus on the surface of the wafer (107).
6. An alignment method using the wafer alignment apparatus as claimed in any one of claims 1 to 5, comprising the steps of:
step 1: taking out the wafer (107) to be aligned from the wafer cassette (400) by the wafer manipulator (200), and placing the wafer on a wafer stage (105) of the wafer alignment device;
step 2: the two-dimensional motion platform (106) of the wafer alignment device drives the wafer (107) to move along the Y-axis direction, and the imaging camera (102) starts to work at the same time to obtain a first wide view field image containing the profile information of the wafer (107) to be detected;
and step 3: the two-dimensional motion platform (106) of the wafer alignment device drives the wafer (107) to move along the X-axis direction; distance of movement of the wafer (107) along the X-axisX offset Length greater than the wafer flat edge:X offset L flatedge
and 4, step 4: after the movement in the X-axis direction in the step 3 is completed, repeating the step 2, and obtaining a second wide view field image containing the outline information of the wafer (107) to be detected;
and 5: identifying the wafer edge of the two wide view field images obtained in the step 2 and the step 4, so as to obtain four single view field images containing the wafer edge outline;
step 6: extracting the outline of each single-view-field image containing the edge outline of the wafer obtained in the step 5 to obtain absolute coordinates of four edge position outline points of the wafer (107) to be detected relative to the origin of a coordinate system of the two-dimensional motion platform;
and 7: selecting three edge positions from the four edge positions of the wafer to be detected, and performing circle fitting on the contour point coordinates of the three edge positions to obtain circle center coordinates, radii and circle fitting residual values; the circle fitting algorithm adopts a minimum value solving mode of a geometric Euler distance or a polynomial parameter distance;
and 8: reselecting three different edge position combinations, and repeating the step 7 until four times of circle fitting with different selected edge positions is performed to obtain residual values of four groups of circle fitting;
and step 9: and acquiring the center coordinates and the radius of the wafer according to the fitted residual values of the four groups of circles.
7. The alignment method according to claim 6, wherein in the step 2):
distance of movement of the wafer (107) in the Y-axis directionSmovementGreater than the diameter of the waferDwaferAnd twice the maximum offset errorEplacementIs a sum ofSmovement>Dwafer+2*Eplacement
The maximum offset error is: the manipulator takes out the wafer from the wafer magazine for multiple times and places the wafer on the maximum position offset of the wafer objective table;
the wide field of view image is: and carrying out coordinate splicing on all the monoscopic images shot by the imaging camera (102) when the wafer (107) moves along the Y-axis direction to obtain an image.
8. The alignment method according to claim 6, wherein the step 5) is specifically:
and carrying out threshold binarization on each single-view field image in the wide-view field image, selecting the single-view field image with the pixel value of 255 being between the minimum set threshold and the maximum set threshold, namely the image containing the edge contour of the wafer, and acquiring the center coordinate of the corresponding image.
9. The alignment method according to claim 6, wherein the step 6) is specifically:
6.1) extracting the outline of the single-view image containing the edge outline of the wafer by an edge detection algorithm to obtain the pixel coordinates of the outline point in a pixel coordinate system (x Lpixel ,y Lpixel ) The origin of the pixel coordinate system is the image center coordinate of the monoscopic image (x pixel0 ,y pixel0 ) (ii) a The edge detection algorithm adopts canny, sobel and laplacian;
6.2) obtaining the origin of the center of the single-view image obtained in the step 5 relative to the coordinate system of the two-dimensional motion platformx motion0 , y motion0 ) Absolute position coordinates of (a)x Tmotion ,y Tmotion );
6.3) calculating the absolute coordinates of the contour points relative to the origin of the coordinate system of the motion table (x Lmotion ,y Lmotion ):
x Lmotion = x Tmotion + x Lpixel * Wpx
y Lmotion = y Tmotion + y Lpixel * Wpy
Wherein,WpxandWpythe size of a single pixel point in the monoscopic image corresponds to the width size and the length size of the imaged surface of the wafer to be detected.
10. The alignment method according to claim 6, wherein the step 9) is embodied as:
if three residual values are larger than the threshold value, and the remaining residual value is smaller than the threshold value, the edge profile information includes notch or flat edge of the wafer, and the circle fitting result corresponding to the minimum value in the four groups of residual values is the accurate center coordinate and the accurate radius of the wafer;
if all the four residual values are smaller than the threshold value, the edge information does not include the wafer notch or the flat edge, and accurate wafer center coordinates and wafer radius can be obtained according to the four groups of circle fitting results.
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