CN114885102A

CN114885102A - Method, device and system for processing control signals of multiple vehicle-mounted cameras

Info

Publication number: CN114885102A
Application number: CN202210664842.1A
Authority: CN
Inventors: 于洪洪
Original assignee: Zhidao Network Technology Beijing Co Ltd
Current assignee: Zhidao Network Technology Beijing Co Ltd
Priority date: 2022-06-14
Filing date: 2022-06-14
Publication date: 2022-08-09

Abstract

The application relates to a method, a device and a system for processing control signals of a plurality of paths of vehicle-mounted cameras. The method comprises the following steps: respectively obtaining a control signal of a first path processor and a control signal of a second path processor; selecting a control signal of the first path processor or a control signal of the second path processor; and inputting the selected control signal of the first channel processor or the selected control signal of the second channel processor into at least one channel of cameras in a plurality of channels of vehicle-mounted cameras, so that the first channel processor or the second channel processor controls at least one channel of cameras in the plurality of channels of vehicle-mounted cameras. The scheme provided by the application can obtain the video stream data of the multi-channel vehicle-mounted camera in real time, reduces the acquisition delay of the video stream data of the camera, and meets the safety requirement of automatic driving.

Description

Method, device and system for processing control signals of multiple vehicle-mounted cameras

Technical Field

The application relates to the technical field of automatic driving, in particular to a method, a device and a system for processing control signals of multiple paths of vehicle-mounted cameras.

Background

In the related art, the automatic driving vehicle usually adopts multiple cameras to collect the driving state and the surrounding environment information of the automatic driving vehicle, and the video data of the multiple cameras is an important information source of the automatic driving vehicle.

In the related art, the multiple onboard cameras are controlled by a Central Processing Unit (CPU), when the CPU controlling the cameras fails, the autonomous vehicle does not have visual perception input, and the CPU needs to be cleared to obtain the visual perception input again, which causes the autonomous vehicle to fail to obtain the video data of the multiple onboard cameras in real time, affects the planning decision of the autonomous vehicle, and fails to meet the safety requirement of the autonomous vehicle.

Disclosure of Invention

In order to solve or partially solve the problems in the related art, the application provides a processing method, a processing device and a processing system of a control signal of a multi-channel vehicle-mounted camera, which can obtain video stream data of the multi-channel vehicle-mounted camera in real time, reduce the acquisition delay of the video stream data of the camera and meet the safety requirement of automatic driving.

The application provides a method for processing control signals of multiple paths of vehicle-mounted cameras in a first aspect, and the method comprises the following steps:

respectively obtaining a control signal of a first path processor and a control signal of a second path processor;

selecting a control signal of the first path processor or a control signal of the second path processor;

and inputting the selected control signal of the first channel processor or the selected control signal of the second channel processor into at least one channel of cameras in a plurality of channels of vehicle-mounted cameras, so that the first channel processor or the second channel processor controls at least one channel of cameras in the plurality of channels of vehicle-mounted cameras.

Preferably, the obtaining the control signal of the first channel processor and the control signal of the second channel processor respectively includes:

the control signal of the first path processor is obtained from the controller through a first I2C, and the control signal of the second path processor is obtained from the controller through a second I2C.

Preferably, the selecting the control signal of the first channel processor or the control signal of the second channel processor includes:

and selecting the control signal of the first path processor or the control signal of the second path processor through an arbiter.

Preferably, the inputting the selected control signal of the first channel processor or the selected control signal of the second channel processor into at least one of the multiple paths of cameras to enable the first channel processor or the second channel processor to control the at least one of the multiple paths of cameras, includes:

selecting at least one path of deserializers in the multipath deserializers through an I2C main controller according to the selected control signal of the first path processor or the selected control signal of the second path processor;

and inputting the selected control signal of the first channel processor or the selected control signal of the second channel processor into the selected at least one channel of deserializer so that the first channel processor or the second channel processor controls at least one channel of cameras in the multi-channel vehicle-mounted cameras, and the selected at least one channel of deserializer is connected with at least one channel of cameras in the multi-channel vehicle-mounted cameras.

This application second aspect provides a multichannel vehicle-mounted camera control signal's processing apparatus, the device includes:

the signal acquisition module is used for respectively acquiring a control signal of the first channel processor and a control signal of the second channel processor;

the signal selection module is used for selecting the control signal of the first path processor or the control signal of the second path processor obtained by the signal acquisition module;

and the signal transmission module is used for inputting the control signal of the first channel processor or the control signal of the second channel processor selected by the signal selection module into at least one channel of cameras in a plurality of channels of vehicle-mounted cameras so that the first channel processor or the second channel processor controls at least one channel of cameras in the plurality of channels of vehicle-mounted cameras.

Preferably, the signal transmission module is further configured to:

selecting at least one path of deserializers in the multi-path deserializers through an I2C main controller according to the control signal of the first path processor or the control signal of the second path processor selected by the signal selection module;

and inputting the selected control signal of the first path processor or the selected control signal of the second path processor into the selected at least one path of deserializer so that the first path processor or the second path processor controls at least one path of camera in the multiple paths of vehicle-mounted cameras, and the selected at least one path of deserializer is connected with at least one path of camera in the multiple paths of vehicle-mounted cameras.

The third aspect of the present application provides a system for processing control signals of multiple onboard cameras, where the system includes a first processor, a second processor, and the processing device as described above;

the first path processor is used for sending a control signal to the processing device;

the second path processor is used for sending a control signal to the processing device;

the processing device is used for respectively obtaining a control signal of a first channel processor and a control signal of a second channel processor, selecting the control signal of the first channel processor or the control signal of the second channel processor, and inputting the selected control signal of the first channel processor or the selected control signal of the second channel processor into at least one channel of cameras in the multiple channels of vehicle-mounted cameras, so that the first channel processor or the second channel processor controls at least one channel of cameras in the multiple channels of vehicle-mounted cameras.

Preferably, the processing system further comprises a demultiplexer;

the processing device is further configured to select at least one deserializer in the de-serializer multiplexer through an I2C main controller according to the selected control signal of the first channel processor or the selected control signal of the second channel processor, and input the selected control signal of the first channel processor or the selected control signal of the second channel processor into the selected at least one deserializer;

and the multi-path deserializer is used for being respectively connected with the processing device and the multi-path vehicle-mounted cameras so that the first path processor or the second path processor controls at least one path of cameras in the multi-path vehicle-mounted cameras.

A fourth aspect of the present application provides an electronic device, comprising:

a processor; and

a memory having executable code stored thereon, which when executed by the processor, causes the processor to perform the method as described above.

A fifth aspect of the present application provides a computer-readable storage medium having stored thereon executable code, which, when executed by a processor of an electronic device, causes the processor to perform the method as described above.

The technical scheme provided by the application can comprise the following beneficial effects:

the technical scheme of this application, the control signal of the first way treater that will select or the control signal input camera of at least a kind in the on-vehicle camera of multichannel of second way treater to make first way treater or the on-vehicle camera of at least a kind in the on-vehicle camera of second way treater control multichannel, multichannel on-vehicle camera connects two way treater respectively: the first path processor and the second path processor can select one path processor from the two path processors to control the multiple paths of vehicle-mounted cameras, when one path processor breaks down, the other path processor can be switched in time to continuously control the multiple paths of vehicle-mounted cameras, video stream data of the multiple paths of vehicle-mounted cameras can be obtained in real time, the time delay of obtaining the video stream data of the cameras is reduced, and the safety requirement of automatic driving is met.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Drawings

The foregoing and other objects, features and advantages of the application will be apparent from the following more particular descriptions of exemplary embodiments of the application as illustrated in the accompanying drawings wherein like reference numbers generally represent like parts throughout the exemplary embodiments of the application.

Fig. 1 is a schematic structural diagram of a processing system for multiple onboard camera control signals according to an embodiment of the present application;

fig. 2 is another schematic structural diagram of a processing system for multiple onboard camera control signals according to an embodiment of the present application;

FIG. 3 is a schematic flowchart illustrating a method for processing multiple onboard camera control signals according to an embodiment of the present application;

fig. 4 is another schematic flow chart of a processing method of multiple onboard camera control signals according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of a processing device for multiple onboard camera control signals according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of an electronic device shown in an embodiment of the present application.

Detailed Description

Embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While embodiments of the present application are illustrated in the accompanying drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

It should be understood that although the terms "first," "second," "third," etc. may be used herein to describe various information, these information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present application. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

The embodiment of the application provides a processing method of a control signal of a multi-channel vehicle-mounted camera, which can obtain video stream data of the multi-channel vehicle-mounted camera in real time, reduce the acquisition delay of the video stream data of the camera and meet the safety requirement of automatic driving.

The technical solutions of the embodiments of the present application are described in detail below with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a processing system for multiple onboard camera control signals according to an embodiment of the present application.

Referring to fig. 1, a processing system for multiple onboard camera control signals includes a first processor 110, a second processor 120, and a processing device 130.

The first path processor 110 is configured to send a control signal to the processing device 130.

And a second path processor 120, configured to send a control signal to the processing device 130.

In one embodiment, the first path processor 110 and the second path processor 120 can control multiple onboard cameras through the processing device 130. The first path processor 110 and the second path processor 120 are connected to the processing device 130 through separate connection lines, and each independently transmit a control signal to the processing device 130.

And the processing device 130 is configured to obtain a control signal of the first channel processor 110 and a control signal of the second channel processor 120, select the control signal of the first channel processor 110 or the control signal of the second channel processor 120, and input the selected control signal of the first channel processor 110 or the selected control signal of the second channel processor 120 to at least one of the multiple paths of cameras, so that the first channel processor 110 or the second channel processor 120 controls at least one of the multiple paths of cameras.

In an embodiment, the processing device 130 is configured to receive a control signal of the first path processor 110 and a control signal of the second path processor 120 respectively; selecting a control signal of one of the first channel processor 110 and the second channel processor 120 to determine a processor for controlling the plurality of channels of vehicle-mounted cameras; and inputting a control signal for determining a processor for controlling the multiple paths of vehicle-mounted cameras into at least one path of cameras in the multiple paths of vehicle-mounted cameras, so that one path of processor in the first path of processor 110 and the second path of processor 120 controls at least one path of cameras in the multiple paths of vehicle-mounted cameras.

For example, the processing device 130 receives a control signal of the first path processor 110 and a control signal of the second path processor 120 respectively; selecting between the control signal of the first path processor 110 and the control signal of the second path processor 120 according to a set rule; if the control signal of the first processor 110 is selected, the control signal of the first processor 110 is sent to at least one camera needing to be controlled in the multiple paths of vehicle-mounted cameras, and the control of the multiple paths of vehicle-mounted cameras is achieved.

According to the technical scheme, the control signal of the selected first channel processor or the control signal of the selected second channel processor is input into at least one of the multiple paths of cameras, so that the first channel processor or the second channel processor controls at least one of the multiple paths of cameras, and the multiple paths of cameras are respectively connected with the two channels of processors: the first path processor and the second path processor can select one path processor from the two path processors to control the multiple paths of vehicle-mounted cameras, when one path processor breaks down, the other path processor can be switched in time to continuously control the multiple paths of vehicle-mounted cameras, video stream data of the multiple paths of vehicle-mounted cameras can be obtained in real time, the time delay of obtaining the video stream data of the cameras is reduced, and the safety requirement of automatic driving is met.

Fig. 2 is another schematic structural diagram of a processing system for multiple onboard camera control signals according to an embodiment of the present application. Fig. 2 describes the solution of the present application in more detail with respect to fig. 1.

Referring to fig. 2, a system for processing multiple onboard camera control signals includes a first processor 110, a second processor 120, a processing device 130, a de-serializer, and a multiple power supply device.

In one embodiment, an autonomous vehicle is provided with sixteen onboard cameras, which are divided into four groups: a first group of cameras 141, a second group of cameras 142, a third group of cameras 143, and a fourth group of cameras 144, each group including four paths of cameras; the four cameras of each group are respectively connected with a deserializer and a power supply device, the four groups of cameras are a four-way deserializer and a four-way power supply device, the four cameras of the first group of cameras 141 are respectively connected with a first deserializer 151 and a first power supply device 161, the four cameras of the second group of cameras 142 are respectively connected with a second deserializer 152 and a second power supply device 162, the four cameras of the third group of cameras 143 are respectively connected with a third deserializer 153 and a third power supply device 163, and the four cameras of the fourth group of cameras 144 are respectively connected with a fourth deserializer 154 and a fourth power supply device 164; the four deserializers, such as the first deserializer 151, the second deserializer 152, the third deserializer 153, and the fourth deserializer 154, are respectively connected to the processing device 130; the first path processor 110 and the second path processor 120 are respectively connected to the processing device 130.

In an embodiment, the first path processor 110 includes a first path CPU, and the second path processor 120 includes a second path CPU. The processing device 130 transmits a control signal of a first path of CPU and a control signal of a second path of CPU by using an I2C ((Inter-Integrated Circuit, abbreviated as I2C)), the processing device 130 includes an FPGA (Field Programmable Gate Array), the first path of CPU is connected to the FPGA by an SPI (Serial Peripheral Interface) Interface and an I2C Interface respectively, the second path of CPU is connected to the FPGA by an SPI Interface and an I2C Interface respectively, the FPGA is connected to the first path of deserializer 151 by a first I2C Interface and a first set of SYNC interfaces respectively, is connected to the second path of deserializer 152 by a second I2C Interface and a second set of SYNC serializer 152 by a second I2C Interface respectively, is connected to the third path of deserializer by a third I2C Interface and a third path of serializer 153 respectively, is connected to the fourth path of deserializer 154 by a fourth I2C Interface and a fourth set of deserializer 154 respectively, and is connected to the FPGA 2C by an I2 Interface C, the second power supply unit 162 is connected via the second I2C interface, the third power supply unit 163 is connected via the third I2C interface, and the fourth power supply unit 164 is connected via the fourth I2C interface. The first deserializer 151 and the first power supply 161 are connected to the four cameras of the first group of cameras 141 through FAKRA connectors 170 of the four interfaces; the second deserializer 152 and the second power supply device 162 are connected with the four cameras of the second group of cameras 142 through FAKRA connectors 170 of the four interfaces; the third deserializer 153 and the third power supply 163 are connected with the four cameras of the third group of cameras 143 through FAKRA connectors 170 of the four interfaces; the fourth deserializer 154 and the fourth power supply 164 are connected to the four cameras of the fourth group of cameras 144 through four-interface FAKRA connectors 170. When monitoring a fault, the power supply device can output a low level signal to the FPGA, the FPGA receives the low level signal, and the specific fault type is read through the I2C according to the low level signal.

In an embodiment, the number of SYNCs in each group of SYNC is the same as the number of cameras connected to each deserializer, that is, if one deserializer is connected to several cameras, several SYNCs are required, and the number of SYNCs is the same as that of the cameras. For example, if the first deserializer is connected to four cameras of the first group of cameras, four paths of SYNC signals, four SYNCs, are required; if one path of deserializer is connected with two cameras, two paths of SYNC signals are needed; if one deserializer is connected with one camera, one SYNC signal and one SYNC signal are needed.

In an embodiment, the first path of CPU and the second path of CPU may control the vehicle-mounted camera through the FPGA and the deserializer, respectively. The I2C main controller of the first path of CPU sends the control signal to the FPGA as an I2C signal; the I2C main controller of the second CPU sends the control signal to the FPGA as an I2C signal. The FPGA obtains a control signal (I2C signal) of a first path of CPU from the controller through a first I2C, and obtains a control signal (I2C signal) of a second path of CPU from the controller through a second I2C.

In an embodiment, the FPGA includes two slave controllers, the first CPU sends a control signal to the FPGA as an I2C signal through the I2C master controller, and the FPGA obtains the control signal (I2C signal) of the first CPU through the first slave controller (the first I2C slave controller); the second path of CPU sends the control signal to the FPGA as an I2C signal through an I2C main controller, and the FPGA obtains the control signal (I2C signal) of the second path of CPU from a second slave controller (a second I2C slave controller).

In an embodiment, an arbiter of the FPGA selects one of the control signals of the first CPU and the control signals of the second CPU according to a time sequence of the control signals of the first CPU and the control signals of the second CPU, selects the control signal of the first CPU or the control signal of the second CPU, and determines that the first CPU or the second CPU controls at least one camera of the multiple vehicle-mounted cameras. The arbitrator selects the I2C signal received by the first I2C controller or the I2C signal received by the second I2C controller according to the time sequence of the I2C signal received by the first I2C controller and the I2C signal received by the second I2C controller, namely the arbitrator allows the I2C main controller of the first CPU or the I2C main controller of the second CPU to access the first I2C slave controller and the second I2C slave controller of the FPGA, blocks the I2C main controller of the second CPU or blocks the I2C main controller of the first CPU from accessing the I2C main controller of the FPGA through the I2C slave controller, realizes time-sharing access to the first I2C slave controller and the second I2C slave controller, and determines that the first CPU or the second CPU controls at least one camera in the multi-path vehicle-mounted cameras.

For example, the arbiter selects the I2C signal received by the first I2C slave controller according to the time sequence of the I2C signal received by the first I2C slave controller and the I2C signal received by the second I2C slave controller, allows the I2C master controller of the first path of CPU to access the first I2C slave controller of the FPGA, blocks the I2C master controller of the second path of CPU from accessing the I2C master controller of the FPGA through the I2C slave controller, and determines that the first path of CPU controls at least one path of cameras in the multi-path vehicle-mounted cameras.

In one embodiment, the FPGA selects at least one deserializer in the multi-path deserializers through an I2C main controller of the FPGA according to the selected control signal of the first path of CPU or the selected control signal of the second path of CPU; and inputting the control signal of the selected first path of CPU or the control signal of the selected second path of CPU into the selected at least one path of deserializer so that the first path of CPU or the second path of CPU controls at least one path of camera in the multi-path vehicle-mounted camera, and the selected at least one path of deserializer is connected with at least one path of camera in the multi-path vehicle-mounted camera.

In an embodiment, a Master main controller of the FPGA selects one of 4 addresses by using 2 address bits according to an I2C signal of a first path of CPU or an I2C signal of a second path of CPU selected by an arbiter, wherein the 4 addresses include I2C0, I2C1, I2C2, and I2C3, and one address corresponds to one path of deserializer and one path of power supply device; and sending the I2C signal of the first path of CPU or the I2C signal of the second path of CPU selected by the arbiter to a deserializer and/or a power supply device corresponding to the selected address, inputting the I2C signal of the first path of CPU or the I2C signal of the second path of CPU into at least one path of camera in the multi-path vehicle-mounted camera, and controlling at least one path of camera in the multi-path vehicle-mounted camera by the first path of CPU or the second path of CPU.

In one embodiment, corresponding to the address I2C0 is the first deserializer 151 and the first power device 161, corresponding to the address I2C1 is the second deserializer 152 and the second power device 162, corresponding to the address I2C2 is the third deserializer 153 and the third power device 163, and corresponding to the address I2C3 is the fourth deserializer 154 and the fourth power device 164. The Master main controller selects one address from the 4 addresses according to the I2C signal of the first path of CPU selected by the arbiter, if the I2C0 of the 4 addresses is selected; the I2C signal of the first CPU is sent to the first deserializer 151 through 4 SYNC signals, and the first deserializer 151 sends the I2C signal of the first CPU to the four cameras of the first group of cameras 141, so that the first CPU controls the four cameras of the first group of cameras 141.

According to the technical scheme, the control signal of the selected first channel processor or the control signal of the selected second channel processor is input into at least one of the multiple paths of cameras, so that the first channel processor or the second channel processor controls at least one of the multiple paths of cameras, and the multiple paths of cameras are respectively connected with the two channels of processors: the first path processor and the second path processor can select one path processor from the two path processors to control the multiple paths of vehicle-mounted cameras, when one path processor breaks down, the other path processor can continue to control the multiple paths of vehicle-mounted cameras, video stream data of the multiple paths of vehicle-mounted cameras can be obtained in real time, the time delay of obtaining the video stream data of the cameras is reduced, and the safety requirement of automatic driving is met.

Further, in the technical solution shown in the embodiment of the present application, the arbiter selects the control signal of the first channel processor or the control signal of the second channel processor; the multi-path vehicle-mounted camera is respectively connected with two paths of processors: when one processor fails, the first processor and the second processor can quickly and seamlessly select the other processor to continuously control the multiple paths of vehicle-mounted cameras, delay of the two processors for controlling the multiple paths of vehicle-mounted cameras is reduced or even eliminated, cross access of the first processor and the second processor is achieved, the multiple paths of vehicle-mounted cameras can timely respond to control of the first processor and the second processor, video stream data of the multiple paths of vehicle-mounted cameras can be obtained in real time, acquisition delay of the video stream data of the cameras is reduced, and safety requirements of automatic driving are met.

The application also provides a processing method of the control signals of the multi-path vehicle-mounted camera.

Fig. 3 is a schematic flowchart of a processing method for multiple onboard camera control signals according to an embodiment of the present application.

Referring to fig. 3, a method for processing control signals of multiple onboard cameras includes:

in step S310, a control signal of the first-path processor and a control signal of the second-path processor are obtained, respectively.

In an embodiment, the first path processor includes a first path CPU, and the second path processor includes a second path CPU. The first path of CPU and the second path of CPU can respectively control the multi-path vehicle-mounted camera through the FPGA. The first path of CPU and the second path of CPU are respectively connected with the FPGA through independent connecting wires and respectively and independently send control signals to the FPGA; the FPGA receives the control signal of the first path of CPU and the control signal of the second path of CPU respectively.

In step S320, a control signal of the first path processor or a control signal of the second path processor is selected.

In one embodiment, the FPGA selects one of the control signals of the first CPU and the second CPU to determine the CPUs controlling the multiple onboard cameras.

In step S330, the selected control signal of the first channel processor or the selected control signal of the second channel processor is input to at least one of the multiple channels of cameras, so that the first channel processor or the second channel processor controls at least one of the multiple channels of cameras.

In an embodiment, the FPGA inputs a control signal determining to control the CPUs of the multiple paths of vehicle-mounted cameras into at least one path of cameras in the multiple paths of vehicle-mounted cameras, so that one path of CPU in the first path of CPU and the second path of CPU controls at least one path of cameras in the multiple paths of vehicle-mounted cameras.

For example, the FPGA receives a control signal of a first path of CPU and a control signal of a second path of CPU respectively; selecting the first path of control signal of the CPU and the second path of control signal of the CPU according to a set rule; and if the control signal of the first path of CPU is selected, the control signal of the first path of CPU is sent to at least one path of camera needing to be controlled in the multiple paths of vehicle-mounted cameras, so that the control of the multiple paths of vehicle-mounted cameras is realized.

In the method for processing control signals of multiple vehicle-mounted cameras shown in the embodiment of the application, the selected control signal of the first processor or the selected control signal of the second processor is input into at least one camera in the multiple vehicle-mounted cameras, so that the first processor or the second processor controls at least one camera in the multiple vehicle-mounted cameras, and the multiple vehicle-mounted cameras are respectively connected with the two processors: the first path processor and the second path processor can select one path processor from the two path processors to control the multiple paths of vehicle-mounted cameras, when one path processor breaks down, the other path processor can continue to control the multiple paths of vehicle-mounted cameras, video stream data of the multiple paths of vehicle-mounted cameras can be obtained in real time, the time delay of obtaining the video stream data of the cameras is reduced, and the safety requirement of automatic driving is met.

Fig. 4 is another schematic flow chart of a processing method of multiple onboard camera control signals according to an embodiment of the present application. Fig. 4 describes the solution of the present application in more detail with respect to fig. 3.

Referring to fig. 2 and 4, a method for processing control signals of multiple onboard cameras includes:

in step S410, a control signal of the first path processor is obtained from the controller through the first I2C, and a control signal of the second path processor is obtained from the controller through the second I2C.

In one embodiment, an autonomous vehicle is provided with sixteen onboard cameras, grouping the sixteen onboard cameras into four groups: a first group of cameras 141, a second group of cameras 142, a third group of cameras 143, and a fourth group of cameras 144, each group including four paths of cameras; the four cameras of each group are respectively connected with a deserializer and a power supply device, the four groups of cameras are a four-way deserializer and a four-way power supply device, the four cameras of the first group of cameras 141 are respectively connected with a first deserializer 151 and a first power supply device 161, the four cameras of the second group of cameras 142 are respectively connected with a second deserializer 152 and a second power supply device 162, the four cameras of the third group of cameras 143 are respectively connected with a third deserializer 153 and a third power supply device 163, and the four cameras of the fourth group of cameras 144 are respectively connected with a fourth deserializer 154 and a fourth power supply device 164; the four deserializers such as the first deserializer 151, the second deserializer 152, the third deserializer 153, and the fourth deserializer 154 are respectively connected with the processing device 130; the first path processor 110 and the second path processor 120 are respectively connected to the processing device 130.

In an embodiment, the first path processor 110 includes a first path CPU, and the second path processor 120 includes a second path CPU. The processing device 130 transmits the control signal of the first path of CPU and the control signal of the second path of CPU by using an I2C protocol. The processing device 130 includes an FPGA. The first path of CPU and the second path of CPU can respectively control the vehicle-mounted camera through the FPGA and the deserializer. The I2C main controller of the first path of CPU sends the control signal to the FPGA as an I2C signal; the I2C main controller of the second CPU sends the control signal to the FPGA as an I2C signal. The FPGA obtains a control signal (I2C signal) of a first path of CPU from the controller through a first I2C, and obtains a control signal (I2C signal) of a second path of CPU from the controller through a second I2C.

In step S420, the control signal of the first-path processor or the control signal of the second-path processor is selected by the arbiter.

In step S430, at least one deserializer is selected from the demultiplexers by the I2C main controller according to the control signal of the selected first-path processor or the control signal of the second-path processor.

In an embodiment, a Master main controller of the FPGA selects one of 4 addresses by using 2 address bits according to an I2C signal of a first path of CPU or an I2C signal of a second path of CPU selected by an arbiter, wherein the 4 addresses include I2C0, I2C1, I2C2, and I2C3, and one address corresponds to one path of deserializer and one path of power supply device.

In step S440, the selected control signal of the first or second channel processor is input into the selected at least one channel deserializer, so that the first or second channel processor controls at least one channel of camera in the multiple channels of vehicle-mounted cameras, and the selected at least one channel deserializer is connected with the at least one channel of camera in the multiple channels of vehicle-mounted cameras.

In an embodiment, the Master main controller of the FPGA sends the I2C signal of the first path of CPU or the I2C signal of the second path of CPU selected by the arbiter to the deserializer and/or the power supply device corresponding to the selected address, inputs the I2C signal of the first path of CPU or the I2C signal of the second path of CPU into at least one path of camera in the multiple paths of vehicle-mounted cameras, and controls the at least one path of camera in the multiple paths of vehicle-mounted cameras by the first path of CPU or the second path of CPU.

Further, in the processing method of the multi-channel vehicle-mounted camera control signal shown in the embodiment of the application, the control signal of the first channel processor or the control signal of the second channel processor is selected through the arbiter; the multi-path vehicle-mounted camera is respectively connected with two paths of processors: when one processor fails, the first processor and the second processor can quickly and seamlessly select the other processor to continuously control the multiple paths of vehicle-mounted cameras, delay of the two processors for controlling the multiple paths of vehicle-mounted cameras is reduced or even eliminated, cross access of the first processor and the second processor is achieved, the multiple paths of vehicle-mounted cameras can timely respond to control of the first processor and the second processor, video stream data of the multiple paths of vehicle-mounted cameras can be obtained in real time, acquisition delay of the video stream data of the cameras is reduced, and safety requirements of automatic driving are met.

Corresponding to the embodiment of the application function implementation method, the application also provides a processing device of the control signals of the multi-channel vehicle-mounted camera, the electronic equipment and a corresponding embodiment.

Fig. 5 is a schematic structural diagram of a processing device for multiple onboard camera control signals according to an embodiment of the present application.

Referring to fig. 5, the processing device for the control signals of the multiple onboard cameras comprises a signal acquisition module 510, a signal selection module 520 and a signal transmission module 530.

And a signal obtaining module 510, configured to obtain a control signal of the first channel processor and a control signal of the second channel processor, respectively.

And a signal selection module 520, configured to select the control signal of the first channel processor or the control signal of the second channel processor obtained by the signal obtaining module 510.

The signal transmission module 530 is configured to input the control signal of the first channel processor or the control signal of the second channel processor selected by the signal selection module 520 into at least one of the multiple channels of vehicle-mounted cameras, so that the first channel processor or the second channel processor controls at least one of the multiple channels of vehicle-mounted cameras.

In an embodiment, the signal obtaining module 510 is further configured to obtain a control signal of the first channel processor from the controller through a first I2C, and obtain a control signal of the second channel processor from the controller through a second I2C.

The signal selection module 520 is further configured to select, by the arbiter, the control signal of the first-path processor or the control signal of the second-path processor obtained by the signal obtaining module 510.

The signal transmission module 530 is further configured to select at least one deserializer in the multi-path deserializer through the I2C main controller according to the control signal of the first path processor or the control signal of the second path processor selected by the signal selection module 520; and inputting the control signal of the selected first path processor or the control signal of the selected second path processor into the selected at least one path of deserializer so that the first path processor or the second path processor controls at least one path of camera in the multi-path vehicle-mounted cameras, and the selected at least one path of deserializer is connected with at least one path of camera in the multi-path vehicle-mounted cameras.

With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.

Referring to fig. 6, an electronic device 600 includes a memory 610 and a processor 620.

The Processor 620 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The memory 610 may include various types of storage units such as system memory, Read Only Memory (ROM), and permanent storage. Wherein the ROM may store static data or instructions that are required by the processor 620 or other modules of the computer. The persistent storage device may be a read-write storage device. The persistent storage may be a non-volatile storage device that does not lose stored instructions and data even after the computer is powered off. In some embodiments, the persistent storage device employs a mass storage device (e.g., magnetic or optical disk, flash memory) as the persistent storage device. In other embodiments, the permanent storage may be a removable storage device (e.g., floppy disk, optical drive). The system memory may be a read-write memory device or a volatile read-write memory device, such as a dynamic random access memory. The system memory may store instructions and data that some or all of the processors require at runtime. In addition, the memory 610 may include any combination of computer-readable storage media, including various types of semiconductor memory chips (e.g., DRAM, SRAM, SDRAM, flash memory, programmable read-only memory), magnetic and/or optical disks, as well. In some embodiments, memory 610 may include a removable storage device that is readable and/or writable, such as a Compact Disc (CD), a digital versatile disc read only (e.g., DVD-ROM, dual layer DVD-ROM), a Blu-ray disc read only, an ultra-dense disc, a flash memory card (e.g., SD card, min SD card, Micro-SD card, etc.), a magnetic floppy disk, or the like. Computer-readable storage media do not contain carrier waves or transitory electronic signals transmitted by wireless or wired means.

The memory 610 has stored thereon executable code that, when processed by the processor 620, may cause the processor 620 to perform some or all of the methods described above.

Furthermore, the method according to the present application may also be implemented as a computer program or computer program product comprising computer program code instructions for performing some or all of the steps of the above-described method of the present application.

Alternatively, the present application may also be embodied as a computer-readable storage medium (or non-transitory machine-readable storage medium or machine-readable storage medium) having executable code (or a computer program or computer instruction code) stored thereon, which, when executed by a processor of an electronic device (or server, etc.), causes the processor to perform part or all of the various steps of the above-described method according to the present application.

Having described embodiments of the present application, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A processing method of multi-channel vehicle-mounted camera control signals is characterized by comprising the following steps:

2. The method of claim 1, wherein obtaining the control signal of the first channel processor and the control signal of the second channel processor respectively comprises:

3. The method of claim 1, wherein selecting the control signal of the first-way processor or the control signal of the second-way processor comprises:

4. The method according to claim 1, wherein the inputting the selected control signal of the first channel processor or the selected control signal of the second channel processor into at least one of the plurality of onboard cameras, so that the first channel processor or the second channel processor controls the at least one of the plurality of onboard cameras, comprises:

5. The utility model provides a processing apparatus of multichannel vehicle-mounted camera control signal which characterized in that includes:

the signal selection module is used for selecting the control signal of the first channel processor or the control signal of the second channel processor obtained by the signal acquisition module;

6. The processing apparatus as claimed in claim 5, wherein the signal transmission module is further configured to:

7. A processing system of multi-channel vehicle-mounted camera control signals is characterized by comprising a first channel processor, a second channel processor and the processing device according to claim 5 or 6;

8. The processing system of claim 7, further comprising a de-serializer;

9. An electronic device, comprising:

a processor; and

a memory having executable code stored thereon, which when executed by the processor, causes the processor to perform the method of any one of claims 1-4.

10. A computer-readable storage medium having stored thereon executable code, which when executed by a processor of an electronic device, causes the processor to perform the method of any of claims 1-4.