CN114826177A - Analog front-end circuit capable of dynamically adjusting gain - Google Patents
Analog front-end circuit capable of dynamically adjusting gain Download PDFInfo
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Abstract
An analog front end circuit capable of dynamically adjusting gain comprises a programmable gain amplifier circuit, a plurality of sensors, a calculation circuit, a gain coarse control circuit, a gain fine control circuit and an analog-digital converter. The programmable gain amplifier circuit includes an amplifier, a coarse gain adjustment circuit, and a fine gain adjustment circuit. The gain coarse adjustment circuit is controlled by the coarse control signal and adjusts the gain at a coarse pitch based on the initial gain. The gain fine adjustment circuit is controlled by a fine control signal in a data mode to adjust the gain at a fine pitch. The calculating circuit calculates a primary gain adjustment amount and a secondary gain adjustment amount. The coarse gain control circuit generates a coarse control signal according to the primary gain adjustment amount, and the fine gain control circuit generates a fine control signal according to the secondary gain adjustment amount.
Description
Technical Field
The present invention relates to an analog front end circuit, and more particularly, to a dynamically adjustable gain analog front end circuit capable of avoiding a drastic SNR change caused by a dynamically adjustable gain.
Background
In a conventional Analog Front-End (AFE) system, after an input Signal is received, the input Signal is amplified or reduced to optimize a Signal-to-Noise Ratio (SNR) of the Signal and to prevent clipping (clipping) or saturation (saturation) of an output Signal.
After the AFE system determines the initial gain according to the signal size in the Hand-shake mode, the input signal is amplified with the initial gain. In this case, if the AFE system is affected by the temperature drift, the signal intensity may change, which may affect the SNR optimization of the entire AFE system, and further, may cause the clipping or saturation phenomenon of the output signal, which may result in a sharp decrease in the SNR of the AFE system. If the communication system is taken as an example, packet loss may occur.
However, if the gain of the AFE system is arbitrarily adjusted under normal operation, various transient responses are generated during the gain conversion process, so that the SNR changes instantaneously. For a communication system, an immediate packet loss is caused. Although SNR optimization can be achieved after AFE system stabilization, transient response due to switching gain already causes irreparable packet loss, and if system gain is continuously dynamically adjusted, packet loss continues to be caused.
Therefore, how to improve the gain adjustment mechanism to avoid the drastic change of system SNR caused by dynamically adjusting the gain and overcome the above-mentioned drawbacks has become one of the important issues to be solved by the industry.
Disclosure of Invention
The present invention is directed to an analog front end circuit capable of dynamically adjusting a gain, which can avoid a drastic SNR change caused by dynamically adjusting the gain.
In order to solve the above technical problem, an embodiment of the present invention provides an analog front end circuit capable of dynamically adjusting a gain, which is adapted to receive an input signal from a signal source, and includes a programmable gain amplifier circuit, a plurality of sensors, a calculation circuit, a coarse gain control circuit, a fine gain control circuit, and an analog-to-digital converter. A programmable gain amplifier circuit includes an amplifier, a coarse gain adjustment circuit and a fine gain adjustment circuit. The amplifier is used for receiving and amplifying the input signal. The coarse gain adjustment circuit is coupled to the amplifier and configured to adjust the gain of the programmable gain amplifier circuit by a coarse pitch based on an initial gain determined in a handshake mode. A gain fine adjustment circuit is coupled to the amplifier and configured to adjust the gain of the programmable gain amplifier circuit at a fine pitch controlled by a fine control signal in a data mode after the handshake mode is terminated. The plurality of sensors are configured to respectively sense in the data mode to generate a plurality of sensing signals. The calculation circuit is connected to the sensor and configured to calculate a primary gain adjustment amount according to the initial gain and calculate a secondary gain adjustment amount according to the sensing signal. The coarse gain control circuit is configured to generate the coarse control signal according to the main gain adjustment. The gain fine control circuit is configured to generate the fine control signal according to the secondary gain adjustment amount. The analog-to-digital converter is configured to perform analog-to-digital conversion on the amplified input signal to generate an output signal. Wherein the coarse pitch is within a coarse adjustment range, the fine pitch is within a fine adjustment range, and the coarse adjustment range is larger than the fine adjustment range.
One of the benefits of the present invention is that, when the system slightly varies due to temperature drift, the calculating circuit can calculate the secondary gain adjustment amount according to the temperature variation, and further can perform adjustment by the fine gain adjusting circuit, and control the adjustment speed, so as to greatly reduce the load of the system in transient state while solving the temperature drift problem.
Furthermore, in the analog front-end circuit provided by the present invention, when the gain fine control circuit adjusts the gain according to the system status change, the gain is switched in a coding manner different from that of the gain coarse control circuit, so that the adjustment can be limited to a smaller range, and the possibility of drastic change of the system SNR is reduced when the gain is dynamically adjusted.
For a better understanding of the features and technical content of the present invention, reference should be made to the following detailed description of the invention and accompanying drawings, which are provided for purposes of illustration and description only and are not intended to limit the invention.
Drawings
Fig. 1 is a functional block diagram of an analog front-end circuit according to an embodiment of the present invention.
Fig. 2 to 5 are first to fourth circuit layouts of a programmable gain amplifier circuit according to an embodiment of the invention.
FIG. 6 is a block diagram illustrating the details between the gain fine control circuit and the gain fine adjustment circuit according to an embodiment of the present invention.
Description of the symbols
1: analog front-end circuit
10: programmable gain amplifier circuit
12: calculation circuit
14: gain coarse control circuit
16: gain fine control circuit
18: analog-to-digital converter
20: de-noising circuit
22: switch driver
100: amplifier with a high-frequency amplifier
102: gain coarse adjustment circuit
104: gain fine adjustment circuit
11-1, 11-2, … 11-n: sensor device
CH: high-pass capacitor
CL: low-pass capacitor
Cv 1: first variable capacitance circuit
Cv 2: second variable capacitance circuit
Gi: initial gain
Gp: main gain adjustment amount
Gs: secondary gain adjustment amount
HPF: high-pass filter
LPF: low-pass filter
RH: high-pass resistor
RL: low-pass resistor
Rv 1: first variable resistance circuit
Rv 2: second variable resistance circuit
Rv 3: third variable resistance circuit
Rv 4: fourth variable resistance circuit
S01, S02, … S0 n: sensing signal
S1: coarse control signal
S2: fine control signal
S21, S22: control signal
Sin: input signal
Sin': amplified input signal
Sout: output signal
And Ss: signal source
Detailed Description
The following description is provided for the implementation of the "dynamically gain adjustable analog front end circuit" disclosed in the present invention by specific embodiments, and those skilled in the art can understand the advantages and effects of the present invention from the disclosure of the present specification. The invention is capable of other and different embodiments and its several details are capable of modifications and various changes in detail, all without departing from the spirit and scope of the present invention. The drawings of the present invention are for illustrative purposes only and are not intended to be drawn to scale. The following embodiments will further explain the related art of the present invention in detail, but the disclosure is not intended to limit the scope of the present invention. In addition, the term "or" as used herein should be taken to include any one or combination of more of the associated listed items as the case may be.
Referring to fig. 1, an embodiment of the present invention provides a dynamically gain-adjustable analog front-end circuit 1, adapted to receive an input signal Sin from a signal source Ss, the analog front-end circuit including a programmable gain amplifier circuit 10, a plurality of sensors 11-1, 11-2, … 11-n, a calculation circuit 12, a gain coarse control circuit 14, a gain fine control circuit 16, and an analog-to-digital converter 18.
The Programmable Gain Amplifier (PGA) circuit 10 is an Amplifier having high versatility, and the amplification factor thereof can be controlled as desired. The programmable gain amplifier circuit 10 includes an amplifier 100, a gain coarse adjustment circuit 102, and a gain fine adjustment circuit 104.
The amplifier 100 may be configured to receive and amplify an input signal Sin, and may be, for example, an operational amplifier. The gain coarse adjustment circuit 102 is connected to the amplifier 100 and configured to adjust the gain of the programmable gain amplifier circuit 10 by a coarse pitch according to an initial gain Gi determined in a Hand-shaking mode (Hand-shaking) controlled by the coarse control signal S1.
On the other Hand, the gain fine adjustment circuit 104 is connected to the amplifier 100 and configured to adjust the gain of the programmable gain amplifier circuit 10 at a fine pitch in a Data mode (Data mode) after the Hand-shaking mode is ended, controlled by the fine control signal S2.
For example, the electronic device including the programmable gain amplifier circuit 10 may perform a Hand-shaking (Hand-shaking) mode with the electronic device including the signal source Ss, determine an initial gain to be used by detecting the signal magnitude of each other, and enter a data mode to transmit data accordingly.
However, if the state of the AFE system changes, for example, due to temperature drift, resulting in signal strength change, the present invention configures a plurality of sensors 11-1, 11-2, … 11-n to respectively sense in the data pattern and generate a plurality of sensing signals S01, S02, … S0n according to the sensing result. For example, the sensors 11-1, 11-2, … 11-n may include a temperature sensor for sensing system temperature.
The calculating circuit 12 is connected to the sensors 11-1, 11-2, … 11-n, and is configured to calculate a primary gain adjustment amount Gp according to the initial gain Gi, and calculate a secondary gain adjustment amount Gs according to the sensing signals S01, S02, … S0 n. In detail, the coarse gain adjustment circuit 102 and the fine gain adjustment circuit 104 of the present invention both have gain adjustment mechanisms, but the difference is that the coarse gain adjustment circuit 102 is responsible for most of the gain range, and the fine gain adjustment circuit 104 is responsible for a small part of the gain range. In other words, the coarse pitch may be within a coarse adjustment range, the fine pitch may be within a fine adjustment range, and the coarse adjustment range is greater than the fine adjustment range. Therefore, when the system slightly varies due to temperature drift, the calculating circuit 12 can calculate the secondary gain adjustment amount Gs according to the temperature variation, and further can perform adjustment by the gain fine adjustment circuit 104, and control the adjustment speed, so as to greatly reduce the load of the system in transient state while solving the temperature drift problem.
In particular, the gain coarse control circuit 14 is configured to generate the coarse control signal S1 according to the primary gain adjustment amount Gp, and the gain fine control circuit is configured to generate the fine control signal S2 according to the secondary gain adjustment amount Gs, so that the programmable gain amplifier circuit 10 outputs the amplified input signal Sin'.
The analog-to-digital converter 18 performs analog-to-digital conversion on the amplified input signal Sin' to generate an output signal Sout.
Reference may be further made to fig. 2 to 5, which are first to fourth circuit layouts of the programmable gain amplifier circuit according to the embodiment of the invention, respectively. As shown in fig. 2, the programmable gain amplifier circuit 10 may further include a low pass filter LPF and a high pass filter HPF. The low pass filter is connected between the first input (e.g., the negative input shown in fig. 2) and the output of the amplifier 100, and the high pass filter HPF is connected to the first input (e.g., the negative input shown in fig. 2) of the amplifier 100. A second input of amplifier 100, such as the positive input shown in fig. 2, is grounded.
In the embodiment of fig. 2, the low pass filter LPF may include a first variable resistor Rv1, a second variable resistor Rv2, and a low pass capacitor CL, and the high pass filter HPF includes a high pass resistor RH and a high pass capacitor CH. It should be noted that the gain coarse adjustment circuit 102 may be a first variable resistor circuit Rv1 in the low pass filter LPF, the gain fine adjustment circuit 104 may be a second variable resistor circuit Rv2 in the low pass filter LPF, and the first variable resistor circuit Rv1 and the second variable resistor circuit Rv2 are respectively controlled by the coarse control signal S1 and the fine control signal S2, and the first variable resistor circuit Rv1 and the second variable resistor circuit Rv2 are connected in series. Accordingly, by controlling the resistance value of the second variable resistance circuit Rv2 by the fine control signal S2, the resistance value of the low pass filter LPF positioned on the negative feedback path of the amplifier 100 can be controlled, thereby adjusting the gain of the programmable gain amplifier circuit 10.
In the embodiment of fig. 3, the architecture of the programmable gain amplifier circuit 10 is substantially the same as that shown in fig. 2, except that the first variable resistance circuit Rv1 and the second variable resistance circuit Rv2 are connected in parallel. Accordingly, by controlling the resistance value of the second variable resistance circuit Rv2 by the fine control signal S2, the resistance value of the low pass filter LPF positioned on the negative feedback path of the amplifier 100 can be controlled, thereby adjusting the gain of the programmable gain amplifier circuit 10.
As shown in fig. 4, the programmable gain amplifier circuit 10 also includes a low pass filter LPF and a high pass filter HPF. The low pass filter is connected between the first input (e.g., the negative input shown in fig. 2) and the output of the amplifier 100, and the high pass filter HPF is connected to the first input (e.g., the negative input shown in fig. 2) of the amplifier 100.
In the embodiment of fig. 4, the low pass filter LPF may include a low pass resistor RL and a low pass capacitor CL, and the high pass filter HPF includes a first variable capacitor circuit Cv1, a second variable capacitor circuit Cv2, and a high pass resistor RH. It should be noted that the gain coarse adjustment circuit 102 may be a first variable capacitance circuit Cv1 in the high pass filter HPF, the gain fine adjustment circuit 104 may be a second variable capacitance circuit Cv2 in the high pass filter HPF, and the first variable capacitance circuit Cv1 and the second variable capacitance circuit Cv2 are respectively controlled by the aforementioned coarse control signal S1 and the aforementioned fine control signal S2. Accordingly, the capacitance value of the high pass filter HPF of the amplifier 100 can be controlled by the fine control signal S2, thereby adjusting the gain of the programmable gain amplifier circuit 10.
In the embodiment of fig. 5, the architecture of the programmable gain amplifier circuit 10 is substantially the same as that shown in fig. 4, except that the high pass filter HPF includes a third variable resistance circuit Rv3, a fourth variable resistance circuit Rv4, and a high pass capacitor CH. In this embodiment, the gain coarse adjustment circuit 102 is the third variable resistance circuit Rv3 in the high-pass filter HPF, and the gain fine adjustment circuit 104 is the fourth variable resistance circuit Rv4 in the high-pass filter HPF.
It should be noted that the variable resistor circuit and the variable capacitor circuit, which are the coarse gain adjustment circuit 102 and the fine gain adjustment circuit 104, may include a plurality of switching elements, so as to switch the overall resistance value of the variable resistor circuit or the overall capacitance value of the variable capacitor circuit, and the switching elements may be controlled in a binary system.
For example, when the coarse gain control circuit 14 and the fine gain control circuit 16 both use the binary scheme to generate the coarse control signal S1 and the fine control signal S2, the capacitance of the HPF is adjusted as shown in fig. 4, and the ratio of the capacitance to be switched is as follows:
the set gain coarse control circuit 14 may switch to 5B, corresponding to 512:256:128:64: 32;
the set gain fine control circuit 16 may switch 6b to correspond to 64:32:16:8:4: 2;
thus, the gain coarse control circuit 14 has a total switchable capacitance value of:
992, i.e., 992 cells, 512+256+128+64+ 32.
On the other hand, the gain fine control circuit 16 has a total switchable capacitance value of:
64+32+16+8+4+2 ═ 126, that is, 126 cells.
Therefore, the coarse adjustment range is 992 cells, the coarse pitch is within 992 cells, and the fine pitch is within the fine adjustment range, i.e., 126 cells, and the coarse adjustment range (992) is larger than the fine adjustment range (126). When switching, the gain fine control circuit 16 can switch from 011111 to 100000 for a total of 126 cells with the maximum switchable fine step size (i.e., the switchable capacitance) instantaneously. Therefore, when the gain is adjusted by the fine gain control circuit 16 according to a change in the system state, the adjustment can be performed within a small range, and the possibility of a drastic change in the system SNR when the gain is dynamically adjusted can be reduced.
In other embodiments, the gain coarse control circuit 14 and the gain fine control circuit 16 may be encoded differently, for example, with the gain fine control circuit 16 using thermometer code (thermometer code).
Similarly, in this case, the capacitance values to be switched are scaled as follows:
the set gain coarse control circuit 14 may switch to 5B, corresponding to 512:256:128:64: 32;
the setting gain fine control circuit 16 is switchable 64T, corresponding to 2 x 63;
thus, the gain coarse control circuit 14 has a total switchable capacitance value of:
992, i.e., 992 cells, 512+256+128+64+ 32.
On the other hand, the gain fine control circuit 16 has a total switchable capacitance value of:
126, i.e., 126 cells.
However, when thermometer coding is used, the gain fine control circuit 16 only allows the maximum adjustment amount to be limited, for example, 2 units, in one adjustment period (for example, when +1 is determined according to the system clock), so that the variation amount per time can be smaller, the instantaneous burden on the system is reduced, and the probability of severe SNR variation is further reduced.
It should be noted that although the binary system and thermometer coding are adopted in the above embodiments, the present invention is not limited thereto, and gray Code (Grey Code) can be used to adjust the gain in a similar manner.
Besides, besides the above coding method, the influence on the system when the gain is switched can be reduced by the circuit flattening technology. Reference may be further made to FIG. 6, which is a detailed block diagram schematic diagram between a gain fine control circuit and a gain fine adjustment circuit according to an embodiment of the present invention. As shown, the analog front-end circuit 1 may further include a de-noising circuit 20 and a switch driver 22.
The denoising circuit 20 is connected between the gain fine adjustment circuit 104 and the gain fine control circuit 16, and is configured to remove noise of the fine control signal S2. For example, the de-noising circuit 20 may be, for example, a D Flip Flop (DFF) that taps the fine control signal S2 according to the system clock and removes the noise that may be generated, and enables the adc 18 at the back end to sample the optimum position for adc conversion.
On the other hand, the switch driver 22 may be connected between the gain fine adjustment circuit 104 and the gain fine control circuit 16, and configured to generate a fine control signal group according to the fine control signal S2, including a plurality of control signals S21, S22, …, where the switch driver 22, in addition to coordinating the control signals S21, S22, …, prevents the corresponding switch element in the gain fine adjustment circuit 104 from being turned on erroneously during the switching process, and also prevents the ground terminal in the gain fine adjustment circuit 104 from being turned on simultaneously with the first input terminal (i.e., the negative input terminal) of the amplifier 100 to cause a short circuit.
It should be noted that the denoising circuit 20 and the switch driver 22 may be used simultaneously, or only one of them may be used as shown in fig. 6, but the invention is not limited thereto. Furthermore, the calculation circuit 12, the gain coarse control circuit 14, the gain fine control circuit 16 and the switch driver 22 mentioned in the foregoing embodiments may be implemented by one or more processing units, microcontrollers, microprocessors and/or digital signal processors, and all of the above circuits may be implemented in the form of hardware, software or firmware.
[ advantageous effects of embodiments ]
One of the benefits of the present invention is that, when the system slightly varies due to temperature drift, the calculating circuit can calculate the secondary gain adjustment amount according to the temperature variation, and further can perform adjustment by the fine gain adjusting circuit, and control the adjustment speed, so as to greatly reduce the load of the system in transient state while solving the temperature drift problem.
Furthermore, in the analog front-end circuit provided by the present invention, when the gain fine control circuit adjusts the gain according to the system status change, the gain is switched in a coding manner different from that of the gain coarse control circuit, so that the adjustment can be limited to a smaller range, and the possibility of drastic change of the system SNR is reduced when the gain is dynamically adjusted.
The disclosure is only a preferred embodiment of the invention and should not be taken as limiting the scope of the invention, which is defined by the appended claims.
Claims (10)
1. An analog front-end circuit with dynamically adjustable gain for receiving an input signal from a signal source, comprising:
a programmable gain amplifier circuit, comprising:
an amplifier for receiving and amplifying the input signal;
a coarse gain adjustment circuit coupled to the amplifier and configured to adjust a gain of the programmable gain amplifier circuit by a coarse pitch based on an initial gain determined in a handshake mode, controlled by a coarse control signal; and
a gain fine adjustment circuit connected to the amplifier and configured to adjust the gain of the programmable gain amplifier circuit at a fine pitch controlled by a fine control signal in a data mode after the handshake mode is ended;
a plurality of sensors configured to respectively sense in the data mode to generate a plurality of sensing signals;
a calculation circuit, coupled to the sensor, configured to calculate a primary gain adjustment based on the initial gain and a secondary gain adjustment based on the sensing signal;
a coarse gain control circuit configured to generate the coarse control signal according to the main gain adjustment;
a gain fine control circuit configured to generate the fine control signal according to the secondary gain adjustment amount; and
an analog-to-digital converter configured to analog-to-digital convert the amplified input signal to generate an output signal,
wherein the coarse pitch is within a coarse adjustment range, the fine pitch is within a fine adjustment range, and the coarse adjustment range is larger than the fine adjustment range.
2. The analog front-end circuit of claim 1, wherein the gain fine control circuit employs thermometer coding to generate the fine control signal to control the fine pitch of the gain fine adjustment circuit.
3. The analog front-end circuit of claim 2, wherein the gain fine adjustment circuit has a maximum adjustment limit during an adjustment period when the gain fine adjustment circuit adjusts the gain of the programmable gain amplifier circuit at the fine pitch.
4. The analog front end circuit of claim 1, wherein the programmable gain amplifier circuit comprises:
a low pass filter connected between a first input terminal and an output terminal of the amplifier; and
a high pass filter connected to the first input terminal of the amplifier.
5. The analog front-end circuit of claim 4, wherein the coarse gain adjustment circuit is a first variable resistance circuit of the low-pass filter and the fine gain adjustment circuit is a second variable resistance circuit of the low-pass filter.
6. The analog front-end circuit of claim 4, wherein the coarse gain adjustment circuit is a first variable capacitance circuit of the high-pass filter and the fine gain adjustment circuit is a second variable capacitance circuit of the high-pass filter.
7. The analog front-end circuit of claim 4, wherein the coarse gain adjustment circuit is a third variable resistance circuit of the high-pass filter and the fine gain adjustment circuit is a fourth variable resistance circuit of the high-pass filter.
8. The analog front end circuit of claim 1, wherein the sensor comprises a temperature sensor configured to sense a system temperature, the computation circuit computing the secondary gain adjustment based on the system temperature.
9. The analog front-end circuit of claim 1, further comprising a de-noising circuit coupled between the gain fine adjustment circuit and the gain fine control circuit and configured to de-noise the fine control signal.
10. The analog front-end circuit of claim 1, wherein the gain fine adjustment circuit comprises a plurality of switching elements, and further comprising a switch driver coupled between the gain fine adjustment circuit and the gain fine control circuit and configured to generate a set of fine control signals based on the fine control signal.
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| CN202110087116.3A CN114826177A (en) | 2021-01-22 | 2021-01-22 | Analog front-end circuit capable of dynamically adjusting gain |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202110087116.3A CN114826177A (en) | 2021-01-22 | 2021-01-22 | Analog front-end circuit capable of dynamically adjusting gain |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6032109A (en) * | 1996-10-21 | 2000-02-29 | Telemonitor, Inc. | Smart sensor module |
| US20090063081A1 (en) * | 2007-09-05 | 2009-03-05 | Accel Semiconductor (Shanghai) Limited | Bridge sensor calibration |
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2021
- 2021-01-22 CN CN202110087116.3A patent/CN114826177A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6032109A (en) * | 1996-10-21 | 2000-02-29 | Telemonitor, Inc. | Smart sensor module |
| US20090063081A1 (en) * | 2007-09-05 | 2009-03-05 | Accel Semiconductor (Shanghai) Limited | Bridge sensor calibration |
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