CN114598419B - Interleaver, deinterleaver, and methods of performing the same - Google Patents
Interleaver, deinterleaver, and methods of performing the same Download PDFInfo
- Publication number
- CN114598419B CN114598419B CN202111342269.4A CN202111342269A CN114598419B CN 114598419 B CN114598419 B CN 114598419B CN 202111342269 A CN202111342269 A CN 202111342269A CN 114598419 B CN114598419 B CN 114598419B
- Authority
- CN
- China
- Prior art keywords
- interleaver
- interleaving
- data
- original input
- input data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/12—Modulator circuits; Transmitter circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
The embodiment of the invention provides an interleaver, a deinterleaver and a method for executing the interleaver and the deinterleaver, which belong to the technical field of communication. The execution method of the interleaver comprises the following steps: receiving original input data according to the interleaving depth; obtaining an interleaving step length; starting from the first bit data of the original input data, taking the interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the original input data to obtain interleaved data; and outputting the interleaved data. The interleaver, the de-interleaver and the executing method thereof have wide application range, easy realization and strong randomness.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to an interleaver, a deinterleaver, and a method for performing the same.
Background
In a wireless communication system, an interleaver and a deinterleaver are important modules in the communication system, and have a great influence on the system performance. The interleaver is read from front to back after performing regular permutation on the input original information sequence. The conventional interleaver mainly includes: the matrix interleaver is run in list (column out). Such a scheme is simple to implement, but is not sufficiently widely applicable, for example, to chirp spread spectrum (Chirp Spread Spectrum, CSS) modulation systems. A cyclic diagonal interleaver may also be included. However, the interleaving depth of the interleaving method is related to the coding rate and the spreading factor, and the memory utilization efficiency is low.
Disclosure of Invention
The invention aims to provide an interleaver, a deinterleaver and a method for executing the same, which have wide application range, are easy to realize and have strong randomness.
To achieve the above object, an embodiment of the present invention provides a method for executing an interleaver, including: receiving original input data according to the interleaving depth; obtaining an interleaving step length; starting from the first bit data of the original input data, taking the interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the original input data to obtain interleaved data; and outputting the interleaved data.
Preferably, the greatest common divisor of the interleaving step size and all the spreading factors in the spreading factor range is 1.
Preferably, the receiving the original input data according to the interleaving depth includes: the original input data is received such that the length of the received original input data is less than or equal to the interleaving depth.
Preferably, the interleaving depth is determined by the following method: determining the memory of the interleaver; dividing the memory of the interleaver by the spreading factor needed at present to obtain a first remainder; and subtracting the first remainder from the memory of the interleaver to obtain the interleaving depth.
Preferably, the memory of the interleaver satisfies the following condition: dividing the memory of the interleaver by all spreading factors in the spreading factor range to obtain a second remainder which is smaller than or equal to a first threshold; dividing the memory of the interleaver by the coding length of the original input data to obtain a third remainder smaller than or equal to the first threshold; the memory of the interleaver is less than or equal to a second threshold.
The embodiment of the invention also provides a method for executing a deinterleaver, wherein the deinterleaver corresponds to the interleaver, and the method comprises the following steps: receiving the interleaved data; obtaining a de-interleaving step length; starting from the first bit data of the interleaved data, taking the de-interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the interleaved data to obtain the original input data; and outputting the original input data.
Preferably, the de-interleaving step is determined by: dividing the depth of the interleaver by the interleaving step length to obtain a fourth remainder; when the interleaved data is read in the first n rounds, dividing the depth of the interleaver by the interleaving step length and rounding and adding 1 as the de-interleaving step length, wherein n is equal to the fourth remainder; at the beginning of the n+1-th round of reading the interleaved data, the depth of the interleaver is divided by the interleaving step size and rounded up to be the de-interleaving step size.
The embodiment of the invention also provides an interleaver, which comprises: the device comprises a first receiving unit, a first acquisition unit, an interleaving unit and a first output unit, wherein the first receiving unit is used for receiving original input data according to interleaving depth; the first acquisition unit is used for acquiring an interleaving step length; the interleaving unit is used for starting from the first bit data of the original input data, taking the interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the original input data so as to obtain interleaved data; and the first output unit is used for outputting the interleaved data.
Preferably, the greatest common divisor of the interleaving step size and all the spreading factors in the spreading factor range is 1.
Preferably, the first receiving unit is configured to: the original input data is received such that the length of the received original input data is less than or equal to the interleaving depth.
Preferably, the interleaving depth is determined by the following method: determining the memory of the interleaver; dividing the memory of the interleaver by the spreading factor needed at present to obtain a first remainder; and subtracting the remainder from the memory of the interleaver to obtain the interleaving depth.
Preferably, the memory of the interleaver satisfies the following condition: dividing the memory of the interleaver by all spreading factors in the spreading factor range to obtain a second remainder which is smaller than or equal to a first threshold; dividing the memory of the interleaver by the coding length of the original input data to obtain a third remainder smaller than or equal to the first threshold; the memory of the interleaver is less than or equal to a second threshold.
The embodiment of the present invention also provides a deinterleaver corresponding to the above-described interleaver, including: the device comprises a second receiving unit, a second acquisition unit, a de-interleaving unit and a second output unit, wherein the second receiving unit is used for receiving interleaved data; the second acquisition unit is used for acquiring a de-interleaving step length; the de-interleaving unit is used for starting from the first bit data of the interleaved data, taking the de-interleaving step length as an interval, and carrying out multiple rounds of non-repeated reading on all data in the interleaved data so as to obtain the original input data; and the second output unit is used for outputting the original input data.
Preferably, the de-interleaving step is determined by: dividing the depth of the interleaver by the interleaving step length to obtain a fourth remainder; when the interleaved data is read in the first n rounds, dividing the depth of the interleaver by the interleaving step length and rounding and adding 1 as the de-interleaving step length, wherein n is equal to the fourth remainder; at the beginning of the n+1-th round of reading the interleaved data, the depth of the interleaver is divided by the interleaving step size and rounded up to be the de-interleaving step size.
Through the technical scheme, the interleaver, the de-interleaver and the execution method thereof provided by the invention are applicable to CSS modulation systems, have wide application range, are easy to realize by adopting fixed step length for reading, have strong interleaving randomness, and can obtain the performance gain of channel coding with 1-bit error correction capability.
Additional features and advantages of embodiments of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain, without limitation, the embodiments of the invention. In the drawings:
FIG. 1 is a flow chart of a method for implementing an interleaver according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method for determining interleaving depth according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for implementing a deinterleaver according to an embodiment of the present invention.
FIG. 4 is a block diagram of an interleaver according to an embodiment of the present invention;
fig. 5 is a block diagram of a deinterleaver according to an embodiment of the present invention.
Description of the reference numerals
401. First receiving unit 402 first acquiring unit
403. Interleaving unit 404 first output unit
501. Second receiving unit 502 second acquisition unit
503. A second output unit of the de-interleaving unit 504
Detailed Description
The following describes the detailed implementation of the embodiments of the present invention with reference to the drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the invention, are not intended to limit the invention.
Fig. 1 is a flowchart of an implementation method of an interleaver according to an embodiment of the present invention. As shown in fig. 1, the method includes:
step S11, receiving original input data according to the interleaving depth;
specifically, the original input data is received such that the length of the received original input data is less than or equal to the interleaving depth. For example, assuming that the interleaving depth of the interleaver is 143, only 143-bit data is received even if the original input data is 144-bit data. If the interleaving depth is 144, the original input data of 144-bit data can be received in its entirety.
The present invention provides a way to determine the interleaving depth as follows, as shown in fig. 2:
step S21, determining the memory of the interleaver;
for example, the memory of the interleaver satisfies the following condition:
first, the second remainder obtained by dividing the memory of the interleaver by all spreading factors in the spreading factor range needs to be less than or equal to a first threshold, so that the memory of the interleaver is approximately a multiple of all the spreading factors, and the first threshold may preferably be 4, which is expressed by the following formula:
mod (C, SF 1) is less than or equal to 4, mod is divided and then the remainder is returned, C is the memory of the interleaver, SF1 is all the spreading factors in the spreading factor range, and the spreading factor range is usually 6-12.
Second, the memory of the interleaver is divided by the code length of the original input data, and the obtained third remainder needs to be smaller than or equal to the first threshold. Generally, the data entering the interleaver is encoded. As described above, to make the memory of the interleaver approximate a multiple of the encoded length of the original input data, the first threshold value may preferably be 4, i.e., expressed as follows;
mod (C, CL) is less than or equal to 4, mod is divided and then the remainder is returned, C is the memory of the interleaver, and CL is the coding length of the original input data.
Third, the memory requirement of the interleaver is less than or equal to a second threshold. To reduce the storage space and processing delay, the memory of the interleaver should not be too large, and the second threshold value may preferably be 200, which is expressed by the following formula:
C≤200。
step S22, dividing the memory of the interleaver by the spreading factor needed currently to obtain a first remainder;
for example, i.e., the first remainder is calculated as:
mod (C, SF 2), mod is the division and then the remainder is returned, C is the memory of the interleaver, SF2 is the spreading factor currently needed. The spreading factor required is different in different scenarios, where the currently required spreading factor may be used.
And S23, subtracting the first remainder from the memory of the interleaver to obtain the interleaving depth.
For example, after obtaining the first remainder, the first remainder may be subtracted from the memory to obtain the interleaving depth.
Step S12, obtaining an interleaving step length;
specifically, after the original input data is received in step S11 described above, an interleaving step may be acquired. The interleaving step length refers to the distance that needs to be spanned during interleaving. For example, the interleaving step is 2, i.e., 2 distances from the 1 st bit data across 1-2 and 2-3, and then the 3 rd bit data is obtained. In the embodiment of the invention, a preferred interleaving step is provided, that is, the greatest common divisor of the interleaving step and all spreading factors in the spreading factor range is 1. Represented by the formula:
gcd (step_size, SF 1) =1, where gcd is the greatest common divisor, step_size is the interleaving step size, and SF1 is all spreading factors in the spreading factor range.
Step S13, starting from the first bit data of the original input data, taking the interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the original input data to obtain interleaved data;
specifically, reading starts from the first bit data of the original input data, then the next bit data reading is performed across the interleaving step, the round of reading is stopped until the reading cannot be performed across the interleaving step any more, and the next round of reading starts from the beginning (in order to avoid repetition, reading should start from the second bit data of the original input data), the above operation is repeated until all the data in the original input data are read. The read data are arranged according to the reading sequence, namely the interleaved data.
Step S14, outputting the interleaved data.
Specifically, the interleaved data is output, i.e., interleaving is completed.
Fig. 3 is a flowchart of a method for implementing a deinterleaver according to an embodiment of the present invention. As shown in fig. 3, the deinterleaver corresponds to the interleaver described above, and the method includes:
step S31, receiving the interleaved data;
in particular, the deinterleaver may receive the interleaved data output by the interleaver as described above.
Step S32, obtaining a de-interleaving step length;
specifically, the embodiment of the invention provides a determination mode of a de-interleaving step length of a de-interleaver corresponding to the above-mentioned interleaver. Specifically, the method is characterized by comprising the following steps: dividing the depth of the interleaver by the interleaving step length to obtain a fourth remainder; when the interleaved data is read in the first n rounds, dividing the depth of the interleaver by the interleaving step length and rounding and adding 1 as the de-interleaving step length, wherein n is equal to the fourth remainder; at the beginning of the n+1-th round of reading the interleaved data, the depth of the interleaver is divided by the interleaving step size and rounded up to be the de-interleaving step size.
Step S33, starting from the first bit data of the interleaved data, taking the de-interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the interleaved data to obtain the original input data;
specifically, the original input data is interleaved as described above, where the interleaved data is deinterleaved, reading is started from the first bit data of the interleaved data, then the next bit data reading is performed across the deinterleaving step, until the round of reading is stopped when the reading cannot be performed across the deinterleaving step any more, and the next round of reading is started from the beginning (in order to avoid repetition, reading should be started from the second bit data of the interleaved data), and the above operation is repeated until all the data in the interleaved data is read. And arranging the read data according to the reading sequence, namely the original input data.
And step S34, outputting the original input data.
Specifically, the original input data is output, i.e., the deinterleaving is completed.
For ease of understanding, the present invention also provides a specific example of interleaving and deinterleaving, as follows:
with a 4/7 hamming code (cl=7), all spreading factors sf1=6, 7,8,9, 10, 11, 12 in the spreading factor range, the memory 144 of the interleaver can be obtained, the depth 144 of the interleaver at the current spreading, thus sf2=9, and gcd (13, sf1) =1, thus the interleaving step size is 13. Assuming that the original input data is 144-bit data, the following is:
| 1 | 2 | 3 | 。。。 | 143 | 144 |
firstly, reading 1, according to interleaving compensation 13, the next read data is 14, so as to read, and the first round of read data is as follows:
| 1 | 14 | 27 | 。。。 | 131 | 144 |
after 144 is read, the next data to be read should be 157, but the interleaver does not have 157, so the second round of reading from scratch, the second round of reading data is:
| 2 | 15 | 28 | 。。。 | 119 | 132 |
in the manner described above, the data read for the third round is:
| 3 | 16 | 29 | 。。。 | 120 | 133 |
for simplicity, the data read from the fourth round to the twelfth round are not described herein.
The thirteenth round of data read is:
| 13 | 26 | 39 | 。。。 | 130 | 143 |
since all data in the original input data are read, the interleaved data are the data to be read arranged according to the reading sequence, so as to obtain 144-bit data:
| 1 | 14 | 。。。 | 。。。 | 130 | 143 |
the interleaved data may then be deinterleaved.
First, the depth 144 of the interleaver is divided by the step size 13 of the interleaver, resulting in 11 remainder 1. Therefore, at round 1, the de-interleaving step size is 11+1, and at round 2, the de-interleaving step size 11 is used.
Thus, the first round of de-interleaving reads:
| 1 | 2 | 3 | 。。。 | 12 | 13 |
the second round of de-interleaving is read to obtain:
| 14 | 15 | 16 | 。。。 | 25 | 26 |
the third deinterleaving is performed to obtain:
| 27 | 28 | 29 | 。。。 | 38 | 39 |
for simplicity, the data read by the fourth to tenth wheels are not described in detail herein.
The eleventh round of de-interleaving is read to obtain:
| 131 | 132 | 133 | 。。。 | 142 | 143 |
the twelfth round of de-interleaving is read to obtain:
| 144 |
since all the data in the interleaved data are read, the original input data is to arrange the read data according to the reading sequence, so as to obtain 144-bit data:
| 1 | 2 | 3 | 。。。 | 143 | 144 |
the interleaver, the deinterleaver and the method for performing the same have the following advantages:
1. the depth of the interleaver is selected properly, and the utilization rate of the storage space is high.
2. And the fixed interleaving step length is adopted for reading, so that the method is easy to realize.
3. The randomness of interleaving is good, and the performance gain of channel coding (such as Hamming code with 4/7 code rate) with 1-bit error correction capability can be obtained.
Fig. 4 is a block diagram of an interleaver according to an embodiment of the present invention. As shown in fig. 4, the interleaver includes: a first receiving unit 401, a first obtaining unit 402, an interleaving unit 403, and a first output unit 404, where the first receiving unit 401 is configured to receive original input data according to an interleaving depth; the first obtaining unit 402 is configured to obtain an interleaving step size; the interleaving unit 403 is configured to perform multiple non-repeated reading on all data in the original input data with the interleaving step size as an interval from the first bit data of the original input data, so as to obtain interleaved data; and the first output unit 404 is configured to output the interleaved data.
Preferably, the greatest common divisor of the interleaving step size and all the spreading factors in the spreading factor range is 1.
Preferably, the first receiving unit 401 is configured to: the original input data is received such that the length of the received original input data is less than or equal to the interleaving depth.
Preferably, the interleaving depth is determined by the following method: determining the memory of the interleaver; dividing the memory of the interleaver by the spreading factor needed at present to obtain a first remainder; and subtracting the remainder from the memory of the interleaver to obtain the interleaving depth.
Preferably, the memory of the interleaver satisfies the following condition: dividing the memory of the interleaver by all spreading factors in the spreading factor range to obtain a second remainder which is smaller than or equal to a first threshold; dividing the memory of the interleaver by the coding length of the original input data to obtain a third remainder smaller than or equal to the first threshold; the memory of the interleaver is less than or equal to a second threshold.
Fig. 5 is a block diagram of a deinterleaver according to an embodiment of the present invention. As shown in fig. 5, the deinterleaver corresponds to the above-described interleaver, and includes: a second receiving unit 501, a second obtaining unit 502, a de-interleaving unit 503, and a second output unit 504, wherein the second receiving unit 501 is configured to receive the interleaved data; the second obtaining unit 502 is configured to obtain a de-interleaving step size; the de-interleaving unit 503 is configured to perform multiple non-repeated reading on all data in the interleaved data, starting from the first bit data of the interleaved data, with the de-interleaving step size as an interval, so as to obtain the original input data; and the second output unit 504 is configured to output the original input data.
Preferably, the de-interleaving step is determined by: dividing the depth of the interleaver by the interleaving step length to obtain a fourth remainder; when the interleaved data is read in the first n rounds, dividing the depth of the interleaver by the interleaving step length and rounding and adding 1 as the de-interleaving step length, wherein n is equal to the fourth remainder; at the beginning of the n+1-th round of reading the interleaved data, the depth of the interleaver is divided by the interleaving step size and rounded up to be the de-interleaving step size.
The above-described embodiments of the interleaver and deinterleaver are similar to the embodiments of the method for performing the interleaver and the method for performing the deinterleaver described above, and are not described herein.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises an element.
The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and changes may be made to the present application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. which are within the spirit and principles of the present application are intended to be included within the scope of the claims of the present application.
Claims (14)
1. A method of performing an interleaver, the method comprising:
receiving original input data according to the interleaving depth;
obtaining an interleaving step length;
starting from the first bit data of the original input data, taking the interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the original input data to obtain interleaved data; and
the interleaved data is output.
2. The method of claim 1, wherein the greatest common divisor of the interleaving step size and all spreading factors in the spreading factor range is 1.
3. The method according to claim 1, wherein the receiving the original input data according to the interleaving depth comprises:
the original input data is received such that the length of the received original input data is less than or equal to the interleaving depth.
4. The method of executing an interleaver according to claim 1, wherein the interleaving depth is determined by:
determining the memory of the interleaver;
dividing the memory of the interleaver by the spreading factor needed at present to obtain a first remainder;
and subtracting the first remainder from the memory of the interleaver to obtain the interleaving depth.
5. The method of claim 4, wherein the memory of the interleaver satisfies the following condition:
dividing the memory of the interleaver by all spreading factors in the spreading factor range to obtain a second remainder which is smaller than or equal to a first threshold;
dividing the memory of the interleaver by the coding length of the original input data to obtain a third remainder which is smaller than or equal to the first threshold;
the memory of the interleaver is less than or equal to a second threshold.
6. A method of performing a deinterleaver, the deinterleaver corresponding to the interleaver of any one of claims 1-5, the method comprising:
receiving the interleaved data;
obtaining a de-interleaving step length;
starting from the first bit data of the interleaved data, taking the de-interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the interleaved data to obtain the original input data; and
outputting the original input data.
7. The method of performing a deinterleaver of claim 6 wherein said deinterleaving step size is determined by:
dividing the depth of the interleaver by the interleaving step length to obtain a fourth remainder;
using the depth of the interleaver divided by the interleaving step size and rounded and added by 1 as the de-interleaving step size of the first n rounds of reading the interleaved data, wherein n is equal to the fourth remainder;
at the beginning of the n+1-th round of reading the interleaved data, the depth of the interleaver is divided by the interleaving step size and rounded up to be the de-interleaving step size.
8. An interleaver, the interleaver comprising:
a first receiving unit, a first obtaining unit, an interleaving unit and a first output unit, wherein,
the first receiving unit is used for receiving original input data according to the interleaving depth;
the first acquisition unit is used for acquiring an interleaving step length;
the interleaving unit is used for starting from the first bit data of the original input data, taking the interleaving step length as an interval, and carrying out multiple-round non-repeated reading on all data in the original input data so as to obtain interleaved data; and
the first output unit is used for outputting the interleaved data.
9. The interleaver of claim 8, wherein a greatest common divisor of the interleaving step size and all spreading factors in the spreading factor range is 1.
10. The interleaver of claim 8, wherein the first receiving unit is configured to:
the original input data is received such that the length of the received original input data is less than or equal to the interleaving depth.
11. The interleaver of claim 8, wherein the interleaving depth is determined by:
determining the memory of the interleaver;
dividing the memory of the interleaver by the spreading factor needed at present to obtain a first remainder;
and subtracting the remainder from the memory of the interleaver to obtain the interleaving depth.
12. The interleaver of claim 11, wherein the interleaver memory satisfies the following condition:
dividing the memory of the interleaver by all spreading factors in the spreading factor range to obtain a second remainder which is smaller than or equal to a first threshold;
dividing the memory of the interleaver by the coding length of the original input data to obtain a third remainder which is smaller than or equal to the first threshold;
the memory of the interleaver is less than or equal to a second threshold.
13. A deinterleaver corresponding to the interleaver of any one of claims 1-5, comprising:
a second receiving unit, a second obtaining unit, a de-interleaving unit and a second output unit, wherein,
the second receiving unit is used for receiving the interleaved data;
the second acquisition unit is used for acquiring a de-interleaving step length;
the de-interleaving unit is used for starting from the first bit data of the interleaved data, taking the de-interleaving step length as an interval, and carrying out multiple rounds of non-repeated reading on all data in the interleaved data so as to obtain the original input data; and
the second output unit is used for outputting the original input data.
14. The deinterleaver of claim 13, wherein the deinterleaving step size is determined by:
dividing the depth of the interleaver by the interleaving step length to obtain a fourth remainder;
using the depth of the interleaver divided by the interleaving step size and rounded and added by 1 as the de-interleaving step size of the first n rounds of reading the interleaved data, wherein n is equal to the fourth remainder;
at the beginning of the n+1-th round of reading the interleaved data, the depth of the interleaver is divided by the interleaving step size and rounded up to be the de-interleaving step size.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111342269.4A CN114598419B (en) | 2021-11-12 | 2021-11-12 | Interleaver, deinterleaver, and methods of performing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111342269.4A CN114598419B (en) | 2021-11-12 | 2021-11-12 | Interleaver, deinterleaver, and methods of performing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114598419A CN114598419A (en) | 2022-06-07 |
| CN114598419B true CN114598419B (en) | 2023-08-01 |
Family
ID=81813821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111342269.4A Active CN114598419B (en) | 2021-11-12 | 2021-11-12 | Interleaver, deinterleaver, and methods of performing the same |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114598419B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115514379A (en) * | 2022-09-16 | 2022-12-23 | 深圳华海尖兵科技有限公司 | Method and device for improving robustness of short-wave data transmission |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06350575A (en) * | 1993-06-11 | 1994-12-22 | Fujitsu Ltd | Data communication protocol for mobile communication |
| KR20020036373A (en) * | 2000-11-09 | 2002-05-16 | 구자홍 | Data Rate Matching Method in 3GPP2 |
| CN1773896A (en) * | 2004-11-10 | 2006-05-17 | 北京三星通信技术研究有限公司 | Information channel interleaving device and method adapted to adaptive modulating system |
| CN101291313A (en) * | 2007-04-19 | 2008-10-22 | 华为技术有限公司 | Wireless signal transmitting method, system and mobile station |
| WO2017010655A1 (en) * | 2015-07-16 | 2017-01-19 | 엘지전자 주식회사 | Broadcast signal transmitting device, broadcast signal receiving device, broadcast signal transmitting method, and broadcast signal receiving method |
| CN106411467A (en) * | 2016-09-19 | 2017-02-15 | 深圳市锐能微科技股份有限公司 | Method and device for transmitting and receiving information based on chirp signal |
| CN107017975A (en) * | 2016-12-09 | 2017-08-04 | 中国电力科学研究院 | A kind of time-frequency diversity copy method based on OFDM |
| CN112152641A (en) * | 2020-09-28 | 2020-12-29 | Oppo广东移动通信有限公司 | Data interleaving method and device and data sending equipment |
| CN112398487A (en) * | 2020-12-14 | 2021-02-23 | 中科院计算技术研究所南京移动通信与计算创新研究院 | Implementation method and system for reducing complexity of Turbo parallel decoding |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6870821B2 (en) * | 2003-01-30 | 2005-03-22 | Nokia Corporation | Flexible layer overlay for seamless handovers between full rate and half rate channels |
| TWI226757B (en) * | 2003-11-11 | 2005-01-11 | Benq Corp | Address generator for block interleaving |
| US20060236045A1 (en) * | 2005-04-13 | 2006-10-19 | Analog Devices, Inc. | Apparatus for deinterleaving interleaved data using direct memory access |
| TWI569587B (en) * | 2015-02-06 | 2017-02-01 | 晨星半導體股份有限公司 | Convolutional de-interleaver |
| FR3037746B1 (en) * | 2015-06-19 | 2020-10-02 | Inst Mines Telecom | CONSTRUCTION PROCESS OF AN INTERLACER FOR TURBO-ENCODER |
-
2021
- 2021-11-12 CN CN202111342269.4A patent/CN114598419B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06350575A (en) * | 1993-06-11 | 1994-12-22 | Fujitsu Ltd | Data communication protocol for mobile communication |
| KR20020036373A (en) * | 2000-11-09 | 2002-05-16 | 구자홍 | Data Rate Matching Method in 3GPP2 |
| CN1773896A (en) * | 2004-11-10 | 2006-05-17 | 北京三星通信技术研究有限公司 | Information channel interleaving device and method adapted to adaptive modulating system |
| CN101291313A (en) * | 2007-04-19 | 2008-10-22 | 华为技术有限公司 | Wireless signal transmitting method, system and mobile station |
| WO2017010655A1 (en) * | 2015-07-16 | 2017-01-19 | 엘지전자 주식회사 | Broadcast signal transmitting device, broadcast signal receiving device, broadcast signal transmitting method, and broadcast signal receiving method |
| CN106411467A (en) * | 2016-09-19 | 2017-02-15 | 深圳市锐能微科技股份有限公司 | Method and device for transmitting and receiving information based on chirp signal |
| CN107017975A (en) * | 2016-12-09 | 2017-08-04 | 中国电力科学研究院 | A kind of time-frequency diversity copy method based on OFDM |
| CN112152641A (en) * | 2020-09-28 | 2020-12-29 | Oppo广东移动通信有限公司 | Data interleaving method and device and data sending equipment |
| CN112398487A (en) * | 2020-12-14 | 2021-02-23 | 中科院计算技术研究所南京移动通信与计算创新研究院 | Implementation method and system for reducing complexity of Turbo parallel decoding |
Non-Patent Citations (1)
| Title |
|---|
| 信道编码中交织器的盲识别;黄丽;谌稳固;黄雨佳;陈虹;;强激光与粒子束(第10期) * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114598419A (en) | 2022-06-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3996514B2 (en) | Buffer architecture for turbo decoder | |
| KR100860245B1 (en) | Method and apparatus for performing reverse rate matching in a cdma system | |
| EP0963049B1 (en) | Interleaving with golden section increments | |
| US6339834B1 (en) | Interleaving with golden section increments | |
| KR100955305B1 (en) | Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutationqpp interleave | |
| US8194782B2 (en) | Grouping bits interleaving apparatus and method thereof | |
| CN114598419B (en) | Interleaver, deinterleaver, and methods of performing the same | |
| CN101707490A (en) | Parallel Turbo code interleaving method | |
| CN109474373B (en) | Interleaving method and interleaving apparatus | |
| KR101022730B1 (en) | Turbo decoder with circular redundancy code signature comparison | |
| JP2004505489A (en) | Method and apparatus for combining puncturing and repetition of code codes in a communication system | |
| US7873897B2 (en) | Devices and methods for bit-level coding and decoding of turbo codes | |
| US9374109B2 (en) | QPP interleaver/DE-interleaver for turbo codes | |
| US10084486B1 (en) | High speed turbo decoder | |
| JP2009246474A (en) | Turbo decoder | |
| CN101336517A (en) | Apparatus and method for controlling an interleaver/deinterleaver memory in a mobile communication system | |
| EP1508972A1 (en) | Mobile telephone, apparatus, method, and program for calculating an interleave parameter | |
| EP3029871A1 (en) | Turbo coding and rate matching for communication terminal device | |
| US7480846B2 (en) | Iterative turbo decoder with single memory | |
| CN110784283B (en) | Method, device and decoding system for determining forward error correction frame boundary | |
| CN101373977B (en) | Apparatus and method for simultaneously performing maximum posteriori probability decoding interleaving and deinterleaving | |
| US9128888B2 (en) | Method and apparatus for turbo decoder memory collision resolution | |
| CN116566785B (en) | Communication method and system combining RS erasure code with frequency domain spread spectrum OFDM | |
| CN111211792B (en) | Turbo decoding method, device and system | |
| KR101614482B1 (en) | Apparatus and method for determining interleaved address of turbo interleaver |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |