CN114573909A

CN114573909A - Base material for mounting semiconductor wafer, dicing tape, and dicing die-bonding film

Info

Publication number: CN114573909A
Application number: CN202111420045.0A
Authority: CN
Inventors: 中浦宏; 宍户雄一郎; 杉村敏正; 高本尚英
Original assignee: Nitto Denko Corp
Current assignee: Nitto Denko Corp
Priority date: 2020-12-01
Filing date: 2021-11-26
Publication date: 2022-06-03
Also published as: TW202231487A; JP2022087595A; KR20220077083A

Abstract

The invention relates to a base material for mounting a semiconductor wafer, a dicing tape and a dicing die-bonding film. The base material for mounting a semiconductor wafer has an elongation at break of 300% or more at-15 ℃ and a strength at break of 20N or more at-15 ℃.

Description

Base material for mounting semiconductor wafer, dicing tape, and dicing die-bonding film

Technical Field

The invention relates to a base material for mounting a semiconductor wafer, a dicing tape and a dicing die-bonding film.

Background

Conventionally, there have been known: in the manufacture of semiconductor devices, dicing tapes and dicing die-bonding films are used to obtain semiconductor chips for die bonding.

The dicing tape includes a base material (base material for mounting a semiconductor wafer) and an adhesive layer laminated on the base material, and the dicing die-bonding film includes a die-bonding layer (die-bonding film) laminated on the adhesive layer of the dicing tape so as to be peelable.

As a method for obtaining a semiconductor chip (die) for die bonding by using the above-described dicing die bonding film, it is known to adopt, in patent document 1, a method including: a half-dicing step of forming grooves in a semiconductor wafer in order to process the semiconductor wafer into chips (chips) by a dicing process; a back grinding step of grinding the semiconductor wafer after the half-cutting step to reduce the thickness; a mounting step of attaching one surface (a surface on the opposite side to the circuit surface) of the semiconductor wafer after the back grinding step to the die bonding layer to fix the semiconductor wafer to a dicing tape; an expanding step of expanding the interval between the semiconductor chips subjected to the half-cut processing; a kerf maintaining step of maintaining the intervals between the semiconductor chips; and a pickup step of peeling the die bonding layer and the adhesive layer, and taking out the semiconductor chip in a state where the die bonding layer is attached.

In the expanding step, the die bonding layer is cut to a size corresponding to the size of the plurality of singulated semiconductor chips.

As a method for obtaining a semiconductor chip for die bonding by using the dicing tape and the dicing die-bonding film described above, the following patent document 2 discloses: by using a dicing tape having specific physical properties (a dicing tape having an initial elastic modulus at-10 ℃ of 200MPa to 380MPa and a Tan δ (loss modulus/storage modulus) at-10 ℃ of 0.080 to 0.3 inclusive) and performing the expanding step at a low temperature of-15 to 5 ℃, the ability to be cleaved (e.g., ease and uniformity of cleaving) from the semiconductor wafer to a plurality of semiconductor chips and the ability to be cleaved to a size corresponding to the size of the plurality of semiconductor chips attached to the chip bonding layer of the semiconductor wafer can be improved in the expanding step.

Documents of the prior art

Patent document

Patent document 1: japanese patent laid-open publication No. 2019-9203

Patent document 2: japanese laid-open patent publication (JP 2015-185591)

Disclosure of Invention

Problems to be solved by the invention

However, even when the dicing tape is configured as described in patent document 1, the die-bonding layer may not be sufficiently cut to a size corresponding to the size of the plurality of semiconductor chips in the expanding step.

In recent years, in order to achieve miniaturization of semiconductor devices which are increasingly demanded, the following methods are adopted: a mounting method called FOD (Film On chip) in which, when a plurality of semiconductor chips having a cleaved chip bonding layer are mounted On a wiring board via the chip bonding layer, one of the plurality of semiconductor chips is mounted On the wiring board via the chip bonding layer, and then a plurality of other semiconductor chips are mounted so as to overlap the one semiconductor chip in a plan view and be located higher than the one semiconductor chip, and the one semiconductor chip having the bonding layer is covered with the chip provided in the semiconductor chip located at the lowest position among the plurality of other semiconductor chips; a semiconductor chip mounted On a wiring board via a die bonding layer and Wire-bonded to the wiring board via the wiring board and bonding wires is mounted On the wiring board via the other die bonding layer in a state where all of the semiconductor chip and a part or all of the bonding wires are embedded in the other die bonding layer (in a state where they are embedded in the other die bonding layer).

Here, since the FOD has a relatively thick chip bonding layer covering one semiconductor chip mounted on the wiring board, the thickness of the chip bonding layer being about 100 μm to 140 μm, and the FOW has a relatively thick chip bonding layer covering all of the one semiconductor chip mounted on the semiconductor board and a part or all of the bonding wires, the thickness of the other chip bonding layer being about 40 μm to 80 μm, it is considered that the problem of the cuttability of the chip bonding layer in the extending step becomes greater.

From the above-described circumstances, a die-bonding layer exhibiting more sufficient cuttability is desired in the expansion step, but it cannot be said that the investigation thereof is sufficient.

In addition, in the extension step, the base material may be damaged.

The above-described problems occur similarly in all cases where the above-described expanding step is employed in the method of obtaining a semiconductor chip for die bonding using the above-described dicing die-bonding film.

Accordingly, an object of the present invention is to provide a base material for mounting a semiconductor wafer, which is less likely to be damaged in a spreading step and can sufficiently cleave a die bonding layer, and a dicing tape and a dicing die bonding film each including the base material for mounting a semiconductor wafer.

Means for solving the problems

The base material for mounting a semiconductor wafer has an elongation at break of 300% or more at-15 ℃ and a strength at break of 20N or more at-15 ℃.

The substrate for mounting a semiconductor wafer preferably has at least one layer containing an elastomer resin.

In the semiconductor wafer mounting substrate, the elastomer resin is preferably an olefin elastomer resin.

The substrate for mounting a semiconductor wafer preferably has a thickness of 90 μm or more and 130 μm or less.

The dicing tape of the present invention comprises: a substrate and an adhesive layer laminated on the substrate,

the substrate is the substrate for mounting a semiconductor wafer according to any one of the above.

The dicing die-bonding film of the present invention comprises: a dicing tape in which an adhesive layer is laminated on a base material; and a die bonding layer laminated on the adhesive layer of the dicing tape,

Drawings

Fig. 1 is a sectional view showing a constitution of a dicing tape according to an embodiment of the present invention.

Fig. 2 is a cross-sectional view showing a structure of a dicing die-bonding film according to an embodiment of the present invention.

Fig. 3A is a sectional view schematically showing the case of half-cut processing in the manufacturing method of a semiconductor integrated circuit.

Fig. 3B is a sectional view schematically showing the case of half-cut processing in the manufacturing method of a semiconductor integrated circuit.

Fig. 3C is a sectional view schematically showing a case of back grinding processing in the manufacturing method of the semiconductor integrated circuit.

Fig. 3D is a sectional view schematically showing a case of back grinding processing in the manufacturing method of the semiconductor integrated circuit.

Fig. 4A is a cross-sectional view schematically showing a case of a mounting process in a method of manufacturing a semiconductor integrated circuit.

Fig. 4B is a sectional view schematically showing a case of a mounting process in the manufacturing method of the semiconductor integrated circuit.

Fig. 5A is a cross-sectional view schematically showing a case of an extended process at a low temperature in the manufacturing method of the semiconductor integrated circuit.

Fig. 5B is a sectional view schematically showing a case of an extended process at a low temperature in the manufacturing method of the semiconductor integrated circuit.

Fig. 5C is a cross-sectional view schematically showing a case of an extended process at a low temperature in the manufacturing method of the semiconductor integrated circuit.

Fig. 6A is a cross-sectional view schematically showing a case of an expansion process at normal temperature in the method for manufacturing a semiconductor integrated circuit.

Fig. 6B is a cross-sectional view schematically showing a case of an expansion process at normal temperature in the method of manufacturing a semiconductor integrated circuit.

Fig. 7 is a cross-sectional view schematically showing a dicing maintenance step in the method of manufacturing a semiconductor integrated circuit.

Fig. 8 is a sectional view schematically showing a case of a pickup process in the manufacturing method of the semiconductor integrated circuit.

Description of the reference numerals

1 base material

2 adhesive layer

3 chip bonding layer

10 cutting belt

20-dicing die-bonding film

G back side grinding belt

H-holding tool

J adsorbs tool

P pin component

R cutting ring

T-wafer processing tape

U jack-up component

W semiconductor wafer

Detailed Description

Hereinafter, an embodiment of the present invention will be described.

[ base material for mounting semiconductor wafer ]

The semiconductor wafer mounting base material of the present embodiment has an elongation at break of 300% or more at-15 ℃ and a breaking strength of 20N or more at-15 ℃.

As described later, the semiconductor wafer mounting substrate of the present embodiment is used as a substrate for a dicing tape and a dicing die-bonding film, which are used as a manufacturing aid for manufacturing a semiconductor integrated circuit.

The semiconductor wafer according to the present embodiment has the structure described above, and therefore the semiconductor wafer mounting base material is less likely to be broken in the expanding process (expanding process in the case of manufacturing a semiconductor using a dicing tape and a dicing die bonding film as a manufacturing aid) and the die bonding layer (the die bonding layer disposed on the semiconductor wafer mounting base material) can be sufficiently cleaved.

In the case where the semiconductor wafer and the die bond layer attached to the semiconductor wafer are cleaved to obtain a plurality of semiconductor chips and the die bond layer is singulated to a size corresponding to the size of the plurality of semiconductor chips, it is preferable that the semiconductor wafer mounting base material in the dicing tape is sufficiently stretched (stretched) in a stretching step (for example, stretching at a low temperature (for example, -15 ℃) in order to sufficiently increase the interval between adjacent semiconductor chips and between the singulated die bond layers.

On the other hand, as described above, when the semiconductor wafer mounting base material is elongated in the expanding step, it is necessary to suppress damage to the semiconductor wafer mounting base material and to sufficiently cut the chip bonding layer disposed on the semiconductor wafer mounting base material.

From such a viewpoint, it is considered that the semiconductor wafer mounting base material needs to have appropriate elasticity, appropriate hardness, and easy and appropriate stress application.

Further, the present inventors considered that: the semiconductor wafer mounting base material of the present embodiment has an elongation at break of 300% or more at-15 ℃ and a breaking strength of 20N or more at-15 ℃, that is, has both an appropriate value as a value of the elongation at break at-15 ℃ and an appropriate value as a value of the breaking strength at-15 ℃, and therefore has appropriate hardness in addition to appropriate elasticity, and is easy to apply appropriate stress, so that it is possible to suppress breakage of the semiconductor wafer mounting base material and sufficiently sever the chip bonding layer disposed on the semiconductor wafer mounting base material.

By appropriately setting the material constituting the base material for mounting a semiconductor wafer, the layer structure of the base material for mounting a semiconductor wafer, the thickness of the base material for mounting a semiconductor wafer, and the like, or by appropriately adjusting the ratio of a plurality of materials constituting the base material for mounting a semiconductor wafer, the base material for mounting a semiconductor wafer can have an elongation at break at-15 ℃ of 300% or more and a strength at break at-15 ℃ of 20N or more.

The elongation at break at-15 ℃ and the strength at break at-15 ℃ can be determined as follows.

As for the elongation at break, in detail, the length is 120mm (measurement length. L)₀) The test piece was stretched in the longitudinal direction using a tensile tester (Autograph AG-IS, Shimadzu corporation) at a temperature of-15 ℃, a distance between chucks of 50mm, and a stretching speed of 1000 mm/min, and the length (L) of the test piece at break was measured₁)。

Then, the elongation at break E at-15 ℃ was calculated based on the following formula.

Elongation at break E ═ L₁-L₀)/L₀×100

The breaking strength can be determined by measuring the force applied when the test piece is broken when the test piece and the tensile tester are used to perform a tensile test under the same conditions as described above.

The base material for mounting a semiconductor wafer of the present embodiment includes a resin. Examples of the resin contained in the semiconductor wafer mounting substrate include polyolefin resins, polyester resins, polyurethane resins, polycarbonate resins, polyether ether ketone resins, polyimide resins, polyetherimide resins, polyamide resins, wholly aromatic polyamide resins, polyvinyl chloride resins, polyvinylidene chloride, polyphenylene sulfide, fluorine resins, cellulose resins, silicone resins, EVA resins (ethylene vinyl acetate copolymer resins), ionomer resins, and elastomers.

The semiconductor wafer mounting substrate of the present embodiment may contain 1 kind of the resin, or may contain 2 or more kinds.

When the adhesive layer laminated on the semiconductor wafer mounting substrate contains an ultraviolet curable adhesive as described later, the semiconductor wafer mounting substrate is preferably configured to have ultraviolet transparency.

The substrate for mounting a semiconductor wafer according to the present embodiment preferably contains an EVA resin or an elastomer among the above resins, and more preferably contains an elastomer.

Examples of the elastomer resin include various known elastomer resins such as styrene elastomer resins, olefin elastomer resins, polyester elastomer resins, and polyurethane elastomer resins.

Among these, olefinic elastomer resins are preferably used, and among olefinic elastomer resins, propylene elastomer resins are preferably used.

Examples of commercially available propylene elastomer resins include Vistamaxx 3980 manufactured by ExxonMobil Chemical.

The substrate for mounting a semiconductor wafer according to the present embodiment may have a single-layer structure or a laminated structure, and in the case of a laminated structure, it preferably has a layer containing an elastomer resin (hereinafter referred to as an elastomer layer) or a layer containing an EVA resin having a vinyl acetate content of 20 mass% or more (hereinafter referred to as a 1 st EVA resin), and among these, it is more preferable to have an elastomer layer.

When the semiconductor wafer mounting substrate of the present embodiment has a single-layer structure, the semiconductor wafer mounting substrate preferably contains an EVA resin, and the EVA resin preferably contains an EVA resin having a vinyl acetate content of 10 mass%.

The vinyl acetate content of the EVA resin may be in accordance with JIS K7192: 1999 for measurement.

Examples of the 1 st EVA resin include DOW-MITSUI POLYCHEMICALS CO., and Evaflex (registered trademark) EV250 manufactured by LTD.

The substrate for mounting a semiconductor wafer may be obtained by non-stretch forming or stretch forming, but is preferably obtained by stretch forming.

The elastomer layer contains an elastomer resin. The elastomer layer preferably contains an EVA resin having a vinyl acetate content of more than 10 mass% and 30 mass% or less (hereinafter, referred to as "2 nd EVA resin") in addition to the elastomer resin.

Since the elastomer layer contains the elastomer resin and the 2 nd EVA resin, the thermal shrinkage of the elastomer layer is relatively high, and therefore, in the dicing maintenance step described later, the dicing can be maintained well, the strength is high, and the semiconductor wafer can be cut well.

When the elastomer layer includes the elastomer resin and the 2 nd EVA resin, the elastomer resin preferably includes 50 mass% or more and 90 mass% or less, and more preferably 60 mass% or more and 80 mass% or less.

The 2 nd EVA resin is preferably contained in an amount of 10 mass% to 50 mass%, more preferably 20 mass% to 40 mass%.

Further, the ratio of the mass of the elastomer resin to the mass of the 2 nd EVA resin (2 nd EVA resin/elastomer resin) W₁Preferably 0.1 or more, more preferably 0.25 or more. In addition, W₁Preferably 1.0 or less, more preferably 0.67 or less.

Commercially available EVA resins of item 2 include DOW-MITSUI POLYCHEMICALS CO., and Evaflex (registered trademark) P1007 manufactured by LTD.

When the semiconductor wafer mounting base material has a laminated structure, the semiconductor wafer mounting base material may be configured by laminating a plurality of elastomer layers, or may be configured to include an elastomer layer and a layer containing no elastomer resin (hereinafter referred to as an "inelastic layer").

In the present specification, the elastic layer means a low elastic modulus layer having a lower tensile storage modulus at room temperature (23 ℃) than the non-elastic layer. The elastic layer has a tensile storage modulus at room temperature of 10MPa to 100MPa, and the non-elastic layer has a tensile storage modulus at room temperature of 200MPa to 500 MPa.

The tensile storage modulus at room temperature is a value measured in the following manner.

Specifically, the tensile storage modulus of a thin film having a length of 40mm and a width of 10mm as a test piece can be measured at a temperature ranging from-50 ℃ to 100 ℃ under the conditions of a frequency of 1Hz, a strain amount of 0.1%, a temperature rise rate of 10 ℃/min and a distance between chucks of 22.5mm using a solid viscoelasticity measuring apparatus (for example, model RSAIII, manufactured by Rheometric Scientific Co., Ltd.). At this time, the tensile storage modulus at room temperature can be determined by reading the value at room temperature (23 ℃).

The measurement is performed by stretching the test piece in the MD direction (resin flow direction).

In the configuration in which a plurality of the elastomer layers are laminated, the elastomer layers are preferably laminated in 2 or more layers, and particularly preferably laminated in 3 layers.

In the structure in which 2 layers of the above-described elastomer layer are laminated, the ratio (2 nd layer/1 st layer) T between the layer thickness of the layer (hereinafter referred to as 1 st layer) which is the outer layer in the wound and stored state and the layer thickness of the layer (hereinafter referred to as 2 nd layer) which is the inner layer in the wound and stored state₁Preferably 5 or more, more preferably 10 or more. In addition, T₁Preferably 30 or less, more preferably 20 or less.

In addition, in the laminated structure of 3 layers of the elastomer layer, will be wound and storedWhen the innermost layer (layer opposite to the side of the 2 nd layer on which the 1 st layer is laminated) is the 3 rd layer in the state (1), the ratio (2 nd layer/3 rd layer) T of the layer thickness of the 3 rd layer to the layer thickness of the 2 nd layer is₃Preferably 5 or more, more preferably 7 or more. In addition, T₃Preferably 20 or less, more preferably 15 or less.

Further, in such a three-layer structure, the ratio (2 nd layer/1 st layer) T of the layer thickness of the 1 st layer to the layer thickness of the 2 nd layer₂Preferably 5 or more, more preferably 7 or more. In addition, T₂Preferably 20 or less, more preferably 15 or less.

In the configuration in which 2 or more layers of the elastomer layer are laminated, the outermost layer (the 1 st layer) that is outermost in the wound and stored state preferably contains an antistatic agent. By including the antistatic agent in the outermost layer, the aforementioned electrification of the outermost layer can be suppressed.

The innermost layer (the 3 rd layer in the case of a three-layer structure) which is the innermost layer in the wound and stored state may contain an antistatic agent.

The outermost layer preferably contains the antistatic agent in an amount of 10 mass% or more, more preferably 20 mass% or more, based on the total mass of the resins contained in the outermost layer.

In addition, the antistatic agent is preferably contained in the outermost layer by 40 mass% or less, more preferably 30 mass% or less, with respect to the total mass of the resin contained in the outermost layer.

Further, when the innermost layer contains an antistatic agent, the antistatic agent is preferably contained at the same mass ratio as described above.

In the configuration including the elastomer layer and the non-elastomer layer, the non-elastomer layer preferably includes a polypropylene resin (hereinafter, referred to as a metallocene PP resin) as a polymerization product based on a metallocene catalyst. As the metallocene PP resin, a propylene/α -olefin copolymer as a polymerization product of a metallocene catalyst can be cited.

As a commercial product of the metallocene PP resin, for example, WINTEC WXK1223 manufactured by Japan Polypropylene Corporation can be cited.

The aforementioned non-elastic body layer may contain an ionomer resin. By including the ionomer resin in the non-elastic layer, the elasticity and flexibility of the non-elastic layer in a low temperature region are improved.

When the non-elastomer layer contains the metallocene PP resin and the ionomer resin, the content of the metallocene PP resin is preferably 50 mass% or more and 90 mass% or less, and more preferably 60 mass% or more and 80 mass% or less.

The ionomer resin is preferably contained in an amount of 10 mass% or more and 50 mass% or less, more preferably 20 mass% or more and 40 mass% or less.

Further, the ratio of the mass of metallocene PP resin to the mass of ionomer resin (ionomer resin/metallocene PP resin) W₂Preferably 0.1 or more, more preferably 0.25 or more.

In addition, W₂Preferably 1.0 or less, more preferably 0.67 or less.

Here, the metallocene catalyst is a catalyst comprising: a transition metal compound of group 4 of the periodic table (so-called metallocene compound) containing a ligand having a cyclopentadiene skeleton and a cocatalyst which reacts with the metallocene compound to activate the metallocene compound into a stable ionic state, and if necessary, an organoaluminum compound. The metallocene compound is a crosslinked metallocene compound capable of achieving stereoregular polymerization of propylene.

Among the propylene/α -olefin copolymers as the polymerization product of the metallocene catalyst, the propylene/α -olefin random copolymer as the polymerization product of the metallocene catalyst is preferred, and among the propylene/α -olefin random copolymers as the polymerization product of the metallocene catalyst, the propylene/α -olefin random copolymer as the polymerization product of the metallocene catalyst is preferably selected from the propylene/α -olefin random copolymer having 2 carbon atoms, the propylene/α -olefin random copolymer having 4 carbon atoms as the polymerization product of the metallocene catalyst, and the propylene/α -olefin random copolymer having 5 carbon atoms as the polymerization product of the metallocene catalyst, and among these, the propylene/ethylene random copolymer as the polymerization product of the metallocene catalyst is most suitable.

In the case where the semiconductor wafer mounting base material has a laminated structure of an elastomer layer and an inelastic layer, the semiconductor wafer mounting base material is preferably obtained by coextrusion molding in which a resin constituting the elastomer layer and a resin serving as the inelastic layer are coextruded to form a laminated structure of the elastomer layer and the inelastic layer.

As the coextrusion molding, any appropriate coextrusion molding usually performed in the production of films, sheets, and the like can be employed. In the coextrusion molding, the blow molding method and the coextrusion T-die method are preferably used in order to obtain the semiconductor wafer mounting substrate efficiently.

In the case where the semiconductor wafer mounting substrate having a laminated structure is obtained by coextrusion molding, the elastomer layer and the nonelastomer layer are in contact with each other in a heated and molten state, and therefore, it is preferable that the difference in melting point between the resin contained in the elastomer layer and the resin contained in the nonelastomer layer is small.

As described above, by reducing the difference in melting point between the resin contained in the elastic layer and the resin contained in the inelastic layer, excessive heating of the resin having a low melting point among these resins can be suppressed, and thus the thermal degradation of the resin having a low melting point and the formation of by-products can be suppressed. In addition, it is possible to prevent a lamination failure from occurring between the elastic body layer and the inelastic body layer due to an excessive decrease in viscosity of the low-melting-point resin. The difference in melting point between the resin contained in the elastomer layer and the resin contained in the non-elastomer layer is preferably 0 ℃ or more and 70 ℃ or less, and more preferably 0 ℃ or more and 55 ℃ or less.

The melting points of the resin contained in the elastomer layer and the resin contained in the non-elastomer can be measured by Differential Scanning Calorimetry (DSC) analysis. For example, the peak temperature of the endothermic peak can be measured by measuring the peak temperature by heating to 200 ℃ at a heating rate of 5 ℃ per minute under a nitrogen gas flow using a differential scanning calorimeter apparatus (model DSC Q2000, manufactured by TA INSTRUMENTS INC.).

When the elastomer layer and the non-elastomer layer contain a plurality of resins, a differential scanning calorimeter is used to measure the melting point of the resin contained in the elastomer layer or the melting point of the resin contained in the non-elastomer layer, and a plurality of peaks corresponding to the respective resins are detected. In this case, the peak temperature of 2 resins having the largest difference in melting point is regarded as the difference in melting point.

The thickness of the substrate for mounting a semiconductor wafer of the present embodiment is preferably 55 μm or more and 195 μm or less, more preferably 70 μm or more and 150 μm or less, and particularly preferably 90 μm or more and 130 μm or less.

By setting the thickness of the semiconductor wafer mounting base material to 90 μm or more and 130 μm or less, the semiconductor wafer mounting base material is less likely to be broken and the die bonding layer (the die bonding layer disposed on the semiconductor wafer mounting base material) can be more sufficiently cut in the step of elongating the semiconductor wafer mounting base material (the expanding step and the picking-up step in the case of manufacturing a semiconductor using a dicing tape and a dicing die bonding film as manufacturing aids).

The thickness of the semiconductor wafer mounting base material can be determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

[ cutting band ]

Next, the dicing tape 10 of the present embodiment will be described with reference to fig. 1. In the description of the dicing tape 10, the description of the portion overlapping with the semiconductor wafer mounting base material will not be repeated.

As shown in fig. 1, the dicing tape 10 of the present embodiment includes a base material 1 and an adhesive layer 2 laminated on the base material 1.

That is, in the dicing tape 10 of the present embodiment, the base material 1 supports the adhesive layer 2.

In the dicing tape 10 of the present embodiment, the base material 1 is the base material for mounting a semiconductor wafer of the present embodiment.

As described above, the semiconductor wafer mounting substrate of the present embodiment has an elongation at break of 300% or more at-15 ℃ and a breaking strength of 20N or more at-15 ℃.

Further, the thickness of the substrate for mounting a semiconductor wafer is preferably 90 μm or more and 130 μm or less.

The adhesive layer 2 contains an adhesive. The adhesive layer 2 is held by bonding a semiconductor wafer for singulation into semiconductor chips.

As the adhesive, there can be mentioned one in which the adhesive strength can be reduced by an external action during the use of the dicing tape 10 (hereinafter referred to as an adhesion-reducing adhesive).

When the adhesion-reducing adhesive is used as the adhesive, the state in which the adhesive layer 2 exhibits a high adhesive force (hereinafter referred to as a high-adhesion state) and the state in which the adhesive layer exhibits a low adhesive force (hereinafter referred to as a low-adhesion state) can be distinguished from each other during the use of the dicing tape 10. For example, when a semiconductor wafer attached to the dicing tape 10 is subjected to dicing, a highly adhesive state is used in order to suppress the plurality of semiconductor chips singulated by the dicing of the semiconductor wafer from floating or peeling from the adhesive layer 2. In contrast, after the semiconductor wafer is cut, a low adhesion state is used to easily pick up the plurality of singulated semiconductor chips from the adhesive layer 2.

Examples of the adhesion-reducing adhesive include adhesives that can be cured by irradiation with radiation during use of the dicing tape 10 (hereinafter, referred to as radiation-curable adhesives).

Examples of the radiation-curable pressure-sensitive adhesive include pressure-sensitive adhesives of a type that is cured by irradiation with electron beams, ultraviolet rays, alpha rays, beta rays, gamma rays, or X rays. Among these, an adhesive that is cured by ultraviolet irradiation (ultraviolet-curable adhesive) is preferably used.

Examples of the radiation curing adhesive include an additive-type radiation curing adhesive including: a base polymer such as an acrylic polymer, and a radiation-polymerizable monomer component or a radiation-polymerizable oligomer component having a functional group such as a radiation-polymerizable carbon-carbon double bond.

The acrylic polymer may be an acrylic polymer containing a monomer unit derived from a (meth) acrylate ester. Examples of the (meth) acrylate include alkyl (meth) acrylates, cycloalkyl (meth) acrylates, and aryl (meth) acrylates.

The adhesive layer 2 may contain an external crosslinking agent. As the external crosslinking agent, any crosslinking agent may be used as long as it can react with the acrylic polymer as the base polymer to form a crosslinked structure. Examples of such external crosslinking agents include polyisocyanate compounds, epoxy compounds, polyol compounds, aziridine compounds, and melamine crosslinking agents.

Examples of the radiation-polymerizable monomer component include urethane (meth) acrylate, trimethylolpropane tri (meth) acrylate, pentaerythritol tetra (meth) acrylate, dipentaerythritol monohydroxypenta (meth) acrylate, dipentaerythritol hexa (meth) acrylate, and 1, 4-butanediol di (meth) acrylate. Examples of the radiation-polymerizable oligomer component include various oligomers such as urethane type, polyether type, polyester type, polycarbonate type, and polybutadiene type. The content ratio of the radiation polymerizable monomer component and the radiation polymerizable oligomer component in the radiation curing pressure-sensitive adhesive may be selected within a range in which the pressure-sensitive adhesive property of the pressure-sensitive adhesive layer 2 is appropriately reduced.

The radiation-curable adhesive preferably contains a photopolymerization initiator. Examples of the photopolymerization initiator include α -ketol compounds, acetophenone compounds, benzoin ether compounds, ketal compounds, aromatic sulfonyl chloride compounds, photoactive oxime compounds, benzophenone compounds, thioxanthone compounds, camphorquinone, halogenated ketones, acylphosphine oxides, and acylphosphonates.

The pressure-sensitive adhesive layer 2 may further contain a crosslinking accelerator, a tackifier, an anti-aging agent, a pigment, a colorant such as a dye, and the like in addition to the above components.

The thickness of the pressure-sensitive adhesive layer 2 is preferably 1 μm or more and 50 μm or less, more preferably 2 μm or more and 45 μm or less, and further preferably 5 μm or more and 40 μm or less.

The thickness of the adhesive layer 2 can be determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

[ dicing die-bonding film ]

Next, the dicing die-bonding film 20 according to the present embodiment will be described with reference to fig. 2. In the description of dicing the die-bonding film 20, the description of the portion overlapping with the semiconductor wafer mounting substrate and the dicing tape 10 will not be repeated.

As shown in fig. 2, the dicing die-bonding film 20 of the present embodiment includes: a dicing tape 10 having a pressure-sensitive adhesive layer 2 laminated on a substrate 1, and a chip bonding layer 3 laminated on the pressure-sensitive adhesive layer 2 of the dicing tape 10.

That is, in the dicing die-bonding film 20 of the present embodiment, the base material 1 supports the adhesive layer 2 and the die-bonding layer 3.

In the dicing die-bonding film 20 of the present embodiment, a semiconductor wafer is attached to the die-bonding layer 3.

In the dicing of the semiconductor wafer using the dicing die-bonding film 20, the die-bonding layer 3 is also diced together with the semiconductor wafer. The die bonding layer 3 is cut into a size corresponding to the size of the plurality of singulated semiconductor chips. This can provide a semiconductor chip with the chip bonding layer 3.

The die bonding layer 3 is preferably thermosetting. By including at least one of a thermosetting resin and a thermoplastic resin having a thermosetting functional group in the chip bonding layer 3, thermosetting properties can be imparted to the chip bonding layer 3.

When the chip bonding layer 3 contains a thermosetting resin, examples of such thermosetting resin include epoxy resin, phenol resin, amino resin, unsaturated polyester resin, polyurethane resin, silicone resin, and thermosetting polyimide resin. Among these, epoxy resins are preferably used.

Examples of the epoxy resin include bisphenol a type, bisphenol F type, bisphenol S type, brominated bisphenol a type, hydrogenated bisphenol a type, bisphenol AF type, biphenyl type, naphthalene type, fluorene type, phenol novolac type, o-cresol novolac type, trishydroxyphenylmethane type, tetraphenolethane type, hydantoin type, triglycidyl isocyanurate type, and glycidyl amine type epoxy resins.

Examples of the phenolic resin as a curing agent for the epoxy resin include novolak type phenolic resins, resol type phenolic resins, and polyoxystyrenes such as polyoxystyrenes.

When the chip bonding layer 3 contains a thermoplastic resin having a thermosetting functional group, examples of such thermoplastic resins include acrylic resins having a thermosetting functional group. As the acrylic resin in the thermosetting functional group-containing acrylic resin, an acrylic resin containing a monomer unit derived from a (meth) acrylate ester can be cited.

In the thermosetting resin having a thermosetting functional group, a curing agent is selected according to the kind of the thermosetting functional group.

The die bonding layer 3 may contain a thermal curing catalyst from the viewpoint of sufficiently advancing the curing reaction of the resin component or increasing the curing reaction rate. Examples of the thermosetting catalyst include imidazole compounds, triphenylphosphine compounds, amine compounds, and trihaloborane compounds.

The chip bonding layer 3 may contain a thermoplastic resin. The thermoplastic resin functions as a binder. Examples of the thermoplastic resin include natural rubber, butyl rubber, isoprene rubber, chloroprene rubber, an ethylene-vinyl acetate copolymer, an ethylene-acrylic acid ester copolymer, a polybutadiene resin, a polycarbonate resin, a thermoplastic polyimide resin, a polyamide resin such as polyamide 6 or polyamide 6, a phenoxy resin, an acrylic resin, a saturated polyester resin such as PET or PBT, a polyamideimide resin, and a fluororesin. The thermoplastic resin may be used alone or in combination of two or more. The thermoplastic resin is preferably an acrylic resin from the viewpoint of being less in ionic impurities, having high heat resistance, and easily ensuring connection reliability by the chip bonding layer.

The acrylic resin is preferably a polymer containing a monomer unit derived from a (meth) acrylate ester as the largest monomer unit in mass proportion. Examples of the (meth) acrylate include alkyl (meth) acrylates, cycloalkyl (meth) acrylates, and aryl (meth) acrylates. The acrylic resin may contain a monomer unit derived from other components copolymerizable with the (meth) acrylate ester. Examples of the other components include carboxyl group-containing monomers, acid anhydride monomers, hydroxyl group-containing monomers, glycidyl group-containing monomers, sulfonic acid group-containing monomers, phosphoric acid group-containing monomers, functional group-containing monomers such as acrylamide and acrylonitrile, and various polyfunctional monomers. From the viewpoint of achieving high cohesive force at the die attach layer, the acrylic resin is preferably a copolymer of a (meth) acrylate (particularly, an alkyl (meth) acrylate having an alkyl group of 4 or less carbon atoms) and a carboxyl group-containing monomer, a nitrogen atom-containing monomer, and a polyfunctional monomer (particularly, a polyglycidyl-based polyfunctional monomer), and more preferably a copolymer of ethyl acrylate and butyl acrylate, and acrylic acid and acrylonitrile and polyglycidyl (meth) acrylate.

The chip bonding layer 3 may contain 1 or 2 or more kinds of other components as necessary. Examples of the other components include a flame retardant, a silane coupling agent, and an ion scavenger.

The thickness of the chip bonding layer 3 is not particularly limited, and is, for example, 1 μm or more and 180 μm or less. The thickness may be 20 μm or more and 160 μm or less, or 40 μm or more and 140 μm or less.

The thickness of the chip bonding layer 3 can be determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

The dicing die-bonding film 20 of the present embodiment can be used as an auxiliary tool for manufacturing a semiconductor integrated circuit, for example. A specific example of the use of the dicing die-bonding film 20 will be described below.

An example using the dicing die-bonding film 20 in which the base material 1 is one layer will be described below.

The method of manufacturing a semiconductor integrated circuit has: a half-cut step of forming a groove in a semiconductor wafer in order to process the semiconductor wafer into process chips (chips) by a cleaving process; a back grinding step of grinding the semiconductor wafer after the half-cutting step to reduce the thickness; a mounting step of attaching one surface (a surface on the opposite side of the circuit surface) of the semiconductor wafer after the back grinding step to the die bonding layer 3 to fix the semiconductor wafer to the dicing tape 10; an expanding step of expanding the interval between the semiconductor chips subjected to the half-cut processing; a kerf maintaining step of maintaining the intervals between the semiconductor chips; a pickup step of peeling the chip bonding layer 3 and the adhesive layer 2, and taking out the semiconductor chip (chip) with the chip bonding layer 3 attached; and a die bonding step of bonding the semiconductor chip (chip) with the die bonding layer 3 attached thereto to an adherend. In performing these steps, the dicing die bonding film 20 of the present embodiment is used as a manufacturing aid.

In the half-cut step, as shown in fig. 3A and 3B, half-cut processing for cutting the semiconductor integrated circuit into small pieces (die) is performed. Specifically, the wafer processing tape T is attached to the surface of the semiconductor wafer W opposite to the circuit surface (see fig. 3A). Further, the dicing ring R is attached to the wafer processing tape T (see fig. 3A). The dividing grooves are formed in a state where the wafer processing tape T is attached (see fig. 3B). In the back grinding step, the semiconductor wafer is ground to be reduced in thickness as shown in fig. 3C and 3D. Specifically, the back grinding tape G is attached to the surface having the grooves formed therein, and the wafer processing tape T that has been attached first is peeled off (see fig. 3C). The semiconductor wafer W is ground while the back grinding tape G is attached until the semiconductor wafer W has a predetermined thickness (see fig. 3D).

In the mounting step, as shown in fig. 4A to 4B, after the dicing ring R is mounted on the adhesive layer 2 of the dicing tape 10, the semiconductor wafer W subjected to the half-dicing process is attached to the exposed surface of the chip bonding layer 3 (see fig. 4A). Then, the back-grinding tape G is peeled from the semiconductor wafer W (see fig. 4B).

In the expanding step, as shown in fig. 5A to 5C, the cutting ring R is fixed to the holder H of the expanding device. The dicing die-bonding film 20 is lifted from the lower side by using a lifting member U provided in the spreading device, whereby the dicing die-bonding film 20 is stretched so as to spread in the plane direction (see fig. 5B). Thus, the semiconductor wafer W subjected to the half-cut process is cut under a specific temperature condition. The temperature is, for example, -15 to 25 ℃, preferably-15 to 10 ℃, and more preferably-15 to 0 ℃. The expanded state is released by lowering the jack-up member U (see fig. 5C).

Further, in the expanding step, as shown in fig. 6A to 6B, the cut tape 10 is stretched under a higher temperature condition (for example, 20 to 50 ℃, preferably 30 to 50 ℃, and more preferably 40 to 50 ℃) to expand the area. Thus, the adjacent semiconductor chips that have been cut are pulled apart in the planar direction of the film surface, and the gap is further widened.

Here, in the dicing die-bonding film 20 of the present embodiment, the semiconductor wafer-mounting base material of the present embodiment is used as the base material 1, and the semiconductor wafer-mounting base material has a breaking elongation at-15 ℃ of 300% or more and a breaking strength at-15 ℃ of 20N or more, and therefore, the semiconductor wafer-mounting base material is less likely to be broken in the expanding step, and the die-bonding layer 3 can be sufficiently cleaved.

Further, by providing the semiconductor wafer mounting base material with one layer containing an elastomer resin, the semiconductor wafer mounting base material is less likely to be broken in the expanding step, and the chip bonding layer 3 can be more sufficiently cleaved.

Further, in the semiconductor wafer mounting base material, the elastomer resin includes an olefin elastomer resin, so that the semiconductor wafer mounting base material is less likely to be broken in the expanding step, and the chip bonding layer 3 can be more sufficiently cleaved.

Further, by setting the thickness of the semiconductor wafer mounting base material to 90 μm or more and 130 μm or less, the semiconductor wafer mounting base material is less likely to be broken in the expanding step, and the die bonding layer can be more sufficiently cleaved.

A series of steps from the half-cutting step to the expanding step may be referred to as a "DBG (cutting Before Grinding) cutting process".

The half-cutting step may be replaced with a step of: and a modified region forming step of forming a modified region by irradiating the pre-dividing line in the semiconductor wafer with laser light, thereby easily dividing the semiconductor wafer by the pre-dividing line. A series of steps from the modified region forming step to the expanding step may be referred to as "SDBG (Stealth Before Grinding) cutting step".

In the dicing-maintaining step, as shown in fig. 7, hot air is blown to the dicing tape 10 (the setting value of the device for generating hot air is, for example, 200 to 250 ℃) to thermally contract the dicing tape 10, and then the dicing tape is cooled and solidified, thereby maintaining the distance between the adjacent semiconductor chips (dicing) that have been cut.

In the pickup step, as shown in fig. 8, the semiconductor chip with the die bonding layer 3 attached thereto (hereinafter, also referred to as a semiconductor chip with a die bonding layer) is peeled off from the adhesive layer 2 of the dicing tape 10. Specifically, the pin member P is raised to lift the semiconductor chip with the chip bonding layer to be picked up, via the dicing tape 10. The semiconductor chip with the chip bonding layer lifted up is held by an adsorption jig J.

In the die bonding step, the semiconductor chip with the die bonding layer is bonded to an adherend (wiring board).

In the above-described production of the semiconductor integrated circuit, the example in which the dicing die-bonding film 20 is used as the auxiliary tool has been described, but the semiconductor integrated circuit can be produced by using the dicing tape 10 as the auxiliary tool in the same manner as described above.

The matters disclosed in the present specification include the following matters.

(1)

A base material for mounting a semiconductor wafer, which has an elongation at break at-15 ℃ of 300% or more and a strength at break at-15 ℃ of 20N or more.

According to this configuration, the semiconductor wafer mounting base material is less likely to be damaged in the expanding step, and the chip bonding layer (the chip bonding layer disposed on the semiconductor wafer mounting base material) can be cut off more sufficiently.

(2)

The substrate for mounting a semiconductor wafer according to the item (1), which comprises at least one layer containing an elastomer resin.

According to this configuration, the semiconductor wafer mounting base material is less likely to be damaged in the expanding step, and the chip bonding layer (the chip bonding layer disposed on the semiconductor wafer mounting base material) can be more sufficiently cut.

(3)

The substrate for mounting a semiconductor wafer according to the item (2), wherein the elastomer resin is an olefin elastomer resin.

(4)

The substrate for mounting a semiconductor wafer according to any one of the above (1) to (3), wherein the thickness is 90 μm or more and 130 μm or less.

According to this configuration, in the expanding step, the semiconductor wafer mounting base is less likely to be damaged, and the die bonding layer (the die bonding layer disposed on the semiconductor wafer mounting base) can be more sufficiently cut.

(5)

A dicing tape comprising a base material and an adhesive layer laminated on the base material,

the substrate is the substrate for mounting a semiconductor wafer according to any one of (1) to (4) above.

According to this configuration, the semiconductor wafer mounting base material is less likely to be damaged in the expanding step, and the die bonding layer (the die bonding layer disposed on the adhesive layer) can be cut off more sufficiently.

(6)

A dicing die-bonding film comprising:

a dicing tape in which an adhesive layer is laminated on a base material; and

a die bonding layer laminated on the adhesive layer of the dicing tape,

According to this configuration, the semiconductor wafer mounting base material is less likely to be damaged in the expanding step, and the die bonding layer can be cut off more sufficiently.

The semiconductor wafer mounting base material, dicing tape, and dicing die-bonding film according to the present invention are not limited to the above embodiments. The semiconductor wafer mounting substrate, dicing tape, and dicing die-bonding film of the present invention are not limited to the above-described effects. The semiconductor wafer mounting base material, dicing tape, and dicing die-bonding film according to the present invention can be variously modified within a range not departing from the gist of the present invention.

[ examples ]

The present invention will be described more specifically with reference to examples. The following examples are intended to illustrate the present invention in more detail and do not limit the scope of the present invention.

[ example 1]

< formation of base Material (base Material for mounting semiconductor wafer) >

A3-layer structure (a 3-layer structure in which a layer B is a center layer and an outer layer A and a layer C are laminated on both sides of the layer B) having a layer A/a layer B/a layer C was formed using 2 types of 3-layer extrusion T-die molding machines, and the layer A is the 1 st layer, the layer B is the 2 nd layer, and the layer C is the 3 rd layer).

In the resins of the A layer and the C layer, a metallocene PP resin (trade name: WINTEC WXK1223, manufactured by Japan Polypropylene Corporation) was used so that the metallocene PP resin contained 20% by mass of an antistatic agent.

As the resin of the layer B, a mixed resin of an elastomer resin and an EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less is used (the elastomer resin is Vistamaxx 3980 (manufactured by Exxon mobile Corporation) which is a propylene-based elastomer resin, and the EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less (the 2 nd EVA resin) is Evaflex (registered trademark) P1007 (manufactured by DOW-MITSUI polychemicalls co., ltd.).

In layer B, the elastomer resin and the 2 nd EVA resin are present in a ratio W of the mass of the elastomer resin to the mass of the 2 nd EVA resin (2 nd EVA resin/elastomer resin)₁The mixture was mixed so as to be 0.4 (that is, so as to be Vistamaxx: Evaflex: 7: 3).

The extrusion molding was carried out at a die temperature of 190 ℃. That is, the A, B and C layers were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 110 μm. The thickness ratio (layer thickness ratio) of the a layer, the B layer, and the C layer is defined as a layer: layer B: layer C is 1: 10: 1.

after the molded base material is sufficiently cured, the cured base material is wound into a roll so that the C layer becomes the innermost layer as the innermost layer, and a roll body is produced.

The thickness of the base material of example 1 was determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

The thicknesses of the a layer, the B layer, and the C layer were measured by observing the cross section of the substrate with SEM. Specifically, the measurement is carried out by cutting the base material in the thickness direction using a cryomicrotome (manufactured by Daoho and photo industries), and observing the cut cross section with SEM.

The thicknesses of the respective layers were measured at arbitrary 5 positions for the cut cross sections, and the values of the thicknesses measured for the respective layers were arithmetically averaged to determine the thickness of each layer.

< preparation of dicing tape >

The adhesive composition was applied to one surface of the base material from the rolled base material using an applicator so that the thickness thereof became 30 μm. The base material coated with the adhesive composition was dried by heating at 110 ℃ for 3 minutes to form an adhesive layer, thereby obtaining a dicing tape of example 1.

The foregoing adhesive composition was prepared as follows.

First, 210 parts by mass of LA (lauryl acrylate), 170 parts by mass of INA (isononyl acrylate), 60 parts by mass of HEA (hydroxyethyl acrylate), and 1.0 part by mass of Nyper BW (benzoyl peroxide) were mixed to obtain a 1 st resin composition.

Next, the resin composition 1 was charged into a separable round-bottom flask (capacity: 1L), equipped with a separable round-bottom flask, a thermometer, a nitrogen gas inlet tube, and a stirring blade, and the temperature of the resin composition 1 was set to room temperature (23 ℃) while stirring the resin composition 1, and the separable round-bottom flask was purged with nitrogen gas for 6 hours.

Then, while stirring the 1 st resin composition in a state where nitrogen gas is flown into the separable round-bottom flask, the liquid temperature of the 1 st resin composition is maintained at 62 ℃ for 3 hours, and then at 75 ℃ for 2 hours, and the INA, the HEA, and the AIBN are polymerized to obtain a 2 nd resin composition. Then, the inflow of nitrogen gas into the round-bottomed separable flask was stopped.

After the resin composition 2 was cooled to room temperature, 48 parts by mass of 2-isocyanatoethyl methacrylate (product name "Karenz MOI (registered trademark)") as a compound having a polymerizable carbon-carbon double bond and 0.1 part by mass of dibutyltin dilaurate IV (product name "Wako pure chemical industries, Ltd.") were added to the resin composition 2, and the resulting resin composition 3 was stirred at a liquid temperature of 50 ℃ in an atmospheric atmosphere.

Next, to the 3 rd resin composition, 1.5 parts by mass and 5 parts by mass of each of CORONATE L (isocyanate compound) and Omnirad 127D (photopolymerization initiator) was added per 100 parts by mass of the polymer solid content to prepare an adhesive composition.

< preparation of dicing die-bonding film >

100 parts by mass of an acrylic resin (trade name "SG-N80" manufactured by Nagase ChemteX Corporation, glass transition temperature-23 ℃), 210 parts by mass of an epoxy resin (trade name "EPPN 501 HY" manufactured by Nippon Kagaku Co., Ltd.), 100 parts by mass of a phenol resin (trade name "LVR 8210-DL" manufactured by Rogro chemical Co., Ltd.), 33 parts by mass of a phenol resin (trade name "HF-1M" manufactured by Minghe chemical Co., Ltd.), 440 parts by mass of spherical silica (ADMATECHS CO., LTD., trade name "SE-2050 MCV"), 3 parts by mass of a silane coupling agent (trade name "KBM-303" manufactured by shin-Etsu chemical Co., Ltd.), and 0.5 part by mass of a curing catalyst (trade name "TPP-K" manufactured by Beijing chemical Co., Ltd.) were added to methyl ethyl ketone and mixed to obtain a die bonding composition.

Next, the die-bonding composition was applied to the silicone-treated surface of a PET separator (thickness 50 μm) as a release liner using an applicator so that the thickness became 40 μm, and dried at 130 ℃ for 2 minutes to remove the solvent from the die-bonding composition, thereby forming a 40 μm adhesive film on the release liner. Then, the 3 adhesive films thus produced were laminated by using a roll laminator to produce an adhesive film having a thickness of 120 μm. In this bonding, the bonding speed was set to 10 mm/sec, the temperature condition was set to 90 ℃ and the pressure condition was set to 0.15 MPa.

Next, the side of the die bonding sheet on which the release sheet was not laminated was bonded to the adhesive layer of the dicing tape of example 1, and then the release liner was peeled off from the die bonding layer, thereby obtaining a dicing die bonding film provided with a die bonding layer (i.e., the dicing die bonding film of example 1).

[ example 2]

< formation of base Material (base Material for mounting semiconductor wafer) >

In the resins of the a layer and the C layer, a mixed resin of an elastomer resin and an EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less (the elastomer resin is Vistamaxx 3980 (manufactured by Exxon mobile Corporation) which is a propylene-based elastomer resin, and the EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less (the 2 nd EVA resin) is Evaflex (registered trademark) P1007(DOW-MITSUI polychrome co., ltd.) was used), and the mixed resin was made to contain an antistatic agent by 20 mass%.

In addition, as the resin of the B layer, a mixed resin of an elastomer resin and an EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less (the elastomer resin is Vistamaxx 3980 (manufactured by Exxon mobile Corporation) which is a propylene-based elastomer resin, and the EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less (the 2 nd EVA resin) is Evaflex (registered trademark) P1007(DOW-MITSUI polychloris, ltd.) is used).

In the layers a, B and C, the elastomer resin and the 2 nd EVA resin are in a ratio W of the mass of the elastomer resin to the mass of the 2 nd EVA resin (2 nd EVA resin/elastomer resin)₁The mixture was mixed so as to be 0.4 (that is, so as to be Vistamaxx: Evaflex: 7: 3).

The extrusion molding was carried out at a die temperature of 190 ℃. That is, the A, B and C layers were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 110 μm. The thickness ratio (layer thickness ratio) of the a layer, the B layer, and the C layer is defined as a layer: layer B: layer C1: 10: 1.

The thickness of the base material of example 2 was determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

The thicknesses of the layers a, B, and C were measured by observing the cross section of the substrate with SEM as described in example 1.

< preparation of dicing tape >

A dicing tape of example 2 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 2 was produced in the same manner as in example 1.

[ example 3]

< formation of base Material (base Material for mounting semiconductor wafer) >

A substrate having a 2-layer structure of A layer/B layer (2-layer structure in which A layer is laminated on B layer, the A layer is the 1 st layer and the B layer is the 2 nd layer) was molded using 2 kinds of 2-layer extrusion T-die molding machines.

In the resin of layer A, a metallocene PP resin (trade name: WINTEC WXK1223, manufactured by Japan Polypropylene Corporation) was used so that the metallocene PP resin contained 20 mass% of an antistatic agent.

In the layer B, the elastomer resin and the 2 nd EVA resin are in a ratio W of the mass of the elastomer resin to the mass of the 2 nd EVA resin (2 nd EVA resin/elastomer resin)₁The mixture was mixed so as to be 0.4 (that is, so as to be Vistamaxx: Evaflex: 7: 3).

The extrusion molding was carried out at a die temperature of 190 ℃. That is, the A and B layers were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 110 μm. The ratio of the thicknesses of the a layer and the B layer (layer thickness ratio) is the a layer: layer B is 1: 20.

after the molded base material is sufficiently cured, the cured base material is wound into a roll so that the layer B becomes the innermost layer, which is the innermost layer, to form a roll-like body.

The thickness of the base material of example 3 was determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

The thicknesses of the a and B layers were measured by observing the cross section of the substrate with SEM as described in example 1.

< preparation of dicing tape >

A dicing tape of example 3 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 3 was produced in the same manner as in example 1.

[ example 4]

< formation of base Material (base Material for mounting semiconductor wafer) >

In the layers A, B and C, the elastomer resin and the 2 nd EVA resinRatio of mass of elastomer resin to mass of 2 nd EVA resin (2 nd EVA resin/elastomer resin) W₁Mixing was performed so as to reach 0.4 (that is, so as to reach Vistamaxx: Evaflex: 7: 3).

The extrusion molding was carried out at a mold temperature of 190 ℃. That is, the A, B and C layers were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 120 μm. The thickness ratio (layer thickness ratio) of the a layer, the B layer, and the C layer is the a layer: layer B: layer C is 1: 10: 1.

The thickness of the base material of example 4 was determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

< preparation of dicing tape >

A dicing tape of example 4 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 4 was produced in the same manner as in example 1.

[ example 5]

< formation of base Material (base Material for mounting semiconductor wafer) >

A substrate having a 2-layer structure of A layer/B layer (a 2-layer structure in which A layer is laminated on B layer, wherein A layer is the 1 st layer and B layer is the 2 nd layer) was molded using 2 kinds of 2-layer extrusion T-die molding machines.

In the layer B, the elastomer resin and the 2 nd EVA resin are in a ratio W of the mass of the elastomer resin to the mass of the 2 nd EVA resin (2 nd EVA resin/elastomer resin)₁A 0.4 (i.e., Vistamaxx: Evaflex: 7: 3) mode.

The extrusion molding was carried out at a die temperature of 190 ℃. That is, the A and B layers were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 120 μm. The ratio of the thicknesses of the a layer and the B layer (layer thickness ratio) is the a layer: layer B is 1: 20.

The thickness of the base material of example 5 was determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

< preparation of dicing tape >

A dicing tape of example 5 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 5 was produced in the same manner as in example 1.

[ example 6]

< formation of base Material (base Material for mounting semiconductor wafer) >

As the resin of the layer B, a mixed resin of an elastomer resin and an EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less is used (the elastomer resin is Vistamaxx 3980 (manufactured by Exxon mobile Corporation) which is a propylene-based elastomer resin, and the EVA resin having a vinyl acetate content of 10 mass% or more and 30 mass% or less (the 2 nd EVA resin) is Evaflex (registered trademark) P1007(DOW-MITSUI POLYCHEMICALS co., ltd).

The extrusion molding was carried out at a mold temperature of 190 ℃. That is, the A, B and C layers were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 110 μm. The thickness ratio (layer thickness ratio) of the a layer, the B layer, and the C layer is defined as a layer: layer B: layer C is 1: 15: 1.

< preparation of dicing tape >

A dicing tape of example 6 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 6 was produced in the same manner as in example 1.

[ example 7]

< formation of base Material (base Material for mounting semiconductor wafer) >

In the resins of the layer a and the layer C, a mixed resin of a metallocene PP resin and an ionomer resin (the metallocene PP resin is WINTEC WXK1223 (manufactured by Japan Polypropylene Corporation)) was used, and the mixed resin was made to contain an antistatic agent by 20 mass%.

In the layers a and C, the metallocene PP resin and the ionomer resin are W in the ratio of the mass of the metallocene PP resin to the mass of the ionomer resin (ionomer resin/metallocene PP resin)₂Mixed so as to be 0.4.

In addition, in layer B, the elastomer resin and the 2 nd EVA resin are in the ratio of the mass of the elastomer resin to the mass of the 2 nd EVA resin (2 nd EVA resin/elastomer resin) W₁The mixture was mixed so as to be 0.4 (that is, so as to be Vistamaxx: Evaflex: 7: 3).

< preparation of dicing tape >

A dicing tape of example 7 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 7 was produced in the same manner as in example 1.

[ example 8]

< formation of base Material (base Material for mounting semiconductor wafer) >

A single-layer extrusion T-die forming machine was used to form a single-layer structured substrate.

As the resin constituting the single layer, an EVA resin having a vinyl acetate content of 10 mass% was used.

The extrusion molding was carried out at a die temperature of 190 ℃. The thickness of the substrate obtained by extrusion molding was 125. mu.m.

After the molded base material is sufficiently cured, the cured base material is wound into a roll to form a roll.

The thickness of the base material of example 8 was determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

< preparation of dicing tape >

A dicing tape of example 8 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 8 was produced in the same manner as in example 1.

[ example 9]

< formation of base Material (base Material for mounting semiconductor wafer) >

As the resin of the layer B, an EVA resin having a vinyl acetate content of 20 mass% or more (trade name: Evaflex (registered trade name) EV250, DOW-MITSUI POLYCHEMICALS CO., LTD., manufactured by LTD.) was used.

The extrusion molding was carried out at a die temperature of 190 ℃. That is, the A, B and C layers were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 100 μm. The thickness ratio (layer thickness ratio) of the a layer, the B layer, and the C layer is defined as a layer: layer B: layer C is 1: 10: 1.

The thickness of the base material of example 9 was determined by measuring the thickness of any 5 randomly selected points using a dial gauge (model R-205, manufactured by PEACOCK corporation) and arithmetically averaging the thicknesses.

The thicknesses of the a, B and C layers were measured by observing the cross section of the substrate with SEM as described in example 1.

< preparation of dicing tape >

A dicing tape of example 9 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of example 9 was produced in the same manner as in example 1.

Comparative example 1

< formation of base Material (base Material for mounting semiconductor wafer) >

The extrusion molding was carried out at a die temperature of 190 ℃. That is, the layer A, the layer B and the layer C were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 80 μm. The thickness ratio (layer thickness ratio) of the a layer, the B layer, and the C layer is defined as a layer: layer B: layer C is 1: 10: 1.

< preparation of dicing tape >

A dicing tape of comparative example 1 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of comparative example 1 was produced in the same manner as in example 1.

Comparative example 2

< formation of base Material (base Material for mounting semiconductor wafer) >

In the layer B, the elastomer resin and the 2 nd EVA resin are in a ratio W of the mass of the elastomer resin to the mass of the 2 nd EVA resin (2 nd EVA resin/elastomer resin)₁The mixture was mixed so as to be 0.4.

The extrusion molding was carried out at a mold temperature of 190 ℃. That is, the layer A, the layer B and the layer C were extrusion molded at 190 ℃. The thickness of the substrate obtained by extrusion molding was 110 μm. The thickness ratio (layer thickness ratio) of the a layer, the B layer, and the C layer is defined as a layer: layer B: layer C is 1: 5: 1.

< preparation of dicing tape >

A dicing tape of comparative example 2 was produced in the same manner as in example 1.

< preparation of dicing die-bonding film >

A dicing die-bonding film of comparative example 2 was produced in the same manner as in example 1.

(elongation at Break and Strength at-15 ℃ C.)

The elongation at break and the strength at break at-15 ℃ were measured for the substrates of each example.

The elongation at break at-15 ℃ and the strength at break at-15 ℃ were determined as follows.

As for the elongation at break, in detail, the length is 120mm (measurement length. L)₀) The test piece was stretched in the longitudinal direction using a tensile tester (Autograph AG-IS, Shimadzu corporation) at a temperature of-15 ℃, a chuck-to-chuck distance of 50mm, and a tensile speed of 1000 mm/min, and the length (L) of the test piece at break was measured₁)。

Elongation at break E ═ L₁-L₀)/L₀×100

The breaking strength was determined by performing a tensile test under the same conditions as described above using the test piece and the tensile tester, and measuring the force applied when the test piece breaks.

The values of elongation at break and strength at break measured for the substrates of the respective examples are shown in table 1 below.

(cleavage of chip bonding layer and breakage of base Material)

A semiconductor wafer (12 inches (300mm) in plane size, 0.060mm in thickness, which was cut into a plurality of semiconductor chips having a size of 10mm in length × 5mm in width by a DBG) and a dicing ring were attached to each dicing die-bonding film of each example. Next, the semiconductor wafer and the chip bonding layer were cleaved (mainly, the chip bonding layer was cleaved) using a chip separation apparatus DDS2300 (manufactured by DISCO inc.), and the cleavage property of the chip bonding layer and the breakage of the base material were evaluated.

The semiconductor wafer is divided into semiconductor chips cut by the DBG by the above-described cutting (length 10mm × width 5mm × thickness 0.060 mm).

The cleavage property of the chip bonding layer is evaluated in detail as follows.

First, a cold-spreading mechanism was used to cleave a semiconductor wafer and a die-bonding layer at a spreading temperature of-15 ℃, a spreading speed of 200 mm/sec, and a spreading amount of 15mm, thereby obtaining a semiconductor chip with a die-bonding layer.

Next, the film was spread at room temperature at a spreading rate of 1 mm/sec and a spreading amount of 7 mm. Then, the dicing die bonding film at the boundary portion with the outer peripheral edge of the bare wafer was thermally shrunk under conditions of a heating temperature of 250 ℃, a heating distance of 20mm, and a rotation speed of 5 °/sec while maintaining the expanded state.

Then, the cleaved portion of the semiconductor chip with the die-bonding layer was observed by microscope observation, and the cleavage ratio was calculated. Then, the case where the cleavage ratio was 90% or more was evaluated as "excellent", the case where the cleavage ratio was 80% or more and less than 90% was evaluated as "good", and the case where the cleavage ratio was less than 80% was evaluated as "impossible".

In addition, regarding the breakage of the base material, after a semiconductor chip with a chip bonding layer was obtained using a cold spreading mechanism, by visually observing the base material, the one in which no breakage occurred in the base material was evaluated as "excellent", the one in which partial elongation of the base material was evaluated as "good", and the one in which cracking occurred was evaluated as "impossible".

The results obtained by evaluating the cuttability of the chip bonding layer and the breakage of the base material for each example are shown in table 1 below.

(maintenance of cutting slit)

A semiconductor wafer (a semiconductor wafer having a plane size of 12 inches (300mm) and a thickness of 0.060mm, which was cut into a plurality of semiconductor chips having a size of 10mm in length × 5mm in width by a DBG) and a dicing ring were attached to the dicing die-bonding film of each example. Next, the semiconductor wafer and the chip bonding layer were cleaved (mainly, the chip bonding layer was cleaved) using a chip separation apparatus DDS2300 (manufactured by DISCO inc.), and the cleavage maintenance performance after cleavage was evaluated.

The semiconductor wafer is divided into semiconductor chips (length 10mm × width 5mm × thickness 0.060mm) cut by the DBG by the above-described cutting.

The slit retentivity was evaluated in detail as follows.

First, a bare wafer and a chip bonding layer were cleaved using a cold spreading mechanism under conditions of a spreading temperature of-15 ℃, a spreading speed of 200 mm/sec, and a spreading amount of 15mm, to obtain a plurality of semiconductor chips with chip bonding layers.

Next, room temperature expansion was carried out at room temperature under conditions of an expansion rate of 1 mm/sec and an expansion amount of 7 mm. Then, the dicing die bonding film at the boundary portion with the outer peripheral edge of the bare wafer was thermally shrunk under conditions of a heating temperature of 250 ℃, a heating distance of 20mm, and a rotation speed of 5 °/sec while maintaining the expanded state.

Next, the cleavage was measured by a digital microscope (VHX-6000, manufactured by KEYENCE CORPORATION). Specifically, after the completion of the thermal expansion (after the thermal contraction), the interval between one chip and another chip (hereinafter, also referred to as interval length) in the cut portion is observed with a digital microscope, and the interval length is measured. The interval length was measured in the MD direction and the TD direction at 5 positions selected arbitrarily. The minimum value among the measured values of the interval length is used as the slit.

Further, the cut was 30 μm or more, the evaluation was "excellent" (the cut was sufficiently maintained), the evaluation was "good" (the cut was not sufficiently maintained) when the cut was 20 μm or more and less than 30 μm, and the evaluation was "impossible" (the cut was not sufficiently maintained) when the cut was 20 μm or less.

The arbitrarily selected 5 portions are the outermost peripheral portion of the circular wafer, and are 4 portions separated from each other by about 90 ° in the circumferential direction and the vicinity of the center of the circular wafer.

[ Table 1]

As is clear from table 1, in examples 1 to 9, the evaluation of the cleavage property of the chip bonding layer was "excellent" or "good", and no evaluation of "impossible" was observed, whereas in comparative example 1, the evaluation of the cleavage property of the chip bonding layer was "impossible".

As is clear from table 1, in examples 1 to 9, the evaluation of the damage of the substrate was "excellent" or "good", and no evaluation of "impossible" was recognized, whereas in comparative example 2, the evaluation of the damage of the substrate was "impossible".

From these results, it was found that improvement of the cuttability of the dicing tape and suppression of breakage of the base material can be achieved at the same time by setting the elongation at break of the base material at-15 ℃ to 300% or more and the strength at break at-15 ℃ to 20N or more.

In examples 1 to 9, the evaluation of the maintenance of the cut seam was "excellent" or "good", and no "impossible" evaluation was observed.

It is clear from this that the maintenance of the slits is relatively good in examples 1 to 9.

Claims

1. A base material for mounting a semiconductor wafer, which has an elongation at break at-15 ℃ of 300% or more and a strength at break at-15 ℃ of 20N or more.

2. The substrate for mounting a semiconductor wafer according to claim 1, which comprises at least one layer containing an elastomer resin.

3. The substrate for mounting a semiconductor wafer according to claim 2, wherein the elastomer resin is an olefin elastomer resin.

4. The substrate for mounting a semiconductor wafer according to any one of claims 1 to 3, which has a thickness of 90 μm or more and 130 μm or less.

5. A dicing tape comprising a base material and an adhesive layer laminated on the base material,

the substrate for mounting a semiconductor wafer according to any one of claims 1 to 4.

6. A dicing die-bonding film comprising:

a dicing tape in which an adhesive layer is laminated on a base material; and

a chip bonding layer laminated on the adhesive layer of the dicing tape,