CN114333699B

CN114333699B - Pixel driving circuit and display substrate

Info

Publication number: CN114333699B
Application number: CN202210036482.0A
Authority: CN
Inventors: 侯唯玮; 李秋婕; 张凯; 王培�; 蒋忠涛; 李露; 洪执华; 张淞; 王建波
Original assignee: BOE Technology Group Co Ltd; Chongqing BOE Display Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chongqing BOE Display Technology Co Ltd
Priority date: 2022-01-13
Filing date: 2022-01-13
Publication date: 2023-06-30
Anticipated expiration: 2042-01-13
Also published as: CN114333699A

Abstract

The disclosure provides a pixel driving circuit and a display substrate, and belongs to the technical field of display. The present disclosure provides a pixel driving circuit, including: a drive sub-circuit, a data write sub-circuit, a threshold compensation sub-circuit, and a storage reset sub-circuit. The storage reset sub-circuit is connected with the first control signal line, and when the first control signal line is written with a high-frequency signal, the storage reset sub-circuit writes the high-frequency signal written on the first control signal line into the control end of the driving sub-circuit so as to reset the control end of the driving sub-circuit; when the first control signal line is written with a direct current signal, the data voltage signal written by the data writing sub-circuit can be stored.

Description

Pixel driving circuit and display substrate

Technical Field

The disclosure belongs to the technical field of display, and in particular relates to a pixel driving circuit and a display substrate.

Background

An organic electroluminescent diode (Organic Light Emitting Diodes, OLED) belongs to a novel current-type semiconductor luminescent device, which is luminescent display by controlling the injection of carriers of the device and the compound excitation of organic materials, and belongs to an autonomous luminescent technology. Compared with a passive light-emitting liquid crystal display (Liquid Crystal Display, LCD), the self-light-emitting OLED display has the advantages of high response speed, high contrast, wide viewing angle and the like, is easy to realize flexible display, is widely seen in the industry, and is considered to be a main stream product of the next-generation display technology in the industry.

Disclosure of Invention

The invention aims to at least solve one of the technical problems in the prior art and provides a pixel driving circuit and a display substrate.

In a first aspect, the present disclosure provides a pixel driving circuit, comprising: a drive sub-circuit, a data write sub-circuit, a threshold compensation sub-circuit, and a storage reset sub-circuit; wherein the data writing sub-circuit is configured to transmit a data voltage signal to a first end of the driving sub-circuit under the control of a first scanning signal; the threshold compensation sub-circuit is configured to compensate the threshold voltage of the driving sub-circuit under the control of a second scanning signal; the driving sub-circuit is configured to provide a driving current for the light emitting device to be driven according to the voltages of the first end and the control end of the driving sub-circuit; the storage reset sub-circuit is connected with a first control signal line, and when the first control signal line is written with a first sub-signal, the storage reset sub-circuit writes the first sub-signal written on the first control signal line into the control end of the driving sub-circuit so as to reset the control end of the driving sub-circuit; the first control signal line may store the data voltage signal written by the data writing sub-circuit when the second sub-signal is written.

Wherein the memory reset sub-circuit comprises at least a first capacitor; the first polar plate of the first capacitor is connected with the first control signal line, and the second polar plate of the first capacitor is connected with the control end of the driving sub-circuit and the first end of the threshold compensation sub-circuit.

Wherein when the first control signal line is written with a first sub-signal, the memory reset sub-circuit is further configured to write the first sub-signal written on the first control signal line to a first pole of the light emitting device to be driven to reset the light emitting device.

The storage reset sub-circuit further comprises a first capacitor and a second capacitor; the first polar plate of the first capacitor is connected with the first control signal line, and the second polar plate of the first capacitor is connected with the control end of the driving sub-circuit and the first end of the threshold compensation sub-circuit; the first polar plate of the second capacitor is connected with the first control signal line, and the second polar plate of the second capacitor is connected with the light emitting device to be driven.

Wherein, still include: a first light emission control sub-circuit and a second light emission control sub-circuit; the first light emitting control sub-circuit is configured to transmit a first power supply voltage to a first end of the driving sub-circuit under the control of a first light emitting control signal; the second light emission control sub-circuit is configured to transmit the driving current output from the second terminal of the driving sub-circuit to the first electrode of the light emitting device to be driven under the control of a second light emission control signal.

Wherein the first light emitting control sub-circuit includes: a fourth transistor; the first pole of the fourth transistor is connected with a first power supply voltage end, the second pole of the fourth transistor is connected with the first end of the data writing sub-circuit and the first end of the driving sub-circuit, and the control pole of the fourth transistor is connected with a first light emitting control signal end; the second light emission control sub-circuit includes: a fifth transistor; the first pole of the fifth transistor is connected with the second end of the threshold compensation sub-circuit and the second end of the driving sub-circuit, the second pole of the fifth transistor is connected with the first pole of the light emitting device to be compensated, and the control pole of the fifth transistor is connected with the second light emitting control signal end.

Wherein the drive sub-circuit comprises: a third transistor; the first pole of the third transistor is connected with the first end of the data writing sub-circuit, the second pole of the third transistor is connected with the second end of the threshold compensation sub-circuit, and the control pole of the third transistor is connected with the storage reset sub-circuit.

Wherein the data writing sub-circuit includes: a second transistor; the first electrode of the second transistor is connected with the first end of the driving sub-circuit, the second electrode of the second transistor is connected with the data voltage signal end, and the control electrode of the second transistor is connected with the first scanning signal end.

Wherein the threshold compensation sub-circuit comprises: a first transistor; the first pole of the first transistor is connected with the control ends of the storage reset sub-circuit and the driving sub-circuit, the second pole of the first transistor is connected with the second end of the driving sub-circuit, and the control pole of the first transistor is connected with the second scanning signal line.

In a second aspect, the present disclosure also provides a display substrate, which is a pixel driving circuit as described above.

In a third aspect, the present disclosure further provides a display substrate, including a plurality of pixel columns arranged side by side along a first direction, each of the pixel columns including a plurality of N pixel units arranged in sequence along a second direction; each pixel unit at least comprises a pixel driving circuit and a light emitting device, and the pixel driving circuit is configured to drive the light emitting device; the pixel driving circuit includes at least: a driving sub-circuit, a data writing sub-circuit, a threshold compensation sub-circuit, a memory reset sub-circuit, a first light emission control sub-circuit, and a second light emission control sub-circuit; the data writing sub-circuit is configured to transmit a data voltage signal to a first end of the driving sub-circuit under the control of a first scanning signal; the threshold compensation sub-circuit is configured to compensate the threshold voltage of the driving sub-circuit under the control of a second scanning signal; the driving sub-circuit is configured to provide a driving current for the light emitting device to be driven according to the voltages of the first end and the control end of the driving sub-circuit; for two pixel driving circuits which are positioned in the same pixel column and are adjacent in scanning sequence, the n-1 th pixel driving circuit and the n-th pixel driving circuit are used for representing; the storage reset sub-circuit is connected with a first control signal line, and when the first control signal line is written with a first sub-signal, the storage reset sub-circuit writes the first sub-signal written on the first control signal line into a control end of the driving sub-circuit in the nth pixel driving circuit and a first pole of the light emitting device driven by the n-1 th pixel driving circuit so as to reset the control end of the driving sub-circuit and the light emitting device; when the first control signal line is written with a second sub-signal, the data voltage signal written by the data writing sub-circuit in the pixel driving circuit positioned at the nth can be stored; wherein 1<n is less than or equal to N, and N and N are integers.

The storage reset sub-circuit at least comprises a first capacitor and a second capacitor; a first polar plate of the first capacitor is connected with the first control signal line, and a second polar plate of the first capacitor is connected with the control end of the driving sub-circuit and the first end of the threshold compensation sub-circuit; the first polar plate of the second capacitor is connected with the first control signal line, and the second polar plate of the second capacitor is connected with the first polar of the light emitting device driven by the n-1 pixel driving circuit.

Wherein the pixel driving circuit further includes: a first light emission control sub-circuit and a second light emission control sub-circuit; the first light emitting control sub-circuit is configured to transmit a first power supply voltage to a first end of the driving sub-circuit under the control of a first light emitting control signal; the second light emission control sub-circuit is configured to transmit the driving current output from the second terminal of the driving sub-circuit to the first electrode of the light emitting device to be driven under the control of a second light emission control signal.

Wherein the first light emitting control sub-circuit includes a fourth transistor; the first pole of the fourth transistor is connected with a first power supply voltage end, the second pole of the fourth transistor is connected with the first end of the data writing sub-circuit and the first end of the driving sub-circuit, and the control pole of the fourth transistor is connected with a first light emitting control signal end; the second light emission control sub-circuit includes: a fifth transistor; the first pole of the fifth transistor is connected with the second end of the threshold compensation sub-circuit and the second end of the driving sub-circuit, the second pole of the fifth transistor is connected with the first pole of the light emitting device to be compensated, and the control pole of the fifth transistor is connected with the second light emitting control signal end.

Wherein the threshold compensation sub-circuit comprises: a first transistor; the data writing sub-circuit includes: a second transistor; the driving sub-circuit includes: a third transistor; the first pole of the first transistor is connected with the control ends of the storage reset sub-circuit and the driving sub-circuit, the second pole of the first transistor is connected with the second end of the driving sub-circuit, and the control pole of the first transistor is connected with the second scanning signal line; the first electrode of the second transistor is connected with the first end of the driving sub-circuit, the second electrode of the second transistor is connected with the data voltage signal end, and the control electrode of the second transistor is connected with the first scanning signal line; the first pole of the third transistor is connected with the first end of the data writing sub-circuit, the second pole of the third transistor is connected with the second end of the threshold compensation sub-circuit, and the control pole of the third transistor is connected with the storage reset sub-circuit.

Drawings

FIG. 1 is a schematic diagram of a pixel driving circuit according to an embodiment of the disclosure;

FIG. 2 is a circuit diagram of the pixel driving circuit shown in FIG. 1;

FIG. 3 is another circuit diagram of the pixel driving circuit shown in FIG. 1;

FIG. 4 is a layout diagram of the pixel driving circuit shown in FIG. 3;

FIG. 5 is a schematic diagram illustrating a driving circuit of a pixel driving circuit according to an embodiment of the disclosure;

FIG. 6 is a schematic diagram of a display substrate according to an embodiment of the disclosure;

fig. 7 is a schematic circuit diagram of a pixel driving circuit on the display substrate shown in fig. 6.

Detailed Description

In order that those skilled in the art will better understand the technical solutions of the present disclosure, the present disclosure will be described in further detail with reference to the accompanying drawings and detailed description.

Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the terms "a," "an," or "the" and similar terms do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.

In order to enable those skilled in the art to better understand the technical solutions of the present invention, a pixel driving circuit and a display substrate provided by the present invention are described in detail below with reference to the accompanying drawings.

The terms "first," "second," and the like, as used in embodiments of the present disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. Likewise, the word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "coupled" or "connected," and the like, are not limited to physical or mechanical coupling, but may include electrical coupling, whether direct or indirect.

The transistors adopted in the embodiments of the present invention may be thin film transistors TFT or field effect transistors or other devices with the same characteristics, and since the source and drain of the adopted transistors are symmetrical, the source and drain are indistinguishable. In the embodiments of the present disclosure, to distinguish between the source and the drain of the transistor, one of the poles is referred to as a first pole, the other pole is referred to as a second pole, and the gate is referred to as a control pole. Transistors can be further classified into N-type transistors and P-type transistors according to their characteristic distinction. When the P-type transistor is adopted, the first electrode is the source electrode of the P-type transistor, the second electrode is the drain electrode of the P-type transistor, and when the grid electrode inputs a low level, the source electrode and the drain electrode are conducted, and the N type is opposite. In the embodiments of the present disclosure, only P-type transistors are used as examples of transistors, and it is conceivable that implementation using N-type transistors is easily conceivable by those skilled in the art without any inventive effort, and thus is within the scope of the embodiments of the present invention.

In a first aspect, as shown in fig. 1, the present disclosure provides a pixel driving circuit, comprising: a drive sub-circuit 10, a data write sub-circuit 11, a threshold compensation sub-circuit 12, and a memory reset sub-circuit 13. Wherein the data writing sub-circuit 11 is configured to transmit the data voltage signal to the first terminal of the driving sub-circuit 10 under control of the first scan signal. The threshold compensation sub-circuit 12 is configured to compensate for the threshold voltage of the drive sub-circuit 10 under control of the second scan signal. The driving sub-circuit 10 is configured to supply a driving current to the light emitting device D to be driven according to voltages of a first terminal and a control terminal thereof. The memory Reset sub-circuit 13 is connected to the first control signal line Reset, and when the first control signal line Reset is written to the first sub-signal, the memory Reset sub-circuit 13 writes the high-frequency signal written on the first control signal line Reset to the control terminal of the driving sub-circuit 10 to Reset the control terminal of the driving sub-circuit 10; when the first control signal line Reset is written into the second sub-signal, the data voltage signal written into the data writing sub-circuit 11 can be stored.

In the disclosed embodiment, as shown in fig. 1. The first terminal of the data writing sub-circuit 11 is connected to the first terminal of the driving sub-circuit 10, the second terminal of the data writing sub-circuit 11 is connected to the data voltage signal terminal, and the control terminal of the data writing sub-circuit 11 is connected to the first scan signal line Gate. In the data writing stage of the pixel driving circuit, the first scanning signal provided on the first scanning signal line Gate is an operating level signal, and the data writing sub-circuit 11 starts writing the data voltage signal provided by the data voltage signal terminal into the first terminal of the driving sub-circuit 10 via the data writing sub-circuit 11, so as to realize writing the data voltage signal into the pixel driving circuit. The first terminal of the drive sub-circuit 10 is connected to the first terminal of the data writing sub-circuit 11, the second terminal of the drive sub-circuit 10 is connected to the second terminal of the threshold compensation sub-circuit 12, the control terminal of the drive sub-circuit 10 is connected to the memory Reset sub-circuit 13 and the first terminal of the threshold compensation sub-circuit 12, and simultaneously, as shown in fig. 1, the control terminal of the threshold compensation sub-circuit 12 is connected to the second scan signal line Gate (1), and the memory Reset sub-circuit 13 is connected to the first control signal line Reset. Similarly, in the data writing stage of the pixel driving circuit, the first terminal of the driving sub-circuit 10 is written with the data voltage signal, the second scanning signal provided on the second scanning signal line Gate (1) is an operation level signal, the threshold compensation sub-circuit 12 is turned on and connects the second terminal of the driving sub-circuit 10 with the control terminal to compensate the threshold voltage of the driving sub-circuit 10. And since the threshold compensation sub-circuit 12 is turned on, the data voltage signal is written to the control terminal of the driving sub-circuit 10 via the first terminal and the second terminal of the driving sub-circuit 10, and the signal loaded on the first control signal line Reset is the second sub-signal, the storage Reset sub-circuit 13 stores the data voltage Vdata. In this way, it is achieved that the threshold voltage of the drive sub-circuit 10 is compensated for at the same time as the data writing.

Meanwhile, in the embodiment of the present disclosure, since the data voltage signal written by the pixel driving circuit changes according to the gray-scale change of the light emitting device D to be driven thereof at the time of imaging when the pixel driving circuit is actually operated, and at this stage, the threshold compensation sub-circuit 12 is turned on, the data voltage signal is written to the control terminal of the driving sub-circuit 10 via the first terminal and the second terminal of the driving sub-circuit 10, and thus the potential of the control terminal of the driving sub-circuit 10 changes according to the change of the data voltage signal written by the pixel driving circuit. Therefore, before each data writing phase of the pixel driving circuit, the control terminal of the driving sub-circuit 10 needs to be reset to avoid affecting the operation of the light emitting device D to be driven. In the embodiment of the present disclosure, since the memory Reset sub-circuit 13 writes the first sub-signal to the control terminal of the driving sub-circuit 10 when the first control signal line Reset is written to the first sub-signal, the Reset of the driving sub-circuit 10 is realized. Therefore, the control end of the driving sub-circuit 10 can be reset without additionally arranging a reset sub-circuit, a reset signal line and a reset signal end, so that the electric leakage of the reset sub-circuit caused by arranging the reset sub-circuit is avoided, the electric potential of the control end of the driving sub-circuit 10 is further influenced, and the display effect of the display substrate with the pixel driving circuit is improved. Meanwhile, as a reset sub-circuit, a reset signal line and a reset signal end are not required to be arranged, the number of elements in the pixel driving circuit is reduced, the number of film layers in the display substrate with the pixel driving circuit is reduced, the process difficulty is reduced, and the yield is improved.

Specifically, referring to fig. 2, fig. 2 is a circuit diagram of the pixel driving circuit shown in fig. 1. In some embodiments, the memory reset sub-circuit 13 includes at least a first capacitance C1. A first plate of the first capacitor C1 is connected to the first control signal line Reset, and a second plate of the first capacitor C1 is connected to the control terminal of the drive sub-circuit 10 and to a first terminal of the threshold compensation sub-circuit 12. In an embodiment of the present disclosure, the first sub-signal may be a direct current sub-signal within one driving period of the pixel driving circuit, and the second sub-signal may be a high frequency sub-signal within one driving period of the pixel driving circuit. Because the capacitor has the property of high-frequency connection and low-frequency resistance, namely when the voltage on the capacitor is a low-frequency signal or a direct-current signal, the two polar plates of the capacitor can be considered as an open circuit, and the capacitor can be used as a storage element to store electric signals; when the voltage on the capacitor is a high-frequency signal, the high-frequency signal can be conducted, and the capacitor can be equivalent to a conducting wire in a circuit. Therefore, in the embodiment of the present disclosure, in the data writing stage of the pixel driving circuit, since the electric signal loaded on the first control signal line Reset connected to the first capacitor C1 is a direct current sub-signal, the first capacitor C1 stores the data voltage Vdate written by the data writing sub-circuit 11. Similarly, in the embodiment of the disclosure, in the Reset stage of the pixel driving circuit, the electric signal loaded on the first control signal line Reset connected to the first capacitor C1 is a high-frequency sub-signal, the first capacitor C1 corresponds to a conducting wire, the first control signal line Reset is connected to the control terminal of the driving sub-circuit 10 through the first capacitor C1, and at this time, the high-frequency sub-signal on the first control signal line Reset directly resets the control terminal of the driving sub-circuit 10. In this way, the difference of the control terminal potential after reset due to the difference of the control terminal potential of the driving sub-circuit 10 when the reset sub-circuit is additionally used for resetting is avoided, and the display effect of the display substrate with the pixel driving circuit is improved.

Meanwhile, in some embodiments, the light emitting device D to be driven may be a Micro inorganic light emitting diode, further, may be a current type light emitting diode such as a Micro light emitting diode (Micro Light Emitting Diode, micro LED) or a Mini light emitting diode (Mini Light Emitting Diode, mini LED), and of course, the light emitting device D in the embodiments of the present disclosure may also be an organic light emitting diode (Organic Light Emitting Diode, OLED). One of the first electrode and the second electrode of the light emitting device D is an anode, and the other is a cathode. In the embodiment of the disclosure, only the light emitting device D is taken as an OLED, and the first electrode of the light emitting device D is taken as an anode, and the second electrode is taken as an cathode for illustration.

In some embodiments, with continued reference to fig. 1, when the first control signal line Reset is written to the first sub-signal, the memory Reset sub-circuit 13 is further configured to write the first sub-signal written on the first control signal line Reset to the anode of the light emitting device D to be driven to Reset the light emitting device D. In this way, in the embodiment of the disclosure, the storage reset sub-circuit 13 can reset the control end of the driving sub-circuit 10 and the anode of the light emitting device D to be driven by the pixel driving circuit at the same time, so that the light emitting device D is not in a forward conduction state before being driven to emit light, that is, an internal electric field formed by directional movement of impurity ions in the light emitting device D gradually disappears, thereby restoring the characteristics of the light emitting device D. Meanwhile, the reset sub-circuit, the reset signal line and the reset signal end are not required to be additionally arranged, so that the anode of the light-emitting device D can be reset, the number of elements in the pixel driving circuit is reduced, the number of film layers in the display substrate with the pixel driving circuit is reduced, the process difficulty is reduced, and the yield is improved.

Specifically, referring to fig. 3, fig. 3 is another circuit diagram of the pixel driving circuit shown in fig. 1, and when the memory Reset sub-circuit 13 is further configured to write the first sub-signal loaded on the first control signal line Reset to the anode of the light emitting device D to be driven, the memory Reset sub-circuit 13 includes a first capacitor C1 and a second capacitor C2. A first plate of the first capacitor C1 is connected to the first control signal line Reset, and a second plate of the first capacitor C1 is connected to the control terminal of the drive sub-circuit 10 and to a first terminal of the threshold compensation sub-circuit 12. The first electrode plate of the second capacitor C2 is connected to the first control signal line Reset, and the second electrode plate of the second capacitor C2 is connected to the light emitting device D to be driven. In an embodiment of the present disclosure, the first sub-signal may be a direct current sub-signal within one driving period of the pixel driving circuit, and the second sub-signal may be a high frequency sub-signal within one driving period of the pixel driving circuit. In the disclosed embodiment, in this way, two capacitors are used to connect the control terminal of the driving sub-circuit 10 and the anode of the light emitting device D to be compensated, respectively. Because the capacitor has the property of high-frequency connection and low-frequency resistance, namely when the voltage on the capacitor is a low-frequency signal or a direct-current signal, the two polar plates of the capacitor can be considered as an open circuit, and the capacitor can be used as a storage element to store electric signals; when the voltage on the capacitor is a high-frequency signal, the high-frequency signal can be conducted, and the capacitor can be equivalent to a conducting wire in a circuit. Therefore, in the embodiment of the disclosure, in the data writing stage of the pixel driving circuit, the electric signal loaded on the first control signal line Reset connected to the first capacitor C1 and the second capacitor C2 is a dc sub-signal, and the first capacitor C1 stores the data voltage Vdata written by the data writing sub-circuit 11. Also, in the embodiment of the present disclosure, in the Reset stage of the pixel driving circuit, the electric signal loaded on the first control signal line Reset connected to the first capacitor C1 and the second capacitor C2 is a high-frequency sub-signal, the first capacitor C1 and the second capacitor C2 may be equivalent to wires, and the control terminal of the driving sub-circuit 10 and the first electrode of the light emitting device D are connected to the first control signal line Reset through the first capacitor C1 and the second capacitor C2, respectively, at this time, the high-frequency signal on the first control signal line Reset directly resets the control terminal of the driving sub-circuit 10 and the light emitting device D. And because the control end of the driving sub-circuit 10 and the light emitting device D are directly Reset by using the high-frequency signal on the first control signal line Reset, the problem that the Reset degree is different due to the difference of the electric potentials of the control end of the driving sub-circuit 10 when the Reset sub-circuit is additionally used for resetting is avoided, and the display effect of the display substrate with the pixel driving circuit is improved. Meanwhile, the reset of the light emitting device D can be realized by adding one capacitor, and the circuit structure of the pixel driving circuit is simple. It should be noted that, in some embodiments, the first capacitor C1 and the second capacitor C2 may be integrally designed, i.e. share one polar plate, when they are manufactured, which is also within the protection scope of the present disclosure. In the embodiment of the present disclosure, only an example is described in which the first capacitor C1 and the second capacitor C2 share one electrode plate.

In some embodiments, with continued reference to fig. 3, the threshold compensation subcircuit 12 includes: a first transistor T1, wherein the source of the first transistor T1 is used as the first terminal of the threshold compensation sub-circuit 12, the drain is used as the second terminal of the threshold compensation sub-circuit 12, and the gate is used as the control terminal of the threshold compensation sub-circuit 12. The driving sub-circuit 10 includes: and a third transistor T3, wherein a source of the third transistor T3 is used as a first terminal of the driving sub-circuit 10, a drain is used as a second terminal of the driving sub-circuit 10, and a gate is used as a control terminal of the driving sub-circuit 10. Specifically, the source of the first transistor T1 is connected to the storage reset sub-circuit 13 and the control terminal of the driving sub-circuit 10, the drain of the first transistor T1 is connected to the second terminal of the driving sub-circuit 10, and the Gate of the first transistor T1 is connected to the second scan signal line Gate (1). The source of the third transistor T3 is connected to the first terminal of the data writing sub-circuit 11, the drain of the third transistor T3 is connected to the second terminal of the threshold compensation sub-circuit 12, and the gate of the third transistor T3 is connected to the memory reset sub-circuit 13 and the first terminal of the threshold compensation sub-circuit 12. In the data writing stage of the pixel driving circuit, the source electrode of the third transistor T3 is written with a data voltage signal, the second scanning signal provided on the second scanning signal line Gate (1) is a low level signal, the first transistor T1 is turned on, and the Gate electrode and the drain electrode of the third transistor T3 are turned on, so that the compensation of the threshold voltage of the third transistor T3 is realized. And, due to the on state of the first transistor T1, the data voltage signal is written into the gate of the third transistor T3 through the source/drain of the first transistor T1, and meanwhile, due to the signal loaded on the first control signal line Reset being a dc signal, the first capacitor C1 stores the data voltage Vdata.

In some embodiments, with continued reference to fig. 3, the data write sub-circuit 11 includes: and a source electrode of the second transistor T2 is used as a first end of the data writing sub-circuit 11, a drain electrode of the second transistor T2 is used as a second end of the data writing sub-circuit 11, and a gate electrode of the second transistor T2 is used as a control end of the data writing sub-circuit 11. Specifically, the source of the second transistor T2 is connected to the first terminal of the driving sub-circuit 10, the drain of the second transistor T2 is connected to the data voltage signal terminal, and the gate of the second transistor T2 is connected to the first scan signal terminal. In the data writing stage of the pixel driving circuit, the first scanning signal provided on the first scanning signal line Gate is a low level signal, and the second transistor T2 is turned on to write the data voltage signal into the pixel driving circuit. It should be noted that, in some embodiments, the first scan signal and the second scan signal may share one signal, that is, the first scan signal line Gate and the second scan signal line Gate (1) may share one scan signal line. In the embodiment of the present disclosure, only an example in which the first scan signal and the second scan signal share one signal will be described.

In some embodiments, as shown in fig. 2 and 3, the pixel driving circuit further includes: a first light emission control sub-circuit 14 and a second light emission control sub-circuit 15. The first light emitting control sub-circuit 14 is configured to transmit the first power supply voltage to the first terminal of the driving sub-circuit 10 under the control of the first light emitting control signal. The second light emission control sub-circuit 15 is configured to transmit the driving current outputted from the second terminal of the driving sub-circuit 10 to the anode of the light emitting device D to be driven under the control of the second light emission control signal. In the embodiment of the present disclosure, the first light-emitting control sub-circuit 14 and the second light-emitting control sub-circuit 15 are provided to control the driving current output from the driving sub-circuit 10 to be output to the light-emitting device D to be driven to drive the light-emitting device D to emit light in the light-emitting driving stage of the pixel driving circuit.

Specifically, with continued reference to fig. 3, the first light emitting control sub-circuit 14 includes: and a fourth transistor T4. The source of the fourth transistor T4 is connected to the first power supply voltage terminal, the drain of the fourth transistor T4 is connected to the source of the second transistor T2 and the source of the third transistor T3, and the gate of the fourth transistor T4 is connected to the first light emission control signal terminal. The second light emission control sub-circuit 15 includes: and a fifth transistor T5, wherein the source electrode of the fifth transistor T5 is connected to the drain electrode of the first transistor T1 and the second terminal of the third transistor T3, the drain electrode of the fifth transistor T5 is connected to the anode of the light emitting device D to be driven, and the gate electrode of the fifth transistor T5 is connected to the second light emission control signal terminal. In the light-emitting driving stage of the pixel driving circuit, the first light-emitting control signal provided by the first light-emitting control signal end is a low-level signal, the fourth transistor T4 is turned on, and the first power supply voltage of the first power supply voltage end is written into the source electrode of the third transistor T3; the second light-emitting control signal provided by the second light-emitting control signal terminal is a low-level signal, and the fifth transistor T5 is turned on to output the driving current output by the third transistor T3 to the light-emitting device D to be driven, so as to drive the light-emitting device D to emit light. It should be noted that, in some embodiments, the first light emission control signal and the second light emission control signal may share one signal, that is, the first light emission control signal line EM and the second light emission control signal line EM (1) may share the same signal line, and the first light emission control signal terminal and the second light emission control signal terminal share one control signal terminal. The embodiment of the present disclosure will be described by taking only an example in which the first control signal and the second control signal share one signal.

In order to more specifically embody the specific structure of the pixel driving circuit of the embodiment of the present disclosure, the following includes, for each pixel driving circuit: the driving sub-circuit 10, the data writing sub-circuit 11, the threshold compensation sub-circuit 12, the memory reset sub-circuit 13, the first light emission control sub-circuit 14, and the second light emission control sub-circuit 15 are exemplified.

The threshold compensation sub-circuit 12 includes a first transistor T1, a source of the first transistor T1 is connected to a second plate of the first capacitor C1 and a Gate of the third transistor T3, a drain of the first transistor T1 is connected to a drain of the third transistor T3 and a source of the fifth transistor T5, and a Gate of the first transistor T1 is connected to the second scan signal line Gate (1). The data writing sub-circuit 11 includes a second transistor T2, a source of the second transistor T2 is connected to a source of the third transistor T3 and a drain of the fourth transistor T4, a drain of the second transistor T2 is connected to a data voltage signal terminal, and a Gate of the second transistor T2 is connected to the first scan signal line Gate. The driving sub-circuit 10 includes a third transistor T3, a source of the third transistor T3 is connected to a source of the second transistor T2 and a drain of the fourth transistor T4, a drain of the third transistor T3 is connected to a drain of the first transistor T1 and a source of the fifth transistor T5, and a gate of the third transistor T3 is connected to a second plate of the first capacitor C1. The first light emitting control sub-circuit 14 includes a fourth transistor T4; the source of the fourth transistor T4 is connected to the first power supply voltage terminal, the drain of the fourth transistor T4 is connected to the source of the second transistor T2 and the source of the third transistor T3, and the gate of the fourth transistor T4 is connected to the first light emission control signal terminal. The second light emission control sub-circuit 15 includes a fifth transistor T5; the source electrode of the fifth transistor T5 is connected to the drain electrode of the first transistor T1 and the drain electrode of the third transistor T3, the drain electrode of the fifth transistor T5 is connected to the anode of the light emitting device D to be compensated and the second plate of the second capacitor C2, and the gate electrode of the fifth transistor T5 is connected to the second light emission control signal terminal. The memory Reset sub-circuit 13 includes a first capacitor C1 and a second capacitor C2, a first plate of the first capacitor C1 and a first plate of the second capacitor C2 are connected to the first control signal line Reset, a second plate of the first capacitor C1 is connected to a source of the first transistor T1 and a gate of the third transistor T3, and a second plate of the second capacitor C2 is connected to a source of the fifth transistor T5 and an anode of the light emitting device D to be driven.

In some embodiments, as shown in fig. 4, fig. 4 is a layout diagram in the pixel driving circuit shown in fig. 3. Referring specifically to fig. 4, a pixel circuit layer is disposed on a substrate, and the pixel circuit layer includes a plurality of pixel driving circuits shown in fig. 3, which may include a first semiconductor layer 4, a first conductive layer 5, a second conductive layer 6, a third conductive layer 7, and a fourth conductive layer 8 sequentially disposed in a direction away from the substrate. The first semiconductor layer 4 includes an active layer of the first transistor T1, an active layer of the second transistor T2, an active layer of the third transistor T3, an active layer of the fourth transistor T4, and an active layer of the fifth transistor T5 in the pixel driving circuit. The first conductive layer 5 includes at least a first scan signal line Gate, a first light emitting control signal line EM, a first plate of a first capacitor C1, a first plate of a second capacitor C2, a Gate of a first transistor T1, a Gate of a second transistor T2, a Gate of a third transistor T3, a Gate of a fourth transistor T4, and a Gate of a fifth transistor T5 in the pixel driving circuit. The second conductive layer 6 includes at least a second plate of the first capacitor C1, a second plate of the second capacitor C2, a partial structure of the first control signal line Reset, and a plate connection line in the pixel driving circuit. The third conductive layer 7 includes at least a plurality of interlayer connection electrodes. The fourth conductive layer 8 includes at least a power line, a Data voltage signal line Data, and a plurality of interlayer electrodes.

In some embodiments, the pixel driving circuit may further include a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, and a fifth insulating layer. The first insulating layer is arranged between the substrate base plate and the first semiconductor layer 4, the second insulating layer is arranged between the first semiconductor layer 4 and the first conductive layer 5, the third insulating layer is arranged between the first conductive layer 5 and the second conductive layer 6, the fourth insulating layer is arranged between the second conductive layer 6 and the third conductive layer 7, and the fifth insulating layer is arranged between the third conductive layer 7 and the fourth conductive layer 8.

A driving method including the pixel driving circuit shown in fig. 3 is described below. As shown in fig. 5, the driving stage at least includes: a reset phase (t 1), a data writing phase (t 2), and a light emission driving phase (t 3).

Reset phase (t 1): the first control signal line Reset writes a high frequency sub-signal, the first scan signal line Gate and the first light emitting control signal line EM write a high level signal, and the second transistor T2, the first transistor T1, the fourth transistor T4 and the fifth transistor T5 are all turned off. The first capacitor C1 and the second capacitor C2 can be regarded as wires under the action of the high-frequency sub-signal, and the gate of the third transistor T3 is Reset by the signal on the first control signal line Reset to prepare for writing the data voltage Vdata for the next frame; the anode of the light emitting device D is Reset by a signal on the first control signal line Reset, so that the light emitting device D is no longer in a forward conduction state, and an internal electric field formed by directional movement of impurity ions in the light emitting device D gradually disappears, thereby restoring the characteristics of the light emitting device D.

Data writing stage (t 2): the first scanning signal line Gate writes a low level signal, the signal on the first control signal line Reset is a direct current sub-signal, and the first light emitting control signal line EM writes a high level signal. The first transistor T1 and the second transistor T2 are turned on. The third transistor T3 is connected to the first transistor T1 in a diode structure, and the data voltage Vdata provided from the data voltage signal terminal is written into the gate of the third transistor T3 through the first transistor T1 and the second transistor T2 until the third transistor T3 is turned off. The gate voltage of the third transistor T3 is vdata+vth (Vth <0, vth is the threshold voltage of the third transistor T3), and is stored in the first capacitor C1. The voltages of the first plate and the second plate of the first capacitor C1 are vdata+vth and Vreset, respectively.

Light emission driving stage (t 3): the first light emitting control signal line EM writes a low level signal, the first scan signal line Gate writes a high level signal, the signal on the first control signal line Reset is still a dc sub-signal, the fourth transistor T4 and the fifth transistor T5 are both turned on, the source of the third transistor T3 is connected to the first power supply voltage terminal, and the source voltage of the third transistor T3 is instantaneously changed from Vdata of the previous stage to Vdd. The light emitting device D emits light under the driving of the third transistor T3, and at this time, the third transistor T3 operates in the saturation region, the gate voltage of the third transistor T3 is vdata+vth, and the source voltage of the third transistor T3 is Vdd, so the gate-source voltage of the driving transistor T3 is: vgs= (vdata+vth) -Vdd until the reset phase of the next frame.

Light emitting current I of light emitting device D _D Equal to the current flowing through the third transistor T3, the expression is as follows:

I _D ＝β(Vgs-Vth) ²

＝β(Vdata+Vth-Vdd-Vth) ²

＝β(Vdata-Vdd) ² (1)

wherein,,

μ _n is the electron mobility of the third transistor T3, C _ox Is an insulating capacitor of unit area, < >>

Is the aspect ratio of the third transistor T3.

The driving of the pixel driving circuit shown in fig. 3 is completed. It should be noted that, in the embodiment of the present disclosure, the pixel driving circuit may be a circuit structure including other numbers of transistors and capacitors, such as a 7T2C structure, a 6T1C structure, a 6T2C structure, or a 9T2C structure, in addition to the 5T2C structure (i.e., five transistors and two capacitors) shown in fig. 3, which is not limited in the embodiment of the present disclosure.

In some embodiments, with continued reference to fig. 5, the range of high frequency sub-signal voltage value variation may be set so as to vary over a smaller range to reduce power consumption of a display substrate having such pixel driving circuits.

In a second aspect, the present disclosure also provides a display substrate including the pixel driving circuit provided in the previous embodiment.

The display substrate provided by the embodiment of the disclosure can be at least applied to: display panel, flexible wearable device, cell phone, tablet computer, television, display, notebook computer, digital photo frame, navigator, etc. Other essential components of the display will be understood by those of ordinary skill in the art, and are not described in detail herein, nor should they be considered as limiting the invention.

In a third aspect, as shown in fig. 6, the present disclosure also provides another display substrate, including: a plurality of pixel columns 3 arranged side by side along the first direction X, each pixel column 3 including a plurality of N pixel units 2 arranged in sequence along the second direction Y; . Each pixel unit 2 includes at least a pixel driving circuit and a light emitting device D, and the pixel driving circuit is configured to drive the light emitting device D. Wherein, in the disclosed embodiment, the first direction X and the second direction Y are directions as shown in fig. 6.

The pixel driving circuit includes at least: a drive sub-circuit 10, a data writing sub-circuit 11, a threshold compensation sub-circuit 12, a memory reset sub-circuit 13, a first light emission control sub-circuit 14, and a second light emission control sub-circuit 15. The data writing sub-circuit 11 is configured to transmit a data voltage signal to a first terminal of the driving sub-circuit 10 under control of the first scan signal. The threshold compensation sub-circuit 12 is configured to compensate the threshold voltage of the driving sub-circuit 10 under control of the second scan signal. The driving sub-circuit 10 is configured to supply a driving current to the light emitting device D to be driven according to voltages of a first terminal and a control terminal thereof. For two pixel driving circuits which are positioned in the same pixel column 3 and are adjacent in scanning order, the n-1 th pixel driving circuit and the n-th pixel driving circuit are used for representing; wherein n and n-1 are for ease of understanding only and are not meant to be limiting in the examples of the present disclosure. The memory Reset sub-circuit 13 is connected to the first control signal line Reset, and when the first control signal line Reset is written with the first sub-signal, the memory Reset sub-circuit 13 writes the first sub-signal written on the first control signal line Reset into the control terminal of the driving sub-circuit 10 in the nth pixel driving circuit and the first pole of the light emitting device D driven by the n-1 th pixel driving circuit to Reset the control terminal of the driving sub-circuit 10 and the light emitting device D; when the first control signal line Reset is written into the second sub-signal, the data voltage signal written by the data writing sub-circuit 11 in the pixel driving circuit located in the n-th row can be stored; wherein 1<n is less than or equal to N, and N and N are integers.

In an embodiment of the present disclosure, with continued reference to fig. 6, fig. 6 is an exemplary display substrate in an embodiment of the present disclosure. The display substrate shown in fig. 6 is provided with a plurality of pixel units 2 arranged in an array, and the pixel units 2 form a pixel row 1 and a pixel column 3 shown in fig. 6. Wherein the pixel row 1 comprises a plurality of pixel units 2 arranged along a first direction X, and the pixel column 3 comprises a plurality of pixel units 3 arranged along a second direction Y. In the embodiment of the present disclosure, the n-1 th pixel unit 2 is disposed in the n-1 th pixel row 1, and the n-th pixel unit 2 is disposed in the n-th pixel row 1. The following description will be given by taking this arrangement as an example. In the embodiment of the present disclosure, the pixel driving circuit of the nth row supplies the reset signal to the light emitting device D driven by the pixel driving circuit of the previous row thereof, so that one storage reset sub-circuit 13 can simultaneously reset the control terminal of the driving sub-circuit 10 of the nth row and the first pole of the light emitting device D to be driven by the pixel driving circuit of the n-1 row. Meanwhile, the first pole of the light emitting device D and the control end of the driving sub-circuit 10 can be reset without additionally arranging a reset sub-circuit, a reset signal line and a reset signal end, so that the number of elements in the pixel driving circuit is reduced, the number of film layers in a display substrate with the pixel driving circuit is reduced, the process difficulty is reduced, and the yield is improved.

Meanwhile, in some embodiments, the light emitting device D to be driven may be a Micro inorganic light emitting diode, further, may be a current type light emitting diode such as a Micro light emitting diode (Micro Light Emitting Diode, micro LED) or a Mini light emitting diode (Mini Light Emitting Diode, mini LED), and of course, the light emitting device D in the embodiments of the present disclosure may also be an organic light emitting diode (Organic Light Emitting Diode, OLED). One of the first electrode and the second electrode of the light emitting device D is an anode, and the other is a cathode. In the embodiment of the disclosure, only the light emitting device D is taken as an OLED, and the first electrode of the light emitting device D is taken as an anode and the second electrode is taken as an cathode

Specifically, referring to fig. 7, fig. 7 is a schematic circuit diagram of a pixel driving circuit on the display substrate shown in fig. 6. The memory reset sub-circuit 13 in the pixel driving circuit includes at least a first capacitor C1 and a second capacitor C2. A first polar plate of the first capacitor C1 is connected with a first control signal line Reset, and a second polar plate of the first capacitor C1 is connected with a control end of the driving sub-circuit 10 and a first end of the threshold compensation sub-circuit 12; the first electrode plate of the second capacitor C2 is connected with the first control signal line Reset, and the second electrode plate of the second capacitor C2 is connected with the anode of the light emitting device D driven by the pixel driving circuit positioned in the n-1 row. In an embodiment of the present disclosure, the first sub-signal may be an ac sub-signal within one driving period of the pixel driving circuit, and the second sub-signal may be a high frequency sub-signal within one driving period of the pixel driving circuit.

In the embodiment of the present disclosure, in this way, two capacitors are used to be connected to the control terminal of the driving sub-circuit 10 in the pixel driving circuit of the nth row and the anode of the light emitting device D to be compensated of the n-1 th row, respectively. Because the capacitor has the property of high-frequency connection and low-frequency resistance, namely when the voltage on the capacitor is a low-frequency signal or a direct-current signal, the two polar plates of the capacitor can be considered as an open circuit, and the capacitor can be used as a storage element to store electric signals; when the voltage on the capacitor is a high-frequency signal, the high-frequency signal can be conducted, and the capacitor can be equivalent to a conducting wire in a circuit. Therefore, in the embodiment of the disclosure, in the Reset stage of the pixel driving circuit of the nth row, the electric signal loaded on the first control signal line Reset connected to the first capacitor C1 and the second capacitor C2 is a high-frequency sub-signal, the first capacitor C1 and the second capacitor C2 may be equivalent to the wires, the control terminal of the driving sub-circuit 10 in the pixel driving circuit of the nth row and the anode of the light emitting device D of the n-1 row are connected to the first control signal line Reset through the first capacitor C1 and the second capacitor C2, respectively, and at this time, the high-frequency sub-signal on the first control signal line Reset directly resets the control terminal of the driving sub-circuit 10 in the pixel driving circuit of the nth row and the light emitting device D of the n-1 row. The problem that the reset degree is different due to the difference of the control end potential of the driving sub-circuit 10 when the reset sub-circuit is additionally used for resetting is avoided, and the display effect of the display substrate with the pixel driving circuit is improved. Meanwhile, the reset of the light emitting device D can be realized by adding one capacitor, and the circuit structure of the pixel driving circuit is simple. Similarly, in the data writing stage of the pixel driving circuit of the nth row, the electric signal loaded on the first control signal line Reset connected to the first capacitor C1 and the second capacitor C2 is a dc sub-signal, and the first capacitor C1 stores the data voltage Vdata written by the data writing sub-circuit 11.

In some embodiments, with continued reference to fig. 7, the threshold compensation subcircuit 12 includes: a first transistor T1, wherein the source of the first transistor T1 is used as the first terminal of the threshold compensation sub-circuit 12, the drain is used as the second terminal of the threshold compensation sub-circuit 12, and the gate is used as the control terminal of the threshold compensation sub-circuit 12. The driving sub-circuit 10 includes: and a third transistor T3, wherein a source of the third transistor T3 is used as a first terminal of the driving sub-circuit 10, a drain is used as a second terminal of the driving sub-circuit 10, and a gate is used as a control terminal of the driving sub-circuit 10. Specifically, the source of the first transistor T1 is connected to the storage reset sub-circuit 13 and the control terminal of the driving sub-circuit 10, the drain of the first transistor T1 is connected to the second terminal of the driving sub-circuit 10, and the Gate of the first transistor T1 is connected to the second scan signal line Gate (1). The source of the third transistor T3 is connected to the first terminal of the data writing sub-circuit 11, the drain of the third transistor T3 is connected to the second terminal of the threshold compensation sub-circuit 12, and the gate of the third transistor T3 is connected to the memory reset sub-circuit 13 and the first terminal of the threshold compensation sub-circuit 12. In the data writing stage of the pixel driving circuit, the source electrode of the third transistor T3 is written with a data voltage signal, the second scanning signal provided on the second scanning signal line Gate (1) is a low level signal, the first transistor T1 is turned on, and the Gate electrode and the drain electrode of the third transistor T3 are turned on, so that the compensation of the threshold voltage of the third transistor T3 is realized. And, due to the on state of the first transistor T1, the data voltage signal is written into the gate of the third transistor T3 through the source/drain of the first transistor T1, and meanwhile, due to the signal loaded on the first control signal line Reset being a dc sub-signal, the first capacitor C1 stores the data voltage Vdata.

In some embodiments, with continued reference to fig. 7, the data write sub-circuit 11 includes: and a source electrode of the second transistor T2 is used as a first end of the data writing sub-circuit 11, a drain electrode of the second transistor T2 is used as a second end of the data writing sub-circuit 11, and a gate electrode of the second transistor T2 is used as a control end of the data writing sub-circuit 11. Specifically, the source of the second transistor T2 is connected to the first terminal of the driving sub-circuit 10, the drain of the second transistor T2 is connected to the data voltage signal terminal, and the gate of the second transistor T2 is connected to the first scan signal terminal. In the data writing stage of the pixel driving circuit, the first scanning signal provided on the first scanning signal line Gate is a low level signal, and the second transistor T2 is turned on to write the data voltage signal into the pixel driving circuit. It should be noted that, in some embodiments, the first scan signal and the second scan signal may share one signal, that is, the first scan signal line Gate and the second scan signal line Gate (1) may share one scan signal line, and the first scan signal terminal and the second scan signal terminal may share one scan signal terminal. In the embodiment of the present disclosure, only an example in which the first scan signal and the second scan signal share one signal will be described.

In some embodiments, the pixel driving circuit further comprises: a first light emission control sub-circuit 14 and a second light emission control sub-circuit 15. The first light emitting control sub-circuit 14 is configured to transmit the first power supply voltage to the first terminal of the driving sub-circuit 10 under the control of the first light emitting control signal. The second light emission control sub-circuit 15 is configured to transmit the driving current outputted from the second terminal of the driving sub-circuit 10 to the anode of the light emitting device D to be driven under the control of the second light emission control signal. In the embodiment of the present disclosure, the first light-emitting control sub-circuit 14 and the second light-emitting control sub-circuit 15 are provided to control the driving current output from the driving sub-circuit 10 to be output to the light-emitting device D to be driven to drive the light-emitting device D to emit light in the light-emitting driving stage of the pixel driving circuit.

Specifically, with continued reference to fig. 7, the first light emitting control sub-circuit 14 includes: and a fourth transistor T4. The source of the fourth transistor T4 is connected to the first power supply voltage terminal, the drain of the fourth transistor T4 is connected to the source of the second transistor T2 and the source of the third transistor T3, and the gate of the fourth transistor T4 is connected to the first light emission control signal terminal. The second light emission control sub-circuit 15 includes: and a fifth transistor T5, wherein the source electrode of the fifth transistor T5 is connected to the drain electrode of the first transistor T1 and the drain electrode of the third transistor T3, the drain electrode of the fifth transistor T5 is connected to the anode of the light emitting device D to be driven, and the gate electrode of the fifth transistor T5 is connected to the second light emission control signal terminal. In the light-emitting driving stage of the pixel driving circuit, the first light-emitting control signal provided by the first light-emitting control signal end is a low-level signal, the fourth transistor T4 is turned on, and the first power supply voltage of the first power supply voltage end is written into the source electrode of the third transistor T3; the second light-emitting control signal provided by the second light-emitting control signal terminal is a low-level signal, and the fifth transistor T5 is turned on to output the driving current output by the third transistor T3 to the light-emitting device D to be driven, so as to drive the light-emitting device D to emit light. It should be noted that, in some embodiments, the first light emission control signal and the second light emission control signal may share one signal, that is, the first light emission control signal line EM and the second light emission control signal line EM (1) may share the same signal line, and the first light emission control signal terminal and the second light emission control signal terminal share one light emission control signal terminal. In the embodiment of the present disclosure, only an example in which the first light emission control signal and the second light emission control signal share one signal will be described.

In order to more specifically embody the specific structure of the pixel driving circuit of the embodiment of the present disclosure, referring specifically to fig. 4, each of the following pixel driving circuits includes: the driving sub-circuit 10, the data writing sub-circuit 11, the threshold compensation sub-circuit 12, the memory reset sub-circuit 13, the first light emission control sub-circuit 14, and the second light emission control sub-circuit 15 are exemplified.

The threshold compensation sub-circuit 12 includes a first transistor T1, a source of the first transistor T1 is connected to a second plate of the first capacitor C1 and a Gate of the third transistor T3, a drain of the first transistor T1 is connected to a drain of the third transistor T3 and a source of the fifth transistor T5, and a Gate of the first transistor T1 is connected to the second scan signal line Gate (1). The data writing sub-circuit 11 includes a second transistor T2, a source of the second transistor T2 is connected to a source of the third transistor T3 and a drain of the fourth transistor T4, a drain of the second transistor T2 is connected to a data voltage signal terminal, and a Gate of the second transistor T2 is connected to the first scan signal line Gate. The driving sub-circuit 10 includes a third transistor T3, a source of the third transistor T3 is connected to a source of the second transistor T2 and a drain of the fourth transistor T4, a drain of the third transistor T3 is connected to a drain of the first transistor T1 and a source of the fifth transistor T5, and a gate of the third transistor T3 is connected to a second plate of the first capacitor C1. The first light emitting control sub-circuit 14 includes a fourth transistor T4; the source of the fourth transistor T4 is connected to the first power supply voltage terminal, the source of the fourth transistor T4 is connected to the drain of the second transistor T2 and the source of the third transistor T3, and the gate of the fourth transistor T4 is connected to the first light emission control signal terminal. The second light emission control sub-circuit 15 includes a fifth transistor T5; the source electrode of the fifth transistor T5 is connected to the drain electrode of the first transistor T1 and the second end of the third transistor T3, the drain electrode of the fifth transistor T5 is connected to the anode of the light emitting device D to be compensated and the second plate of the second capacitor C2, and the control electrode of the fifth transistor T5 is connected to the second light emission control signal end. The memory Reset sub-circuit 13 includes a first capacitor C1 and a second capacitor C2, a first plate of the first capacitor C1 and a first plate of the second capacitor C2 are connected to the first control signal line Reset, a second plate of the first capacitor C1 is connected to a source of the first transistor T1 and a gate of the third transistor T3 in the pixel driving circuit of the n-1 th row, and a second plate of the second capacitor C2 is connected to a source of the fifth transistor T5 in the pixel driving circuit of the n-1 th row and an anode of the light emitting device D to be driven by the pixel driving circuit of the n-1 th row.

In the embodiment of the present disclosure, the driving method of the pixel driving circuit shown in fig. 7 is the same as the driving method of the pixel driving circuit shown in fig. 3, and thus the description thereof is omitted.

It is to be understood that the above embodiments are merely exemplary embodiments employed to illustrate the principles of the present disclosure, however, the present disclosure is not limited thereto. Various modifications and improvements may be made by those skilled in the art without departing from the spirit and substance of the disclosure, and are also considered to be within the scope of the disclosure.

Claims

1. A pixel driving circuit, comprising: a drive sub-circuit, a data write sub-circuit, a threshold compensation sub-circuit, and a storage reset sub-circuit; wherein,,

the data writing sub-circuit is configured to transmit a data voltage signal to a first end of the driving sub-circuit under the control of a first scanning signal;

the threshold compensation sub-circuit is configured to compensate the threshold voltage of the driving sub-circuit under the control of a second scanning signal;

the driving sub-circuit is configured to provide a driving current for the light emitting device to be driven according to the voltages of the first end and the control end of the driving sub-circuit;

The storage reset sub-circuit is connected with a first control signal line, and when the first control signal line is written with a first sub-signal, the storage reset sub-circuit writes the first sub-signal written on the first control signal line into the control end of the driving sub-circuit so as to reset the control end of the driving sub-circuit; when the first control signal line is written with a second sub-signal, the data voltage signal written by the data writing sub-circuit can be stored;

the first sub-signal is a high-frequency signal, and the second sub-signal is a direct current signal;

the memory reset sub-circuit comprises at least a first capacitor;

the first polar plate of the first capacitor is connected with the first control signal line, and the second polar plate of the first capacitor is connected with the control end of the driving sub-circuit and the first end of the threshold compensation sub-circuit.

2. The pixel driving circuit according to claim 1, wherein when the first control signal line is written to the first sub-signal, the memory reset sub-circuit is further configured to write the first sub-signal written on the first control signal line to a first pole of the light emitting device to be driven to reset the light emitting device.

3. The pixel drive circuit of claim 2, wherein the storage reset sub-circuit further comprises a first capacitor and a second capacitor;

the first polar plate of the first capacitor is connected with the first control signal line, and the second polar plate of the first capacitor is connected with the control end of the driving sub-circuit and the first end of the threshold compensation sub-circuit;

the first polar plate of the second capacitor is connected with the first control signal line, and the second polar plate of the second capacitor is connected with the light emitting device to be driven.

4. The pixel driving circuit according to claim 1, further comprising: a first light emission control sub-circuit and a second light emission control sub-circuit;

the first light emitting control sub-circuit is configured to transmit a first power supply voltage to a first end of the driving sub-circuit under the control of a first light emitting control signal;

the second light emission control sub-circuit is configured to transmit the driving current output from the second terminal of the driving sub-circuit to the first electrode of the light emitting device to be driven under the control of a second light emission control signal.

5. The pixel driving circuit according to claim 4, wherein the first light emitting control sub-circuit comprises: a fourth transistor;

The first pole of the fourth transistor is connected with a first power supply voltage end, the second pole of the fourth transistor is connected with the first end of the data writing sub-circuit and the first end of the driving sub-circuit, and the control pole of the fourth transistor is connected with a first light emitting control signal end;

the second light emission control sub-circuit includes: a fifth transistor;

the first pole of the fifth transistor is connected with the second end of the threshold compensation sub-circuit and the second end of the driving sub-circuit, the second pole of the fifth transistor is connected with the first pole of the light emitting device to be compensated, and the control pole of the fifth transistor is connected with the second light emitting control signal end.

6. The pixel drive circuit according to claim 1, wherein the drive sub-circuit comprises: a third transistor;

the first pole of the third transistor is connected with the first end of the data writing sub-circuit, the second pole of the third transistor is connected with the second end of the threshold compensation sub-circuit, and the control pole of the third transistor is connected with the storage reset sub-circuit.

7. The pixel driving circuit according to claim 1, wherein the data writing sub-circuit comprises: a second transistor;

The first electrode of the second transistor is connected with the first end of the driving sub-circuit, the second electrode of the second transistor is connected with the data voltage signal end, and the control electrode of the second transistor is connected with the first scanning signal end.

8. The pixel driving circuit according to claim 1, wherein the threshold compensation sub-circuit comprises: a first transistor;

the first pole of the first transistor is connected with the control ends of the storage reset sub-circuit and the driving sub-circuit, the second pole of the first transistor is connected with the second end of the driving sub-circuit, and the control pole of the first transistor is connected with the second scanning signal line.

9. A display substrate comprising a pixel driving circuit according to any one of claims 1-8.

10. The display substrate is characterized by comprising a plurality of pixel columns which are arranged side by side along a first direction, wherein each pixel column comprises a plurality of N pixel units which are arranged in sequence along a second direction; each pixel unit at least comprises a pixel driving circuit and a light emitting device, and the pixel driving circuit is configured to drive the light emitting device; the pixel driving circuit includes at least: a driving sub-circuit, a data writing sub-circuit, a threshold compensation sub-circuit, a memory reset sub-circuit, a first light emission control sub-circuit, and a second light emission control sub-circuit;

for two pixel driving circuits which are positioned in the same pixel column and are adjacent in scanning sequence, the n-1 th pixel driving circuit and the n-th pixel driving circuit are used for representing;

the storage reset sub-circuit is connected with a first control signal line, and when the first control signal line is written with a first sub-signal, the storage reset sub-circuit writes the first sub-signal written on the first control signal line into a control end of the driving sub-circuit in the nth pixel driving circuit and a first pole of the light emitting device driven by the n-1 th pixel driving circuit so as to reset the control end of the driving sub-circuit and the light emitting device;

when the first control signal line is written with a second sub-signal, the data voltage signal written by the data writing sub-circuit in the pixel driving circuit positioned at the nth can be stored; wherein 1<n is less than or equal to N, and N and N are integers.

11. The display substrate of claim 10, wherein the memory reset sub-circuit comprises at least a first capacitor and a second capacitor;

a first polar plate of the first capacitor is connected with the first control signal line, and a second polar plate of the first capacitor is connected with the control end of the driving sub-circuit and the first end of the threshold compensation sub-circuit;

the first polar plate of the second capacitor is connected with the first control signal line, and the second polar plate of the second capacitor is connected with the first polar of the light emitting device driven by the n-1 pixel driving circuit.

12. The display substrate according to claim 10, wherein the pixel driving circuit further comprises: a first light emission control sub-circuit and a second light emission control sub-circuit;

13. The display substrate of claim 12, wherein the first light emitting control sub-circuit comprises a fourth transistor;

the second light emission control sub-circuit includes: a fifth transistor;

14. The display substrate of claim 10, wherein the threshold compensation sub-circuit comprises: a first transistor; the data writing sub-circuit includes: a second transistor; the driving sub-circuit includes: a third transistor;

the first pole of the first transistor is connected with the control ends of the storage reset sub-circuit and the driving sub-circuit, the second pole of the first transistor is connected with the second end of the driving sub-circuit, and the control pole of the first transistor is connected with the second scanning signal line;

The first electrode of the second transistor is connected with the first end of the driving sub-circuit, the second electrode of the second transistor is connected with the data voltage signal end, and the control electrode of the second transistor is connected with the first scanning signal line;