CN114299843B - Driving method and driving device of display panel and display device - Google Patents
Driving method and driving device of display panel and display device Download PDFInfo
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Abstract
The invention relates to a driving method, a driving device and a display device of a display panel, which are characterized in that by adjusting a clock signal corresponding to a first display area, the effective level time of a gate driving signal of the first display area is smaller than or equal to the effective level time of a gate driving signal of a second display area, and/or the amplitude of the gate driving signal of the first display area is smaller than the amplitude of the gate driving signal of the second display area, the gate driving signal of the first display area is generated according to the adjusted clock signal corresponding to the first display area, the gate driving signal of the second display area is generated according to the clock signal corresponding to the second display area, and the display panel is driven according to the gate driving signal of the first display area and the gate driving signal of the second display area. According to the method and the device, the charging voltage difference between the first display area and the second display area can be reduced, the display whitening problem of the first display area is improved, and the display effect uniformity is achieved.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a driving method and device for a display panel, and a display device.
Background
With the development of display technology, the application of special-shaped display designs such as Notch areas (special-shaped areas) is wider and wider. For example, in order to realize functions such as self-timer, face recognition, visual call and fingerprint recognition, a special-shaped area is usually formed on the front surface of the display device, for example, a blind hole, a water drop, a ban and other designs are arranged in the special-shaped area, and a camera, a receiver, a fingerprint recognition module or a physical key and the like are arranged in the special-shaped area.
However, because the number and the area of the electrode blocks of the Notch area are smaller than those of the Normal area (i.e., the full-pixel display area), the electrical characteristics of the electrode blocks and the Normal area are greatly different, the RC loading (resistance capacitance load) of the Notch area is smaller than that of the Normal area, the charging effect of the Notch area is higher than that of the Normal area when the actual glass panel works, the display brightness is slightly higher than that of the Normal area, the whitening phenomenon of the Notch area is easy to occur under a low-gray-scale brightness picture, and the use experience is seriously influenced.
Specifically, referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel in the prior art. As shown in fig. 1, the display panel 100 includes a Notch area 110 and a Normal area 120, the number of pixel units of the Notch area 110 is smaller than that of the Normal area 120, and RC loading of the two areas is different, so that the difference of charging effects is easily caused under the condition of the same charging time, and the display effect is further affected.
The foregoing description is provided for general background information and does not necessarily constitute prior art.
Disclosure of Invention
To the technical problem, the application provides a driving method, a driving device and a display device of a display panel, which can improve the whitening problem of Notch area display, realize the uniformity of display effect, promote the use experience of users, and have low cost without changing hardware circuit design.
In order to solve the above technical problem, the present application provides a driving method of a display panel, the display panel includes a first display area and a second display area, a resistive-capacitive load of the first display area is smaller than a resistive-capacitive load of the second display area, the driving method includes:
adjusting a clock signal corresponding to the first display area;
generating a grid driving signal of the first display area according to the adjusted clock signal corresponding to the first display area, and generating a grid driving signal of the second display area according to the clock signal corresponding to the second display area;
driving the display panel according to the gate driving signal of the first display region and the gate driving signal of the second display region;
wherein the effective level time of the gate driving signal of the first display area is less than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than that of the gate driving signal of the second display area.
Optionally, the adjusting the clock signal corresponding to the first display area includes:
acquiring preset adjustment data in a storage module;
and adjusting the clock signal corresponding to the first display area according to the preset adjustment data.
Optionally, the adjusting the clock signal corresponding to the first display area includes:
acquiring a brightness value of the first display area and a brightness value of the second display area under a preset gray level;
acquiring preset adjustment data according to the brightness value of the first display area and the brightness value of the second display area;
and adjusting the clock signal corresponding to the first display area according to the preset adjustment data.
Optionally, the clock signal corresponding to the first display area and the clock signal corresponding to the second display area have the same waveform.
Optionally, the adjusting the clock signal corresponding to the first display area includes:
and carrying out delay processing of rising edges and/or falling edges on the clock signals corresponding to the first display area.
Optionally, the adjusting the clock signal corresponding to the first display area includes:
and reducing the duty ratio of the clock signal corresponding to the first display area.
To achieve the above object, the present application further provides a driving device for a display panel, the display panel including a first display area and a second display area, the first display area having a smaller resistance-capacitance load than the second display area, the driving device comprising:
the time sequence control module is used for adjusting the clock signal corresponding to the first display area;
the grid driving module is used for generating a grid driving signal of the first display area according to the adjusted clock signal corresponding to the first display area, generating a grid driving signal of the second display area according to the clock signal corresponding to the second display area, and driving the display panel according to the grid driving signal of the first display area and the grid driving signal of the second display area;
wherein the effective level time of the gate driving signal of the first display area is less than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than that of the gate driving signal of the second display area.
Optionally, the timing control module includes a timing control unit and an integration unit; wherein,,
the time sequence control unit is used for generating a clock signal;
the integration unit is used for carrying out delay processing of rising edges and/or falling edges on clock signals corresponding to the first display area.
Optionally, the timing control module includes a timing control unit and an adjustment unit; wherein,,
the time sequence control unit is used for generating a clock signal;
the adjusting unit is used for reducing the duty ratio of the clock signal corresponding to the first display area and/or the amplitude of the clock signal corresponding to the first display area.
In order to achieve the above object, the present application further provides a display device, which includes any one of the above driving devices.
According to the driving method, the driving device and the display device of the display panel, through adjusting the clock signals corresponding to the first display area, the grid driving signals of the first display area are generated according to the adjusted clock signals corresponding to the first display area, and the grid driving signals of the second display area are generated according to the clock signals corresponding to the second display area, so that the effective level time of the grid driving signals of the first display area is smaller than or equal to the effective level time of the grid driving signals of the second display area; and/or the amplitude of the grid driving signal of the first display area is smaller than that of the grid driving signal of the second display area, so that the charging voltage difference between the first display area and the second display area is reduced, the whitening problem of Notch area display can be improved, the display effect uniformity is realized, the use experience of a user is improved, the hardware circuit design is not required to be changed, and the cost is low.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
FIG. 1 is a schematic diagram of a prior art display panel;
FIG. 2 is a flowchart of a driving method of a display panel according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a driving timing diagram of a display panel according to an embodiment of the present disclosure;
FIG. 4 is a schematic diagram of a driving timing of a display panel according to another embodiment of the present disclosure;
fig. 5 is a block diagram of a driving apparatus according to an embodiment of the present application.
The realization, functional characteristics and advantages of the present application will be further described with reference to the embodiments, referring to the attached drawings. Specific embodiments thereof have been shown by way of example in the drawings and will herein be described in more detail. These drawings and the written description are not intended to limit the scope of the inventive concepts in any way, but to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the invention. All other embodiments, which can be made by one of ordinary skill in the art without inventive effort, are within the scope of the present invention based on the embodiments of the present invention.
Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The description herein of "first," "second," and the like, does not denote any order, quantity, or importance, but rather is used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items.
In order to ensure that the following description of the embodiments of the present disclosure is clear and concise, detailed descriptions of known functions and known components are omitted, and the description focuses on the point of the present invention.
Referring to fig. 2 in combination, fig. 2 is a flowchart of a driving method of a display panel according to an embodiment of the disclosure. As shown in fig. 2, the present application provides a driving method of a display panel, where the display panel includes a first display area and a second display area, and a resistive-capacitive load of the first display area is smaller than a resistive-capacitive load of the second display area, and the driving method includes:
step S1, adjusting a clock signal corresponding to a first display area.
Specifically, when the display panel works, RC loading (resistor-capacitor loading) is different, which causes delay of different degrees of charging waveforms of actual gate driving signals, that is, when the gate driving signals generated by the gate driving circuit according to the clock signals are loaded on the display panel, the signals are delayed, so that the difference of charging effects is caused. Since the charging voltage of the pixel circuit is proportional to T/RC, i.e., the smaller the RC loading, the better the charging effect, the charging difference between the first display area (i.e., the Notch area) and the second display area (i.e., the Normal area) is reduced by adjusting the charging time without changing the hardware circuit.
In an embodiment, step S1, adjusting a clock signal corresponding to a first display area includes:
acquiring preset adjustment data in a storage module;
and adjusting the clock signal corresponding to the first display area according to the preset adjustment data.
Specifically, the detected adjustment data is stored in the storage module in advance, and when the display device works, the clock signal corresponding to the first display area is adjusted by directly retrieving the data from the storage module. And the stability of the electrical characteristics of the display panel is higher, namely the probability of larger change of resistance, capacitance and impedance is very small, and the adjustment data does not need to be detected and obtained in real time after the product leaves the factory.
In an embodiment, step S1, adjusting a clock signal corresponding to a first display area includes:
acquiring a brightness value of a first display area and a brightness value of a second display area under a preset gray level;
acquiring preset adjustment data according to the brightness value of the first display area and the brightness value of the second display area;
and adjusting the clock signal corresponding to the first display area according to the preset adjustment data.
Specifically, when the display device performs factory debugging, the external brightness detection device can detect the brightness value of the first display area and the brightness value of the second display area under the preset gray scale, for example, 0 gray scale, 128 gray scales, 255 gray scales and the like, and then the display device obtains the brightness value detected by the detection device, compares and analyzes according to the brightness value to obtain adjustment data, and adjusts the clock signal corresponding to the first display area. The preset adjustment data may be an average value of adjustment data under a plurality of specific gray scales.
In an embodiment, the clock signal corresponding to the first display area and the clock signal corresponding to the second display area have the same waveform.
Specifically, the same waveform of the clock signal corresponding to the first display area and the clock signal corresponding to the second display area means that the initial clock signal waveform is the same.
In an embodiment, step S1, adjusting a clock signal corresponding to a first display area includes:
and carrying out delay processing of rising edges and/or falling edges on the clock signals corresponding to the first display area.
Specifically, referring to fig. 3, fig. 3 is a schematic diagram illustrating a driving timing of a display panel according to an embodiment of the present disclosure. As shown in fig. 3, the delay processing of the rising edge and the falling edge is performed on the clock signal corresponding to the first display region (Notch region) by the integration processing, and the corresponding gate driving signal is further adjusted, thereby reducing the charging time of the first display region. The clock signal corresponding to the second display area (Normal area) is not adjusted.
It should be noted that, fig. 3 shows that the waveform of the gate driving signal is a waveform after entering the panel (entering the panel refers to outputting from the gate driving unit to the corresponding pixel row of the panel), and it is understood that, when the clock signal (CLK) is not adjusted, the waveform of the gate driving signal corresponding to the second display area (Normal area) entering the panel is a waveform as shown in fig. 3, that is, does not correspond to the square wave of the clock signal, but has a delay, that is, has a rising edge and a falling edge. When the clock signal is not adjusted, the waveform of the gate driving signal corresponding to the first display area (Notch area) in the panel is substantially the same as the waveform of the clock signal, and is a square wave. In particular because the RC loading of the first display area is small, the delay is small or there is no delay. For the above reasons, in the present embodiment, by adjusting the corresponding clock signal of the first display region and performing the delay processing of the rising edge and the falling edge, the waveform of the gate drive signal actually inputted to the first display region in the panel is changed, and the difference in the charging effect between the first display region and the second display region can be reduced.
In an embodiment, step S1, adjusting a clock signal corresponding to a first display area includes:
the duty cycle of the clock signal corresponding to the first display area is reduced.
Specifically, referring to fig. 4, fig. 4 is a schematic diagram illustrating a driving timing of a display panel according to another embodiment of the present disclosure. As shown in fig. 4, in this embodiment, the clock signals are CLK1-CLK4, gate1-Gate4 are Gate driving signals of the first display area, and Gate5-Gate8 are Gate driving signals of the second display area, where it is known from the figure that the first pulse signals of CLK1-CLK4 are respectively used to generate the Gate driving signals Gate1-Gate4 of the first display area, and the second pulse signals of CLK1-CLK4 are respectively used to generate the Gate driving signals Gate5-Gate8 of the second display area (Gate is not shown in the figure), and in this embodiment, the charging time and the charging speed of the pixel units of the first display area are reduced by reducing the duty ratio of the clock signals corresponding to the first display area, that is, the duty ratio of the first pulse signals of CLK1-CLK4, and reducing the amplitude of the clock signals corresponding to the first display area, so as to reduce the charging effect of the pixel units of the first display area.
Step S2, generating a grid driving signal of a first display area according to the adjusted clock signal corresponding to the first display area, and generating a grid driving signal of a second display area according to the clock signal corresponding to the second display area;
step S3, driving the display panel according to the gate driving signal of the first display area and the gate driving signal of the second display area; wherein the effective level time of the gate driving signal of the first display area is less than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than the amplitude of the gate driving signal of the second display area.
According to the driving method of the display panel, the clock signal corresponding to the first display area is adjusted, so that the effective level time of the gate driving signal of the first display area is smaller than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than that of the gate driving signal of the second display area, so that the charging voltage difference between the first display area and the second display area is reduced, the whitening problem of the display of the Notch area can be improved, and the display effect is uniform.
The embodiment of the application also provides a driving device of the display panel, wherein the display panel comprises a first display area and a second display area, and the resistance-capacitance load of the first display area is smaller than that of the second display area. Referring to fig. 5, fig. 5 is a block diagram of a driving device according to an embodiment of the present application. As shown in fig. 5, the driving device includes:
the timing control module 20 is configured to adjust a clock signal corresponding to the first display area;
the gate driving module 30 is configured to generate a gate driving signal of the first display area according to the adjusted clock signal corresponding to the first display area, generate a gate driving signal of the second display area according to the clock signal corresponding to the second display area, and drive the display panel according to the gate driving signal of the first display area and the gate driving signal of the second display area;
wherein the effective level time of the gate driving signal of the first display area is less than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than the amplitude of the gate driving signal of the second display area.
Specifically, the gate driving module of the present embodiment, for example, an integrated gate driving circuit (Gate Driver in Array, GIA), includes a plurality of gate driving units cascaded in sequence, each gate driving unit is connected to a corresponding scanning line on the display panel, selects pixel units on the display panel by rows via the scanning lines, and provides corresponding gray-scale signals by columns via data lines on the display panel to realize image display.
In one embodiment, the timing control module 20 includes a timing control unit 210 and an integration unit 220; wherein,,
the timing control unit 210 is used for generating a clock signal;
the integrating unit 220 is configured to perform delay processing of rising edges and/or falling edges on the clock signal corresponding to the first display area.
Specifically, the timing control unit 20 generates a clock signal, where a portion of the clock signal corresponding to the first display area is subjected to integration processing by the integration unit 220, and after delay processing of a rising edge and/or a falling edge is implemented, the clock signal is output to the gate driving module 30 to generate a gate driving signal of the first display area, and a portion of the clock signal corresponding to the second display area is directly output to the gate driving module 30 to generate a gate driving signal of the second display area.
In an embodiment, the timing control module 20 includes a timing control unit 210 and an adjustment unit 230; wherein,,
the timing control unit 210 is used for generating a clock signal;
the adjusting unit 230 is configured to reduce a duty ratio of the clock signal corresponding to the first display area and/or an amplitude of the clock signal corresponding to the first display area.
Specifically, the timing control unit 20 generates a clock signal, where a portion of the clock signal corresponding to the first display area is processed by the adjusting unit 220, and the clock signal is output to the gate driving module 30 for generating the gate driving signal of the first display area after the duty ratio of the clock signal corresponding to the first display area and/or the amplitude of the clock signal corresponding to the first display area is reduced, and the portion of the clock signal corresponding to the second display area is directly output to the gate driving module 30 for generating the gate driving signal of the second display area.
In one embodiment, the timing control module further includes a processing module and a storage module; wherein the method comprises the steps of
The processing module is used for obtaining the brightness value of the first display area and the brightness value of the second display area under the preset gray scale; and acquiring preset adjustment data according to the brightness value of the first display area and the brightness value of the second display area, wherein the storage module is used for storing the preset adjustment data.
It should be noted that, the principle and the workflow of the driving device of the display panel provided in the present embodiment may refer to the driving method of the display panel, and will not be described again.
In summary, in the driving device for a display panel provided in this embodiment, by adjusting the clock signal corresponding to the first display area, the effective level time of the gate driving signal of the first display area is less than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than that of the gate driving signal of the second display area, so that the charging voltage difference between the first display area and the second display area is reduced, the whitening problem of the display of the Notch area can be improved, and the display effect is uniform.
The embodiment of the application also provides a driving device of the display panel, which comprises a memory and a processor, wherein the memory stores at least one program instruction, and the processor loads and executes the at least one program instruction to realize the driving method of the display panel in any embodiment.
The application also provides a display device, which comprises the driving device of the display panel of any embodiment.
Specifically, the display device may be any electronic product or component having a display function, such as a smart phone, a tablet computer, a smart television, a notebook computer, and the like. Other essential components of the display device will be understood by those skilled in the art, and are not described herein in detail, nor should they be considered as limiting the invention.
The present invention is not limited to the preferred embodiments, but is capable of modification and variation in detail, and is intended to cover modifications, equivalents and variations of the above embodiments in accordance with the principles of the present invention, without departing from the scope of the invention.
Claims (8)
1. A driving method of a display panel, wherein the display panel includes a first display region and a second display region, and a resistance-capacitance load of the first display region is smaller than a resistance-capacitance load of the second display region, the driving method comprising:
adjusting a clock signal corresponding to the first display area;
generating a grid driving signal of the first display area according to the adjusted clock signal corresponding to the first display area, and generating a grid driving signal of the second display area according to the clock signal corresponding to the second display area;
driving the display panel according to the gate driving signal of the first display region and the gate driving signal of the second display region;
wherein the effective level time of the gate driving signal of the first display area is less than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than the amplitude of the gate driving signal of the second display area;
the adjusting the clock signal corresponding to the first display area includes:
and carrying out delay processing of rising edges and/or falling edges on the clock signals corresponding to the first display area based on the integration processing.
2. The driving method according to claim 1, wherein the adjusting the clock signal corresponding to the first display area includes:
acquiring preset adjustment data in a storage module;
and adjusting the clock signal corresponding to the first display area according to the preset adjustment data.
3. The driving method according to claim 1, wherein the adjusting the clock signal corresponding to the first display area includes:
acquiring a brightness value of the first display area and a brightness value of the second display area under a preset gray level;
acquiring preset adjustment data according to the brightness value of the first display area and the brightness value of the second display area;
and adjusting the clock signal corresponding to the first display area according to the preset adjustment data.
4. The driving method according to claim 1, wherein the clock signal corresponding to the first display region has the same waveform as the clock signal corresponding to the second display region.
5. The driving method according to claim 1, wherein the adjusting the clock signal corresponding to the first display area includes:
and reducing the duty ratio of the clock signal corresponding to the first display area.
6. A driving device of a display panel, the display panel including a first display area and a second display area, a resistance-capacitance load of the first display area being smaller than a resistance-capacitance load of the second display area, the driving device comprising:
the time sequence control module is used for adjusting the clock signal corresponding to the first display area;
the grid driving module is used for generating a grid driving signal of the first display area according to the adjusted clock signal corresponding to the first display area, generating a grid driving signal of the second display area according to the clock signal corresponding to the second display area, and driving the display panel according to the grid driving signal of the first display area and the grid driving signal of the second display area;
wherein the effective level time of the gate driving signal of the first display area is less than or equal to the effective level time of the gate driving signal of the second display area; and/or the amplitude of the gate driving signal of the first display area is smaller than the amplitude of the gate driving signal of the second display area;
the time sequence control module comprises a time sequence control unit and an integration unit; wherein,,
the time sequence control unit is used for generating a clock signal;
the integration unit is used for carrying out delay processing of rising edges and/or falling edges on clock signals corresponding to the first display area.
7. The driving device according to claim 6, wherein the timing control module includes a timing control unit and an adjustment unit; wherein,,
the time sequence control unit is used for generating a clock signal;
the adjusting unit is used for reducing the duty ratio of the clock signal corresponding to the first display area and/or the amplitude of the clock signal corresponding to the first display area.
8. A display device comprising the driving device according to claim 6 or 7.
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| CN107146586A (en) * | 2017-06-20 | 2017-09-08 | 惠科股份有限公司 | Display panel drive circuit, display device, and drive method of display panel drive circuit |
| CN111627390A (en) * | 2019-02-27 | 2020-09-04 | 联咏科技股份有限公司 | Driving circuit, display device and driving method thereof |
| WO2021189576A1 (en) * | 2020-03-22 | 2021-09-30 | 深圳市华星光电半导体显示技术有限公司 | Gate driving circuit and display panel |
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| CN105575350A (en) * | 2016-02-26 | 2016-05-11 | 京东方科技集团股份有限公司 | Mura compensation circuit, Mura compensation method, driving circuit and display device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107146586A (en) * | 2017-06-20 | 2017-09-08 | 惠科股份有限公司 | Display panel drive circuit, display device, and drive method of display panel drive circuit |
| CN111627390A (en) * | 2019-02-27 | 2020-09-04 | 联咏科技股份有限公司 | Driving circuit, display device and driving method thereof |
| WO2021189576A1 (en) * | 2020-03-22 | 2021-09-30 | 深圳市华星光电半导体显示技术有限公司 | Gate driving circuit and display panel |
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