CN114283748A - Self-luminous display device - Google Patents
Self-luminous display device Download PDFInfo
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- CN114283748A CN114283748A CN202111648093.5A CN202111648093A CN114283748A CN 114283748 A CN114283748 A CN 114283748A CN 202111648093 A CN202111648093 A CN 202111648093A CN 114283748 A CN114283748 A CN 114283748A
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Abstract
A self-luminous display device comprises a self-luminous display panel, a multiplexer circuit, a source driver, a switch circuit and an anode reset circuit. The self-luminous display panel comprises a plurality of pixel circuits and a plurality of source lines. The pixel circuits each have a light emitting element and a driver circuit. The source lines are respectively coupled to a part of the pixel circuits and to the anode of the light emitting element of each coupled pixel circuit and the driving circuit. The source driver is coupled to the source lines through a multiplexer circuit to provide a plurality of gamma voltages to the source lines. The anode reset circuit is coupled to the source line through the switch circuit to provide at least one anode reset voltage to the source line.
Description
Technical Field
The invention relates to a display device, and more particularly to a self-luminous display device.
Background
Organic Light-Emitting diodes (OLEDs) are mature display process technologies, and many advantages make OLEDs key technologies for display devices. Among them, the organic light emitting diode has the advantages that: 1. high color saturation, bright color and high contrast; 2. black non-luminescence is beneficial to saving electricity; 3. the self-luminous property can be thinner without backlight, which is beneficial to saving the space of the mobile phone; and 4, can be folded and bent because of being light and thin.
However, the organic light emitting diode has parasitic capacitance, which affects low gray scale, and thus the voltage reset is required to be performed on the anode terminal of the organic light emitting diode, but the voltage reset may increase the layout area. For example, a voltage trace is independently pulled for voltage reset, resulting in an increase in layout area; or, when the frame refresh frequency is decreased, the leakage may affect the frame jitter (flicker), and a Low Temperature Poly Oxide (LTPO) circuit is required to overcome the leakage, and a larger circuit area is required.
Therefore, how to reset the voltage of the anode terminal of the oled without affecting the layout area becomes an important issue in designing the oled display device.
Disclosure of Invention
The invention provides a self-luminous display device, which can reset the voltage of the anode end of a luminous element under the condition of not influencing the layout area.
The invention discloses a self-luminous display device, which comprises a self-luminous display panel, a multiplexer circuit, a source electrode driver, a switch circuit and an anode resetting circuit. The self-luminous display panel comprises a plurality of pixel circuits and a plurality of source lines. The pixel circuits each have a light emitting element and a driver circuit. The source lines are respectively coupled to a part of the pixel circuits and to the anode of the light emitting element of each coupled pixel circuit and the driving circuit. The multiplexer circuit is coupled to the source line. The source driver is coupled to the source lines through a multiplexer circuit to provide a plurality of gamma voltages to the source lines. The switch circuit is coupled to the source line. The anode reset circuit is coupled to the source line through the switch circuit to provide a plurality of anode reset voltages to the source line.
In view of the above, in the self-luminous display device according to the embodiment of the invention, the source driver and the anode reset circuit transmit the gamma voltage and the anode reset voltage through sharing the common source line, so that the anode reset voltage can be transmitted without increasing the number of the traces on the self-luminous display panel, that is, the voltage reset can be performed on the anode terminal of the light emitting element without affecting the layout area.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a system diagram of a self-luminous display device according to an embodiment of the invention.
FIG. 2 is a circuit diagram of a self-emissive pixel in accordance with one embodiment of the present invention.
Fig. 3 is a timing diagram illustrating an operation of a self-emitting display device according to an embodiment of the invention.
Fig. 4 is a timing diagram illustrating an operation of a self-emitting display device according to another embodiment of the invention.
Wherein the reference numerals are as follows:
100: self-luminous display device
110: control circuit
120: source driver
130: anode reset circuit
140: self-luminous display panel
141: multiplexer circuit
143: pixel array
145: switching circuit
a: first end
b: second end
CP 1: current path
Cst: capacitor with a capacitor element
CT _ R, CT _ G, CT _ B: anode reset voltage
CT _ SW: switch control signal
DX 1: driving circuit
EM: luminous signal
F1-F11: during the picture
Hsync: during horizontal scanning
LD 1: light emitting element
LDX: source line
M1-M4: transistor with a metal gate electrode
Mux 1-MuxN: multiplexing control signals
OVDD: system voltage
OVSS: common voltage
PX, PXa: pixel circuit
S1, S2: scanning signal
SC1, SC 2: control signal
T11-T1N, TM 1-TMN: first switch
T2: second switch
Vdata1 to VdataM: gamma voltage
Vref: reference voltage
Detailed Description
Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a "first element," "component," "region," "layer" or "portion" discussed below could be termed a second element, component, region, layer or portion without departing from the teachings herein.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms, including "at least one", unless the content clearly indicates otherwise. "or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions integers, steps, operations, elements, components, and/or groups thereof.
FIG. 1 is a system diagram of a self-luminous display device according to an embodiment of the invention. Referring to fig. 1, in the present embodiment, a self-light emitting display device 100 at least includes a control circuit 110, a source driver 120, an anode reset circuit 130 and a self-light emitting display panel 140. The control circuit 110 includes, for example, a timing controller, the control circuit 110 is coupled to the source driver 120 for providing a control signal SC1, the anode reset circuit 130 for providing a control signal SC2, and the control circuit 110 is coupled to the self-emitting display panel 140 for providing multiplexing control signals Mux 1-MuxN and a switch control signal CT _ SW, where N may be a positive integer.
The self-light emitting display panel 140 includes a multiplexer circuit 141, a pixel array 143, and a switch circuit 145. The pixel array 143 includes a plurality of pixel circuits PX and a plurality of source lines LDX, wherein each pixel circuit PX at least has a light emitting device LD1, a current path CP1 and a driving circuit DX1, and the current path CP1 is coupled between the light emitting device LD1 and the driving circuit DX1, wherein the light emitting device LD1 may be an organic light emitting diode, but the embodiment of the invention is not limited thereto.
The source lines LDX are respectively coupled to a part of the pixel circuits PX (for example, a row of the pixel circuits PX), and each source line LDX is coupled to the anode of the light emitting element LD1 of each coupled pixel circuit PX and the driving circuit DX 1.
The multiplexer circuit 141 is coupled to the first ends a of the source lines LDX, and the source driver 120 is coupled to the source lines LDX through the multiplexer circuit 141 to provide a plurality of gamma voltages Vdata 1-VdataM to the source lines LDX through the multiplexer circuit 141. The switch circuit 145 is coupled to the second end B of the source lines LDX, and the anode reset circuit 130 is coupled to the source lines LDX through the switch circuit 145 to provide anode reset voltages (e.g., CT _ R, CT _ G, CT _ B) to the source lines LDX through the switch circuit 145.
In this embodiment, since the time for the pixel circuit PX to perform the voltage reset and the time for the data writing are different, the first on time of the multiplexer circuit 141 and the second on time of the switch circuit 145 do not overlap. In other words, when the voltage is reset, the switch circuit 145 is turned on and the multiplexer circuit 141 is turned off; and, when data writing is performed, the multiplexer circuit 141 is turned on and the switch circuit 145 is turned off.
Therefore, the source driver 120 and the anode reset circuit 130 transmit the gamma voltages Vdata 1-VdataM and the anode reset voltage CT _ R, CT _ G, CT _ B through sharing the source line LDX, so that the anode reset voltage CT _ R, CT _ G, CT _ B can be transmitted without adding wiring on the self-light emitting display panel 140, i.e., the anode terminal of the light emitting element LD1 can be reset without affecting the layout area. Moreover, the driving capability of the anode reset circuit 130 disposed outside the self-emitting display panel 140 is independent of the manufacturing process of the self-emitting display panel 140, so that the anode reset voltage CT _ R, CT _ G, CT _ B can be set according to the circuit requirements, i.e., the voltage range of the anode reset voltage CT _ R, CT _ G, CT _ B is not limited by the manufacturing process of the self-emitting display panel 140.
In an embodiment of the invention, the multiplexer circuit 141 includes a plurality of first switches (e.g., T11-T1N, TM 1-TMN), and the first switches (e.g., T11-T1N, TM 1-TMN) respectively receive one of the multiplexing control signals Mux 1-MuxN and are respectively coupled between the corresponding source lines LDX and the source drivers 120, wherein M may be a positive integer, and NxM may be equal to the number of source lines LDX. For example, the first switches T11, …, and TM1 receive the multiplexing control signal Mux1, and the first switches T1N, …, and TMN receive the multiplexing control signal MuxN.
In addition, the first switches (e.g., T11-T1N, TM 1-TMN) are divided into a plurality of subsets, and the first switches (e.g., T11-T1N, TM 1-TMN) in each subset receive the same gamma voltage (e.g., Vdata 1-VdataM). For example, the first switches T11-T1N can be considered as one subset (i.e., can be considered as one multiplexer) and receive the gamma voltage Vdata1, and the first switches TM 1-TMN can be considered as another subset (i.e., can be considered as another multiplexer) and receive the gamma voltage Vdata.
In the embodiment of the invention, the switch circuit 145 includes a plurality of second switches T2, which commonly receive the switch control signal CT _ SW and are respectively coupled between the corresponding source line LDX and the anode reset circuit 130. Since a high driving capability (e.g., current) is required to simultaneously drive all the pixel circuits PX, the pixel circuits PX may be divided into a plurality of groups to provide a plurality of anode reset voltages (e.g., CT _ R, CT _ G, CT _ B).
Further, the pixel circuits PX may be divided into red, green and blue groups according to color, and the anode reset voltages CT _ R, CT _ G, CT _ B may respectively correspond to the red, green and blue groups, so that the anode reset voltages CT _ R, CT _ G, CT _ B may be respectively set (or adjusted) according to the requirements of the red, green and blue groups. In addition, when the anode reset circuit 130 has sufficient driving capability, only one anode reset voltage may be provided, and the embodiment of the invention is not limited thereto.
In the embodiment, the multiplexer circuit 141 and the switch circuit 145 are disposed on the self-light emitting display panel 140, but in other embodiments, the multiplexer circuit 141 and the switch circuit 145 may be disposed outside the self-light emitting display panel 140, which may depend on circuit design, and the embodiment of the invention is not limited thereto.
Fig. 2 is a circuit diagram of a pixel circuit of a self-luminous display panel according to an embodiment of the invention. Referring to fig. 1 and fig. 2, in the present embodiment, the driving circuit DX1 of the pixel circuit PX includes a transistor M1 and a capacitor Cst, and the current path CP1 of the pixel circuit PX includes transistors M2 to M4, wherein the transistors M1 to M4 are N-type transistors, but the embodiment of the invention is not limited thereto.
The first terminal of the transistor M1 receives the reference voltage Vref, and the control terminal of the transistor M1 receives the scan signal S1. The capacitor Cst is coupled between the second terminal of the transistor M1 and the source line LDX. A first terminal of the transistor M2 receives the system voltage OVDD, and a control terminal of the transistor M2 is coupled to a second terminal of the transistor M1. The first terminal of the transistor M4 is coupled to the second terminal of the transistor M2, and the control terminal of the transistor M4 receives the light emitting signal EM. The first terminal of the transistor M3 is coupled to the source line LDX, the control terminal of the transistor M2 receives the scan signal S2, and the second terminal of the transistor M2 is coupled to the second terminal of the transistor M4. The light emitting device LD1 is coupled between the second terminal of the transistor M4 and the common voltage OVSS.
In the present embodiment, the transistors M1-M4 are N-type transistors, so the anode reset voltage (e.g., CT _ R, CT _ G, CT _ B) can be smaller than the common voltage OVSS commonly received by the pixel circuits PX, so as to completely eliminate the voltage drop of the parasitic capacitance of the light emitting element LD 1. On the contrary, if the transistors M1-M4 are P-type transistors, the structure of the pixel circuit PX is inverted, so that the anode reset voltage (e.g. CT _ R, CT _ G, CT _ B) can be larger than the common voltage (e.g. OVSS) commonly received by the pixel circuits PX, so as to completely eliminate the voltage drop of the parasitic capacitance of the light emitting element LD 1. According to the above, the anode reset voltage (e.g. CT _ R, CT _ G, CT _ B) may be different from the common voltage OVSS commonly received by the pixel circuits PX. Moreover, the anode reset voltage (e.g., CT _ R, CT _ G, CT _ B) outputted by the anode reset circuit 130 may be a positive voltage or a negative voltage based on the common voltage (e.g., OVSS), but the embodiment of the invention is not limited thereto.
Fig. 3 is a timing diagram illustrating an operation of a self-emitting display device according to an embodiment of the invention. Referring to fig. 1 and fig. 3, in the present embodiment, the self-luminous display device 100 can generally operate in a normal mode and a sleep mode. When the self-luminous display device 100 operates in the normal mode (i.e., the frame periods F1, F8, and F9), the self-luminous display device 100 is activated to update the image displayed on the self-luminous display panel 140. When operating in the sleep mode (i.e., during the frame periods F2-F7), the self-luminous display device 100 basically displays a black frame, but is still activated during a part of the frame periods (e.g., the frame periods F2 and F5) to update the black image displayed on the self-luminous display panel 140, so as to maintain the stability of the image, and the self-luminous display device 100 ignores the image update during the rest of the frame periods (e.g., the frame periods F3, F4, F6 and F7).
In the present embodiment, in the frame period (for example, the frame periods F3, F4, F6 and F7) in which the self-luminous display device 100 ignores the image update operation, the voltage of the anode of the light-emitting element LD1 of the pixel circuit PX can be reset in the entire frame period, that is, in the frame periods F3, F4, F6 and F7 in which the image update operation is ignored, the on time (i.e., the second on time) of the second switch T2 of the switch circuit 145 can last for more than one frame period.
Fig. 4 is a timing diagram illustrating an operation of a self-emitting display device according to another embodiment of the invention. Referring to fig. 1 and 4, in the present embodiment, when the self-luminous display device 100 operates in the normal mode, during 1 horizontal scanning period Hsync, the first switches (e.g., T11-T1N, TM 1-TMN) of the multiplexer circuit 141 are sequentially turned on, i.e., the multiplexing control signals Mux 1-MuxN are sequentially enabled, so as to transmit the gamma voltages Vdata 1-VdataM provided by the source driver 120 to the source line LDX for writing into the driving circuit DX1 of the pixel circuits PX in a row. When the driving circuit DX1 of the pixel circuits PX in a row writes the gamma voltage, the emission signal EM and the switch control signal CT _ SW are disabled, i.e., the light-emitting device LD1 of the pixel circuit PX is not turned on and the second switch T2 of the switch circuit 145 is not turned on, so as to avoid affecting the voltage writing.
When the gamma voltages of the driving circuits DX1 of the pixel circuits PX are all updated, the emission signal EM is enabled to light the light emitting devices LD1 of all the pixel circuits PX, and at this time, the multiplexing control signals Mux1 to MuxN and the switch control signal CT _ SW are disabled, that is, the first switches (e.g., T11 to T1N, TM1 to TMN) of the multiplexer circuit 141 and the second switch T2 of the switch circuit 145 are not turned on, so as to avoid affecting the display effect of the light emitting devices LD1 of the pixel circuits PX. Next, when the voltage of the anode terminal of the light emitting device LD1 is reset, the switch control signal CT _ SW is enabled to turn on the second switch T2 of the switch circuit 145, and the light emitting signal EM and the multiplexing control signals Mux 1-MuxN are disabled at this time, so as to avoid affecting the effect of resetting the voltage of the light emitting device LD 1.
In the present embodiment, when the self-luminous display device 100 operates in the normal mode, the self-luminous display device 100 updates the data (or voltage) of the pixel circuit PX, and the self-luminous display device 100 can utilize the horizontal scanning period Hsync that is not used for updating the data (or voltage) in the frame period (e.g., the frame period F10 or F11) to reset the voltage of the light emitting element LD 1. In other words, the self-luminous display device 100 can reset the voltage of the light emitting element LD1 by using 0.5 horizontal scanning periods Hsync or more than 1 horizontal scanning periods Hsync, that is, the on time (i.e., the second on time) of the second switch T2 of the switch circuit 145 can last more than 0.5 horizontal scanning periods Hsync, which depends on the circuit design and is not limited in the embodiments of the present invention.
In summary, in the self-emitting display device according to the embodiments of the invention, the source driver and the anode reset circuit transmit the gamma voltage and the anode reset voltage through sharing the common source line, so that the anode reset voltage can be transmitted without increasing the number of traces on the self-emitting display panel, that is, the voltage reset can be performed on the anode terminal of the light emitting element without affecting the layout area. In addition, the driving capability of the anode reset circuit disposed outside the self-luminous display panel is independent of the manufacturing process of the self-luminous display panel, so that the anode reset voltage can be set according to the circuit requirement, i.e. the voltage range of the anode reset voltage is not limited by the manufacturing process of the self-luminous display panel.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
Claims (13)
1. A self-luminous display device comprising:
a self-luminous display panel comprising:
a plurality of pixel circuits each having a light emitting element and a driving circuit; and
a plurality of source lines respectively coupled to a part of the pixel circuits, and coupled to an anode of the light emitting element of each coupled pixel circuit and the driving circuit;
a multiplexer circuit coupled to the source line;
a source driver coupled to the source lines through the multiplexer circuit to provide gamma voltages to the source lines;
a switch circuit coupled to the source line; and
an anode reset circuit coupled to the source line through the switch circuit for providing at least one anode reset voltage to the source line.
2. The self-light emitting display device of claim 1, wherein a first on time of the multiplexer circuit and a second on time of the switch circuit do not overlap.
3. The self-light emitting display device of claim 2, wherein the second on time lasts more than 0.5 horizontal scanning periods.
4. The self-luminous display device of claim 3, wherein the second on-time lasts more than one frame period when the self-luminous display device is operated in a sleep-mode.
5. The self-luminous display device according to claim 4, wherein the duration of the second on-time is interrupted before the self-luminous display device is switched to a normal mode in the sleep mode.
6. The self-luminous display device of claim 1, wherein the multiplexer circuit comprises a plurality of first switches, each of which receives a multiplexing control signal and is coupled between a corresponding source line and the source driver.
7. The self-light emitting display device of claim 1, wherein the switch circuit comprises a plurality of second switches, each of which receives a switch control signal and is coupled between a corresponding source line and the anode reset circuit.
8. The self-luminous display device of claim 1, wherein the at least one anode reset voltage is different from a common voltage commonly received by the pixel circuits.
9. The self-luminous display device of claim 8, wherein the at least one anode reset voltage is greater than the common voltage.
10. The self-luminous display device of claim 8, wherein the at least one anode reset voltage is less than the common voltage.
11. The self-light emitting display device of claim 1, wherein the multiplexer circuit and the switch circuit are disposed on the self-light emitting display panel.
12. The self-light emitting display device of claim 11, wherein the plurality of device circuits are coupled to a first end of the source line, and the switch circuit is coupled to a second end of the source line.
13. The self-light emitting display device of claim 1, wherein the light emitting element comprises an organic light emitting diode.
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TWI837485B (en) | 2024-04-01 |
TW202303565A (en) | 2023-01-16 |
CN114283748B (en) | 2023-09-12 |
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