CN114093981A - Preparation method of InAlAs avalanche photodetector based on secondary epitaxy - Google Patents
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- H01L31/1075—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure
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Abstract
The invention discloses a preparation method of an InAlAs avalanche photodetector based on secondary epitaxy, which comprises the steps of sequentially growing a buffer layer, an absorption layer, a bandwidth gradient layer, a charge control layer, a multiplication layer, a corrosion stop layer and a cover layer on a substrate; then, the cover layer is corroded to form a central collector region and an electric field protection ring surrounding the central collector region, and corrosion is stopped on the upper surface of the corrosion stop layer; then, an InP barrier layer is formed in the etched area by secondary epitaxy, and then a ring of SiO is formed on the InP barrier layer at the periphery of the electric field protection ring2An isolation layer, wherein an optical antireflection film is then formed, and a metal contact window is formed on the optical antireflection film above the n-type InP central collector region; and then forming an upper electrode and a metal wiring board by utilizing photoresist, wherein the upper electrode is contacted with the central collector region through a metal contact window, and the upper electrode is provided with an optical incidence window which is arranged above the central collector region.
Description
Technical Field
The invention belongs to the technical field of photoelectric detectors, and particularly relates to a preparation method of an InAlAs avalanche photoelectric detector based on secondary epitaxy.
Background
The working principle of the avalanche photodetector is that under a high reverse bias electric field, photons are incident to an i region to enable electrons to jump from a valence band to a conduction band to form an electron-hole pair, and the electron-hole pair is accelerated under the action of a strong electric field and collides with other atoms to generate additional electron-hole pairs and continuously generate the electrons and the hole pairs. Because fewer photons and even single photon incidence can trigger the avalanche multiplication process to cause the change of current macroscopically, the avalanche photodetector has extremely high sensitivity and detection efficiency and has very high application prospect in the field of weak light detection and even single photon detection. Compared with the traditional silicon-based photoelectric detector, the avalanche photoelectric detector based on the III-V group compound semiconductor has higher sensitivity, can perform near-infrared weak light three-dimensional imaging with the wavelength of 1um or more, and has important application in the fields of biochemistry, quantum communication, laser radar and the like.
Most of the existing avalanche photodetectors are based on a separate absorption layer and multiplication layer Structure (SCAM), in which a narrow bandwidth ingaas (p) material is used as the light absorption layer and a high bandwidth InP or InAlAs material is used as the multiplication layer. The structure can effectively improve the breakdown voltage of the detector and reduce tunneling dark current. Compared with InP, the avalanche photodetector using InAlAs material as multiplication layer has higher photon detection sensitivity, lower noise and lower temperature dependence. However, in the existing avalanche photodetector structure, because a large bandwidth difference exists between the absorption layer and the multiplication layer, the photogenerated carriers are easily accumulated at the interface of the absorption layer and the multiplication layer, and thus the response rate is reduced. In addition, the existing preparation methods of the avalanche photodetector are mainly divided into two types: (1) a table top type: the active area is corroded into a cylindrical table top, and the upper electrode and the lower electrode are respectively arranged at the top end of the table top and the lower part of the table top, so that the p area and the n area of the detector are electrically isolated. The preparation method can effectively reduce the parasitic capacitance of the detector, thereby improving the response speed of the detector, but the process flow is complex, particularly the side wall of the table top needs a special passivation process, and the dark current of the side wall of the table top is increased and the breakdown of the side wall of the table top is easily caused, thereby affecting the performance and the reliability of the detector; (2) plane diffusion type: a P-type metal contact layer is formed in a specific region in a Zn diffusion mode, and the non-diffused region is semi-insulating or weak n-type, so that the P region and the n region of the detector can be electrically isolated without mesa etching change. Because mesa etching is not needed, the preparation method can reduce the process complexity to a certain extent and reduce the problems of side wall leakage current and side wall breakdown caused by mesa etching. However, Zn diffusion is a process that is difficult to control accurately and varies widely. Instability of the Zn diffusion process causes inconsistency of the detector, and also reduces yield in production.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a preparation method of an InAlAs avalanche photodetector based on secondary epitaxy.
The invention is realized by the following technical scheme:
a preparation method of an InAlAs avalanche photodetector based on secondary epitaxy comprises the following steps:
the method comprises the following steps: sequentially growing a p-type InP buffer layer and In on a p-type InP substrate0.53Ga0.47As absorption layer and In1-x- yAlxGayAs band width graded layer, p-type In0.52Al0.48As charge control layer, In0.52Al0.48As multiplication layer, InxGa1-xAsyP1-yEtching the stop layer and the n-type InP cover layer;
step two: using SiO2Patterning the hard mask, etching the n-type InP cover layer by etching, forming an n-type InP central collector region and an n-type InP electric field protection ring surrounding the n-type InP central collector region with the rest of the n-type InP cover layer, and stopping etching InxGa1-xAsyP1-yEtching the upper surface of the stop layer; the n-type InP central collector region is circular and is positioned in the middle region, the n-type InP electric field protection ring surrounds the periphery of the n-type InP central collector region, and a gap is formed between the n-type InP central collector region and the n-type InP electric field protection ring;
step three: using the same SiO as in step two2A hard mask pattern, wherein an InP barrier layer is generated in the etched area in the second step through secondary epitaxy; after the second epitaxy, etching off SiO by using etching method2Hard masking to obtain a flat surface, i.e. flush the surfaces of the n-type InP central collector region, the n-type InP electric field guard ring and the secondary epitaxial InP barrier layer;
step four: depositing SiO on the flat surfaces of the n-type InP central collector region, the n-type InP electric field protection ring and the InP barrier layer obtained in the step three2Layer, then etching away partial region of SiO using a photoresist patterned mask2So that a ring of annular SiO is formed on the InP barrier layer at the periphery of the n-type InP electric field protection ring2An isolation layer;
step five: in the n-type InP central collector region, n-type InP electric field protection ring, InP barrier layer and SiO2Depositing an optical antireflection film on the surface of the isolation layer, and forming an annular metal contact window on the optical antireflection film above the n-type InP central collector region by using a corrosion method;
step six: forming an upper electrode metal and metal wiring board graph by using photoresist, evaporating metal and carrying out metal stripping to obtain a patterned upper electrode and a metal wiring board; the upper electrode is in contact with the n-type InP central collector region through the metal contact window in the fifth step, and ohmic contact is formed through annealing; the metal wiring board is positioned on SiO2The right upper side of the isolation layer; the upper electrode is provided with an optical incidence window which is arranged above the n-type InP central collector region;
step seven: and thinning and polishing the back surface of the p-type InP substrate, preparing a back electrode on the lower surface of the p-type InP substrate, and annealing to form ohmic contact.
In the technical scheme, the thickness of the p-type InP buffer layer is 0.1-1um, and the function of the p-type InP buffer layer is to better match the p-type InP substrate with In0.53Ga0.47The difference of lattice constants between the As absorption layers caused by different growth conditions ensures the growth quality of the epitaxial layer.
In the above technical solution, the In0.53Ga0.47The thickness of the As absorption layer is 1-5um, and the background doping concentration is less than 1 × 1015/cm3The layer is a photogenerated carrier generation layer and is designed to absorb photon energy of 1.0-1.7 um as far as possible.
In the above technical solution, the In1-x-yAlxGayThe As bandwidth gradient layer comprises N layers of In with gradually changed components1-x- yAlxGayAs layer with N greater than 1, preferably 3 layers, each layer having a bandwidth of 0.75eV to 1.35eV, In1-x-yAlxGayThe bandwidth of each layer of the As bandwidth gradient layer is increased from bottom to top In sequence0.53Ga0.47The bandwidth of the As absorption layer is gradually changed to p-type In0.52Al0.48The bandwidth of the As charge control layer can effectively reduce the accumulation of photon-generated carriers at the interface.
In the above technical solution, the p-type In0.52Al0.48The thickness of the As charge control layer is 200-500nm, and the doping concentration is 6 multiplied by 1016/cm3. The thickness and doping concentration of this layer determine the onset voltage of the detector avalanche effect.
In the above technical solution, the In0.52Al0.48The thickness of the As multiplication layer is 300-800nm, and the background doping concentration is less than 1 multiplied by 1015/cm3。
In the above technical solution, the InxGa1-xAsyP1-yThe etch stop layer has a thickness of 10-40nm, a bandwidth of 1.25eV, and is formed by using InxGa1-xAsyP1-yEtching the stop layer to avoid In0.52Al0.48The As multiplication layer is exposed in air after corrosion to generate oxidation, so that the surface defect density is reduced, and the dark current generated by surface recombination is reduced.
In the above technical solution, the n-type InP electric field protection rings are ring-shaped, the number of n-type InP electric field protection rings is one or more, and if there are a plurality of n-type InP electric field protection rings, there is also a gap between the n-type InP electric field protection rings.
In the technical scheme, the InP blocking layer is semi-insulating or weak p-type, and forms a reverse bias PN junction potential barrier with the adjacent n-type InP central collector region and the n-type InP electric field protection ring, so that the collector region is electrically insulated from other regions.
In the above technical solution, the SiO2The thickness of the isolation layer is 500nm to 1500 nm.
In the above technical scheme, the secondary epitaxy may adopt a Metal Organic Chemical Vapor Deposition (MOCVD) or a Molecular Beam Epitaxy (MBE).
The invention has the advantages and beneficial effects that:
1. by using In1-x-yAlxGayAs band width transition layer to realize In0.53Ga0.47As absorption layer and In0.52Al0.48The bandwidth between the As charge control layers is smoothly transited, so that the accumulation of photon-generated carriers is reduced, and the response speed of the detector is improved.
2. And (3) etching the n-type InP cover layer by adopting patterning, wherein the rest InP cover layer forms a central collector region and an electric field protection ring surrounding the central collector region. The central collector region is used for forming ohmic contact with the upper electrode and simultaneously plays a role of a window layer. The electric field protection ring can effectively reduce the electric field intensity at the edge of the collector region, reduce the probability of the edge of the detector being broken down and reduce the tunneling dark current at the edge. By using InxGa1-xAsyP1-yEtching the stop layer to avoid In0.52Al0.48As materials are exposed to air after corrosion to generate oxidation, the surface defect density is reduced, and dark current generated by surface recombination is reduced.
3. And performing secondary epitaxy on the etched area by using selective secondary epitaxy to fill InP. The InP barrier layer of the secondary epitaxy is semi-insulating or weak p-type, and forms a reverse bias PN junction potential barrier with the rest part of the adjacent n-type InP cover layer, so that the electrical insulation between the collector region and other regions is realized; in addition, the secondary epitaxy InP barrier layer and the corroded material are InP base materials, so that the secondary epitaxy InP barrier layer belongs to homoepitaxy, the crystal quality of the secondary epitaxy is high, the defect density of an interface is reduced, and leakage current can be effectively reduced.
4. The epitaxial structure adopts a flip structure on the n under the p, so that the use of a Zn diffusion process is avoided. Wherein p-type In0.52Al0.48As charge control layer and In0.52Al0.48The thickness and doping of the As multiplication layer are accurately controlled by the first epitaxial growth, so that the problem of inconsistency of the detector caused by instability of a Zn diffusion process in a preparation method of the diffusion detector does not exist. Meanwhile, the detector adopting the preparation method of the invention is of a plane structure and does not existThe problem of leakage current and easy breakdown of the side wall of the table top caused by the preparation method of the table top structure.
5. SiO with the thickness of 500nm to 1500nm is added between the upper electrode metal wiring board and the secondary epitaxial InP barrier layer2The isolation layer effectively reduces the capacitance between the metal wiring board and the InP blocking layer, and improves the response speed of the detector.
6. The upper electrode and the metal routing plate are simultaneously deposited and patterned, so that the process flow is simplified, the consumption of noble metal is saved, and the production cost is reduced.
Drawings
Fig. 1 is a flow chart of the preparation of the inaias avalanche photodetector based on the secondary epitaxy of the present invention.
Figure 2 is a typical IV plot for an avalanche photodetector of the present invention.
Figure 3 is a typical CV curve plot for an avalanche photodetector of the present invention.
Wherein:
1: a p-type InP substrate, a P-type InP substrate,
2: a p-type InP buffer layer is formed,
3：In0.53Ga0.47an As absorption layer is arranged on the substrate,
4：In1-x-yAlxGaythe As bandwidth gradual-change layer is arranged on the substrate,
5: p-type In0.52Al0.48An As charge control layer, which is a charge control layer,
6：In0.52Al0.48an As multiplication layer is arranged on the substrate,
7：InxGa1-xAsyP1-ythe corrosion of the stop layer is completed,
8: an n-type InP cap layer is formed,
9: an n-type InP central collector region,
10: an n-type InP electric field protection ring,
11: an InP barrier layer is formed on the substrate,
12：SiO2the isolation layer is arranged on the substrate,
13: an optical anti-reflection film is provided,
14: the metal contact window of the optical antireflection film,
15: upper electrode, 15.1: a metal wire-striking plate is arranged on the base,
16: the optical entrance window of the upper electrode,
17: a back electrode.
For a person skilled in the art, other relevant figures can be obtained from the above figures without inventive effort.
Detailed Description
In order to make the technical solution of the present invention better understood, the technical solution of the present invention is further described below with reference to specific examples.
Example one
As shown in fig. 1, a method for preparing an InAlAs avalanche photodetector based on secondary epitaxy includes the following steps:
the method comprises the following steps: sequentially growing a p-type InP buffer layer 2 and In on a p-type InP substrate 10.53Ga0.47As absorption layer 3, In1-x-yAlxGayAs band width gradient layer 4, p-type In0.52Al0.48As charge control layer 5, In0.52Al0.48As multiplication layer 6, InxGa1-xAsyP1-yThe etch stop layer 7 and the n-type InP cap layer 8.
Step two: using SiO2Patterning the hard mask, etching the n-type InP cover layer 8 In a specific region by etching, forming an n-type InP central collector region 9 and an n-type InP electric field protection ring 10 surrounding the n-type InP central collector region with the remaining n-type InP cover layer, and stopping etching InxGa1-xAsyP1-yEtching the upper surface of the stop layer 7; the n-type InP central collector region 9 is circular, has a thickness of 1um, and is located in a middle region, the n-type InP electric field protection rings 10 surround the n-type InP central collector region 9 with a gap therebetween, the number of the n-type InP electric field protection rings 10 may be one or multiple (in this embodiment, the number of the n-type InP electric field protection rings is one), and if the n-type InP electric field protection rings 10 are multiple, the n-type InP electric field protection rings 10 are also spaced. The InP barrier layer of the secondary epitaxy is semi-insulating or weak p-type, and forms a reverse bias PN junction potential barrier with the rest part of the adjacent n-type InP cover layer to realize the collector region and other regionsElectrical insulation of the domains; in addition, the secondary epitaxy InP barrier layer and the corroded material are InP base materials, so that the secondary epitaxy InP barrier layer belongs to homoepitaxy, the crystal quality of the secondary epitaxy is high, the defect density of an interface is reduced, and leakage current can be effectively reduced.
Step three: using the same SiO as in step two2A hard mask pattern, wherein an InP barrier layer 11 is generated in the etched area in the second step through secondary epitaxy; the thickness of the InP barrier layer 11 of the secondary epitaxy is consistent with the thickness of the InP etched in the second step; after the second epitaxy, etching off SiO by using etching method2Hard masking to obtain a flat surface, i.e. flush surfaces of the n-type InP central collector region 9, the n-type InP electric field guard ring 10 and the secondary epitaxial InP barrier layer 11. Further, the secondary epitaxy may be performed by Metal Organic Chemical Vapor Deposition (MOCVD) or Molecular Beam Epitaxy (MBE).
Step four: depositing SiO on the flat surfaces of the n-type InP central collector region 9, the n-type InP electric field protection ring 10 and the InP barrier layer 11 obtained in the third step2Layer, then etching away partial region of SiO using a photoresist patterned mask2So that a ring of SiO is formed on the InP barrier layer 11 at the periphery of the n-type InP electric field protection ring 102Barrier layer 12 of SiO2The thickness of the spacer layer 12 is 1 um.
Step five: in an n-type InP central collector region 9, an n-type InP electric field protection ring 10, an InP barrier layer 11 and SiO2An optical antireflection film 13 is deposited on the surface of the isolation layer 12, and an annular metal contact window 14 is formed on the optical antireflection film 13 above the n-type InP central collector region 9 by using an etching method.
Step six: forming an upper electrode metal and metal wiring board graph by using photoresist, evaporating metal and carrying out metal stripping to obtain a graphical upper electrode 15 and a graphical metal wiring board 15.1; an upper electrode 15 is contacted with the n-type InP central collector region 9 through the metal contact window 14 in the fifth step, and ohmic contact is formed by annealing; the metal wiring board 15.1 is positioned right above the SiO2 isolation layer 12; the upper electrode 15 has an optical entrance window 16 thereon, and the optical entrance window 16 is above the n-type InP central collector region 9.
Step seven: the back surface of the p-type InP substrate 1 is thinned and polished, and then a back electrode 17 is prepared on the lower surface of the p-type InP substrate and is annealed to form ohmic contact.
Example two
On the basis of the first embodiment, the p-type InP buffer layer 2 has a thickness of 0.5um, and the purpose is to better match the p-type InP substrate 1 with In0.53Ga0.47The difference of lattice constants between the As absorption layers 3 due to the difference of growth conditions ensures the growth quality of the epitaxial layers. Said In0.53Ga0.47The thickness of the As absorption layer 3 is 2um, and the background doping concentration is less than 1 multiplied by 1015/cm3The layer is a photogenerated carrier generation layer and is designed to absorb photon energy of 1.0-1.7 um as far as possible. Said In1-x-yAlxGayThe As bandwidth gradual change layer 4 comprises three layers, and the bandwidth of each layer is 0.85eV, 0.95eV and 1.05eV from bottom to top respectively; three layers of bandwidth graded layer In0.53Ga0.47The bandwidth of the As absorption layer 3 is gradually changed to p-type In0.52Al0.48The bandwidth of the As charge control layer 5 can effectively reduce the accumulation of photon-generated carriers at the interface. The p-type In0.52Al0.48The As charge control layer 5 has a thickness of 300nm and a doping concentration of 6X 1016/cm3. The thickness and doping concentration of this layer determine the onset voltage of the detector avalanche effect. Said In0.52Al0.48The As multiplication layer 6 has a thickness of 500nm and a background doping concentration of less than 1 × 1015/cm3. Said InxGa1-xAsyP1-yThe etch stop layer 7 has a thickness of 20nm and a bandwidth of 1.25 eV. By using InxGa1-xAsyP1-yEtching the stop layer 7 to avoid In0.52Al0.48The As multiplication layer 6 is exposed to air after etching to generate oxidation, reducing the surface defect density, thereby reducing dark current due to surface recombination.
EXAMPLE III
On the basis of the first embodiment, further, the n-type InP central collector region 9 is heavily doped with Si in-situ, the n-type InP electric field protection ring 10 is a ring-shaped ring, has a width of 10um (i.e., the difference between the inner diameter and the outer diameter of the n-type InP electric field protection ring is 10um), and has a distance of 15um from the n-type InP central collector region 9, and the electric field protection ring 10 can effectively reduce the fringe electric field of the n-type InP central collector region 9, thereby reducing the probability of fringe breakdown and reducing the tunneling dark current.
Referring to fig. 2, in a typical IV curve of the prepared avalanche photodetector, a is a reverse photocurrent curve corresponding to different voltage values, and b is a reverse dark current curve corresponding to different voltage values, it can be seen that the dark current of the prepared avalanche photodetector is still within 1nA around the breakdown voltage, which is much smaller than the typical dark current value (>10nA) of the mesa avalanche photodetector.
Referring to fig. 3, a typical CV curve of the prepared avalanche photodetector shows that the prepared avalanche photodetector has a small capacitance value under the working voltage, which makes it suitable for use in ultra-high speed photodetection.
The invention has been described in an illustrative manner, and it is to be understood that any simple variations, modifications or other equivalent changes which can be made by one skilled in the art without departing from the spirit of the invention fall within the scope of the invention.
Claims (10)
1. A preparation method of an InAlAs avalanche photodetector based on secondary epitaxy is characterized in that: the method comprises the following steps:
the method comprises the following steps: sequentially growing a p-type InP buffer layer and In on a p-type InP substrate0.53Ga0.47As absorption layer and In1-x-yAlxGayAs band width graded layer, p-type In0.52Al0.48As charge control layer, In0.52Al0.48As multiplication layer, InxGa1-xAsyP1-yEtching the stop layer and the n-type InP cover layer;
step two: using SiO2Patterning the hard mask, etching the n-type InP cover layer by etching method, forming n-type InP central collector region and n-type In surrounding the n-type InP central collector region by the rest n-type InP cover layerP field guard ring, etch stop at InxGa1-xAsyP1-yEtching the upper surface of the stop layer; the n-type InP central collector region is circular and is positioned in the middle region, the n-type InP electric field protection ring surrounds the periphery of the n-type InP central collector region, and a gap is formed between the n-type InP central collector region and the n-type InP electric field protection ring;
step three: using the same SiO as in step two2A hard mask pattern, wherein an InP barrier layer is generated in the etched area in the second step through secondary epitaxy; after the second epitaxy, etching off SiO by using etching method2Hard masking to obtain a flat surface, i.e. flush the surfaces of the n-type InP central collector region, the n-type InP electric field guard ring and the secondary epitaxial InP barrier layer;
step four: depositing SiO on the flat surfaces of the n-type InP central collector region, the n-type InP electric field protection ring and the InP barrier layer obtained in the step three2Layer, then etching away partial region of SiO using a photoresist patterned mask2So that a ring of annular SiO is formed on the InP barrier layer at the periphery of the n-type InP electric field protection ring2An isolation layer;
step five: in the n-type InP central collector region, n-type InP electric field protection ring, InP barrier layer and SiO2Depositing an optical antireflection film on the surface of the isolation layer, and forming an annular metal contact window on the optical antireflection film above the n-type InP central collector region by using a corrosion method;
step six: forming an upper electrode metal and metal wiring board graph by using photoresist, evaporating metal and carrying out metal stripping to obtain a patterned upper electrode and a metal wiring board; the upper electrode is in contact with the n-type InP central collector region through the metal contact window in the fifth step, and ohmic contact is formed through annealing; the metal wiring board is positioned on SiO2The right upper side of the isolation layer; the upper electrode is provided with an optical incidence window which is arranged above the n-type InP central collector region;
step seven: and thinning and polishing the back surface of the p-type InP substrate, preparing a back electrode on the lower surface of the p-type InP substrate, and annealing to form ohmic contact.
2. According to claimThe preparation method of the InAlAs avalanche photodetector based on the secondary epitaxy, which is claimed in claim 1, is characterized in that: the thickness of the p-type InP buffer layer is 0.1-1um, and In0.53Ga0.47The thickness of the As absorption layer is 1-5um, and the background doping concentration is less than 1 × 1015/cm3The layer is a photon-generated carrier generation layer and is used for absorbing photon energy of 1.0-1.7 um.
3. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: said In1-x-yAlxGayThe As bandwidth gradient layer comprises N layers of In with gradually changed components1-x-yAlxGayAs layer with N greater than 1, preferably 3 layers, each layer having a bandwidth of 0.75eV to 1.35eV, In1-x-yAlxGayThe bandwidth of each layer of the As bandwidth gradient layer is increased from bottom to top In sequence0.53Ga0.47The bandwidth of the As absorption layer is gradually changed to p-type In0.52Al0.48The As charge controls the bandwidth of the layer, reducing the accumulation of photogenerated carriers at the interface.
4. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: the p-type In0.52Al0.48The thickness of the As charge control layer is 200-500nm, and the doping concentration is 6 multiplied by 1016/cm3。
5. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: said In0.52Al0.48The thickness of the As multiplication layer is 300-800nm, and the background doping concentration is less than 1 multiplied by 1015/cm3。
6. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: said InxGa1-xAsyP1-yThe thickness of the corrosion cut-off layer is 10-40nm, the bandwidth is 1.25eV, and I is utilizednxGa1-xAsyP1-yEtching the stop layer to avoid In0.52Al0.48The As multiplication layer is exposed in the air after being corroded to generate oxidation, the surface defect density is reduced, and the dark current generated by surface recombination is reduced.
7. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: the n-type InP electric field protection rings are annular, the number of the n-type InP electric field protection rings is one or more, and if the n-type InP electric field protection rings are multiple, intervals are also arranged among the n-type InP electric field protection rings.
8. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: the InP barrier layer is semi-insulating or weak p-type, and forms a reverse bias PN junction potential barrier with the adjacent n-type InP central collector region and the n-type InP electric field protection ring.
9. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: the SiO2The thickness of the isolation layer is 500nm to 1500 nm.
10. The method for preparing the InAlAs avalanche photodetector based on the secondary epitaxy as claimed in claim 1, wherein: and the InP barrier layer generated by secondary epitaxy adopts a metal organic chemical vapor deposition method or a molecular beam epitaxy method.
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| US5552629A (en) * | 1994-03-22 | 1996-09-03 | Nec Corporation | Superlattice avalance photodiode |
| KR19980044005A (en) * | 1996-12-05 | 1998-09-05 | 양승택 | Avalanche Photodiode and Manufacturing Method Thereof |
| CN108022985A (en) * | 2017-11-02 | 2018-05-11 | 天津大学 | Extension wavelength mesa avalanche photodide and preparation method thereof |
| CN111916526A (en) * | 2020-08-10 | 2020-11-10 | 中国电子科技集团公司第四十四研究所 | Negative feedback type single photon avalanche photodiode and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JPH0548143A (en) * | 1991-08-16 | 1993-02-26 | Fujitsu Ltd | Manufacture of semiconductor light receiving element |
| US5552629A (en) * | 1994-03-22 | 1996-09-03 | Nec Corporation | Superlattice avalance photodiode |
| KR19980044005A (en) * | 1996-12-05 | 1998-09-05 | 양승택 | Avalanche Photodiode and Manufacturing Method Thereof |
| CN108022985A (en) * | 2017-11-02 | 2018-05-11 | 天津大学 | Extension wavelength mesa avalanche photodide and preparation method thereof |
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