CN1140901C - Decoding system of soft disk and its method - Google Patents
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Abstract
The present invention relates to a decoding system of a soft disc and a method thereof. The system comprises a modulation-demodulation device connected with a system bus, a data buffer area, a data temporarily-storing media, an ECC detection device, a first frequency-disturbing decoder, a second frequency-disturbing decoder, a confirmation device and an interface device. The decoding method comprises: the modulation-demodulation device receives and demodulates data to generate a data area block, which is temporarily stored in the data buffer area; the confirmation device and the decoding device are used for calculating the characteristic values in the PI and PO directions after reading the data area block, and the results are written in the data temporarily-storing media; the decoding device reads the characteristic values to correct errors, and the correcting part is stored in the data buffer area; the interface device reads the main data, which is output to a host machine terminal.
Description
Technical field
The invention provides a kind of decode system and method thereof of floppy disk, particularly a kind of access times that reduce the data buffer that utilize, the decode system and the method thereof of raising floppy disk decoding speed.
Background of invention
Please refer to Fig. 1, Fig. 1 is the circuit block diagram of the decode system of existing digital video disk (DVD) machine.Wherein, data are after CD 100 is read, be sent to 8 to 14 modulator-demodular units (Eight to Fourteen Modulation Plus demodulator) 102 earlier, the coded word (code word) of 16 channel bit (channel bit) be demodulated into the data symbol of 8 bits.Then, modulator-demodular unit 102 is with error correcting code block (the Error Correction Code data block that produces after the demodulation, be called for short the ECC block) 107 be stored to data buffer 106 via system bus 104, wherein block 107 comprises that general data 108, outside join a nuclear sign indicating number (Parity of Outer-code, be called for short PO) 110 and inside join nuclear sign indicating number (Parity of Inner-code is called for short a PI) 112.General data 108 adds that the outside joins nuclear sign indicating number 110 and be called RS (Reed-Solomon) foreign key altogether, and general data 108 adds that the outside joins nuclear sign indicating number 110 and join nuclear sign indicating number 112 with inside and be called the RS internal code altogether.Secondly, error correcting code pick-up unit (ECC decoder, be called for short the ECC pick-up unit) 114 106 read ECC block 107 from the data buffer, carry out the decoding of directions X (being the PI direction) and the decoding of Y direction (being the PO direction) in regular turn, and the misdata in the ECC block 107 corrected, then, ECC pick-up unit 114 writes the part of corrigendum in the ECC block 107 in the data buffer 106 more again.Then, scramble demoder (de-scrambler) and error-detecting code are confirmed device (Error Detection Code check, abbreviation EDC affirmation device) general data of correcting in the 116 reading of data buffer zones 106 108, and carry out scramble decoding and EDC affirmation work.When host side needs data in the reading of data buffer zone 106, adhere to data packet (Advanced TechnologyAttachment Packet Interface-ATAPI) interface arrangement 118 by the advanced person and send decoded general data 108 to host side.
Please refer to Fig. 2, it is the process flow diagram of the decode system access data of existing DVD CD player.This flow process comprises the following steps: at first, execution in step 201, and modulation-demodulation device 102 writes data buffer 106 with the block after the demodulation 107.Secondly, carry out step 202, pick-up unit 114 reads the block 107 of PI direction from data buffer 106, and the decoding processing of carrying out error correction, then the part of correcting in the block 107 is write in the data buffer 106 again.Subsequent steps 202, in step 203, pick-up unit 114 reads the block 107 of PO direction from data buffer 106, and carries out the decoding action of error correction, then the part of correcting in the block 107 is write in the data buffer 106 again.After treating completing steps 203, but according to the requirements set repeated execution of steps 202 and the step 203 of system, to improve the corrigendum rate of block.Behind the completing steps 203, enter step 204, the general data 108 that scramble demoder and EDC confirm to have corrected in the device 116 reading of data buffer zones 106 is to confirm whether data are correct.After waiting to finish above-mentioned step, when host side is wanted general data 108 in the reading of data buffer zone 106, then carry out step 205, send the decoded general data 108 of scramble to host side by interface arrangement 118.In above-mentioned prior art, each module of decode system need be carried out above-mentioned step in regular turn, just can finish the decode procedure of floppy disk.
Please refer to Fig. 3, it carries out the decoding process figure of RS sign indicating number for existing pick-up unit.At first, the original coding character in the data buffer 106 enters " generation eigenwert " stage 301 (Syndromegeneration), is calculated the eigenwert of PI or PO direction by pick-up unit 114.Secondly, enter step 302, according to the known position of erasing (erasure location), calculate " the position polynomial expression of erasing " (erasure location polynomial), then, the eigenwert that utilize to produce can be calculated " Forney revises the eigenwert polynomial expression " (Fomey ' s modified syndrome polynomial) with the position polynomial expression of erasing, to obtain carrying out required initial value of next stage.After step 302, enter step 303, the initial value that utilizes produce previous stage calculates " mistake-locator polynomial of erasing " (error-erasure locatorpolynomial) and " mistake-estimated value polynomial expression of erasing " (error-erasure evaluatorpolynomial) then, enter the step 304 of " Chien searches the unit ", the position of the data that locate errors, and obtain the value of misdata.At last, enter " correction " step 305, the corrigendum of the misdata in the original coding character 301 can be obtained correct coding character, and correct coding character is write in the data buffer 106.As shown in Figure 1, existing decode system is when carrying out the decoding processing of floppy disk, and each module all needs data buffer zone 106 is carried out accessing operation.In theory, if each module of decode system can carry out data access to the data buffer zone synchronously, can accelerate the speed of decode system, with the quick-acting fruits of the high power that reaches DVD; Yet in fact each module of decode system all need use same data buffer as the data buffer.In addition, by Fig. 2 and Fig. 3 as can be known, in the process that existing decode system is decoded to whole block 107, when pick-up unit 114 carries out the decoding processing of PI and the corrigendum of PO anisotropy at every turn, all need buffer zone 106 access datas.The data buffer zone is carried out repeatedly access will make whole decode procedure very consuming time, also can limit the speed of whole dvd system.At the existing several solutions of the problems referred to above, comprising at present: improve clock frequency, the increase system bus width of decode system or reduce the access times of data buffer.A concrete instance of this type of prior art sees U.S. Pat 6,119,260.U.S. Pat 6,119, the buffer random access internal memory (buffer RAM) of the big storage volume of 260 uses stores the data of CD-ROM drive, comprise main data, error code detecting code data, error correction code data, and utilize a Memory Controller Hub to come (memory controller) to control the access of buffer random access internal memory.Though U.S. Pat 6,119, the 260th, utilize the TCM technology to improve the utilization rate of buffer random access internal memory and avoid the access conflict of buffer random access internal memory, but it also can't reduce the access times and the access time of memory buffer, shortens and can't produce any contribution for time of translator.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of decode system and method thereof of floppy disk of the access times that reduce the data buffer.
For achieving the above object, the present invention takes following technical measures:
The decode system of a kind of floppy disk of the present invention, information data and decoding in order to receive floppy disk comprise:
A modulation-demodulation device in order to receiving the information data of this floppy disk, and carries out the demodulation action producing an ECC block, and this ECC block comprises that the nuclear sign indicating number is joined in a general data, inside and the nuclear sign indicating number is joined in an outside:
A data buffer zone is in order to temporary above-mentioned block;
The temporary medium of data are in order to the PI of temporary above-mentioned block and the eigenwert of PO direction;
An ECC pick-up unit is in order to error correction and the decoding of carrying out above-mentioned block;
One first scramble demoder and EDC confirm device, in order to reading the general data in this data buffer, and carry out the scramble decoding and EDC confirms action;
One second scramble demoder and EDC confirm device, in order to not finish the general data that EDC confirms action in the reading of data buffer zone as yet, carry out scramble decoding and EDC again and confirm action;
An interface arrangement in order to the decoded general data of scramble in the reading of data buffer zone, and exports this general data to host side;
When the ECC pick-up unit reads the ECC block from the data buffer, simultaneously the ECC block is inputed to the first scramble demoder and EDC and confirm device, and calculate the eigenwert of ECC block PI and PO direction synchronously, and result of calculation write the temporary medium of data, the eigenwert in the temporary medium of these data is read in the utilization of ECC pick-up unit, carry out the error correction decoding of ECC block PI and PO direction, then, eigenwert after ECC block PI and the corrigendum of PO direction will be stored in the temporary medium of data, and the part of general data corrigendum is stored in this data buffer; After the ECC pick-up unit was finished decoding, the second scramble demoder and EDC confirmed that device will carry out scramble decoding and EDC and confirm action once again at not finishing the general data that EDC confirms action in the data buffer as yet.
The coding/decoding method of a kind of floppy disk of the present invention in order to the information data that receives floppy disk and decode, comprises the steps:
(1) read information data to a modulation-demodulation device of floppy disk, modulation-demodulation device carries out demodulation producing an ECC block with this information data, and this block comprises that the nuclear sign indicating number is joined in a general data, inside and the nuclear sign indicating number is joined in an outside;
(2) above-mentioned block is write to a data buffer zone;
(3) read above-mentioned block to an ECC pick-up unit and one first scramble demoder and EDC and confirm device, and the ECC pick-up unit is tried to achieve the eigenwert of the PI of this ECC block and PO direction and is write the temporary medium of data, and the first scramble demoder and EDC confirm that device then carries out the scramble decoding to general data and EDC confirms action;
(4) PI of this ECC block in the temporary medium of reading of data and the eigenwert of PO direction are to carry out the decoding of error correction;
(5) more correction data is kept in the PI of this ECC block in the medium and the eigenwert of PO direction, and this general data in the data buffer;
(6) this general data to one second scramble demoder and the EDC device in the reading of data buffer zone at not finishing this general data that EDC confirms in this data buffer as yet, carries out scramble decoding and EDC once again and confirms action;
(7) decoded this general data to one of scramble interface arrangement in the reading of data buffer zone, and export host side to.
Reaching embodiment in conjunction with the accompanying drawings is described in detail as follows architectural feature of the present invention and method feature:
The accompanying drawing simple declaration
Fig. 1: the circuit block diagram of existing DVD CD player decode system;
Fig. 2: the process flow diagram of the decode system access data of existing DVD CD player;
Fig. 3: existing ECC pick-up unit carries out the decoding process figure of RS sign indicating number;
Fig. 4: the circuit block diagram of decode system first embodiment of the present invention;
Fig. 5: the circuit block diagram of decode system second embodiment of the present invention;
The decoding process figure of the decode system of Fig. 6: Fig. 5;
The process flow diagram of the decode system access data of Fig. 7: Fig. 5.
Implement best mode of the present invention
As shown in Figure 3, no matter the ECC pick-up unit is the decoding of carrying out PI or PO direction, all need obtain eigenwert earlier, supposes that the data before certain direction is upgraded are:
Data before r (X), other direction upgrade be r ' (X), improper value is e (X), then
r’(X)＝r(X)+e(X)
Therefore, after the error correction, new eigenwert can be represented by following formula:
By following formula as can be known, when decoding, the eigenwert that decoding is preceding adds the eigenwert of improper value, can obtain new eigenwert.Therefore, carry out the decoding action of error correction before, obtain the eigenwert of PI and PO direction earlier, and when carrying out the decoding of PI or PO direction, only need add the eigenwert of improper value, can obtain the eigenwert of new PI and PO direction.No matter promptly when, the ECC block after PI upgraded at that time with the eigenwert of PO direction is all corresponding.
In conjunction with following two preferred embodiments, and cooperate institute's accompanying drawing to be described in detail as follows:
Please refer to Fig. 4, it is the circuit block diagram of decode system first embodiment of the present invention: decode system wherein and Fig. 1 are slightly approximate, its difference be in, after the ECC block 407 in the ECC pick-up unit 414 reading of data buffer zones 406, just calculate the eigenwert of PI and PO direction synchronously, and the result is write in the temporary medium 416 of data.Afterwards, the eigenwert in the temporary medium 416 of ECC pick-up unit 414 readable data is carried out the decoding of PI or PO direction, and the misdata in the ECC block 407 is corrected; At this moment, no matter be which direction is decoded, ECC pick-up unit 414 all can calculate the eigenwert of PI and PO direction synchronously.Then, the PI after ECC pick-up unit 414 will be corrected again and the eigenwert of PO direction write in the temporary medium 416 of data, and simultaneously, also the part with corrigendum in the general data 407 writes in the data buffer 406.Because the eigenwert computing of PI and PO direction can corresponding up-to-date ECC block 407, and the required data of host side only are the part of general data 408, therefore, when occurring in inside, mistake joins nuclear sign indicating number 412 or outside when joining nuclear sign indicating number 410, need not upgrade inside and join nuclear sign indicating number 412 or outside part of joining nuclear sign indicating number 410, and the eigenwert that only need upgrade PI and PO direction gets final product, and like this, just can save and join the nuclear sign indicating number shared time of corrigendum.
Please refer to Fig. 5, it is the circuit block diagram of decode system second embodiment of the present invention; Because it is limited to repeat the number of times of decoding action, the decode system of Fig. 5 and the difference of Fig. 4 be in, when ECC pick-up unit 514 from the data buffer 506 when reading ECC block 507, ECC block 507 also inputs to the first scramble demoder and EDC confirms device 518, confirms action to carry out scrambling code and EDC.In addition, after ECC block 507 decodings of PI and PO direction were finished, the second scramble demoder and EDC confirmed that device 520 will carry out scramble decoding and EDC and confirm action once again at not finishing the general data 508 that EDC confirms action in the data buffer 506 as yet.
Please refer to Fig. 6, Fig. 6 is the process flow diagram of the decode system of Fig. 5.At first, enter step 600, obtain ECC block 507 from modulation-demodulation device 502.Secondly, enter step 602, carry out the PI direction decoding, separate frequency modulation and EDC confirms action.Then, enter step 604, judge that the EDC of general data 508 confirms whether the result is correct.If then decode successfully; If not, then enter step 608, carry out the decoding of PO direction.After execution of step 608, then enter step 612, judge whether to proofread and correct to finish, or repeatedly having decoded to move still can't proofread and correct finishes.If then enter step 616; If not, then enter step 610, proceed the decoding of PI direction.After execution of step 610, then enter step 614, judge whether to proofread and correct to finish, or repeatedly having decoded to move still can't proofread and correct finishes.If then enter step 616; If not, then enter step 608.In step 616, carry out scramble decoding and EDC affirmation action in this step at the data of not confirming in the step 602 by EDC.Then, enter step 618 again, judge that the EDC of general data 508 confirms whether the result is correct.If, then to decode successfully, the general data 508 of expression ECC block 507 is correct, can directly export host side to; If not, then decoding failure, expression ECC block 507 is incorrect.
As shown in Figure 7, it is the process flow diagram of the decode system access data of Fig. 5, and it comprises the following steps: at first execution in step 701, and modulation-demodulation device 502 writes data buffer 506 with the ECC block 507 after the demodulation.Secondly, execution in step 702, the ECC pick-up unit 514 and the first scramble demoder and EDC confirm the ECC block 507 in the device 518 reading of data buffer zones 506, and the eigenwert of the PI that tries to achieve and PO direction is write the temporary medium 516 of data, and carry out the scramble decoding and EDC confirms to move.Afterwards, carry out step 703, the eigenwert in the temporary medium 516 of ECC pick-up unit 514 reading of data is carried out the decoding of PI or PO direction, and the misdata in the ECC block 507 is corrected.Then, execution in step 704, the PI after ECC pick-up unit 514 will be corrected and the eigenwert of PO direction write in the temporary medium 516 of data, also the part of correcting in the general data 508 are write in the data buffer 506 simultaneously.After treating completing steps 704, but according to the requirements set repeated execution of steps 703 and step 704 of system, to improve the corrigendum rate of block.Behind the completing steps 704, carry out step 705, the second scramble demoder and EDC confirm device 520 at not finishing the general data 508 that EDC confirms action in the data buffer 506 as yet, carry out scramble decoding and EDC once again and confirm action.After finishing above-mentioned action, during data in host side is wanted reading of data buffer zone 506, then carry out step 706, send the decoded general data 508 of scramble to host side by interface arrangement 522.
Compared with prior art, the present invention has following effect:
By Fig. 4 to Fig. 7 as can be known, in the process that decode system of the present invention is decoded to whole ECC block, the ECC pick-up unit is when carrying out the error correction decoding of PI and PO direction, as long as read an ECC block from the data buffer and calculate PI and the eigenwert of PO direction, afterwards, utilize the improper value of obtaining data, do not need to read from the data buffer again the ECC block to upgrade the eigenwert of PI and PO direction, like this, access times that can significantly big minimizing data buffer.In addition, the data buffer of decode system of the present invention can be a DRAM, its capacity is about 512K bit group, and the temporary medium of data can be a SRAM, its capacity is about 5K bit group, certainly, the capacity of the temporary medium of data buffer and data can optionally be adjusted, and is not limited to above-mentioned numerical value.Therefore, compare with existing decode system, decode system of the present invention only increases the temporary medium of data, need not improve the clock of decode system, also need not increase the highway width of system, just can effectively reduce the access times of data buffer, also can improve the parallel processing capability of decode system, and then accelerate the speed of decode system.
Claims (24)
1, a kind of decode system of floppy disk, in order to information data and the decoding that receives floppy disk, comprise a modulation-demodulation device, in order to receive the information data of this floppy disk, and carry out the demodulation action to produce an ECC block, this ECC block comprises a general data, inside joins the nuclear sign indicating number and the nuclear sign indicating number is joined in an outside, a data buffer zone, in order to temporary above-mentioned block, the temporary medium of data, in order to the PI of temporary above-mentioned block and the eigenwert of PO direction, an ECC pick-up unit, in order to error correction and the decoding of carrying out above-mentioned block, one first scramble demoder and EDC confirm device, in order to read the general data in this data buffer, and carry out scramble decoding and EDC confirms action, one second scramble demoder and EDC confirm device, in order to not finish the general data that EDC confirms action in the reading of data buffer zone as yet, carry out scramble decoding and EDC again and confirm action, an interface arrangement, in order to the decoded general data of scramble in the reading of data buffer zone, and export this general data to host side, it is characterized in that:
When the ECC pick-up unit reads the ECC block from the data buffer, simultaneously the ECC block is inputed to the first scramble demoder and EDC and confirm device, and calculate the eigenwert of ECC block PI and PO direction synchronously, and result of calculation write the temporary medium of data, the eigenwert in the temporary medium of these data is read in the utilization of ECC pick-up unit, carry out the error correction decoding of ECC block PI and PO direction, then, eigenwert after ECC block PI and the corrigendum of PO direction will be stored in the temporary medium of data, and the part of general data corrigendum is stored in this data buffer; After the ECC pick-up unit was finished decoding, the second scramble demoder and EDC confirmed that device will carry out scramble decoding and EDC and confirm action once again at not finishing the general data that EDC confirms action in the data buffer as yet.
2, decode system according to claim 1 is characterized in that, described modulation-demodulation device is the modulation-demodulation device that the coding character that will have 16 passage bits is demodulated into the data symbol of 8 bits.
3, decode system according to claim 1 is characterized in that, the decoding calculation apparatus that described ECC pick-up unit is a RSPC.
4, decode system according to claim 1 is characterized in that, described data buffer is a DRAM.
5, decode system according to claim 1 is characterized in that, the temporary medium of described data are a SRAM.
6, decode system according to claim 1 is characterized in that, described modulation-demodulation device, ECC pick-up unit, the first scramble demoder and EDC confirm that device, the second scramble demoder and EDC confirm device and interface arrangement connected system bus respectively.
7, a kind of coding/decoding method of floppy disk in order to the information data that receives floppy disk and decode, comprises the steps:
(1) read information data to a modulation-demodulation device of floppy disk, modulation-demodulation device carries out demodulation producing an ECC block with this information data, and this block comprises that the nuclear sign indicating number is joined in a general data, inside and the nuclear sign indicating number is joined in an outside;
(2) above-mentioned block is write to a data buffer zone;
(3) read above-mentioned block to an ECC pick-up unit and one first scramble demoder and EDC and confirm device, and the ECC pick-up unit is tried to achieve the eigenwert of the PI of this ECC block and PO direction and is write the temporary medium of data, and the first scramble demoder and EDC confirm that device then carries out the scramble decoding to general data and EDC confirms action;
(4) PI of this ECC block in the temporary medium of reading of data and the eigenwert of PO direction are to carry out the decoding of error correction;
(5) more correction data is kept in the PI of this ECC block in the medium and the eigenwert of PO direction, and this general data in the data buffer;
(6) this general data to one second scramble demoder and the EDC device in the reading of data buffer zone at not finishing this general data that EDC confirms in this data buffer as yet, carries out scramble decoding and EDC once again and confirms action;
(7) decoded this general data to one of scramble interface arrangement in the reading of data buffer zone, and export host side to.
8, coding/decoding method according to claim 7 is characterized in that, described modulation-demodulation device is the modulation-demodulation device that the coding character that will have 16 passage bits is demodulated into the data symbol of 8 bits.
9, coding/decoding method according to claim 7 is characterized in that, the decoding calculation apparatus that described ECC pick-up unit is a RSPC.
10, coding/decoding method according to claim 7 is characterized in that, described data buffer is a DRAM storer.
11, coding/decoding method according to claim 7 is characterized in that, the temporary medium of described data are a SRAM storer.
12, coding/decoding method according to claim 7 is characterized in that, described modulation-demodulation device, ECC pick-up unit, scramble demoder and EDC confirm device and interface arrangement connected system bus.
13, a kind of decode system of floppy disk, in order to receive the information data of floppy disk, and decode, comprise a modulation-demodulation device, in order to receive the information data of floppy disk, and carry out the demodulation action to produce an ECC block, this block comprises a general data, inside joins the nuclear sign indicating number and the nuclear sign indicating number is joined in an outside, a data buffer zone, in order to temporary above-mentioned block, the temporary medium of data, in order to the PI of temporary above-mentioned block and the eigenwert of PO direction, an ECC pick-up unit, in order to carry out the error correction decoding of described block, scramble demoder and EDC confirm device, in order to this general data in the reading of data buffer zone, and carry out scramble decoding and EDC confirms action, one interface arrangement, in order to decoded this general data of scramble in the reading of data buffer zone, and export this general data to host side, it is characterized in that: when the ECC pick-up unit reads the ECC block from the data buffer, simultaneously the ECC block is inputed to the first scramble demoder and EDC and confirm device, and calculate the eigenwert of this ECC block PI and PO direction synchronously and result calculated is write the temporary medium of data, afterwards, this ECC pick-up unit utilizes the eigenwert in the temporary medium of reading of data, carry out the error correction decoding of ECC block PI and PO direction, then, the eigenwert after the corrigendum of ECC block PI and PO direction will be stored in the temporary medium of data, simultaneously with general data more positive part be stored in the data buffer.
14, decode system according to claim 13 is characterized in that, described modulation-demodulation device is the data symbol that the coding character that will have 16 passage bits is demodulated into 8 bits.
15, decode system according to claim 13 is characterized in that, the decoding calculation framework that described ECC pick-up unit is a RSPC.
16, decode system according to claim 13 is characterized in that, described data buffer can be a DRAM.
17, decode system according to claim 13 is characterized in that, the temporary medium of described data can be a SRAM.
18, decode system according to claim 13, it is characterized in that described modulation-demodulation device, this first scramble demoder and EDC confirm that device, this second scramble demoder and EDC confirm that device and this ATAPI interface arrangement are to see through system bus to come this data buffer of access.
19, a kind of coding/decoding method of floppy disk, information data and execution decoding action in order to receive floppy disk comprise the steps:
Read information data to a modulation-demodulation device of floppy disk, modulation-demodulation device carries out demodulation producing an ECC block with this information data, and this block comprises that the nuclear sign indicating number is joined in a general data, inside and the nuclear sign indicating number is joined in an outside;
Described block is write to a data buffer zone;
Read described block to ECC pick-up unit, and this decoding device writes the temporary medium of data with the PI of described block and the eigenwert of PO direction;
The PI of this ECC block in the temporary medium of reading of data and the eigenwert of PO direction are to carry out the decoding of error correction;
More correction data is kept in PI and the eigenwert of PO direction and the general data in the data buffer of the block in the medium;
General data to scramble demoder and EDC device in the reading of data buffer zone are confirmed action to carry out scramble decoding and EDC;
The decoded general data to of a scramble interface arrangement in the reading of data buffer zone, and export host side to.
20, coding/decoding method according to claim 19 is characterized in that, described modulation-demodulation device is the modulation-demodulation device that the coding character that will have 16 passage bits is demodulated into the data symbol of 8 bits.
21, coding/decoding method according to claim 19 is characterized in that, the decoding calculation apparatus that described ECC pick-up unit is a RSPC.
22, coding/decoding method according to claim 19 is characterized in that, described data buffer is a DRAM storer.
23, coding/decoding method according to claim 19 is characterized in that, the temporary medium of described data are a SRAM storer.
24, coding/decoding method according to claim 19 is characterized in that, described modulation-demodulation device, ECC pick-up unit, scramble demoder and EDC confirm device and interface arrangement connected system bus.
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| CNB001324829A CN1140901C (en) | 2000-11-21 | 2000-11-21 | Decoding system of soft disk and its method |
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| CNB001324829A CN1140901C (en) | 2000-11-21 | 2000-11-21 | Decoding system of soft disk and its method |
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| RU2318294C1 (en) * | 2003-10-08 | 2008-02-27 | Вайа Текнолоджиз, Инк. | Method and apparatus for error code correction |
| CN101178922B (en) * | 2006-11-06 | 2010-09-01 | 凌阳科技股份有限公司 | Error correcting handling arrangement of high EMS memory availability factor |
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