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CN103904126B - Thin film transistor (TFT) - Google Patents

Thin film transistor (TFT) Download PDF

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Publication number
CN103904126B
CN103904126B CN201210573691.5A CN201210573691A CN103904126B CN 103904126 B CN103904126 B CN 103904126B CN 201210573691 A CN201210573691 A CN 201210573691A CN 103904126 B CN103904126 B CN 103904126B
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China
Prior art keywords
gallium oxide
thin film
oxide zinc
tft
film transistor
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CN201210573691.5A
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CN103904126A (en
Inventor
顾南雁
杨东霓
巴利生
胡慧雄
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Shenzhen Jinyu Semiconductor Co ltd
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SHENZHEN JINYU SEMICONDUCTOR CO Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)

Abstract

A kind of thin film transistor (TFT), the grid including substrate, being arranged on substrate, the gate insulation layer being arranged on substrate and covering grid, covering at the indium gallium zinc channel layer of gate electrode insulation surface and be arranged on the gallium oxide zinc layers of channel layer surface, the opposite sides of this gallium oxide zinc layers is formed with source electrode and drain electrode.The thin film transistor (TFT) of this kind of structure has the advantage that tracking current is low, current on/off ratio is good.

Description

Thin film transistor (TFT)
Technical field
The present invention relates to a kind of thin film transistor (TFT).
Background technology
Along with the progress of Technology, thin film transistor (TFT) has been widely applied among display, to adapt to the demands such as slimming and the miniaturization of display.Thin film transistor (TFT) generally comprises the ingredients such as grid, drain electrode, source electrode and channel layer, and it changes the electric conductivity of channel layer by the voltage of control gate, makes to be formed between source electrode and drain electrode the state of on or off.
Indium gallium zinc (Indium Gallium Zinc Oxide, IGZO) thin film transistor (TFT) has been studied the most widely and has been applied on liquid crystal panel, particularly high-res and large size panel.But because of IGZO thin film easily by such environmental effects such as the temperature of external environment condition, oxygen content, steam, illumination, therefore, when using sputtering process to prepare IGZO thin film, plasma in processing procedure can produce infringement to IGZO thin film, and then affecting the parameters such as the current on/off ratio of IGZO thin film transistor (TFT), surface carrier concentration so that thin film transistor (TFT) quality is the highest.
Summary of the invention
In view of this, it is necessary to the thin film transistor (TFT) of a kind of better quality is provided.
A kind of thin film transistor (TFT), the grid including substrate, being arranged on substrate, the gate insulation layer being arranged on substrate and covering grid, covering at the indium gallium zinc channel layer of gate electrode insulation surface and be arranged on the gallium oxide zinc layers of channel layer surface, the opposite sides of this gallium oxide zinc layers is formed with source electrode and drain electrode.
In the thin film transistor (TFT) that the present invention provides, owing to gallium oxide zinc layers not having phosphide atom, therefore carrier cannot use the 5s track of phosphide atom to form conductivity, and gallium atom forms a scattering center between interstitial void in gallium oxide zinc layers, making crystal structure in gallium oxide zinc layers produce deformation, gallium atom also can suppress oxygen defect (Oxygen simultaneously Vacancy) formation, therefore can effectively reduce thin film carrier concentration, lowers tracking current, makes the current on/off ratio of thin film transistor (TFT) obtain and preferably improves.
Accompanying drawing explanation
Fig. 1 is the structural representation of the thin film transistor (TFT) that first embodiment of the invention provides.
Fig. 2 is the structural representation of the gallium nitride zinc layers of the thin film transistor (TFT) that the embodiment of the present invention provides.
Fig. 3 is the structural representation of the thin film transistor (TFT) that second embodiment of the invention provides.
Fig. 4 is the structural representation of the thin film transistor (TFT) that third embodiment of the invention provides.
Main element symbol description
Thin film transistor (TFT) 10、20、30
Substrate 11
Grid 12
Gate insulation layer 13
Channel layer 14
Gallium oxide zinc layers 15
Gallium oxide zinc semiconductor layer 150、152、154、156
Source electrode 16
Drain electrode 17
Following detailed description of the invention will further illustrate the present invention in conjunction with above-mentioned accompanying drawing.
Detailed description of the invention
Referring to Fig. 1, the thin film transistor (TFT) 10 that first embodiment of the invention provides includes substrate 11, grid 12, gate insulation layer 13, channel layer 14, gallium oxide zinc (GaZnO) layer 15, source electrode 16 and drain electrode 17.
This substrate 11 is used for carrying grid 12 and gate insulation layer 13.The making material of this substrate 11 can be glass, quartz, silicon wafer, Merlon, polymethyl methacrylate or metal forming etc..
This grid 12 is arranged on the surface of substrate 11.In the present embodiment, described grid 12 is arranged on the central area of substrate 11.The making material of grid 12 is selected from copper, aluminum, nickel, magnesium, chromium, molybdenum, tungsten and alloy thereof.
This gate insulation layer 13 covers on the surface of grid 12.In the present embodiment, this gate insulation layer 13 extends to contact with substrate 11.The material that makes of gate insulation layer 13 includes oxide S iOx of silicon, and the nitride SiNx of silicon or the nitrogen oxides SiONx of silicon, or the insulant of other high-ks, such as Ta2O5Or HfO2
This channel layer 14 is arranged on the surface of gate insulation layer 13.This channel layer 14 uses indium gallium zinc (IGZO) semi-conducting material to make.
This gallium oxide zinc layers 15 is arranged on the surface of channel layer 14, and this source electrode 16 and drain electrode 17 are formed in gallium oxide zinc layers 15.
The thickness of this gallium oxide zinc layers 15 is preferably greater than 0.5 nanometer (nm), it is furthermore preferred that the thickness of this gallium oxide zinc layers 15 is more than 0.5 nanometer and less than 100 nanometers.In the present embodiment, the thickness of gallium oxide zinc layers 15 is 20 nanometers.
The thickness of this gallium oxide zinc layers 15 may be configured as 1:100 ~ 5:1 with the thickness of channel layer 14 than scope, and in the present embodiment, the thickness of the thickness of this gallium oxide zinc layers 15 and channel layer 14 is than for 1:100 or 5:1.
This gallium nitride zinc layers 15 can be monolayer or multiple structure:
When gallium nitride zinc layers 15 is single layer structure, in this gallium nitride zinc layers 15, the content of gallium can be set to as " being gradually increased along the direction away from channel layer 14 ";
nullWhen gallium oxide zinc layers 15 is multiple structure,See Fig. 2,This gallium oxide zinc layers 15 is by multilamellar gallium oxide zinc semiconductor layer 150、152、154、156 stackings form,And this multilamellar gallium oxide zinc semiconductor layer 150、152、154、In 156, the composition of gallium is different,Preferably,This multilamellar gallium oxide zinc semiconductor layer 150、152、154、The content of gallium during the content of gallium is less than " distance channel layer gallium oxide zinc semiconductor layer farther out " in " the gallium oxide zinc semiconductor layer that distance channel layer is nearer " in 156,Namely,The gallium content of gallium oxide zinc semiconductor layer 150 is less than gallium oxide zinc semiconductor layer 152、The gallium content of gallium oxide zinc semiconductor layer 152 is less than gallium oxide zinc semiconductor layer 154、The gallium content of gallium oxide zinc semiconductor layer 154 is less than gallium oxide zinc semiconductor layer 156.
In the present embodiment, gallium oxide zinc layers 15 covers whole channel layer 14, and described source electrode 16 and drain electrode 17 are formed on the upper surface of gallium oxide zinc layers 15.This gallium oxide zinc layers 15 thickness everywhere is equal, thus " carrying described source electrode 16 and the thickness of the two side areas of the gallium oxide zinc layers 15 of drain electrode 17 " is identical with " the middle section thickness of gallium oxide zinc layers 15 ".
Seeing Fig. 3, the thin film transistor (TFT) 20 that second embodiment of the invention provides includes substrate 11, grid 12 equally, gate insulation layer 13, channel layer 14, gallium oxide zinc layers 15, source electrode 16 and drain electrode 17, the structure of this thin film transistor (TFT) 20 is substantially the same with the thin film transistor (TFT) 10 of first embodiment.Unlike thin film transistor (TFT) 10: the gallium oxide zinc layers 15 middle section thickness of thin film transistor (TFT) 20 is more than thickness of two sides, thus " carrying the thickness of the two side areas of the gallium oxide zinc layers 15 of described source electrode 16 and drain electrode 17 " is less than " the middle section thickness of gallium oxide zinc layers 15 ".
Seeing Fig. 4, the thin film transistor (TFT) 30 that third embodiment of the invention provides includes substrate 11, grid 12, gate insulation layer 13, channel layer 14, gallium oxide zinc layers 15, source electrode 16 and drain electrode 17 equally.The structure of this thin film transistor (TFT) 30 is substantially the same with the thin film transistor (TFT) 10 of first embodiment.Unlike thin film transistor (TFT) 10: the gallium oxide zinc layers 15 of thin film transistor (TFT) 30 only covers the middle part of channel layer 14, described source electrode 16 and drain electrode 17 are then formed directly on channel layer 14 and cover the upper surface of channel layer 14 both sides.
In the thin film transistor (TFT) 10,20,30 that the embodiment of the present invention provides, owing to gallium oxide zinc layers 15 not having phosphide atom, therefore carrier cannot use the 5s track of phosphide atom to form conductivity, and gallium atom forms a scattering center between interstitial void in gallium oxide zinc layers 15, making crystal structure in gallium oxide zinc layers 15 produce deformation, gallium atom also can suppress oxygen defect (Oxygen simultaneously Vacancy) formation, therefore can effectively reduce thin film carrier concentration, lowers tracking current, makes the current on/off ratio of thin film transistor (TFT) 10,20,30 obtain and preferably improves.
It should be noted that, the gallium oxide zinc layers 15 that above-described embodiment uses can replace with other metal oxide semiconductor layer such as aluminum zinc oxide (AZO) semiconductor layers without indium, but can also replace, as long as can ensure that this metal oxide semiconductor layer has relatively low carrier concentration with the metal oxide semiconductor layer that other kinds in addition to gallium oxide zinc layers contain gallium without indium.
Additionally, the present invention uses gallium oxide zinc layers 15 to be to make its carrier concentration less than 10 in implementing16cm-3.It is understood that this metal oxide semiconductor layer is also not limited to the material that this specification is introduced, as long as the carrier concentration of the metal oxide semiconductor layer used is less than 1016cm-3, can substantially lower tracking current, promote the quality of indium gallium zinc thin film transistor (TFT).
Additionally, the gallium oxide zinc layers 15 used in the present invention can make infrared ray pass through, through test determination, when the thickness of gallium oxide zinc layers 15 is 20 nanometer, although wavelength has absorption less than 400 nanometers, but wavelength is more than or equal to 60% more than visible ray and the ultrared transmitance of 400 nanometers, even at longer wavelengths of infrared ray, the transmitance of gallium oxide zinc layers levels off to 100%, thus has good light permeability, does not affect the light transmission as liquid crystal panel.
It is understood that for the person of ordinary skill of the art, can conceive according to the technology of the present invention and make change and the deformation that other various pictures are answered, and all these change all should belong to the protection domain of the claims in the present invention with deformation.

Claims (3)

1. a thin film transistor (TFT), the grid including substrate, being arranged on substrate, be arranged on substrate and Cover the gate insulation layer of grid and cover the indium gallium zinc channel layer in gate electrode insulation surface, its feature It is: this thin film transistor (TFT) also includes a gallium oxide zinc layers being arranged on channel layer surface, this gallium oxide zinc The opposite sides of layer is formed with source electrode and drain electrode, and described gallium oxide zinc layers covers whole channel layer, described source Pole and drain electrode are formed in gallium oxide zinc layers.
2. thin film transistor (TFT) as claimed in claim 1, it is characterised in that carry described source electrode and drain electrode The thickness of gallium oxide zinc layers two side areas identical with the middle section thickness of gallium oxide zinc layers.
3. thin film transistor (TFT) as claimed in claim 1, it is characterised in that carry described source electrode, drain electrode The thickness of gallium oxide zinc layers two side areas less than the middle section thickness of gallium oxide zinc layers.
CN201210573691.5A 2012-12-26 2012-12-26 Thin film transistor (TFT) Active CN103904126B (en)

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Application Number Priority Date Filing Date Title
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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10644140B2 (en) * 2016-06-30 2020-05-05 Intel Corporation Integrated circuit die having back-end-of-line transistors
CN106601821A (en) * 2016-11-04 2017-04-26 东莞市联洲知识产权运营管理有限公司 Thin-film transistor having good anti-static breakdown capability
CN108198860A (en) * 2017-12-29 2018-06-22 深圳市金誉半导体有限公司 Vertical bilateral diffusion field-effect tranisistor and preparation method thereof
CN112864231A (en) * 2021-01-28 2021-05-28 合肥维信诺科技有限公司 Thin film transistor, preparation method thereof, array substrate and display panel

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102167954A (en) * 2010-12-31 2011-08-31 长兴化学工业股份有限公司 Coating composition and use thereof
CN102347335A (en) * 2010-07-23 2012-02-08 三星电子株式会社 Display substrate and method of manufacturing same
WO2012124434A1 (en) * 2011-03-14 2012-09-20 富士フイルム株式会社 Field effect transistor, display device, sensor, and method for producing field effect transistor
TW201246317A (en) * 2009-10-21 2012-11-16 Semiconductor Energy Lab Semiconductor device and manufacturing method the same
US8330155B2 (en) * 2008-11-14 2012-12-11 Samsung Electronics Co., Ltd. Semiconductor devices having channel layer patterns on a gate insulation layer
CN102832253A (en) * 2011-06-14 2012-12-19 三星电子株式会社 Thin film transistor,

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI397184B (en) * 2009-04-29 2013-05-21 Ind Tech Res Inst Oxide semiconductor thin-film transistor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8330155B2 (en) * 2008-11-14 2012-12-11 Samsung Electronics Co., Ltd. Semiconductor devices having channel layer patterns on a gate insulation layer
TW201246317A (en) * 2009-10-21 2012-11-16 Semiconductor Energy Lab Semiconductor device and manufacturing method the same
CN102347335A (en) * 2010-07-23 2012-02-08 三星电子株式会社 Display substrate and method of manufacturing same
CN102167954A (en) * 2010-12-31 2011-08-31 长兴化学工业股份有限公司 Coating composition and use thereof
WO2012124434A1 (en) * 2011-03-14 2012-09-20 富士フイルム株式会社 Field effect transistor, display device, sensor, and method for producing field effect transistor
CN102832253A (en) * 2011-06-14 2012-12-19 三星电子株式会社 Thin film transistor,

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