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CN103904111A - HEMT device structure based on reinforced AlGaN/GaN and manufacturing method of HEMT device structure - Google Patents

HEMT device structure based on reinforced AlGaN/GaN and manufacturing method of HEMT device structure Download PDF

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CN103904111A
CN103904111A CN201410025004.5A CN201410025004A CN103904111A CN 103904111 A CN103904111 A CN 103904111A CN 201410025004 A CN201410025004 A CN 201410025004A CN 103904111 A CN103904111 A CN 103904111A
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algan
layer
hemt device
silicide
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CN103904111B (en
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冯倩
杜锴
代波
张春福
梁日泉
张进成
郝跃
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Xidian University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1058Channel region of field-effect devices of field-effect transistors with PN junction gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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Abstract

The invention discloses an HEMT device structure based on reinforced AlGaN/GaN and a manufacturing method of the HEMT device structure. The structure comprises a substrate, an intrinsic GaN layer, an AlN isolation layer, an intrinsic AlGaN layer, an AlGaN doped layer, a p type GaN layer, a gate electrode, a source electrode, a drain electrode, an insulating layer, a passivation layer and silicon compounds used for regulating the channel electric field. The AlGaN doped layer is located above the intrinsic AlGaN layer, the p type GaN layer is located above the AlGaN doped layer, the source electrode, the drain electrode and the insulating layer are located above the AlGaN layer, the gate electrode is located above the p type GaN layer, and the silicon compounds are located above the insulating layer. Reinforced AlGaN/GaN heterojunction material is grown on the substrate in an epitaxial mode, the source electrode and the drain electrode are formed on the structure, the insulating layer is deposited, and the silicon compounds including NiSi, TiSi2 and the like are formed on the portion, between the grid drain area and the grid source area, of the insulating layer; a p-GaN epitaxial layer exists below the gate electrode, and a reinforced device is formed. Finally, the passivation layer is deposited and passivation of the device is achieved. The HEMT device structure and the manufacturing method have the advantages of being high in device frequency, process repeatability and controllability.

Description

Based on enhanced AlGaN/GaN HEMT device architecture and preparation method thereof
Technical field
The invention belongs to microelectronics technology, relate to semiconductor device and make, a kind of based on enhanced AlGaN/GaN HEMT device architecture and manufacture method specifically, can be used for making the high-frequency enhancement type high electron mobility transistor of low on-resistance.
Background technology
The 3rd bandwidth bandgap semiconductor taking SiC and GaN as representative is large with its energy gap in recent years, breakdown electric field is high, thermal conductivity is high, saturated electrons speed is large and the characteristic such as heterojunction boundary two-dimensional electron gas height, makes it be subject to extensive concern.In theory, utilize the devices such as high electron mobility transistor (HEMT) that these materials make, LED, laser diode LD to there is obvious advantageous characteristic than existing device, therefore researcher has carried out extensive and deep research to it both at home and abroad in the last few years, and has obtained the achievement in research attracting people's attention.
AlGaN/GaN heterojunction high electron mobility transistor (HEMT) is demonstrating advantageous advantage aspect high-temperature device and HIGH-POWERED MICROWAVES device, and pursuit device high-frequency, high pressure, high power have attracted numerous research.In recent years, make higher frequency high pressure AlGaN/GaN HEMT and become the another study hotspot of concern.Due to after AlGaN/GaN heterojunction grown, just there are a large amount of two-dimensional electron gas 2DEG in heterojunction boundary, and in the time of the resistivity decreased of interface, we can obtain higher device frequency characteristic.AlGaN/GaN heterojunction electron mobility transistor can obtain very high frequency, but often will be to sacrifice high pressure resistant property as cost.The method of the AlGaN/GaN heterojunction transistor frequency improving is at present as follows:
1. in conjunction with reducing resistivity without passivated dielectric medium (dielectric-free passivation) and the long ohmic contact of living again.Referring to Yuanzheng Yue, Zongyang Hu, InAlN/AlN/GaN HEMTs With Regrown Ohmic Contacts and f_{T}of 370 GH such as Jia Guo.EDL.Vol33.NO.7,P1118-P1120。The method has adopted 30 nanometer grid long, and in conjunction with reducing source ohmic leakage rate without passivated dielectric medium (dielectric-free passivation) and the long ohmic contact of living again.Frequency can reach 370GHz.Can also continue to improve frequency to 500GHz by reducing channel length.
2. the long heavy-doped source of living again drains to the Two-dimensional electron gas channel of nearly grid.Referring to Shinohara, K.Regan, D.Corrion, the self-aligned-gate GaN-HEMTs with heavily-doped n+-GaN ohmic contacts to 2DEG such as A.Brown; IEDM, IEEE; 2012.The long n+GaN ohmic contact of living again in the past achieves noticeable achievement to reducing raceway groove contact resistance, but heavy-doped source drain contact directly can obtain better frequency characteristic and current characteristics to the Two-dimensional electron gas channel approaching under grid.The method of reporting in literary composition makes frequency reach f t/ fmax=342/518GHz.Puncture voltage 14V simultaneously.
Summary of the invention
The object of the invention is to the deficiency for above high-frequency device, a kind of method that based on silicide, raceway groove is produced stress is provided, to improve the transistorized frequency characteristic of enhanced AlGaN/GaN high mobility simultaneously, the controllability and the repeatability that strengthen technique, meet the application requirements of GaN base electron device to high-frequency, low on-resistance.
The present invention is achieved in that
Technical thought of the present invention is: use the method for epitaxial growth the etching thin dielectric layer of growing on AlGaN, multiple bulk silicon compounds of growing on thin dielectric layer, silicide agglomeration spacing is less than piece width, because the thermal coefficient of expansion of silicide is greater than the thermal coefficient of expansion of insulating barrier and AlGaN.In the time that epitaxial growth is cooling, silicide can be introduced compression to insulating barrier and AlGaN layer, and meanwhile, the AlGaN layer between silicide will be subject to tensile stress.In the time that AlGaN layer is subject to compression, the 2DEG concentration that is positioned at AlGaN/GaN interface reduces to some extent, and in the time that AlGaN layer is subject to tensile stress, the 2DEG concentration that is positioned at AlGaN/GaN interface increases to some extent.The size of AlGaN layer institute compression chord (tensile stress) is relevant with the length of silicide (silicide spacing), this relation is not a kind of linear relationship, but in the time that operating distance reduces the suffered stress of AlGaN layer on the impact of polarization charge increase sharply (being illustrated in fig. 2 shown below), so we can make the width of silicide, spacing difference between silicide realizes the adjusting of two-dimensional electron gas, the increase of 2DEG concentration still reduces the magnitude relationship that depends on the two on the whole, in this invention, we select to make two-dimensional electron gas increase reduce channel resistance.So tensile stress is greater than compression, so silicide width is greater than silicide spacing.As shown in Figure 2, if the width of silicide is lmm, silicide spacing is 0.25mm,. the tension force effect that stand in silicide spacing (0.25mm) region so makes polarization charge finally than large two orders of magnitude of the polarization charge of silicide regions (1mm), so effect on the whole shows as AlGaN layer, to be subject to tensile stress be that polarization charge concentration increases to some extent, thereby the concentration of 2DEG also presents the result that entirety increases because of the increase of polarization charge between grid source and between grid leak.Therefore the resistance in this region reduces to some extent.Referring to IEICE TRANS.ELECTON, VOL.E93-C, NO.8AUGUST2010.Analysis of Passivation-Film-Induced Stress Effects on Electrical Properties in AlGaN/GaN HEMTs. makes spacing between silicide be less than the length of silicide by selection, the growth that makes 2DEG concentration reduces much larger than 2DEG concentration, thereby the resistance between grid leak and grid source is reduced to some extent, in the situation that not changing grid leak spacing, improve the transistorized frequency characteristic of high mobility.
According to above-mentioned technical thought, device of the present invention comprises substrate, intrinsic GaN layer, AlN separator, AlGaN barrier layer (intrinsic AlGaN layer), AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field.AlGaN doped layer is positioned on barrier layer, and p type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier.Epitaxial growth enhanced AlGaN/GaN heterojunction material on substrate, and in this structure, form source electrode and drain electrode, then deposit one layer insulating, on insulating barrier (between grid leak region and grid source region), forms silicide (NiSi, TiSi 2etc.); There is p-GaN epitaxial loayer in grid below, forms enhancement device.Last deposit passivation layer is realized the passivation of device.
As shown in Figure 3, according to above-mentioned technical thought, utilize metal silicide to improve the structure of enhanced AlGaN/GaN HEMT device performance, comprise the steps:
(1) epitaxially grown enhancement mode p-GaN/AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl: H 2o=1: corrode 30-60s in 1 solution, finally dry up by mobile washed with de-ionized water and with high pure nitrogen
(2) the p-GaN/AlGaN/GaNAlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the p-GaN/AlGaN/GaN material for preparing table top is carried out to photoetching, form the etch areas of p-GaN;
(4) and by material put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl 2flow be 10sccm, the flow of Ar gas is 10sccm, etch period is 10min, etches away the p-GaN epitaxial loayer outside gate region;
(5) the p-GaN/AlGaN/GaN material that completes etching is carried out to photoetching, leakage ohmic contact regions, formation source, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact
(6) device is put into atomic layer deposition apparatus, process conditions are: growth temperature is 300 DEG C, and pressure is 2000Pa, H 2the flow of O and TMAl is 150sccm, the Al that deposit 5-10nm is thick 2o 3medium;
(7) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: the DC offset voltage of Ni target is 100V, the rf bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal film that codeposition 100nm~150nm is thick
(8) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF 4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min;
(9) device is put into quick anneal oven, carry out 450 DEG C under nitrogen environment, the rapid thermal annealing of 30s, forms NiSi alloy
(10) device that completes alloy is carried out to photoetching, form area of grid, and device is put into HF: H 2in O (1: 1) solution by the Al of gate region 2o 3corrosion forms gate electrode window completely, then puts into electron beam evaporation platform deposit Ni/Au=20/200nm and peels off, and completes the preparation of gate electrode
(11) put into PECVD reative cell deposit SiN passivating film by completing device prepared by grid, concrete technology condition is: SiH 4flow be 40sccm, NH 3flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick
(12) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF 4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, the SiN that source electrode, drain and gate are covered above and Al 2o 3film etches away;
(13) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
Tool of the present invention has the following advantages:
(1) device of the present invention adopts the method for deposition insulating layer and silicide, and AlGaN is produced to effect of stress, regulates electron gas concentration and electric field strength in raceway groove.Improve device frequency characteristic.
(2) in the present invention, prepared silicide, between grid leak and grid source, does not need to reduce grid leak distance when improving frequency characteristic, thereby without sacrificing high pressure resistant property.
(3) in the present invention owing to can regulate as required size and the spacing of silicide between grid leak and grid source, thereby regulate effect of stress size.Electron gas concentration and frequency characteristic can regulate as required between grid source and between grid leak.
Brief description of the drawings
By describing in more detail exemplary embodiment of the present invention with reference to accompanying drawing, above and other aspect of the present invention and advantage will become more and be readily clear of, in the accompanying drawings:
Fig. 1 is the cross-sectional view of device of the present invention;
Fig. 2 is physical principle key diagram (polarization charge is with the variation of silicide width);
Fig. 3 is the fabrication processing schematic diagram of device of the present invention.
Embodiment
Hereinafter, now with reference to accompanying drawing, the present invention is described more fully, various embodiment shown in the drawings.But the present invention can implement in many different forms, and should not be interpreted as being confined to embodiment set forth herein.On the contrary, it will be thorough with completely providing these embodiment to make the disclosure, and scope of the present invention is conveyed to those skilled in the art fully.
Hereinafter, exemplary embodiment of the present invention is described with reference to the accompanying drawings in more detail.
With reference to Fig. 1, device of the present invention comprises substrate, intrinsic GaN layer, AlN separator, AlGaN barrier layer (intrinsic AlGaN layer), AlGaN doped layer, p-type GaN layer, gate electrode, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field.AlGaN doped layer is positioned on barrier layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier.Epitaxial growth enhanced AlGaN/GaN heterojunction material on substrate, and in this structure, form source electrode and drain electrode, then deposit one layer insulating, on insulating barrier (between grid leak region and grid source region), forms silicide (NiSi, TiSi 2etc.); There is p-GaN epitaxial loayer in grid below, forms enhancement device.Last deposit passivation layer is realized the passivation of device.
The foregoing is only embodiments of the invention, be not limited to the present invention.The present invention can have various suitable changes and variation.All any amendments of doing within the spirit and principles in the present invention, be equal to replacement, improvement etc., within protection scope of the present invention all should be included in.

Claims (10)

1. one kind based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: described structure comprises substrate, intrinsic GaN layer, AlN separator, intrinsic AlGaN layer, AlGaN doped layer, p-type GaN layer gate electrode, source electrode, drain electrode, insulating barrier, passivation layer and for regulating the silicide of raceway groove electric field; Described AlGaN doped layer is positioned on intrinsic AlGaN layer, and p-type GaN layer is positioned on AlGaN doped layer, and source-drain electrode and insulating barrier are positioned on AlGaN layer, and gate electrode is positioned on p-type GaN layer, and silicide is positioned on insulating barrier; Epitaxial growth enhanced AlGaN/GaN heterojunction material on substrate, and on this heterojunction material, form source electrode and drain electrode, then deposit one layer insulating, between grid leak region and grid source region on insulating barrier, forms silicide; There is p-GaN epitaxial loayer in grid below, forms enhancement device, and last deposit passivation layer is realized the passivation of device.
2. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: the material of substrate is wherein sapphire, carborundum, GaN or MgO.
3. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: in AlGaN wherein, the component of Al and Ga can regulate, Al xga 1-xx=0~1 in N.
4. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: silicide comprises NiSi TiSi 2, or Co 2si.
5. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: the thickness of insulating barrier is 5~10nm.
6. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: its GaN raceway groove replaces with Al yga 1-yn raceway groove, and Al yga 1-yin N, the component of y is less than the Al component x in addition two-layer, i.e. x > y.
7. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: silicide is for block, and introducing stress, interblock is apart from being less than piece width, silicide can produce compression to below each layer, between piece, will produce the pressure to piece, by making interblock apart from being less than piece width, can make the each layer of overall tensile stress of overall acquisition below, thereby electric field in raceway groove is enhanced.
8. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized by: p-type GaN material wherein can be also p-type AlGaN or InGaN material.
9. according to claim 1 based on enhanced AlGaN/GaN HEMT device architecture, it is characterized in that: its insulating barrier and passivation layer comprise SiN, Al 2o 3, HfO 2, the insulating material such as HfSiO.
10. the manufacture method based on enhanced AlGaN/GaN HEMT device architecture, is characterized in that: comprise the steps:
Utilize metal silicide to improve the structure of enhanced AlGaN/GaN HEMT device performance, comprise following process:
(1) epitaxially grown p-GaN/AlGaN/GaN material is carried out to organic washing, by mobile washed with de-ionized water and put into HCl: H 2o=1: corrode 30-60s in 1 solution, finally dry up by mobile washed with de-ionized water and with high pure nitrogen;
(2) the p-GaN/AlGaN/GaN material cleaning up is carried out to photoetching and dry etching, be formed with source region table top;
(3) the p-GaN/AlGaN/GaN material for preparing table top is carried out to photoetching, form the etch areas of p-GaN;
(4) and by material put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, Cl 2flow be 10sccm, the flow of Ar gas is 10sccm, etch period is 10min, etches away the p-GaN epitaxial loayer outside gate region;
(5) the p-GaN/AlGaN/GaN material that completes etching is carried out to photoetching, leakage ohmic contact regions, formation source, put into electron beam evaporation platform deposit metal ohmic contact Ti/Al/Ni/Au=(20/120/45/50nm) and peel off, the last rapid thermal annealing that carries out 850 DEG C of 35s in nitrogen environment, forms ohmic contact;
(6) device is put into atomic layer deposition apparatus, process conditions are: growth temperature is 300 DEG C, and pressure is 2000Pa, H 2the flow of O and TMAl is 150sccm, the Al that deposit 5-10nm is thick 2o 3medium;
(7) then device is put into simultaneously sputter Ni and the Si of reative cell of magnetron sputtering, process conditions are: the DC offset voltage of Ni target is 100V, the rf bias voltage of Si target is 450V, and the flow of carrier gas Ar is 30sccm, the hybrid metal film that codeposition 100nm~150nm is thick;
(8) device of the good film of deposit is carried out to photoetching, form the etching window district of mixed film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, and lower electrode power is 20W, and chamber pressure is 1.5Pa, CF 4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 5min;
(9) device is put into quick anneal oven, carry out 450 DEG C under nitrogen environment, the rapid thermal annealing of 30s, forms NiSi alloy;
(10) device that completes alloy is carried out to photoetching, form area of grid, and device is put into HF: H 2in O (1: 1) solution by the Al of gate region 2o 3corrosion forms gate electrode window completely, then puts into electron beam evaporation platform deposit Ni/Au=20/200nm and peels off, and completes the preparation of gate electrode;
(11) put into PECVD reative cell deposit SiN passivating film by completing device prepared by grid, concrete technology condition is: SiH 4flow be 40sccm, NH 3flow be 10sccm, chamber pressure is 1~2Pa, radio-frequency power is 40W, the SiN passivating film that deposit 200nm~300nm is thick;
(12) device is cleaned again, photoetching development, form the etched area of SiN film, and put into ICP dry etching reative cell, process conditions are: upper electrode power is 200W, lower electrode power is 20W, chamber pressure is 1.5Pa, CF 4flow be 20sccm, the flow of Ar gas is 10sccm, etch period is 10min, SiN film and Al that source electrode, drain and gate are covered above 2o 3etch away;
(13) device is cleaned, photoetching development, and put into the thick electrode that adds of electron beam evaporation platform deposit Ti/Au=20/200nm, complete the preparation of integral device.
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Cited By (5)

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CN105870013A (en) * 2016-06-08 2016-08-17 苏州能屋电子科技有限公司 Method for realizing enhanced HEMT (High Electron Mobility Transistor) by virtue of p-type passivation and enhanced HEMT
CN109411350A (en) * 2018-10-12 2019-03-01 中国工程物理研究院电子工程研究所 A kind of preparation method of GaN base p-type grid structure
US10714607B1 (en) * 2019-02-01 2020-07-14 United Microelectronics Corp. High electron mobility transistor
WO2020221222A1 (en) * 2019-04-30 2020-11-05 大连理工大学 High-threshold-voltage normally-off high-electron-mobility transistor and preparation method therefor
WO2021102681A1 (en) * 2019-11-26 2021-06-03 苏州晶湛半导体有限公司 Semiconductor structure and method for manufacture thereof

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