CN103715201B - A kind of array base palte and manufacture method, GOA unit and display device - Google Patents
A kind of array base palte and manufacture method, GOA unit and display device Download PDFInfo
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- CN103715201B CN103715201B CN201310713416.3A CN201310713416A CN103715201B CN 103715201 B CN103715201 B CN 103715201B CN 201310713416 A CN201310713416 A CN 201310713416A CN 103715201 B CN103715201 B CN 103715201B
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Abstract
The embodiment of the present invention provides a kind of array base palte and manufacture method, GOA unit and display device, relates to Display Technique field。Array base palte includes being formed at the grid of substrate surface, gate insulation layer, active layer and source and drain metal level, described source and drain metal level is for forming source-drain electrode and the channel region of TFT, described array base palte includes a multiple TFT and multiple 2nd TFT, the length of the length of the channel region of the described TFT channel region less than described 2nd TFT。The open circuit that such a array base palte can be avoided TFT channel region in GOA unit to disconnect and cause is bad。
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of array base palte and manufacture method, GOA unit and display device。
Background technology
In order to improve the display effect of display device, increasing people starts to invest attention the narrow frame design of display device, prior art realizes for the method that technique limit piezometric is usually reduced to the limit that makes of narrow border display, the very important technology of one of which is exactly the realization of the technology mass production of array base palte row cutting (GateDriveronArray is called for short GOA)。GOA technology is utilized to be integrated on the array base palte of display floater by gate switch circuit to form the turntable driving to display floater, such that it is able to save grid-driving integrated circuit part, it is possible not only to reduce product cost from material cost and processing technology two aspect, and display floater can accomplish the design for aesthetic of the symmetrical and narrow frame in both sides。
GOA unit is conventionally formed with the TFT(ThinFilmTransistor that size and shape is various, TFT), so in formed the process of source-drain electrode of TFT by patterning processes, intermediate tone mask plate (the HalfToneMask used in source-drain electrode cineration technics, HTM) light transmittance needs to produce change according to TFT size, the variable thickness of the photoresist of the raceway groove corresponding position causing TFT different in cineration technics is caused by the change of HTM light transmittance, thus the raceway groove in the TFT that after ultimately resulting in subsequent etching, photoresist is relatively weak occurs disconnection bad。
In GOA unit, generally include the two kinds of TFT being positioned at zones of different, the size of both TFT also differs, its profile can be distinguished as depicted in figs. 1 and 2, the structure of two of which TFT is identical with forming process, all include the grid 2 being sequentially formed at transparency carrier 1 surface, gate insulation layer (not shown), active layer 3 and source and drain metal level 4, in order to form raceway groove, the surface of source and drain metal level is formed with photoresist layer 5, after using HTM exposure imaging, the thickness of the photoresist that the photoresist layer 5 above source and drain metal level 4 that TFT channel position is corresponding retains also differs, it can be seen that, in TFT structure shown in Fig. 1, photoresist layer 5 thickness of corresponding channel region is h1, in TFT structure shown in Fig. 2, photoresist layer 5 thickness of corresponding channel region is h2, h1 < h2。Owing to the thickness of h1 is less, in the process being formed raceway groove further by patterning processes, it is possible to active layer 3 can be produced unnecessary etching, this will cause that in TFT, channel region disconnects, and produces bad so that TFT cannot realize corresponding function。
Summary of the invention
Embodiments of the invention provide a kind of array base palte and manufacture method, GOA unit and display device, it is possible to avoid TFT channel region in GOA unit to disconnect and the open circuit that causes is bad。
The one side of the embodiment of the present invention, a kind of array base palte is provided, including being formed at the grid of substrate surface, gate insulation layer, active layer and source and drain metal level, described source and drain metal level is for forming source-drain electrode and the channel region of TFT, described array base palte includes a multiple TFT and multiple 2nd TFT, the length of the length of the channel region of the described TFT channel region less than described 2nd TFT。
Concrete, before the source-drain electrode forming TFT and channel region, the surface of described source and drain metal level is also formed with photoresist layer。
Wherein, the thickness of the thickness of the channel region of the described photoresist layer correspondence TFT source drain region less than corresponding TFT。
The thickness of the channel region of the corresponding described TFT of described photoresist layer is equal with the thickness of the channel region of corresponding described 2nd TFT。
In embodiments of the present invention, described photoresist layer adopts gray tone mask plate exposure imaging to be formed。
Wherein, described gray tone mask plate includes gray tone rete, and described gray tone rete includes multiple first area and multiple second area, the channel region of the corresponding described TFT in described first area, the channel region of corresponding described 2nd TFT of described second area。
It is positioned at the thickness of gray tone rete of described first area more than the thickness of the gray tone rete being positioned at described second area。
Concrete, the thickness of gray tone rete being positioned at described first area with the thickness difference of the gray tone rete being positioned at described second area is
The length of the channel region of a described TFT is 4.0～5.0 μm。
The length of the channel region of described 2nd TFT is 5.0～6.0 μm。
The embodiment of the present invention also provides for a kind of array base palte, including multiple TFT and the two TFT as above。
On the other hand, the embodiment of the present invention also provides for a kind of display device, including array base palte as above or include GOA unit as above。
Additionally, the embodiment of the present invention also provides for the manufacture method of a kind of array base palte, including:
Grid, gate insulation layer, active layer and source and drain metal level is sequentially formed on the surface of substrate。
It is being formed with the surface of substrate of described source and drain metal level and is being formed by patterning processes process source-drain electrode and the channel region of multiple TFT and the two TFT, the length of the length of the channel region of the described TFT channel region less than described 2nd TFT。
The array base palte of embodiment of the present invention offer and manufacture method, GOA unit and display device, in the process forming TFT channel, when the thickness of photoresist layer in the first TFT channel region is less than the thickness of the photoresist layer in the second TFT channel region, by reducing the length of the channel region of a TFT, the light exposure of the photoresist layer in the first TFT channel region will be reduced accordingly, such that it is able to effectively realize between the thickness of the thickness of the photoresist layer in the first TFT channel region and the photoresist layer in the second TFT channel region poor without obvious section。By the method that such a compensates, can so that using HTM to be formed in the process in TFT channel region, the TFT of different size or shape is when forming channel region, the thickness of the photoresist corresponding to channel region will not become relatively thin because HTM light transmission rate is relatively big, disconnect thus avoiding the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region, thus the open circuit avoiding TFT channel region is bad, significantly improve the quality of product。
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, the accompanying drawing used required in embodiment or description of the prior art will be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the premise not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings。
Fig. 1 is the structural representation of a kind of array base palte in prior art；
Fig. 2 is the structural representation of another array base palte in prior art；
The formation structural representation of a TFT in a kind of array base palte that Fig. 3 provides for the embodiment of the present invention；
The formation structural representation of the 2nd TFT in a kind of array base palte that Fig. 4 provides for the embodiment of the present invention；
Fig. 5 is for forming the structural representation of a kind of gray tone mask plate of the array base palte that the embodiment of the present invention provides；
Fig. 6 is the relation schematic diagram of the length L of the channel region of TFT and the thickness T of gray tone rete 50 in the embodiment of the present invention；
The schematic flow sheet of a kind of manufacturing method of array base plate that Fig. 7 provides for the embodiment of the present invention；
Fig. 8 is the method flow schematic diagram forming TFT channel region。
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments。Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of protection of the invention。
The array base palte that the embodiment of the present invention provides, as shown in Figure 3 and Figure 4, including being formed at the grid 31 on substrate 30 surface, gate insulation layer (not shown), active layer 32 and source and drain metal level 33, this source and drain metal level 33 is for forming source-drain electrode and the channel region of TFT, wherein, array base palte includes a multiple TFT and multiple 2nd TFT, the structure of the oneth TFT can be as shown in Figure 3, the structure of the 2nd TFT can as shown in Figure 4, the wherein length L2 of the length L1 of the channel region of the TFT channel region less than the 2nd TFT。
Wherein, substrate 30 specifically can adopt and include the transparency carrier that the material such as glass or transparent resin is made, and grid 31, gate insulation layer 32 and active layer can be sequentially formed at the surface of transparency carrier 30 respectively through patterning processes。Source and drain metal level 33 can pass through a patterning processes and process the source-drain electrode and the channel region that form TFT respectively, and wherein source and drain metal level 34 disconnects in corresponding active layer position, thus forming the channel region of TFT。
It should be noted that TFT and the two TFT all may be located in GOA unit, and the size of TFT and the two TFT or shape different。In embodiments of the present invention, it is less than the 2nd TFT explanation carried out for the size of a TFT, when the size of a TFT is less than two TFT, a TFT is generally easier to the situation that channel region disconnects occur when forming channel region because etch thicknesses is excessive。Certainly, the embodiment of the present invention is also merely illustrative at this, and the restriction not present invention done, and in embodiments of the present invention, a TFT can include occurring because etch thicknesses is excessive the TFT of such class that channel region disconnects when forming channel region。
The array base palte that the embodiment of the present invention provides, in the process forming TFT channel, when the thickness of photoresist layer in the first TFT channel region is less than the thickness of the photoresist layer in the second TFT channel region, by reducing the length of the channel region of a TFT, the light exposure of the photoresist layer in the first TFT channel region will be reduced accordingly, such that it is able to effectively realize between the thickness of the thickness of the photoresist layer in the first TFT channel region and the photoresist layer in the second TFT channel region poor without obvious section。By the method that such a compensates, can so that using HTM to be formed in the process in TFT channel region, the TFT of different size or shape is when forming channel region, the thickness of the photoresist corresponding to channel region will not become relatively thin because HTM light transmission rate is relatively big, disconnect thus avoiding the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region, thus the open circuit avoiding TFT channel region is bad, significantly improve the quality of product。
Further, as shown in Figure 3 or Figure 4, before the source-drain electrode forming TFT and channel region, the surface of source and drain metal level 33 can also be formed with photoresist layer 34。
Wherein, the thickness of the thickness of the channel region of the corresponding TFT of photoresist layer 34 source drain region less than corresponding TFT。
Preferably, in array base-plate structure as shown in Figure 3 and Figure 4, the thickness t1 of the channel region of the corresponding TFT of photoresist layer 34 can be equal with the thickness t2 of the channel region of corresponding 2nd TFT。So, it is possible to be further ensured that a TFT will cause channel region to disconnect when forming channel region because etch thicknesses is excessive, thus the open circuit avoiding TFT channel region is bad。
Further, photoresist layer 34 can adopt gray tone mask plate exposure imaging to be formed。
Wherein, the structure of gray tone mask plate can as it is shown in figure 5, include gray tone rete 50, wherein, gray tone rete 50 includes again multiple first area 51 and multiple second area 52, the channel region of the corresponding TFT in this first area 51, the channel region of corresponding 2nd TFT of second area 52。
It is positioned at the thickness T1 of gray tone rete 50 of first area 51 more than the thickness T2 of the gray tone rete 50 being positioned at second area 52。
It should be noted that in the manufacturing process of TFT, the length of the channel region of TFT is more little, when being patterned technique to form channel region, it should the light exposure of the corresponding photoresist layer reducing TFT channel region。When adopting gray tone mask plate, along with the increase of gray tone thicknesses of layers, the light transmittance of mask plate also will be gradually reduced, and also can reduce for the light exposure of the photoresist layer in TFT channel region accordingly。
Concrete, when other external conditions are constant, the relation of the length L of the channel region of TFT and the thickness T of gray tone rete 50 can as shown in Figure 6, and wherein the unit of the length L of the channel region of TFT is μm, and the unit of the thickness T of gray tone rete 50 isIt can be seen that, increase along with the length L in TFT channel region, required light transmittance is consequently increased, the thickness T of corresponding gray tone rete 50 reduces to realize the increase of light transmittance therewith, when the length L in TFT channel region increases to more than 6 μm, the thickness T of gray tone rete 50 will no longer reduce along with the increase of the length L in TFT channel region。
As a kind of preferred embodiment, it is positioned at that the thickness T1 of the gray tone rete 50 of first area 51 is poor with the thickness T2 of the gray tone rete 50 being positioned at second area 52 can beAccordingly, the length L1 of the channel region of a TFT can be 4.0～5.0 μm, and the length L2 of the channel region of the 2nd TFT can be 5.0～6.0 μm。Such as, L1 specifically can choose 4.5 μm, and L2 specifically can choose 5.5 μm。Adopt the channel length design of the TFT of such a size, can effectively reduce the light exposure of the photoresist layer in the first TFT channel region, such that it is able to effectively realize between the thickness of the thickness of the photoresist layer in the first TFT channel region and the photoresist layer in the second TFT channel region poor without obvious section。
By the method that such a compensates, can so that using HTM to be formed in the process in TFT channel region, the TFT of different size or shape is when forming channel region, the thickness of the photoresist corresponding to channel region will not become relatively thin because HTM light transmission rate is relatively big, disconnect thus avoiding the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region, thus the open circuit avoiding TFT channel region is bad, significantly improve the quality of product。
It should be noted that above-described TFT is all the explanation carried out for bottom grating structure, the TFT of the equally possible employing top gate structure of array base palte of the such a structure that the embodiment of the present invention provides。Being different in that with the TFT of bottom grating structure, in the TFT of top gate structure, including being sequentially formed at the source and drain metal level of substrate surface, active layer, gate insulation layer and grid, source and drain metal level is for forming the source-drain electrode of TFT and the channel region of TFT。In order to avoid TFT causes channel region to disconnect when forming channel region because etch thicknesses is excessive, the such a design of the length L2 of the length L1 of the channel region of equally possible employing the oneth TFT channel region less than the 2nd TFT。
The GOA unit that the embodiment of the present invention provides, including multiple TFT and the two TFT as above。
The GOA unit of such a structure, in the process forming TFT channel, when the thickness of photoresist layer in the first TFT channel region is less than the thickness of the photoresist layer in the second TFT channel region, by reducing the length of the channel region of a TFT, the light exposure of the photoresist layer in the first TFT channel region will be reduced accordingly, such that it is able to effectively realize between the thickness of the thickness of the photoresist layer in the first TFT channel region and the photoresist layer in the second TFT channel region poor without obvious section。By the method that such a compensates, can so that using HTM to be formed in the process in TFT channel region, the TFT of different size or shape is when forming channel region, the thickness of the photoresist corresponding to channel region will not become relatively thin because HTM light transmission rate is relatively big, disconnect thus avoiding the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region, thus the open circuit avoiding TFT channel region is bad, significantly improve the quality of product。
Additionally, the embodiment of the present invention also provides for a kind of display device, concrete, this display device can include array base palte as above or include GOA unit as above。
It should be noted that display device provided by the present invention can be: any product with display function or the parts such as liquid crystal panel, Electronic Paper, oled panel, LCD TV, liquid crystal display, DPF, mobile phone, panel computer。
Owing to the structure of array base palte or GOA unit has done detailed description in the aforementioned embodiment, repeat no more herein。
The manufacture method of the array base palte that the embodiment of the present invention provides, as it is shown in fig. 7, comprises:
S701, sequentially form grid, gate insulation layer, active layer and source and drain metal level on the surface of substrate。
S702, it is being formed with the surface of substrate of source and drain metal level and is being formed by patterning processes process source-drain electrode and the channel region of multiple TFT and the two TFT, the length of the length of the channel region of the TFT channel region less than the 2nd TFT。
It should be noted that TFT and the two TFT all may be located in GOA unit, and the size of TFT and the two TFT or shape different。In embodiments of the present invention, it is less than the 2nd TFT explanation carried out for the size of a TFT, when the size of a TFT is less than two TFT, a TFT is generally easier to the situation that channel region disconnects occur when forming channel region because etch thicknesses is excessive。Certainly, the embodiment of the present invention is also merely illustrative at this, and the restriction not present invention done, and in embodiments of the present invention, a TFT can include occurring because etch thicknesses is excessive the TFT of such class that channel region disconnects when forming channel region。
The manufacturing method of array base plate that the embodiment of the present invention provides, in the process forming TFT channel, when the thickness of photoresist layer in the first TFT channel region is less than the thickness of the photoresist layer in the second TFT channel region, by reducing the length of the channel region of a TFT, the light exposure of the photoresist layer in the first TFT channel region will be reduced accordingly, such that it is able to effectively realize between the thickness of the thickness of the photoresist layer in the first TFT channel region and the photoresist layer in the second TFT channel region poor without obvious section。By the method that such a compensates, can so that using HTM to be formed in the process in TFT channel region, the TFT of different size or shape is when forming channel region, the thickness of the photoresist corresponding to channel region will not become relatively thin because HTM light transmission rate is relatively big, disconnect thus avoiding the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region, thus the open circuit avoiding TFT channel region is bad, significantly improve the quality of product。
Further, as shown in Figure 8, described the source-drain electrode of multiple TFT and the two TFT is formed by patterning processes process and channel region specifically may include that being formed with the surface of substrate of source and drain metal level
S801, the surface of source and drain metal level formed photoresist layer。
Photoresist layer is exposed development by S802, employing gray tone mask plate, so that the thickness of the source drain region that the thickness of the channel region of photoresist layer correspondence TFT is less than corresponding TFT, and the thickness of the channel region of the corresponding TFT of photoresist layer is equal with the thickness of the channel region of corresponding 2nd TFT。
Wherein, the structure of gray tone mask plate can as it is shown in figure 5, include gray tone rete 50, wherein, gray tone rete 50 includes again multiple first area 51 and multiple second area 52, the channel region of the corresponding TFT in this first area 51, the channel region of corresponding 2nd TFT of second area 52。It is positioned at the thickness T1 of gray tone rete 50 of first area 51 more than the thickness T2 of the gray tone rete 50 being positioned at second area 52。
S803, etch away the photoresist layer that the channel region of TFT is corresponding, peel off remaining photoresist layer, form source-drain electrode and the channel region of multiple TFT and the two TFT。
As a kind of preferred embodiment, the thickness T1 of gray tone rete being positioned at first area with the thickness difference of the gray tone rete being positioned at second area can beAccordingly, the length of the channel region of a TFT can be 4.0～5.0 μm, and the length of the channel region of the 2nd TFT can be 5.0～6.0 μm。Such as, the length of the channel region of a TFT specifically can choose 4.5 μm, and the length of the channel region of the 2nd TFT specifically can choose 5.5 μm。Adopt the channel length design of the TFT of such a size, can effectively reduce the light exposure of the photoresist layer in the first TFT channel region, such that it is able to effectively realize between the thickness of the thickness of the photoresist layer in the first TFT channel region and the photoresist layer in the second TFT channel region poor without obvious section。
By the method that such a compensates, can so that using HTM to be formed in the process in TFT channel region, the TFT of different size or shape is when forming channel region, the thickness of the photoresist corresponding to channel region will not become relatively thin because HTM light transmission rate is relatively big, disconnect thus avoiding the channel region that in GOA unit, TFT causes because etch thicknesses is excessive when forming channel region, thus the open circuit avoiding TFT channel region is bad, significantly improve the quality of product。
The above; being only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, any those familiar with the art is in the technical scope that the invention discloses; change can be readily occurred in or replace, all should be encompassed within protection scope of the present invention。Therefore, protection scope of the present invention should be as the criterion with described scope of the claims。
Claims (9)
1. an array base palte, including being formed at the grid of substrate surface, gate insulation layer, active layer and source and drain metal level, described source and drain metal level is for forming source-drain electrode and the channel region of TFT, it is characterized in that, described array base palte includes a multiple TFT and multiple 2nd TFT, the length of the length of the channel region of the described TFT channel region less than described 2nd TFT；Before the source-drain electrode forming TFT and channel region, the surface of described source and drain metal level is also formed with photoresist layer；Described photoresist layer adopts gray tone mask plate exposure imaging to be formed；
Described gray tone mask plate includes gray tone rete, and described gray tone rete includes multiple first area and multiple second area, the channel region of the corresponding described TFT in described first area, the channel region of corresponding described 2nd TFT of described second area；
It is positioned at the thickness of gray tone rete of described first area more than the thickness of the gray tone rete being positioned at described second area。
2. array base palte according to claim 1, it is characterised in that
The thickness of the thickness of the channel region of the described photoresist layer correspondence TFT source drain region less than corresponding TFT；
The thickness of the channel region of the corresponding described TFT of described photoresist layer is equal with the thickness of the channel region of corresponding described 2nd TFT。
3. array base palte according to claim 1, it is characterised in that the thickness of gray tone rete being positioned at described first area with the thickness difference of the gray tone rete being positioned at described second area is
4. according to the arbitrary described array base palte of claim 1-3, it is characterised in that
The length of the channel region of a described TFT is 4.0～5.0 μm；
The length of the channel region of described 2nd TFT is 5.0～6.0 μm。
5. a GOA unit, it is characterised in that include multiple as arbitrary in claim 1-4 as described in TFT and the two TFT。
6. a display device, it is characterised in that include as arbitrary in claim 1-4 as described in array base palte or include GOA unit as claimed in claim 5。
7. the manufacture method of an array base palte, it is characterised in that including:
Grid, gate insulation layer, active layer and source and drain metal level is sequentially formed on the surface of substrate；
It is being formed with the surface of substrate of described source and drain metal level and is being formed by patterning processes process source-drain electrode and the channel region of multiple TFT and the two TFT, the length of the length of the channel region of the described TFT channel region less than described 2nd TFT；Photoresist layer is formed on the surface of described source and drain metal level；
Adopt gray tone mask plate that described photoresist layer is exposed development, so that the thickness of the source drain region that the thickness of the channel region of described photoresist layer correspondence TFT is less than corresponding TFT, and the thickness of the channel region of the corresponding described TFT of described photoresist layer is equal with the thickness of the channel region of corresponding described 2nd TFT；
Etch away the described photoresist layer that the channel region of TFT is corresponding, peel off remaining photoresist layer, form source-drain electrode and the channel region of multiple TFT and the two TFT。
8. the manufacture method of array base palte according to claim 7, it is characterised in that the thickness of the gray tone rete of the channel region of a described TFT with the thickness difference of the gray tone rete of the channel region being positioned at described 2nd TFT is
9. the manufacture method according to the arbitrary described array base palte of claim 7-8, it is characterised in that
The length of the channel region of a described TFT is 4.0～5.0 μm；
The length of the channel region of described 2nd TFT is 5.0～6.0 μm。
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| CN111796706A (en) * | 2020-05-22 | 2020-10-20 | 南昌欧菲显示科技有限公司 | Panel, preparation method thereof, touch display screen and electronic equipment |
| WO2023108429A1 (en) * | 2021-12-14 | 2023-06-22 | 京东方科技集团股份有限公司 | Manufacturing method for thin film transistor, array substrate, and display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6531713B1 (en) * | 1999-03-19 | 2003-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and manufacturing method thereof |
| CN102566112A (en) * | 2011-10-19 | 2012-07-11 | 友达光电股份有限公司 | Liquid crystal display device with high aperture ratio |
| CN102789107A (en) * | 2012-09-07 | 2012-11-21 | 深圳市华星光电技术有限公司 | Liquid crystal display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6531713B1 (en) * | 1999-03-19 | 2003-03-11 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and manufacturing method thereof |
| CN102566112A (en) * | 2011-10-19 | 2012-07-11 | 友达光电股份有限公司 | Liquid crystal display device with high aperture ratio |
| CN102789107A (en) * | 2012-09-07 | 2012-11-21 | 深圳市华星光电技术有限公司 | Liquid crystal display panel |
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