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CN103545396A - 光电二极管及其制造方法 - Google Patents

光电二极管及其制造方法 Download PDF

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CN103545396A
CN103545396A CN201310301655.8A CN201310301655A CN103545396A CN 103545396 A CN103545396 A CN 103545396A CN 201310301655 A CN201310301655 A CN 201310301655A CN 103545396 A CN103545396 A CN 103545396A
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tin
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L·E·尤里斯
G·M·格朗杰
K·J·戴维斯
N·L·阿波哥
P·D·布瑞维尔
B·诺守
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Abstract

本发明为光电二极管及其制造方法。用于制造光电二极管(10)的方法,其包括下述步骤:提供基底;溶液沉积量子纳米材料层(14)在基底上,所述量子纳米材料层(14)包括具有配体涂层(24)的许多量子纳米材料(22);和施加薄膜氧化物层(16)在量子纳米材料层(14)上。

Description

光电二极管及其制造方法
技术领域
本申请涉及光伏设备,并且更具体地涉及由量子纳米材料形成的光电二极管,并且甚至更具体地涉及使用溶液工艺技术由量子纳米材料形成的光电二极管。
背景技术
光电二极管通过光生伏打效应将太阳能转化成可用的电能(电流或电压)。现代光电二极管是相对轻质的并且它们以相对高的效率操作。所以,光电二极管提供可靠的、轻质的和负担得起的电能来源,其适用于各种应用,包括陆地和太空应用。
光电二极管通常使用真空沉积技术在基底上生长半导体材料的薄层来制造。然后,可以电相互连接所得光电二极管形成大的阵列,以收获太阳能并产生可用的电能。
不幸地,真空沉积技术通常需要基底具有相对小的表面积(小于1ft2)以合适地生长,所以不适合大表面积应用。而且,真空沉积技术通常不适合曲面,所以限于相对小的平坦的基底。仍进一步,真空沉积技术是相对昂贵的,所以显著增加了光电二极管的总体成本。
因此,本领域技术人员在轻质、高效率光电二极管领域——包括轻质、高效率光电二极管的制造——继续研究和开发努力。
发明内容
在一种实施方式中,公开了用于制造光电二极管的方法。该方法可包括下述步骤:(1)提供基底,(2)溶液沉积(例如,旋转涂布)量子纳米材料层在基底上,所述量子纳米材料层包括具有配体涂层(ligandcoating)的量子纳米材料,和(3)施加薄膜氧化物层在量子纳米材料层上。
在另一实施方式中,公开的方法可包括下述步骤:(1)提供基底,(2)溶液沉积(例如,旋转涂布)量子纳米材料层在基底上,所述量子纳米材料层包括具有配体涂层的量子纳米材料,和(3)溶液沉积(例如,旋转涂布)薄膜氧化物层在量子纳米材料层上。
在另一实施方式中,公开的方法可包括下述步骤:(1)提供基底,(2)在基底上形成底触点,(3)溶液沉积(例如,旋转涂布)量子纳米材料层在基底上,所述量子纳米材料层包括具有配体涂层(例如,金属卤化物配体和/或金属硫属元素化物络合物)的量子纳米材料(例如,锡-碲化物和/或铅-锡-碲化物),(4)施加薄膜氧化物层在量子纳米材料层上,和(5)在薄膜氧化物层上形成顶触点。
在另一实施方式中,公开的光电二极管可包括(1)基底,(2)位于基底上的溶液浇铸的量子纳米材料层,所述溶液浇铸的量子纳米材料层包括具有配体涂层的锡-碲化物量子纳米材料,其中配体涂层包括金属卤化物配体和/或金属硫属元素化物络合物,其中金属硫属元素化物络合物包括锡和/或过渡金属,和(3)溶液浇铸的量子纳米材料层上的薄膜氧化物层。
在又另一实施方式中,公开的光电二极管可包括(1)基底;(2)位于基底上的溶液浇铸的量子纳米材料层,所述溶液浇铸的量子纳米材料层包括具有配体涂层的铅-锡-碲化物量子纳米材料,其中配体涂层包括金属卤化物配体和/或金属硫属元素化物络合物,其中金属硫属元素化物络合物包括锡和/或过渡金属;和(3)溶液浇铸的量子纳米材料层上的薄膜氧化物层。
在正文和附图中,公开了用于制造光电二极管10的方法,其包括下述步骤:提供基底;溶液沉积量子纳米材料层14在所述基底上,所述量子纳米材料层14包括多个量子纳米材料22,所述多个22的每个量子纳米材料22包括配体涂层24;和施加薄膜氧化物层16在所述量子纳米材料层14上。
可选地,方法可包括其中所述基底包括半导体材料。
可选地,方法可包括其中所述半导体材料包括锗12。
可选地,方法可包括其中所述锗12是掺杂的p型锗。
可选地,方法可进一步包括在所述溶液沉积步骤之前硫钝化(sulfurpassivating)所述基底的步骤。
可选地,方法可包括其中所述基底包括金属箔和聚合物膜的至少一种。
可选地,方法可包括其中所述多个量子纳米材料22为多个量子点22,和其中所述多个量子点22的每个量子点22包括锡-碲化物和铅-锡-碲化物的至少一种。
可选地,方法可包括其中所述多个量子纳米材料22包括锡-碲化物。
可选地,方法可包括其中所述多个量子纳米材料22的最大横截面尺寸在约15纳米和约50纳米之间。
可选地,方法可包括其中所述多个量子纳米材料22包括铅-锡-碲化物。
可选地,方法可包括其中所述多个量子纳米材料22的最大横截面尺寸为至少约7.5纳米。
可选地,方法可包括其中所述配体涂层24包括金属硫属元素化物络合物,其中所述金属硫属元素化物络合物包括锡和过渡金属的至少一种。
可选地,方法可包括其中所述配体涂层24包括锡-硫化物、锡-硒化物和锡-碲化物的至少一种。
可选地,方法可包括其中所述配体涂层24包括金属卤化物配体。
可选地,方法可包括其中所述薄膜氧化物层16通过溶液沉积法施加。
可选地,方法可包括其中所述薄膜氧化物层16包括无定形氧化物半导体。
可选地,方法可进一步包括施加第一接触层18在所述薄膜氧化物层16上的步骤。
可选地,方法可进一步包括施加第二接触层20在所述基底上的步骤。
一个方面,公开了光电二极管,其包括:基底;位于所述基底上的溶液浇铸的量子纳米材料层14,所述溶液浇铸的量子纳米材料层14包括包含配体涂层24的锡-碲化物量子纳米材料22,其中所述配体涂层24包括金属卤化物配体和金属硫属元素化物络合物的至少一种,其中所述金属硫属元素化物络合物包括锡和过渡金属的至少一种;和所述溶液浇铸的量子纳米材料层14上的薄膜氧化物层。
一个方面,公开了光电二极管10,其包括:基底;位于所述基底上的溶液浇铸的量子纳米材料层14,所述溶液浇铸的量子纳米材料层14包括包含配体涂层24的铅-锡-碲化物量子纳米材料22,其中所述配体涂层24包括金属卤化物配体和金属硫属元素化物络合物的至少一种,其中所述金属硫属元素化物络合物包括锡和过渡金属的至少一种;和所述溶液浇铸的量子纳米材料层14上的薄膜氧化物层16。
根据下面的发明详述、附图和所附权利要求中,公开的光电二极管及其制造方法的其他实施方式将变得显而易见。
附图说明
图1是公开的光电二极管的一种实施方式的横截面的示意性侧视图;
图2是图解公开的制造光电二极管的方法的一种实施方式的流程图;和
图3A和3B是公开的光电二极管的一个实例在被照射之前(图3A)和被照射时(图3B)显示的电流-电压特性曲线的图解。
发明详述
现在已经发现,光电二极管可使用溶液沉积技术比如旋转涂布、冲压或印刷制造。公开的溶液沉积技术可用于以比使用传统气相沉积技术相对更低的成本制造配置为在具体波长范围(例如,长波红外线)内操作的光电二极管。而且,公开的溶液沉积技术可用于大的表面积(>1ft2)应用,并且可用在平坦的表面上以及曲面上。
参考图1,通常指定10的公开的光电二极管的一种实施方式,可包括基底层12、量子纳米材料层14和薄膜氧化物层16。第一接触层18可施加在薄膜氧化物层16上。任选地,第二接触层20可施加在基底层12上。
基底层12可提供在其上可沉积量子纳米材料层14的表面。本领域技术人员将理解各种材料(或材料的组合)可用于形成基底层12,而不背离本发明的范围。
在第一种变型中,基底层12可由半导体材料形成。例如,基底层12可由锗形成,比如作为p型锗开始的锗或已经是掺杂的p型锗的锗。但是,各种半导体基底材料可用于形成基底层12,并且半导体基底材料可任选地被掺杂以实现期望的电学性质。
任选地,半导体基底材料(例如,锗)可经历硫钝化(S-钝化)。尽管可使用各种硫钝化技术,但是一种合适的例子包括水性(NH4)2S处理,如在Thathachary A.V.等,“Fermi Level Depinning at the germaniumSchottky Interface Through Sulfur Passivation,”Appl.Phy.Lett.96,152108(2010)中更详细描述的,其全部内容通过引用并入本文。不被限于任何具体的理论,认为半导体基底材料的硫钝化可退钉扎(de-pin)半导体基底材料表面的费米能级以对半导体基底制造可重复的欧姆接触。
在第二种变型中,基底层12可由非半导体材料形成。考虑各种非半导体材料,比如导电材料、非导电材料、柔性材料和刚性材料。非半导体材料可用各种材料比如导体和/或绝缘体涂布,以实现期望的电学性质。
在第二种变型的一种表现中,基底层12可包括导电的、柔性箔,比如金属箔。导电的柔性箔可被涂布绝缘体薄层(例如,25纳米或更薄的)。作为一个例子,绝缘体可使用溶液工艺施加,比如溶液加工的磷酸铝盐或溶液加工的硫酸氧铪。作为另一例子,绝缘体可使用物理气相沉积法施加。不被限制于任何具体的理论,认为绝缘体可使得载流子隧穿至下面导电的柔性箔,但是可排除量子纳米材料层14和导电的柔性箔之间的直接接触,这种直接接触可猝灭量子纳米材料层14中量子纳米材料的期望性质。
在第二变型的另一表现中,基底层12可包括非导电聚合物膜,比如聚醚醚酮。非导电聚合物膜可用薄的高导电层涂布。例如,薄的高导电层可为使用物理气相沉积法施加的薄金属(例如,银)层。接着,薄的高导电层可被涂布绝缘体薄层(例如,25纳米或更薄的),比如通过使用溶液工艺或物理气相沉积法进行,如上述。
量子纳米材料层14可包括使用溶液沉积技术作为薄膜施加在基底层12的表面13上的多个量子纳米材料22。合适的溶液沉积技术的例子包括旋转涂布、冲压和印刷。
量子纳米材料22可为量子点、量子棒、纳米四脚锥体或任何其他纳米晶体半导体材料。作为一个具体的例子,量子纳米材料22可为锡-碲化物(SnTe)量子点。作为另一具体的例子,量子纳米材料22可为铅-锡-碲化物(Pb(1-x)SnxTe,其中x是0.1和0.6之间的数)量子点。
可调谐量子纳米材料22以吸收红外线辐射,比如中波长红外线(3–5微米)和长波长红外线(5–15微米)带宽内的红外线辐射。调谐量子纳米材料22以吸收中波长和长波长红外线光谱内的红外线辐射可能需要特定的材料选择(例如,由锡-碲化物或铅-锡-碲化物形成量子纳米材料22)和生长量子纳米材料22至具体尺寸,如在2011年2月8日提交的美国专利申请号13/022,705(“Nanomaterial Having Tunable InfraredAbsorption Characteristics and Associated method of Manufacture”)中更详细描述,其全部内容通过引用并入本文。作为一个例子,量子纳米材料22可由锡-碲化物(SnTe)形成并且最大横截面尺寸可在约15和约50纳米之间。作为另一例子,量子纳米材料22可由铅-锡-碲化物(PbxSn(1-x)Te,其中x是0.1和0.6之间的数)形成并且最大横截面尺寸可为至少约7.5纳米。
量子纳米材料22可包括配体涂层24。配体涂层24可包括无机配体或无机配体的组合。也考虑使用有机配体。不被限于任何具体的理论,认为配体涂层24可在量子纳米材料22的表面上形成键(bond),并且可使得量子纳米材料层14内邻近的量子纳米材料22之间间隔更近。
在一种配方中,配体涂层24可包括金属硫属元素化物络合物(“MCC”)。金属硫属元素化物络合物可包括金属和硫属元素,比如硫、硒或碲,其中金属包括锡和/或过渡金属。适合用作配体涂层24的金属硫属元素化物络合物的例子包括锡-硫化物(SnS)、锡-硒化物(SnSe)和锡-碲化物(SnTe)。
在另一配方中,配体涂层24可包括金属卤化物配体。例如,卤化物可以是碘化物、溴化物和/或氯化物。适合用作配体涂层24的金属卤化物配体的例子是氯化钛(TiCl4)。
配体涂层24可使用配体交换方法施加至量子纳米材料22。制造量子纳米材料22的方法可产生已在其表面上具有涂层(例如,油酸)的量子纳米材料22。配体交换方法可用期望的配体涂层24(例如,SnS、SnSe或SnTe)替换初始涂层(例如,油酸)。
作为非限制性例子,可如下制备具有适合形成量子纳米材料层14的配体涂层24的量子纳米材料22的分散液。首先,可如美国专利申请号13/022,705所描述的制造锡-碲化物(SnTe)纳米晶体。可控制该制造方法从而调谐所得锡-碲化物纳米晶体至期望的波长(例如,长波长红外线)。锡-碲化物纳米晶体可具有油酸涂层,并且可被分散在己烷中。第二,可进行配体交换反应以用锡-硫化物(SnS)金属硫属元素化物络合物涂布锡-碲化物纳米晶体。最后,可将SnS-涂布的锡-碲化物纳米晶体分散在肼中。
为了形成量子纳米材料层14,肼中的SnS-涂布的锡-碲化物纳米晶体的分散液可被溶液沉积在基底层14上,比如通过旋转涂布、冲压或印刷进行。可继续溶液沉积法(例如,旋转涂布),直到实现期望的横截面厚度的量子纳米材料层14。接着,在溶液沉积之后,所得分层的结构可被加热处理(例如,280℃下60分钟)。
薄膜氧化物层16可施加在量子纳米材料层14上,并且可任选地渗入量子纳米材料层14。薄膜氧化物层16可以是导电的,并且可以通常对于意图被量子纳米材料层14吸收的电磁辐射是透明的。
薄膜氧化物层16可由无定形氧化物半导体形成。本领域技术人员将理解各种无定形氧化物半导体可用于形成薄膜氧化物层16。适合形成薄膜氧化物层16的无定形氧化物半导体的两个具体的例子是锌-锡-氧化物(ZTO)和铟-镓-锌-氧化物(IGZO)。
在一种构造中,薄膜氧化物层16可使用溶液沉积法形成。例如,薄膜氧化物层16可使用溶液沉积法通过合成铟-镓-锌-氧化物(IGZO)形成。合适的IGZO溶液获得自Inpria Corporation of Corvallis,Oregon。所得溶液沉积的薄膜氧化物层16可在300℃下加热处理60分钟。
在另一构造中,薄膜氧化物层16可使用物理气相沉积法形成。例如,薄膜氧化物层16可使用真空沉积由锌-锡-氧化物(ZTO)形成。
因此,量子纳米材料层14可位于基底层12和薄膜氧化物层16之间。另外的层可并入光电二极管10,而不背离本发明的范围。
第一接触层18可施加在薄膜氧化物层16上并且可与薄膜氧化物层16电耦合。第一接触层18可由导电金属28比如金、铂、镍、铝和/或钽形成。任选的连接层(tie layer)26,比如钛,可位于第一接触层18的导电金属28和薄膜氧化物层16之间,以增强导电金属28和下面的薄膜氧化物层16之间的结合(bonding)。
第一接触层18可使用各种技术以各种图案(例如,栅格图案)施加至薄膜氧化物层16。作为一个例子,第一接触层18可使用冲压法施加。作为另一例子,第一接触层18可使用物理气相沉积法(蒸发或溅射)施加,其中平板印刷可用于限定第一接触层18的图案。
任选地,铟柱(indium bump)30可施加至(例如,蒸发至)第一接触层18上。
第二接触层20可任选地施加在基底层12上并且可与基底层12电耦合。第二接触层20可由导电金属比如金、铂、镍、铝和/或钽形成。
也公开了用于制造光电二极管的方法。参考图2,通常指定为100的公开的用于制造光电二极管的方法的一种实施方式可开始于块102,提供基底的步骤。例如,在块102提供的基底可为锗。
在块104,可处理基底。作为一种处理,可掺杂基底。例如,锗基底可被掺杂p型掺杂剂,以实现约1013的载流子密度。作为另一处理,基底可经历硫钝化。例如,p-掺杂的锗基底可在(NH4)2S溶液中钝化30分钟,电阻率为24.5至27.5ohms/sq。在硫钝化之后,基底可:(1)在HCL/HBr溶液中清洁5分钟;(2)用去离子水冲洗5分钟并且用N2吹干;(3)用40%硫化铵水溶液在50℃处理5分钟;接着(4)用去离子水冲洗5分钟并且用N2吹干。
在块106,底触点可被施加至基底。例如,底触点可如下施加:(1)可在锗基底上进行平板印刷;(2)金属,比如金、铂、镍、铝和/或钽,可施加(例如,溅射)在平板印刷上;和(3)可剥离(lift off)该平板印刷以限定底触点。任选地,可进行AMD,随后去离子水冲洗5分钟,接着臭氧处理10至30分钟。
在块108,量子纳米材料层可使用溶液沉积技术,比如旋转涂布、冲压或印刷施加至基底。例如,肼中SnS-涂布的锡-碲化物纳米晶体的分散液可通过旋转涂布施加至锗基底,以实现期望的厚度。SnS-涂布的锡-碲化物纳米晶体层(在锗基底上)可在280℃加热处理60分钟,如在块110中所显示。
在块112,薄膜氧化物层可施加在量子纳米材料层上。例如,从Inpria Corporation of Corvallis,Oregon获得的铟-镓-锌-氧化物(IGZO)溶液可通过旋转涂布施加至SnS-涂布的锡-碲化物纳米晶体层以实现期望的厚度(例如,单层约20至25纳米厚)。IGZO薄膜氧化物层(在量子纳米材料层上,后者在锗基底上)可在300℃加热处理60分钟,如在块114中所显示。作为另一例子,薄膜氧化物层(例如,锌-锡-氧化物)可使用传统的物理气相沉积(PVD)法或无机缩聚(poly inorganiccondensation)(PIC)法施加在量子纳米材料层上,其可能不需要另外的沉积后热处理步骤。
任选地,可在薄膜氧化物层形成之后(例如,块114之后)进行臭氧处理步骤。
在块116,顶触点可被施加至薄膜氧化物层。例如,顶触点可如下施加:(1)可在薄膜氧化物层上进行照相平板印刷以限定顶触点;(2)金属,比如金和任选的钛连接层可被施加(例如,溅射)在该照相平板印刷上;和(3)可剥离该照相平板印刷以限定顶触点。
任选地,可在顶触点形成之后(例如,在块116之后)进行铟柱施加步骤。
图3A和3B显示根据公开的方法100在硫钝化的p型掺杂的锗基底上制造的光电二极管的电流-电压特性曲线,所述基底具有溶液浇铸的SnS-涂布的SnTe纳米晶体层和溶液浇铸的IGZO薄膜氧化物层。图3A显示被照射之前光电二极管的电流-电压特性曲线和图3B显示照射期间光电二极管的电流-电压特性曲线。
因此,公开的光电二极管可使用低成本的溶液沉积法制造。溶液沉积法可便于在平坦表面以及曲面上光电二极管的可升级规模的、大面积(大于1ft2)制造。而且,纳米晶体组成和尺寸的小心选择可便于调谐光电二极管至期望的波长范围(例如,长波长红外线)。
尽管已经显示和描述了公开的光电二极管及其制造方法的各种实施方式,但是当阅读本说明书时本领域技术人员可想到许多修改。本申请包括这些修饰并且仅被权利要求书的范围限制。

Claims (15)

1.用于制造光电二极管(10)的方法,其包括下述步骤:
提供基底;
溶液沉积量子纳米材料层(14)在所述基底上,所述量子纳米材料层(14)包括多个量子纳米材料(22),所述多个量子纳米材料(22)的每个量子纳米材料(22)包括配体涂层(24);和
施加薄膜氧化物层(16)在所述量子纳米材料层(14)上。
2.权利要求1所述的方法,其中所述基底包括半导体材料。
3.权利要求1或2任一项所述的方法,其中所述半导体材料包括锗(12)。
4.权利要求1-3任一项所述的方法,进一步包括在所述溶液沉积步骤之前硫钝化所述基底的步骤。
5.权利要求1-4任一项所述的方法,其中所述基底包括金属箔和聚合物膜的至少一种。
6.权利要求1-5任一项所述的方法,其中所述多个量子纳米材料(14)为多个量子点(22),并且其中所述多个量子点(22)的每个量子点(22)包括锡-碲化物和铅-锡-碲化物的至少一种。
7.权利要求1-6任一项所述的方法,其中所述多个量子纳米材料(14)包括锡-碲化物;其中所述多个量子纳米材料(14)的最大横截面尺寸在约15纳米和约50纳米之间。
8.权利要求1-6任一项所述的方法,其中所述多个量子纳米材料(14)包括铅-锡-碲化物;其中所述多个量子纳米材料(14)的最大横截面尺寸为至少约7.5纳米。
9.权利要求1-8任一项所述的方法,其中所述配体涂层(24)包括下述至少一种:
i.)金属硫属元素化物络合物,其中所述金属硫属元素化物络合物包括锡和过渡金属的至少一种;和
ii.)锡-硫化物、锡-硒化物和锡-碲化物的至少一种。
10.权利要求1-8任一项所述的方法,其中所述配体涂层(24)包括金属卤化物配体。
11.权利要求1-10任一项所述的方法,其中所述薄膜氧化物层(16)通过溶液沉积法施加。
12.权利要求1-11任一项所述的方法,其中所述薄膜氧化物层(16)包括无定形氧化物半导体。
13.权利要求1-12任一项所述的方法,进一步包括施加第一接触层(18)在所述薄膜氧化物层(16)上的步骤。
14.权利要求1-13任一项所述的方法,进一步包括施加第二接触层(20)在所述基底上的步骤。
15.光电二极管,包括:
基底;
位于所述基底上的溶液浇铸的量子纳米材料层(14),所述溶液浇铸的量子纳米材料层(14)包括包含配体涂层(24)的锡-碲化物量子纳米材料(22),其中所述配体涂层(24)包括金属卤化物配体和金属硫属元素化物络合物的至少一种,其中所述金属硫属元素化物络合物包括锡和过渡金属的至少一种;和
在所述溶液浇铸的量子纳米材料层(14)上的薄膜氧化物层(16)。
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