CN103296021A - TFT array substrate - Google Patents
TFT array substrate Download PDFInfo
- Publication number
- CN103296021A CN103296021A CN2012102241802A CN201210224180A CN103296021A CN 103296021 A CN103296021 A CN 103296021A CN 2012102241802 A CN2012102241802 A CN 2012102241802A CN 201210224180 A CN201210224180 A CN 201210224180A CN 103296021 A CN103296021 A CN 103296021A
- Authority
- CN
- China
- Prior art keywords
- tft array
- array substrate
- ground connection
- connection line
- earth connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 102
- 239000002184 metal Substances 0.000 claims description 36
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 15
- 229920005591 polysilicon Polymers 0.000 claims description 12
- 230000006378 damage Effects 0.000 abstract description 11
- 239000010410 layer Substances 0.000 description 46
- 230000003068 static effect Effects 0.000 description 32
- 239000011521 glass Substances 0.000 description 18
- 238000005530 etching Methods 0.000 description 14
- 238000000034 method Methods 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 10
- 230000004888 barrier function Effects 0.000 description 9
- 239000010409 thin film Substances 0.000 description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- 230000008569 process Effects 0.000 description 7
- 208000027418 Wounds and injury Diseases 0.000 description 5
- 239000012528 membrane Substances 0.000 description 5
- 230000008859 change Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 208000014674 injury Diseases 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 206010052428 Wound Diseases 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Images
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention provides a TFT array substrate, which comprises: the grounding wire is arranged in the non-display area and comprises two grounding wire sections, and therefore when one of the grounding wire sections is subjected to electrostatic damage to cause circuit damage, and the electrostatic discharge function is lost, the other grounding wire sections still can achieve the electrostatic discharge protection function, the problem of grounding wire failure is avoided to a great extent, and the antistatic performance of the TFT array substrate is improved.
Description
Technical field
The present invention relates to the LCD Technology field, particularly a kind of have an anlistatig tft array substrate method.
Background technology
Thin Film Transistor-LCD has low-voltage, little power consumption, shows advantages such as containing much information, be easy to colorize, occupied leading position in current monitor market.It has been widely used in the electronic equipments such as electronic computer, electronic notebook, mobile phone, video camera, HDTV.
Thin Film Transistor-LCD comprises array base palte and the color membrane substrates that box is formed, and is filled in the liquid crystal layer in the gap between array base palte and the color membrane substrates.Described Thin Film Transistor-LCD shows that the basic principle of image is: by applying the electric field that acts on the liquid crystal layer at described array base palte and color membrane substrates, control the orientation of the liquid crystal molecule of described liquid crystal layer, thereby control penetrated what of light of the liquid crystal molecule of liquid crystal layer, namely reached modulation by the purpose of the light intensity of liquid crystal layer.
Wherein, the forming process of the array base palte of Thin Film Transistor-LCD generally includes: glass substrate is provided, forms each functional film layer/semiconductor device at described glass substrate.And in order to guarantee production efficiency, usually, the tft array substrate that has just begun to form (is also referred to as sheet usually, in order to distinguish mutually with the final array base palte that is used for Thin Film Transistor-LCD, be called tft array substrate herein) will form array base palte (be also referred to as panel usually, be final and color membrane substrates herein to the device of box) through cutting.Certainly, when tft array substrate (sheet) when not needing to cut, it is array base palte (panel) just.
Yet in the manufacture process of semiconductor device and when using, (Electro Static Discharge ESD) is a kind of common phenomena to static discharge, and static discharge can cause puncture or its forfeiture service behaviour of device.The electrostatic charge that Thin Film Transistor-LCD produces in manufacture process very easily accumulates on the array base palte and color membrane substrates of glass, and, electrostatic charge can be applied on each rete, thereby produces serious damage of electrostatic discharge, causes the inefficacy of thin-film transistor; The short circuit of transmission line, problem such as open circuit influence the production yield of product.
For this reason, proposed in the prior art at the non-display area of tft array substrate earth connection to be set.Specifically please refer to Fig. 1, it is the structural representation of existing tft array substrate.As shown in Figure 1, described tft array substrate 1 comprises viewing area 10 and non-display area 11, is provided with earth connection 12 at described non-display area 11, and described earth connection 12 is connected with drive circuit 13.Wherein, in the described earth connection " " be considered to usually logically, described earth connection 12 is often by being connected with fixed potential, thus conduction static, and then reach the effect of eliminating the static that gathers in a certain zone.At this, described earth connection 12 is connected by being connected to reach with fixed potential with drive circuit 13.
Above-mentioned tft array substrate 1 can suppress static to a certain extent, reduces static to the damage of device, still, when electrostatic energy is very big, the static discharge phenomenon will take place, and after static discharge takes place, this earth connection 12 also will lose the protective action of its static discharge.Simultaneously, earth connection 12 also is provided with a lot of drive circuits around the set zones usually, when inevitable generation static discharge, with the damage that very easily causes drive circuit.Therefore, how further to improve the difficult problem that the performance of earth connection and the position that control static discharge phenomenon produces (even static discharge namely takes place, also make and the zone of static discharge takes place away from the zone at drive circuit place) have become this area to need to be resolved hurrily.
Summary of the invention
The object of the present invention is to provide a kind of tft array substrate and manufacture method thereof, will lose efficacy and produce the unmanageable problem in position of static discharge phenomenon with earth connection after the generation static discharge phenomenon in the solution prior art.
For solving the problems of the technologies described above, the invention provides a kind of tft array substrate, comprising: be arranged at non-display area and part around the earth connection of described non-display area, described earth connection comprises a plurality of ground connection line segments.
Alternatively, adjacent two ground connection line segments are connected with same resistance respectively.
Alternatively, the quantity of described ground connection line segment is 2, and the quantity of described resistance is 1.
Alternatively, the resistance value of described resistance is between 5～40 kilo-ohms.
Alternatively, described earth connection is formed by the first metal layer that forms grid and gate line.
Alternatively, described earth connection is formed by second metal level that forms source/drain electrode and data wire
Alternatively, described resistance is formed by polysilicon layer.
Alternatively, described resistance is formed by transparency conducting layer.
Alternatively, also comprise drive circuit, the zone of described drive circuit between viewing area and ground connection line segment.
Alternatively, described drive circuit comprises the gate driver circuit that is integrated on the described tft array substrate.
Alternatively, before described tft array substrate did not cut, a plurality of tft array substrates linked together, and the ground connection line segment that is positioned at the tft array substrate of same row also links together.
In tft array substrate provided by the invention, by earth connection being arranged to a plurality of ground connection line segments, thus, when one of them ground connection line segment generation static wounds, cause circuit to damage, thereby when losing the static release function, all the other ground connection line segments still can be realized the safeguard function of static discharge, thereby earth connection has improved the performance of tft array substrate with the problem that lost efficacy after having avoided the static discharge phenomenon takes place.
Further, at tft array substrate provided by the invention, adjacent two ground connection line segments are connected with same resistance respectively, at this, utilize resistance to be easy to gather the effect of electric charge, thereby when a large amount of electrostatic charge occurring, most electrostatic charges all accumulate in the position at resistance place, thus, even the electrostatic breakdown phenomenon takes place, also can control the occurrence positions of this phenomenon, namely be positioned at the resistance position, can control the static discharge phenomenon thus for the damage of other devices.
Description of drawings
Fig. 1 is the structural representation of existing tft array substrate;
Fig. 2 is the structural representation of the tft array substrate of the embodiment of the invention one;
Fig. 3 is the structural representation of the tft array substrate of the embodiment of the invention two;
Fig. 4 is the structural representation of the tft array substrate of the embodiment of the invention three.
Embodiment
Below in conjunction with the drawings and specific embodiments tft array substrate and the manufacture method thereof that the present invention proposes is described in further detail.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the purpose of the aid illustration embodiment of the invention lucidly.
[embodiment one]
Please refer to Fig. 2, it is the structural representation of the tft array substrate of the embodiment of the invention one.As shown in Figure 2, described tft array substrate 2 comprises: viewing area 20 and non-display area 21, and described non-display area 21 is provided with earth connection 22, and described earth connection 22 is looped around non-regional 21 edge, and described earth connection 22 comprises a plurality of ground connection line segments.At this, described earth connection 22 comprises two ground connection line segments, is respectively the first ground connection line segment 220 and the second ground connection line segment 221.
Present embodiment one described tft array substrate is the low temperature polycrystalline silicon tft array substrate, the semiconductor layer that is tft array substrate is low temperature polycrystalline silicon, low temperature polycrystalline silicon can be so that the device architecture of tft array substrate be littler, integrated level is higher because of higher electron mobility, can directly be integrated in the part drive circuit on the tft array substrate, in the present embodiment gate driver circuit is integrated in (not shown on the figure) on the panel, between earth connection 22 and viewing area 20; On the viewing area 20 of tft array substrate 2 and the non-display area 21 between the earth connection 22, also be provided with data wire and drive chip 23.
In the present embodiment, described earth connection 22 is looped around non-regional 21 edge, the at least part of gate driver circuit, the data wire that surround non-display area 21, be integrated on the substrate drive chip 23, can carry out electrostatic defending to the device of viewing area 20, gate driver circuit, the data wire driving chip 23 that is integrated on the substrate.And, with respect to non-display area in the prior art connecting wires that one whole piece connects together is set, in the present embodiment, earth connection 22 is not that a whole piece connects together, but being divided into separate a plurality of ground connection line segments, earth connection 22 is segmented into the first ground connection line segment 220 and the second ground connection line segment 221 in the present embodiment particularly.
In the prior art, also being provided with earth connection reduces static to the TFT substrate or comprises the electrostatic damage of the display panels of described TFT substrate, as shown in Figure 1, but the electrostatic protection effect of described earth connection 12 is unsatisfactory, the present inventor is through repeatedly experiment and discover that there is following problem in technology now:
Be that a whole piece is around tft array substrate because connect wires, when static contact earth connection 12, the influence that earth connection 12 all can be subjected to static possesses certain voltage, and then all can be subjected to the influence of static by the device that described earth connection 12 centers on, work causes certain influence to device, such as distorted signals etc.;
Moreover, if can be by earth connection 12 to the device discharge when static is big, this situation also because earth connection 12 be a whole piece around tft array substrate, be grounded line 12 around device all might be wounded by static, probability is bigger.
By experiment, the present inventor finds annular earth connection is divided into a plurality of ground connection line segments, can avoid the static conduction of far-end to come to wound corresponding drive circuit, and by shortening the conduction distance of circuit, can timely big electric current be derived the tft array substrate body.
Simultaneously; in the present embodiment; described earth connection 22 (comprising each ground connection line segment) except can by with drive circuit 23 be connected to reach with the fixed potential purpose of connecting; in order to protect drive circuit 23 better; prevent the big electric current injury drive circuit 23 from earth connection 22; described earth connection 22 can be connected and fixed current potential by other means, for example is connected with the fixed voltage that the tft array substrate current potential is provided.
It should be noted that, though on the surface, earth connection that present embodiment provides 22 and earth connection of the prior art only continuously with discontinuous branch, but, it has fundamentally broken the thinking inertia that earth connection in the prior art is set to a whole piece, can think from " quantitative change " and to have improved the quality of tft array substrate greatly to " qualitative change ".
Preferably, the material of described earth connection 22 (the first ground connection line segment 220 and the second ground connection line segment 221) is metal.
For better with existing tft array substrate manufacturing process compatibility, described earth connection 22 (the first ground connection line segment 220 and the second ground connection line segment 221) is formed by the first metal layer that forms (tft array substrate) grid and gate line; In addition, described earth connection 22 (the first ground connection line segment 220 and the second ground connection line segment 221) also can be formed by second metal level that forms (tft array substrate) source/drain electrode and data wire.Certainly, in other embodiments of the invention, can form described earth connection 22 by a special metal level (namely only in order to form earth connection 22), the application does not do restriction to this yet.
When earth connection 22 was positioned on the first metal layer, this earth connection 22 can form by following technology:
Step 10: glass substrate is provided;
Step 20: form the first metal layer on described glass substrate, the described the first metal layer of etching forms earth connection 22 (namely forming the first ground connection line segment 220 and the second ground connection line segment 221), simultaneously, also forms grid and gate line.
At this, can form by existing photoetching and etching technics, the application repeats no more this.
Certainly, in the forming process of common tft array substrate, before forming the first metal layer, to on described glass substrate, form a passivation layer earlier, this is prior art, also be not the application's emphasis, those skilled in the art can make different distortion according to prior art, and the application repeats no more this.
When earth connection 22 was positioned on second metal level, this earth connection 22 can form by following technology:
Step 10: glass substrate is provided;
Step 20: form second metal level on described glass substrate, described second metal level of etching forms earth connection 22 (namely forming the first ground connection line segment 220 and the second ground connection line segment 221), simultaneously, also forms source/drain electrode and data wire.
Same, before forming described second metal level, can form passivation layer, the first metal layer, polysilicon layer etc. on the described glass substrate, to this, the application does not do restriction.
Certainly, according to present embodiment one disclosed content, those skilled in the art also can do various deformation, and for example, described earth connection can be divided into three separate ground connection line segments etc., and to this, the application repeats no more.
[embodiment two]
Please refer to Fig. 3, it is the structural representation of the tft array substrate of the embodiment of the invention two.As shown in Figure 3, described tft array substrate 3 comprises: viewing area 30 and non-display area 31, and described non-display area 31 is provided with earth connection 32, and described earth connection 32 comprises a plurality of ground connection line segments, and adjacent two ground connection line segments are connected with same resistance respectively.At this, described earth connection 32 comprises two ground connection line segments, is respectively the first ground connection line segment 320 and the second ground connection line segment 321, and this first ground connection line segment 320 and the second ground connection line segment 321 all are connected with resistance 33.
Present embodiment two is with the difference of embodiment one, adjacent two ground connection line segments are connected with same resistance respectively, big resistance of series connection between two ground connection line segments, the resistance value of described resistance 33 is between 5～40 kilo-ohms, when the static of high pressure is directed to earth connection 32, the first ground connection line segment 320, resistance 33 and the second ground connection line segment 321 form a current path, and resistance 33 can consume partial electrostatic, reduces static to the injury of device.
In the present embodiment, the resistance of the earth connection 32 of the resistance 33 resistance value ratio unit ares of unit are is big, and therefore, preferred, the material of described earth connection 32 is metal, and the material of described resistance 33 is polysilicon or transparent conductive material.
Same, for better with existing tft array substrate manufacturing process compatibility, described earth connection 32 can be positioned on the first metal layer that forms grid and gate line, perhaps, this is positioned on second metal level of formation source/drain electrode and data wire; And described resistance 33 can be positioned on the polysilicon layer that forms the thin-film transistor functional layer, perhaps is positioned on the transparency conducting layer that forms pixel electrode.Certainly, in other embodiments of the invention, can form described earth connection 32 and resistance 33 by being different from the rete that forms device in the tft array substrate, the application does not do restriction to this yet.
When earth connection 32 is positioned on the first metal layer, when resistance 33 is positioned on the polysilicon layer, described tft array substrate 3 can form by following technology:
Step 10: glass substrate is provided;
Step 20: form the first metal layer on described glass substrate, the described the first metal layer of etching forms earth connection 32 (namely forming the first ground connection line segment 320 and the second ground connection line segment 321), simultaneously, also forms grid and gate line;
Step 30: form polysilicon layer on described the first metal layer, the described polysilicon layer of etching forms resistance 33.
Certainly, in the forming process of common tft array substrate, before forming the first metal layer, to on described glass substrate, form a passivation layer earlier, this is prior art, also be not the application's emphasis, those skilled in the art can make different distortion according to prior art, and the application repeats no more this.
When earth connection 32 is positioned on the first metal layer, when resistance 33 is positioned on the transparency conducting layer, described tft array substrate 3 can form by following technology:
Step 10: glass substrate is provided;
Step 20: form the first metal layer on described glass substrate, the described the first metal layer of etching forms earth connection 32 (namely forming the first ground connection line segment 320 and the second ground connection line segment 321), simultaneously, also forms grid and gate line;
Step 30: form insulating barrier on described the first metal layer, the described insulating barrier of etching forms contact hole, the exposed portions serve first ground connection line segment 320 and the part second ground connection line segment 321;
Step 40: form transparency conducting layer on described insulating barrier, the described transparency conducting layer of etching forms resistance 33, also forms pixel electrode simultaneously, and the described first ground connection line segment 320 and the second ground connection line segment 321 all are connected with described resistance 33 by described contact hole.
When earth connection 32 be positioned on second metal level, when resistance 33 is positioned on the polysilicon layer, described tft array substrate 3 can form by following technology:
Step 10: glass substrate is provided;
Step 20: form polysilicon layer on described glass substrate, the described polysilicon layer of etching forms resistance 33;
Step 30: form insulating barrier on described polysilicon layer, the described insulating barrier of etching forms contact hole, exposed portions serve resistance 33;
Step 40: form second metal level on described insulating barrier, described second metal level of etching forms earth connection 32 (namely forming the first ground connection line segment 320 and the second ground connection line segment 321), also forms source/drain electrode and data wire simultaneously.
When earth connection 32 be positioned on second metal level, when resistance 33 is positioned on the transparency conducting layer, described tft array substrate 3 can form by following technology:
Step 10: glass substrate is provided;
Step 20: form second metal level on described glass substrate, described second metal level of etching forms earth connection 32 (namely forming the first ground connection line segment 320 and the second ground connection line segment 321), also forms source/drain electrode and data wire simultaneously;
Step 30: form insulating barrier on described second metal level, the described insulating barrier of etching forms contact hole, the exposed portions serve first ground connection line segment 320 and the part second ground connection line segment 321;
Step 40: form transparency conducting layer on described insulating barrier, the described transparency conducting layer of etching forms resistance 33, also forms pixel electrode simultaneously.
It should be noted that in the formation method of each tft array substrate 3, all can also form multiple rete, the application does not do restriction to this.In addition, according to present embodiment two disclosed contents, those skilled in the art also can do various deformation, and to this, the application repeats no more.
[embodiment three]
Please refer to Fig. 4, it is the structural representation of the tft array substrate of the embodiment of the invention three.Present embodiment three is with the difference of embodiment one and embodiment two, described tft array substrate 4 is without cutting, thus, comprise a plurality of array base paltes (panel), in the present embodiment, the multistage ground connection line segment that described tft array substrate 4 is positioned at same row connects, and for example, the ground connection line segment 420 and the ground connection line segment 421 that are positioned at the tft array substrate of same row connect; Being positioned at the ground connection line segment 422 of same row and ground connection line segment 423 connects etc.
In the manufacture process of tft array substrate, substrate will also have very big probability and produce static through operations such as peeling off of repeatedly carrying, film forming, photoresist layer.The ground connection line segment that the present invention will be positioned at the tft array substrate of same row links together, and can better electrostatic charge be discharged, and in the manufacture process of tft array substrate, reduces the risk that device is subjected to the static injury.
Foregoing description only is the description to preferred embodiment of the present invention, is not any restriction to the scope of the invention, and any change, modification that the those of ordinary skill in field of the present invention is done according to above-mentioned disclosure all belong to the protection range of claims.
Claims (11)
1. a tft array substrate is characterized in that, comprising: be arranged at non-display area and part around the earth connection of described non-display area, described earth connection comprises a plurality of ground connection line segments.
2. tft array substrate as claimed in claim 1 is characterized in that, adjacent two ground connection line segments are connected with same resistance respectively.
3. tft array substrate as claimed in claim 2 is characterized in that, the quantity of described ground connection line segment is 2, and the quantity of described resistance is 1.
4. tft array substrate as claimed in claim 2 is characterized in that, the resistance value of described resistance is between 5～40 kilo-ohms.
5. tft array substrate as claimed in claim 1 is characterized in that, described earth connection is formed by the first metal layer that forms grid and gate line.
6. tft array substrate as claimed in claim 1 is characterized in that, described earth connection is formed by second metal level that forms source/drain electrode and data wire
7. tft array substrate as claimed in claim 2 is characterized in that, described resistance is formed by polysilicon layer.
8. tft array substrate as claimed in claim 2 is characterized in that, described resistance is formed by transparency conducting layer.
9. tft array substrate as claimed in claim 1 is characterized in that, also comprises drive circuit, the zone of described drive circuit between viewing area and ground connection line segment.
10. tft array substrate as claimed in claim 9 is characterized in that, described drive circuit comprises the gate driver circuit that is integrated on the described tft array substrate.
11. tft array substrate as claimed in claim 1 is characterized in that, before described tft array substrate did not cut, a plurality of tft array substrates linked together, and the ground connection line segment that is positioned at the tft array substrate of same row also links together.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210224180.2A CN103296021B (en) | 2012-06-29 | 2012-06-29 | TFT array substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210224180.2A CN103296021B (en) | 2012-06-29 | 2012-06-29 | TFT array substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103296021A true CN103296021A (en) | 2013-09-11 |
| CN103296021B CN103296021B (en) | 2016-12-07 |
Family
ID=49096646
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210224180.2A Active CN103296021B (en) | 2012-06-29 | 2012-06-29 | TFT array substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103296021B (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701303A (en) * | 2015-03-30 | 2015-06-10 | 京东方科技集团股份有限公司 | Display device, array substrate and manufacturing method thereof |
| CN105097847A (en) * | 2015-09-15 | 2015-11-25 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN105911787A (en) * | 2016-07-05 | 2016-08-31 | 厦门天马微电子有限公司 | Array substrate and display panel |
| CN106200180A (en) * | 2016-09-09 | 2016-12-07 | 武汉华星光电技术有限公司 | A kind of array base palte Electro-static Driven Comb preventer and method |
| CN106226964A (en) * | 2016-07-27 | 2016-12-14 | 武汉华星光电技术有限公司 | There is array base palte and the display floater thereof of antistatic protection function |
| CN108983520A (en) * | 2018-09-29 | 2018-12-11 | 武汉华星光电技术有限公司 | The display panel of anti-electrostatic discharging |
| CN109449140A (en) * | 2018-10-31 | 2019-03-08 | 昆山国显光电有限公司 | Display panel and motherboard |
| CN112991941A (en) * | 2021-02-01 | 2021-06-18 | 深圳英伦科技股份有限公司 | ePANEL array substrate with personalized size and processing method |
| CN113473826A (en) * | 2021-06-09 | 2021-10-01 | 荣耀终端有限公司 | Glass substrate, display panel, display and electronic equipment |
| WO2022011762A1 (en) * | 2020-07-13 | 2022-01-20 | Tcl华星光电技术有限公司 | Mask, and display panel and preparation method therefor |
| US11469256B2 (en) | 2019-11-15 | 2022-10-11 | Hefei Xinsheng Optoelectronics Technology Co., Ltd. | Array substrate, display panel and display device |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1638540A (en) * | 2003-12-30 | 2005-07-13 | Lg.菲利浦Lcd株式会社 | Organic electroluminescent display device |
| CN1737656A (en) * | 2004-08-19 | 2006-02-22 | 三星电子株式会社 | The flat panel display equipment that comprises conductive compressible body |
| CN101231398A (en) * | 2007-01-24 | 2008-07-30 | 胜华科技股份有限公司 | Liquid crystal panel having electrostatic braking measure |
| CN101355096A (en) * | 2007-07-23 | 2009-01-28 | 三星Sdi株式会社 | Organic light emitting display and method of manufacturing the same |
| CN101393343A (en) * | 2007-09-21 | 2009-03-25 | 群康科技(深圳)有限公司 | Liquid crystal panel |
| CN102308253A (en) * | 2009-02-16 | 2012-01-04 | 夏普株式会社 | TFT array substrate, and liquid crystal display panel |
| CN202189210U (en) * | 2011-07-13 | 2012-04-11 | 北京京东方光电科技有限公司 | Liquid crystal panel and display unit |
| CN102478728A (en) * | 2010-11-20 | 2012-05-30 | 乐金显示有限公司 | Array substrate for multi-vision and liquid crystal display device including the same |
-
2012
- 2012-06-29 CN CN201210224180.2A patent/CN103296021B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1638540A (en) * | 2003-12-30 | 2005-07-13 | Lg.菲利浦Lcd株式会社 | Organic electroluminescent display device |
| CN1737656A (en) * | 2004-08-19 | 2006-02-22 | 三星电子株式会社 | The flat panel display equipment that comprises conductive compressible body |
| CN101231398A (en) * | 2007-01-24 | 2008-07-30 | 胜华科技股份有限公司 | Liquid crystal panel having electrostatic braking measure |
| CN101355096A (en) * | 2007-07-23 | 2009-01-28 | 三星Sdi株式会社 | Organic light emitting display and method of manufacturing the same |
| CN101393343A (en) * | 2007-09-21 | 2009-03-25 | 群康科技(深圳)有限公司 | Liquid crystal panel |
| CN102308253A (en) * | 2009-02-16 | 2012-01-04 | 夏普株式会社 | TFT array substrate, and liquid crystal display panel |
| CN102478728A (en) * | 2010-11-20 | 2012-05-30 | 乐金显示有限公司 | Array substrate for multi-vision and liquid crystal display device including the same |
| CN202189210U (en) * | 2011-07-13 | 2012-04-11 | 北京京东方光电科技有限公司 | Liquid crystal panel and display unit |
Cited By (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701303B (en) * | 2015-03-30 | 2018-02-02 | 京东方科技集团股份有限公司 | A kind of display device, array base palte and preparation method thereof |
| CN104701303A (en) * | 2015-03-30 | 2015-06-10 | 京东方科技集团股份有限公司 | Display device, array substrate and manufacturing method thereof |
| US10199400B2 (en) | 2015-09-15 | 2019-02-05 | Boe Technology Group Co., Ltd. | Array substrate, display panel and display device |
| CN105097847B (en) * | 2015-09-15 | 2018-10-23 | 京东方科技集团股份有限公司 | A kind of array substrate, display panel and display device |
| CN105097847A (en) * | 2015-09-15 | 2015-11-25 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| US9690152B2 (en) | 2016-07-05 | 2017-06-27 | Xiamen Tianma Micro-Electronics Co., Ltd. | Array substrate and display panel |
| CN105911787A (en) * | 2016-07-05 | 2016-08-31 | 厦门天马微电子有限公司 | Array substrate and display panel |
| DE102016120853B4 (en) | 2016-07-05 | 2022-07-07 | Tianma Micro-Electronics Co., Ltd. | array substrate and display panel |
| CN105911787B (en) * | 2016-07-05 | 2019-06-04 | 厦门天马微电子有限公司 | A kind of array substrate and display panel |
| CN106226964A (en) * | 2016-07-27 | 2016-12-14 | 武汉华星光电技术有限公司 | There is array base palte and the display floater thereof of antistatic protection function |
| CN106200180A (en) * | 2016-09-09 | 2016-12-07 | 武汉华星光电技术有限公司 | A kind of array base palte Electro-static Driven Comb preventer and method |
| CN108983520A (en) * | 2018-09-29 | 2018-12-11 | 武汉华星光电技术有限公司 | The display panel of anti-electrostatic discharging |
| CN108983520B (en) * | 2018-09-29 | 2021-04-02 | 武汉华星光电技术有限公司 | Display panel with anti-electrostatic discharge |
| CN109449140A (en) * | 2018-10-31 | 2019-03-08 | 昆山国显光电有限公司 | Display panel and motherboard |
| US11469256B2 (en) | 2019-11-15 | 2022-10-11 | Hefei Xinsheng Optoelectronics Technology Co., Ltd. | Array substrate, display panel and display device |
| WO2022011762A1 (en) * | 2020-07-13 | 2022-01-20 | Tcl华星光电技术有限公司 | Mask, and display panel and preparation method therefor |
| US11520441B2 (en) | 2020-07-13 | 2022-12-06 | Tcl China Star Optoelectronics Technology Co., Ltd. | Mask, display panel, and method for manufacturing thereof |
| US11995274B2 (en) | 2020-07-13 | 2024-05-28 | Tcl China Star Optoelectronics Technology Co., Ltd. | Mask, display panel, and method for manufacturing thereof |
| CN112991941A (en) * | 2021-02-01 | 2021-06-18 | 深圳英伦科技股份有限公司 | ePANEL array substrate with personalized size and processing method |
| CN113473826A (en) * | 2021-06-09 | 2021-10-01 | 荣耀终端有限公司 | Glass substrate, display panel, display and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103296021B (en) | 2016-12-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103296021A (en) | TFT array substrate | |
| US20220206328A1 (en) | Backplane substrate including in-cell type touch panel, liquid crystal display device using the same, and method of manufacturing the same | |
| US9653494B2 (en) | Array substrate, display panel and display apparatus | |
| KR102113607B1 (en) | Liquid crystal display device and method of fabricating the same | |
| US9220161B2 (en) | Array substrate and panel | |
| US10204939B2 (en) | Display substrate, manufacturing method thereof and display device | |
| KR101398094B1 (en) | Liquid crystal display and array substrate | |
| US20150380349A1 (en) | Goa circuit of array substrate and display apparatus | |
| US9281323B2 (en) | Array substrate, display panel and display device | |
| CN104201152A (en) | Method for manufacturing display panel | |
| CN203616554U (en) | Array substrate, display panel and display device | |
| EP3278360B1 (en) | Array substrates, methods for fabricating the same, and display device containing the same | |
| US8728836B2 (en) | Method for preventing electrostatic breakdown, method for manufacturing array substrate and display substrate | |
| US9818772B2 (en) | Display device and method for manufacturing the same | |
| US9443884B2 (en) | Method for manufacturing ESD device, ESD device and display panel | |
| EP3281228B1 (en) | Oled array substrate, display apparatus containing the same, and method for forming the same | |
| CN102945846A (en) | Array substrate, manufacturing method thereof and display device | |
| US20090066870A1 (en) | Production method of active matrix substrate, active matrix substrate, and liquid crystal display device | |
| US8963160B2 (en) | Thin film transistor array substrate, manufacturing method thereof and display device | |
| CN103123428B (en) | Thin film transistor (TFT)-liquid crystal display (LCD) array substrate and production method thereof | |
| US20200365576A1 (en) | Tft substrate, esd protection circuit and manufacturing method of tft substrate | |
| KR102059321B1 (en) | Liquid crystal display device and method of manufacturing the same | |
| US8792063B2 (en) | Array substrate, liquid crystal display device and methods for manufacturing and repairing the array substrate | |
| US10784286B2 (en) | Low temperature polysilicon panel | |
| CN107544167A (en) | Electrostatic discharge circuit and display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |