CN103065599A - Liquid crystal display capable of eliminating shutdown ghost - Google Patents

Abstract

The invention provides a liquid crystal display capable of eliminating shutdown ghost, which comprises a power module and a control module. This power module includes: the voltage detector receives the power supply voltage, compares the power supply voltage with a threshold voltage and outputs a first control signal; the interrupt trigger receives the trigger enabling signal and outputs a corresponding second control signal; the logic operation module receives the first control signal and the second control signal and outputs a delay enabling signal according to a preset logic rule; and the level shifter receives the first grid driving signal and the delay enabling signal and outputs a delayed second grid driving signal. The control module is used for setting a delay time and outputting the delay time to the interrupt trigger. By adopting the invention, the first control signal and the second control signal are respectively output through the voltage detector and the interrupt trigger, and then the delay enabling signal is output based on the logic rule between the voltage detector and the interrupt trigger, so that the residual charge in the liquid crystal capacitor has sufficient time to discharge, and the shutdown afterimage is eliminated.

Description

A kind of liquid crystal display that can eliminate after-image after shutdown

technical field

The invention relates to a liquid crystal display, in particular to a liquid crystal display capable of eliminating afterimage after shutdown.

Background technique

Currently, flat panel displays such as Liquid Crystal Display (LCD) are widely used in Personal Digital Assistants (PDAs) due to their high image quality, small size, light weight, low driving voltage, and low power consumption. , PDA), mobile phones, notebook computers, desktop monitors, car monitors and projection TVs and other consumer communications or electronic products, and gradually replace the cathode ray tube (Cathode Ray Tube, CRT) and become the mainstream of the display.

In the general LCD structure, after the LCD monitor is turned off, afterimages are often seen on the LCD panel, and sometimes it takes a few seconds before it disappears. This phenomenon not only hinders the user's visual experience, but also Long-term replacement will reduce the display quality of the LCD panel. Taking thin film transistor (Thin Film Transistor, TFT) liquid crystal display as an example, one of the main reasons for the residual image phenomenon is that the discharge speed of the pixel electrode of the thin film transistor liquid crystal display is too slow, so that the charge cannot be released after power off. It is released quickly and remains in the liquid crystal capacitor, and it must take a while before it can be completely discharged. It is during this period of discharge that users often see afterimages after shutdown on the LCD panel.

In order to effectively improve the afterimage phenomenon after shutdown, a solution in the prior art is that, when the shutdown occurs, the voltage detection circuit detects that the received operating voltage VCC drops to a predetermined voltage level, and the output shutdown The control signal is converted from a high potential voltage to a low potential voltage, and the gate drive signal output by the gate driver is converted into a high potential voltage, so that each of the liquid crystal panels is turned on by the high potential gate drive signal A thin film transistor for a pixel. In this way, before the liquid crystal display power is turned off, the residual charge in the liquid crystal capacitor of each pixel can be quickly discharged through the on-state thin film transistor and the data line electrically connected to the thin film transistor, thereby shortening the complete discharge of the residual charge The time, to a certain extent, eliminate the phenomenon of afterimage after shutdown.

However, when the gate driving signal is used to control the thin film transistor to be turned on and off, its threshold voltages VGH and VGL are converted from the working voltage VCC. When the working voltage VCC drops, the threshold voltages VGH and VGL also drop accordingly. Even if the thin film transistor of each pixel is turned on by the gate driving signal, the internal charge of the liquid crystal capacitor is still not completely released. When the computer is turned on next time, image retention or common voltage drift will still occur.

In view of this, how to design a liquid crystal display that can eliminate after-image after shutdown to solve the above-mentioned defects or deficiencies, thereby maintaining the display quality of the liquid crystal display panel, prolonging the service life of the liquid crystal display panel, and improving the user's visual experience, is an industry challenge. A problem to be solved urgently by relevant technicians.

Contents of the invention

Aiming at the above-mentioned defects of the liquid crystal display in the prior art in solving the residual image after shutdown, the present invention provides a novel liquid crystal display capable of eliminating the residual image after shutdown.

According to one aspect of the present invention, there is provided a liquid crystal display capable of eliminating residual image after shutdown, including:

A power module, including:

A voltage detector, used to receive a power supply voltage, compare the power supply voltage with a threshold voltage, and output a first control signal according to the comparison result;

an interrupt trigger, used to receive a trigger enable signal, and output a second control signal corresponding to the trigger enable signal;

A logic operation module, used to receive the first control signal and the second control signal, and output a delay enabling signal according to a predetermined logic rule; and

A level shifter, used to receive a first gate drive signal and the delayed enable signal, and output a delayed second gate drive signal; and

A control module is electrically connected to the interrupt trigger, and the control module is used to set a delay time and output the delay time to the interrupt trigger.

Preferably, when the power supply voltage is lower than the threshold voltage and the trigger enable signal is at high level, the second control signal is at low level, and the delay enable signal is the first control signal.

Preferably, when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal, the first control signal is at low level, and the delay enable signal is the first Two control signals.

Preferably, when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a plurality of pulse signals, the priority of the second control signal is higher than that of the first control signal, so The second gate drive signal is delayed by the delay time from each falling edge of the trigger enable signal. More preferably, the time interval between two adjacent pulses in the trigger enable signal is greater than the delay time.

Preferably, the power supply voltage is 3.3V, and the threshold voltage is 2V.

Preferably, the liquid crystal display further includes a Gate driver On Array (GOA) circuit for receiving the second gate driving signal.

According to another aspect of the present invention, there is provided a liquid crystal display capable of eliminating residual image after shutdown, including:

A power module, including:

A voltage detector, used to receive a power supply voltage, compare the power supply voltage with a threshold voltage, and output a first control signal according to the comparison result;

A processing module, used to receive a trigger enable signal and the first control signal, and output a delay enable signal; and

A level shifter, used to receive a first gate drive signal and the delayed enable signal, and output a delayed second gate drive signal; and

a control module electrically connected to the processing module, the control module is used to set a delay time, and output the delay time to the processing module,

Wherein, the second gate drive signal is delayed according to the delay enable signal and the delay time.

Preferably, the above-mentioned threshold voltage is 2V, and when the power supply voltage is lower than 2V and the trigger enable signal is at a high level, the delayed second gate drive signal is output via the delay enable signal .

Preferably, when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal, the delayed second gate drive signal is output by the delay enable signal.

With the liquid crystal display capable of eliminating after-image after shutting down of the present invention, a power supply voltage is received through a voltage detector, and a first control signal is output by comparing the power supply voltage with a threshold voltage, and a trigger is received through an interrupt trigger. enable signal, and output a corresponding second control signal, and then output a delay enable signal based on the logic rules of the first control signal and the second control signal, and then delay the gate drive signal before outputting to The row driving circuit of the array substrate is used to control the thin film transistor of each pixel in the liquid crystal display panel to be turned on, so that the residual charge in the liquid crystal capacitor of the pixel can be completely released through the data line, thus effectively eliminating the afterimage after shutdown.

Description of drawings

Readers will have a clearer understanding of various aspects of the present invention after reading the detailed description of the present invention with reference to the accompanying drawings. in,

Fig. 1 shows the structural diagram of the liquid crystal display that can eliminate shutdown afterimage in the prior art;

Fig. 2 shows in the liquid crystal display of Fig. 1, is used for eliminating the schematic diagram of the wave form of the key signal of afterimage;

FIG. 3 shows a schematic structural view of a liquid crystal display capable of eliminating residual image after shutdown according to an embodiment of the present invention;

Fig. 4(a) shows a schematic diagram of the waveforms of the first embodiment of the liquid crystal display in Fig. 3 when eliminating afterimage after shutdown;

Fig. 4(b) shows a schematic diagram of the waveform of the second embodiment of the liquid crystal display in Fig. 3 when eliminating afterimage after shutdown;

FIG. 4(c) shows a schematic waveform diagram of the third embodiment of the liquid crystal display in FIG. 3 when eliminating afterimage after shutdown; and

FIG. 5 is a schematic structural diagram of a liquid crystal display capable of eliminating residual images after shutdown according to another embodiment of the present invention.

Detailed ways

In order to make the technical content disclosed in this application more detailed and complete, reference may be made to the drawings and the following various specific embodiments of the present invention, and the same symbols in the drawings represent the same or similar components. However, those skilled in the art should understand that the examples provided below are not intended to limit the scope of the present invention. In addition, the drawings are only for schematic illustration and are not drawn according to their original scale.

FIG. 1 shows a structural diagram of a liquid crystal display capable of eliminating power-off ghosting in the prior art, and FIG. 2 shows a schematic waveform diagram of a key signal used to eliminate power-off ghosting in the liquid crystal display shown in FIG. 1 .

Referring to FIG. 1 , it includes a power supply module 10 for image sticking when the liquid crystal display is turned off. The power module 10 has a voltage detector 101 and a level shifter 103 . Wherein, the voltage detector 101 receives a power supply voltage Vin, compares the power supply voltage Vin with a threshold voltage, and outputs a control signal Xon_Enable according to the comparison result. The level shifter 103 is electrically connected to the voltage detector 101 , receives a gate driving signal CKx and a control signal from the voltage detector 101 , and outputs a delayed gate driving signal CKX.

Specifically, a voltage comparator (not shown) is provided inside the voltage detector 101 , and the voltage comparator compares the power supply voltage Vin with a threshold voltage. For example, the power supply voltage in a normal working state is 3.3V, and the lower limit threshold voltage is 2V. When the voltage detector 101 detects that the received actual voltage Vin drops below the threshold voltage 2V or below 2V, it is triggered by the control signal Xon_Enable The delay mechanism in the level shifter 103 releases the internal charge of the liquid crystal capacitor in each pixel to a certain extent. However, when the gate drive signal CKX is used to control the thin film transistors corresponding to the liquid crystal capacitors to be turned on and off, the threshold voltages VGH and VGL are also converted from the power supply voltage Vin. When the power supply voltage Vin drops, the threshold voltages VGH and VGL will also drop accordingly (as shown in Figure 2). Even if the gate drive signal is used to turn on the thin film transistor of each pixel, due to the low gate drive voltage, The internal charge of the liquid crystal capacitor still cannot be fully released. When the computer is turned on next time, image retention or common voltage drift will still occur.

In order to solve the above-mentioned defects or deficiencies in the prior art, FIG. 3 shows a schematic structural diagram of a liquid crystal display capable of eliminating after-image after shutdown according to an embodiment of the present invention.

Referring to FIG. 3 , the liquid crystal display capable of eliminating afterimage after shutdown of the present invention includes a power supply module 20 and a control module 30 . Wherein, the control module 30 is electrically connected to the power module 20 , and the control module 30 is used to set a delay time T and output the delay time T to the power module 20 .

The power module 20 includes a voltage detector 201 , a level shifter 203 , an interrupt trigger 205 and a logic operation module 207 . Specifically, the voltage detector 201 is used to receive a power supply voltage Vin, compare the power supply voltage Vin with a threshold voltage, and output a first control signal CT1 according to the comparison result. For example, the power supply voltage Vin in a normal working state is 3.3V, and the threshold voltage is 2V. The interrupt trigger 205 is used for receiving a trigger enable signal S1 and outputting a second control signal CT2 corresponding to the trigger enable signal S1.

The logical operation module 207 includes two input terminals and one output terminal. One of the input terminals is used to receive the first control signal CT1 from the voltage detector 201 , and the other input terminal is used to receive the second control signal CT2 from the interrupt flip-flop 205 . The output terminal of the logic operation module 207 outputs a delay enable signal Xon_Enable according to a predetermined logic rule. Here, the predetermined logic rule is obtained based on the timing between the first control signal and the second control signal. The level shifter 203 is electrically connected to the output terminal of the logic operation module 207, and outputs a delayed second gate drive signal according to the received first gate drive signal CKx and the delayed enable signal Xon_Enable CKX. In addition, the control module 30 is electrically connected to the interrupt trigger 205 of the power module 20 , and outputs the preset delay time T to the interrupt trigger 205 . The specific content of the above-mentioned predetermined logic rules can refer to the embodiments shown in FIG. 4( a ) to FIG. 4( c ).

In a specific embodiment, the liquid crystal display further includes a gate driver on array (GOA) circuit, and the second gate drive signal CKX is received by the GOA circuit.

FIG. 4( a ) shows a schematic waveform diagram of the first embodiment when the liquid crystal display in FIG. 3 eliminates afterimage after shutdown.

Referring to FIG. 4( a ), RST represents the reset signal, CKX represents the second gate driving signal output by the level shifter 203 , and CKx represents the first gate driving signal received by the level shifter 203 . For example, when the liquid crystal display is working normally to display images or pictures, the power supply voltage Vin is 3.3V, the reset signal RST is high level, the trigger enable signal S1 is high level, and the delay enable signal Xon_Enable is disabled. In the Disable state, there is no delay time between the first gate driving signal CKx input by the level shifter and the second gate driving signal CKX output.

In this embodiment, when the power supply voltage Vin is lower than the threshold voltage (such as 2V) and the trigger enable signal S1 is still at a high level, as shown by the dotted line in Fig. 4(a), since the trigger enable signal S1 is not formed The falling edge signal of the pulse, so the second control signal CT2 output by the interrupt flip-flop 205 is at low level. In this way, the delay enable signal Xon_Enable corresponds to the first control signal CT1, that is, when the power supply voltage Vin is lower than the threshold voltage, the second gate drive signal CKX starts to be delayed for a predetermined delay time (the dotted line in the figure shown on the right), the delay time is set or changed by the control module 30.

FIG. 4( b ) shows a schematic waveform diagram of the second embodiment of the liquid crystal display in FIG. 3 when eliminating afterimage after shutdown.

Referring to Fig. 4(b), in this embodiment, when the power supply voltage Vin is higher than the threshold voltage and the trigger enable signal S1 has a falling edge signal, since the power supply voltage Vin has not dropped to the threshold voltage, the voltage detector 201 outputs The first control signal CT1 is low level. In this way, the delay enable signal Xon_Enable corresponds to the second control signal CT2, that is, when the trigger enable signal S1 has a falling edge signal, the second gate drive signal CKX starts to be delayed for a predetermined delay time (in the figure shown in the vertical line box), the delay time is also set or changed by the control module 30.

FIG. 4( c ) shows a schematic waveform diagram of the third embodiment when the liquid crystal display in FIG. 3 eliminates afterimage after shutdown.

Referring to FIG. 4( c ), in this embodiment, the trigger enable signal S1 is a plurality of pulse signals, including a gap delay between adjacent pulses. When the power supply voltage Vin is higher than the threshold voltage and the trigger enable signal S1 is a plurality of pulse signals, the priority of the second control signal CT2 is higher than that of the first control signal CT1, and the second gate drive signal CKX self-trigger enables Each falling edge of the enable signal S1 is delayed for a predetermined delay time, which is set or changed by the control module 30 . Afterwards, if the power supply voltage Vin is lower than the threshold voltage, since the falling edge of the trigger enable signal S1 has previously activated the delay enable signal Xon_Enable, there is no need to delay the second gate drive signal CKX at this time.

In a specific embodiment, the time interval between two adjacent pulses in the trigger enable signal S1 is greater than the delay time set by the control module 30 .

In the above embodiment, in order to maintain the normal operation mechanism of the original delay enable signal Xon_Enable, the priority of the second control signal CT2 is higher than the priority of the first control signal CT1 in the predetermined logic rule adopted by the logic operation module 207 . That is to say, when the second control signal CT2 is triggered, the first control signal CT1 no longer triggers the original operation function. The schematic diagram of the above predetermined logic rules is shown in Table 1 below:

INPUT CT1 INPUT CT2 OUTPUT Logic CT1 0 CT1 0 CT2 CT2 CT1 CT2 CT2

Table 1

FIG. 5 is a schematic structural diagram of a liquid crystal display capable of eliminating residual images after shutdown according to another embodiment of the present invention.

The main difference between FIG. 5 and FIG. 3 is that the power supply module 20 includes a processing module 209 . The processing module 209 receives a trigger enable signal S1 and a first control signal CT1 from the voltage detector 201, and outputs a delay enable signal Xon_Enable. That is to say, the processing module 209 is compatible with the respective functions of the interrupt trigger 205 and the logical operation module 207 in FIG. 3 , and outputs the delay enable signal Xon_Enable to the level shifter 203 .

In a specific embodiment, if the threshold voltage corresponding to the power supply voltage Vin is 2V, when the power supply voltage Vin is lower than 2V and the trigger enable signal S1 is at a high level, the delay enable signal Xon_Enable is used to output the delayed first Two gate driving signals CKX.

In a specific embodiment, when the power supply voltage Vin is higher than the threshold voltage and the trigger enable signal S1 is a falling edge signal, the delayed second gate driving signal CKX is output through the delay enable signal Xon_Enable.

With the liquid crystal display capable of eliminating after-image after shutting down of the present invention, a power supply voltage is received through a voltage detector, and a first control signal is output by comparing the power supply voltage with a threshold voltage, and a trigger is received through an interrupt trigger. enable signal, and output a corresponding second control signal, and then output a delay enable signal based on the logic rules of the first control signal and the second control signal, and then delay the gate drive signal before outputting to The row driving circuit of the array substrate is used to control the thin film transistor of each pixel in the liquid crystal display panel to be turned on, so that the residual charge in the liquid crystal capacitor of the pixel can be completely released through the data line, thus effectively eliminating the afterimage after shutdown.

Hereinbefore, specific embodiments of the present invention have been described with reference to the accompanying drawings. However, those skilled in the art can understand that without departing from the spirit and scope of the present invention, various changes and substitutions can be made to the specific embodiments of the present invention. These changes and substitutions all fall within the scope defined by the claims of the present invention.

Claims (10)

1. A liquid crystal display capable of eliminating power-off afterimage, the liquid crystal display comprising:

a power module, comprising:

the voltage detector is used for receiving a power supply voltage, comparing the power supply voltage with a threshold voltage and outputting a first control signal according to a comparison result;

the interrupt trigger is used for receiving a trigger enabling signal and outputting a second control signal corresponding to the trigger enabling signal;

a logic operation module for receiving the first control signal and the second control signal and outputting a delay enable signal according to a predetermined logic rule; and

the level shifter is used for receiving a first grid driving signal and the delay enabling signal and outputting a delayed second grid driving signal; and

the control module is electrically connected with the interrupt trigger and used for setting a delay time and outputting the delay time to the interrupt trigger.

2. The liquid crystal display of claim 1, wherein when the power supply voltage is lower than the threshold voltage and the trigger enable signal is high, the second control signal is low, and the delay enable signal is the first control signal.

3. The liquid crystal display of claim 1, wherein when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal, the first control signal is low and the delay enable signal is the second control signal.

4. The liquid crystal display of claim 1, wherein when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a plurality of pulse signals, the second control signal has a higher priority than the first control signal, and the second gate driving signal is delayed by the delay time from each falling edge of the trigger enable signal.

5. The LCD of claim 4, wherein the time interval between two adjacent pulses in the trigger enable signal is greater than the delay time.

6. The liquid crystal display of claim 1, wherein the power supply voltage is 3.3V and the threshold voltage is 2V.

7. The liquid crystal display of claim 1, further comprising a Gate driver On Array (GOA) circuit for receiving the second Gate driving signal.

8. A liquid crystal display capable of eliminating power-off afterimage, the liquid crystal display comprising:

a power module, comprising:

the voltage detector is used for receiving a power supply voltage, comparing the power supply voltage with a threshold voltage and outputting a first control signal according to a comparison result;

the processing module is used for receiving a trigger enabling signal and the first control signal and outputting a delay enabling signal; and

the level shifter is used for receiving a first grid driving signal and the delay enabling signal and outputting a delayed second grid driving signal; and

a control module electrically connected to the processing module for setting a delay time and outputting the delay time to the processing module,

and the second grid driving signal carries out time delay processing according to the time delay enabling signal and the time delay time.

9. The liquid crystal display of claim 8, wherein the threshold voltage is 2V, and the delayed second gate driving signal is output by the delay enable signal when the power voltage is lower than 2V and the trigger enable signal is high level.

10. The liquid crystal display of claim 8, wherein the delayed second gate driving signal is output by the delay enable signal when the power voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal.

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