CN103065599A - Liquid crystal display capable of eliminating power off remained shadow - Google Patents
Liquid crystal display capable of eliminating power off remained shadow Download PDFInfo
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Abstract
The invention provides a liquid crystal display capable of eliminating power off remained shadow. The liquid crystal display capable of eliminating power off the remained shadow comprises a power source module set and a control module set. The power source module set comprises a voltage detector, an interrupting trigger, a logical calculus module set and an electrical level shifter. The voltage detector is used for detecting supply voltage, comparing the supply voltage with threshold voltage and outputting a first control signal. The interrupting trigger is used for receiving a trigger enable signal and outputting a corresponding second control signal. The logic calculus module set is used for receiving the first control signal and the second control signal and outputting a delaying enable signal according to a preset logic rule. The electrical level shifter is used for receiving a first gate drive signal and the delaying enable signal and outputting a delayed second gate drive signal. The control module set is used for setting delaying time and outputting the delaying time to the interrupting trigger. According to the liquid crystal display capable of eliminating power off the remained shadow, the first control signal and the second control signal are respectively output through the voltage detector and the interrupting trigger. The delaying enable signal is output based on the logic rule between the voltage detector and the interrupting trigger. Remained electric charge in a liquid crystal electric capacitance can be discharged in sufficient time so that the remained shadow in the process of powering off is eliminated.
Description
Technical Field
The present invention relates to a liquid crystal display, and more particularly, to a liquid crystal display capable of eliminating a power-off ghost.
Background
Currently, flat panel displays such as Liquid Crystal Displays (LCDs) have advantages of high image quality, small size, light weight, low driving voltage, low power consumption, and the like, and thus are widely used in consumer electronics and electronic products such as Personal Digital Assistants (PDAs), mobile phones, notebook computers, desktop monitors, car monitors, and projection televisions, and are gradually replacing Cathode Ray Tubes (CRTs) as the mainstream of the displays.
In a general lcd structure, after the lcd is turned off, the residual image is often seen on the lcd panel, and sometimes even after waiting several seconds, the residual image disappears, which not only hinders the visual experience of the user, but also degrades the display quality of the lcd panel. One of the main reasons for the phenomenon of residual image after shutdown is that the discharge speed of the pixel electrode of the TFT lcd is too slow, so that the charges cannot be quickly released and remain in the liquid crystal capacitor, and the charges must be completely discharged after a period of time. During the discharging process, the user often sees the power-off afterimage on the liquid crystal display panel.
In order to effectively improve the shutdown ghost phenomenon, a solution in the prior art is that, when shutdown is performed, a voltage detection circuit detects that a received working voltage VCC is reduced to a predetermined voltage potential, converts an output shutdown control signal from a high potential voltage to a low potential voltage, and converts a gate driving signal output by a gate driver into a high potential voltage, so as to turn on a thin film transistor of each pixel in a liquid crystal panel by the high potential gate driving signal. Therefore, before the power supply of the liquid crystal display is turned off, the residual charges in the liquid crystal capacitor of each pixel can be quickly discharged through the thin film transistor in the conducting state and the data line electrically connected with the thin film transistor, so that the time for completely discharging the residual charges is shortened, and the phenomenon of shutdown afterimage is eliminated to a certain extent.
However, when the gate driving signal is used to control the thin film transistor to turn on and off, the threshold voltages VGH and VGL are converted by the operating voltage VCC. When the operating voltage VCC decreases, the threshold voltages VGH and VGL also decrease, and even if the thin film transistor of each pixel is turned on by the gate driving signal, the internal charge of the liquid crystal capacitor is not completely discharged. Image sticking or common voltage drift may occur at the next boot.
In view of the above, a task to be solved by the related art in the industry is how to design a liquid crystal display capable of eliminating the shutdown afterimage to solve the above-mentioned defects or shortcomings, so as to maintain the display quality of the liquid crystal display panel, prolong the service life of the liquid crystal display panel, and improve the visual experience of the user.
Disclosure of Invention
Aiming at solving the defects existing in the prior art when the liquid crystal display is powered off, the invention provides a novel liquid crystal display which can eliminate the power off residual image.
According to an aspect of the present invention, there is provided a liquid crystal display capable of eliminating a power-off afterimage, comprising:
a power module, comprising:
the voltage detector is used for receiving a power supply voltage, comparing the power supply voltage with a threshold voltage and outputting a first control signal according to a comparison result;
the interrupt trigger is used for receiving a trigger enabling signal and outputting a second control signal corresponding to the trigger enabling signal;
a logic operation module for receiving the first control signal and the second control signal and outputting a delay enable signal according to a predetermined logic rule; and
the level shifter is used for receiving a first grid driving signal and the delay enabling signal and outputting a delayed second grid driving signal; and
the control module is electrically connected with the interrupt trigger and used for setting a delay time and outputting the delay time to the interrupt trigger.
Preferably, when the power supply voltage is lower than the threshold voltage and the trigger enable signal is at a high level, the second control signal is at a low level, and the delay enable signal is the first control signal.
Preferably, when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal, the first control signal is at a low level, and the delay enable signal is the second control signal.
Preferably, when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a plurality of pulse signals, the priority of the second control signal is higher than that of the first control signal, and the second gate driving signal is delayed by the delay time from each falling edge time of the trigger enable signal. More preferably, the time interval between two adjacent pulses in the trigger enable signal is greater than the delay time.
Preferably, the power supply voltage is 3.3V and the threshold voltage is 2V.
Preferably, the liquid crystal display further includes a Gate driver on Array (GOA) circuit for receiving the second Gate driving signal.
According to another aspect of the present invention, there is provided a liquid crystal display capable of eliminating power-off afterimage, comprising:
a power module, comprising:
the voltage detector is used for receiving a power supply voltage, comparing the power supply voltage with a threshold voltage and outputting a first control signal according to a comparison result;
the processing module is used for receiving a trigger enabling signal and the first control signal and outputting a delay enabling signal; and
the level shifter is used for receiving a first grid driving signal and the delay enabling signal and outputting a delayed second grid driving signal; and
a control module electrically connected to the processing module for setting a delay time and outputting the delay time to the processing module,
and the second grid driving signal carries out time delay processing according to the time delay enabling signal and the time delay time.
Preferably, the threshold voltage is 2V, and when the power voltage is lower than 2V and the trigger enable signal is at a high level, the delayed second gate driving signal is output by the delay enable signal.
Preferably, when the power voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal, the delayed second gate driving signal is output by the delay enable signal.
The liquid crystal display capable of eliminating shutdown afterimages receives a power supply voltage through the voltage detector, compares the power supply voltage with a threshold voltage to output a first control signal, receives a trigger enabling signal through the interrupt trigger, outputs a corresponding second control signal, outputs a delay enabling signal based on the logic rules of the first control signal and the second control signal, delays a grid driving signal and outputs the delayed grid driving signal to the array substrate row driving circuit to control the opening of a thin film transistor of each pixel in the liquid crystal display panel, so that residual charges in a liquid crystal capacitor of the pixel are completely released through a data line, and the shutdown afterimages can be effectively eliminated.
Drawings
The various aspects of the present invention will become more apparent to the reader after reading the detailed description of the invention with reference to the attached drawings. Wherein,
FIG. 1 is a block diagram of a prior art LCD capable of eliminating the afterimage after shutdown;
FIG. 2 is a waveform diagram of a key signal for eliminating the power-off image retention in the LCD of FIG. 1;
FIG. 3 is a schematic diagram of an LCD capable of eliminating power-off image retention according to an embodiment of the present invention;
FIG. 4(a) is a waveform diagram illustrating the LCD in FIG. 3 when eliminating the power-off afterimage according to the first embodiment;
FIG. 4(b) is a waveform diagram of the LCD in FIG. 3 for eliminating the afterimage after shutdown;
FIG. 4(c) is a waveform diagram of the LCD in FIG. 3 for eliminating the afterimage after shutdown; and
FIG. 5 is a schematic diagram of a liquid crystal display capable of eliminating power-off image retention according to another embodiment of the present invention.
Detailed Description
In order to make the present disclosure more complete and complete, reference is made to the accompanying drawings, in which like references indicate similar or analogous elements, and to the various embodiments of the invention described below. However, it will be understood by those of ordinary skill in the art that the examples provided below are not intended to limit the scope of the present invention. In addition, the drawings are only for illustrative purposes and are not drawn to scale.
Fig. 1 is a block diagram of a prior art lcd capable of removing power-off image retention, and fig. 2 is a waveform diagram of a key signal for removing power-off image retention in the lcd of fig. 1.
Referring to fig. 1, the lcd apparatus includes a power module 10 for power-off image sticking. The power module 10 has a voltage detector 101 and a level shifter 103. The voltage detector 101 receives a power voltage Vin, compares the power voltage Vin with a threshold voltage, and outputs a control signal Xon _ Enable according to the comparison result. The level shifter 103 is electrically connected to the voltage detector 101, receives a gate driving signal CKx and a control signal from the voltage detector 101, and outputs a delayed gate driving signal CKx.
Specifically, the voltage detector 101 is internally provided with a voltage comparator (not shown) that compares the power supply voltage Vin with a threshold voltage. For example, the power voltage under normal operation is 3.3V, the lower threshold voltage is 2V, and when the voltage detector 101 detects that the received actual voltage Vin is reduced to the threshold voltage 2V or below 2V, the control signal Xon _ Enable is used to trigger the delay mechanism in the level shifter 103, so as to release the internal charge of the liquid crystal capacitor in each pixel to a certain extent. However, when the gate driving signal CKX is used to control the thin film transistor corresponding to the liquid crystal capacitor to turn on and off, the threshold voltages VGH and VGL are also obtained by converting the power voltage Vin. When the power voltage Vin is decreased, the threshold voltages VGH and VGL are also decreased (as shown in fig. 2), and even if the thin film transistor of each pixel is turned on by the gate driving signal, the internal charge of the liquid crystal capacitor is still not fully discharged due to the low gate driving voltage. Image sticking or common voltage drift may occur at the next boot.
To overcome the above-mentioned defects or shortcomings in the prior art, fig. 3 is a schematic structural diagram of a liquid crystal display capable of eliminating power-off afterimage according to an embodiment of the invention.
Referring to fig. 3, the lcd device capable of eliminating the afterimage during shutdown of the present invention includes a power module 20 and a control module 30. The control module 30 is electrically connected to the power module 20, and the control module 30 is used for setting a delay time T and outputting the delay time T to the power module 20.
The power module 20 includes a voltage detector 201, a level shifter 203, an interrupt trigger 205 and a logic operation module 207. Specifically, the voltage detector 201 is configured to receive a power voltage Vin, compare the power voltage Vin with a threshold voltage, and output a first control signal CT1 according to the comparison result. For example, the power supply voltage Vin in the normal operating state is 3.3V, and the threshold voltage is 2V. The interrupt flip-flop 205 receives a trigger enable signal S1 and outputs a second control signal CT2 corresponding to the trigger enable signal S1.
The logic operation module 207 includes two input terminals and an output terminal. One input terminal of the first and second input terminals is used for receiving the first control signal CT1 from the voltage detector 201 and the other input terminal is used for receiving the second control signal CT2 from the interrupt trigger 205. The output terminal of the logic operation module 207 outputs a delay Enable signal Xon _ Enable according to a predetermined logic rule. Here, the predetermined logic rule is derived based on the timing between the first control signal and the second control signal. The level shifter 203 is electrically connected to the output terminal of the logic operation module 207, and outputs a delayed second gate driving signal CKx according to the received first gate driving signal CKx and the delay Enable signal Xon _ Enable. In addition, the control module 30 is electrically connected to the interrupt trigger 205 of the power module 20, and outputs the set delay time T to the interrupt trigger 205. The specific content of the predetermined logic rule can refer to the embodiments of fig. 4(a) to 4 (c).
In one embodiment, the liquid crystal display further includes a Gate driver On Array (GOA) circuit, and the second Gate driving signal CKX is received by the GOA circuit.
Fig. 4(a) shows a waveform diagram of the liquid crystal display in fig. 3 when the shutdown afterimage is eliminated.
Referring to fig. 4(a), RST represents a reset signal, CKX represents a second gate driving signal output by the level shifter 203, and CKX represents a first gate driving signal received by the level shifter 203. For example, when the lcd normally operates to display images or pictures, the power voltage Vin is 3.3V, the reset signal RST is high, the trigger Enable signal S1 is high, the delay Enable signal Xon _ Enable is disabled (Disable), and there is no delay time between the first gate driving signal CKx input by the level shifter and the second gate driving signal CKx output by the level shifter.
In this embodiment, when the power supply voltage Vin is lower than the threshold voltage (such as 2V) and the trigger enable signal S1 is still high, as shown by the dotted line in fig. 4(a), the second control signal CT2 output by the interrupt flip-flop 205 is low because the trigger enable signal S1 does not form a pulse falling edge signal. As such, the delay Enable signal Xon _ Enable corresponds to the first control signal CT1, that is, when the power voltage Vin is lower than the threshold voltage, the second gate driving signal CKX starts to be delayed by a predetermined delay time (shown on the right side of the dotted line in the figure), which is set or changed by the control module 30.
Fig. 4(b) shows a waveform diagram of the liquid crystal display in fig. 3 when the shutdown afterimage is eliminated.
Referring to fig. 4(b), in this embodiment, when the power voltage Vin is higher than the threshold voltage and the trigger enable signal S1 has a falling edge signal, the power voltage Vin does not fall to the threshold voltage, so the first control signal CT1 output by the voltage detector 201 is at a low level. As such, the delay Enable signal Xon _ Enable corresponds to the second control signal CT2, i.e., when the trigger Enable signal S1 has a falling edge signal, the second gate driving signal CKX starts to be delayed by a predetermined delay time (shown by a vertical line box in the figure), which is also set or changed by the control module 30.
Fig. 4(c) is a waveform diagram illustrating the lcd in fig. 3 when the power-off afterimage is eliminated.
Referring to fig. 4(c), in this embodiment, the trigger enable signal S1 is a plurality of pulse signals including a gap delay between adjacent pulses. When the power voltage Vin is higher than the threshold voltage and the trigger enable signal S1 is a plurality of pulse signals, the priority of the second control signal CT2 is higher than the priority of the first control signal CT1, and the second gate driving signal CKX is delayed by a predetermined delay time from the time of each falling edge of the trigger enable signal S1, the delay time being set or changed by the control module 30. Thereafter, if the power voltage Vin is lower than the threshold voltage, since the delay Enable signal Xon _ Enable has been previously enabled by the falling edge of the trigger Enable signal S1, it is not necessary to delay the second gate driving signal CKX any more.
In one embodiment, the time interval between two adjacent pulses in the trigger enable signal S1 is greater than the delay time set by the control module 30.
In the above embodiment, in order to maintain the normal operation mechanism of the original delay Enable signal Xon _ Enable, the priority of the second control signal CT2 is higher than the priority of the first control signal CT1 in the predetermined logic rule adopted by the logic operation module 207. That is, when the second control signal CT2 is activated, the first control signal CT1 no longer activates the original operation function. The schematic of the above predetermined logic rules is as follows in table 1:
| INPUT CT1 | INPUT CT2 | OUTPUT Logic |
| CT1 | 0 | CT1 |
| 0 | CT2 | CT2 |
| CT1 | CT2 | CT2 |
TABLE 1
FIG. 5 is a schematic diagram of a liquid crystal display capable of eliminating power-off image retention according to another embodiment of the present invention.
The main difference between fig. 5 and fig. 3 is that the power module 20 includes a processing module 209. The processing module 209 receives a trigger Enable signal S1 and the first control signal CT1 from the voltage detector 201, and outputs a delay Enable signal Xon _ Enable. That is, the processing module 209 is compatible with the functions of the interrupt trigger 205 and the logic operation module 207 in fig. 3, and outputs the delay Enable signal Xon _ Enable to the level shifter 203.
In one embodiment, if the threshold voltage corresponding to the power voltage Vin is 2V, when the power voltage Vin is lower than 2V and the trigger Enable signal S1 is at a high level, the delayed second gate driving signal CKX is output by the delay Enable signal Xon _ Enable.
In one embodiment, when the power voltage Vin is higher than the threshold voltage and the trigger Enable signal S1 is a falling edge signal, the delayed second gate driving signal CKX is outputted by the delay Enable signal Xon _ Enable.
The liquid crystal display capable of eliminating shutdown afterimages receives a power supply voltage through the voltage detector, compares the power supply voltage with a threshold voltage to output a first control signal, receives a trigger enabling signal through the interrupt trigger, outputs a corresponding second control signal, outputs a delay enabling signal based on the logic rules of the first control signal and the second control signal, delays a grid driving signal and outputs the delayed grid driving signal to the array substrate row driving circuit to control the opening of a thin film transistor of each pixel in the liquid crystal display panel, so that residual charges in a liquid crystal capacitor of the pixel are completely released through a data line, and the shutdown afterimages can be effectively eliminated.
Hereinbefore, specific embodiments of the present invention are described with reference to the drawings. However, those skilled in the art will appreciate that various modifications and substitutions can be made to the specific embodiments of the present invention without departing from the spirit and scope of the invention. Such modifications and substitutions are intended to be included within the scope of the present invention as defined by the appended claims.
Claims (10)
1. A liquid crystal display capable of eliminating power-off afterimage, the liquid crystal display comprising:
a power module, comprising:
the voltage detector is used for receiving a power supply voltage, comparing the power supply voltage with a threshold voltage and outputting a first control signal according to a comparison result;
the interrupt trigger is used for receiving a trigger enabling signal and outputting a second control signal corresponding to the trigger enabling signal;
a logic operation module for receiving the first control signal and the second control signal and outputting a delay enable signal according to a predetermined logic rule; and
the level shifter is used for receiving a first grid driving signal and the delay enabling signal and outputting a delayed second grid driving signal; and
the control module is electrically connected with the interrupt trigger and used for setting a delay time and outputting the delay time to the interrupt trigger.
2. The liquid crystal display of claim 1, wherein when the power supply voltage is lower than the threshold voltage and the trigger enable signal is high, the second control signal is low, and the delay enable signal is the first control signal.
3. The liquid crystal display of claim 1, wherein when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal, the first control signal is low and the delay enable signal is the second control signal.
4. The liquid crystal display of claim 1, wherein when the power supply voltage is higher than the threshold voltage and the trigger enable signal is a plurality of pulse signals, the second control signal has a higher priority than the first control signal, and the second gate driving signal is delayed by the delay time from each falling edge of the trigger enable signal.
5. The LCD of claim 4, wherein the time interval between two adjacent pulses in the trigger enable signal is greater than the delay time.
6. The liquid crystal display of claim 1, wherein the power supply voltage is 3.3V and the threshold voltage is 2V.
7. The liquid crystal display of claim 1, further comprising a Gate driver On Array (GOA) circuit for receiving the second Gate driving signal.
8. A liquid crystal display capable of eliminating power-off afterimage, the liquid crystal display comprising:
a power module, comprising:
the voltage detector is used for receiving a power supply voltage, comparing the power supply voltage with a threshold voltage and outputting a first control signal according to a comparison result;
the processing module is used for receiving a trigger enabling signal and the first control signal and outputting a delay enabling signal; and
the level shifter is used for receiving a first grid driving signal and the delay enabling signal and outputting a delayed second grid driving signal; and
a control module electrically connected to the processing module for setting a delay time and outputting the delay time to the processing module,
and the second grid driving signal carries out time delay processing according to the time delay enabling signal and the time delay time.
9. The liquid crystal display of claim 8, wherein the threshold voltage is 2V, and the delayed second gate driving signal is output by the delay enable signal when the power voltage is lower than 2V and the trigger enable signal is high level.
10. The liquid crystal display of claim 8, wherein the delayed second gate driving signal is output by the delay enable signal when the power voltage is higher than the threshold voltage and the trigger enable signal is a falling edge signal.
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| CN 201310002711 CN103065599A (en) | 2013-01-06 | 2013-01-06 | Liquid crystal display capable of eliminating power off remained shadow |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103218967A (en) * | 2013-04-25 | 2013-07-24 | 京东方科技集团股份有限公司 | Ghosting image eliminating circuit and display device |
| CN104795040A (en) * | 2015-04-30 | 2015-07-22 | 京东方科技集团股份有限公司 | Array substrate, display device and shutdown ghost improving circuit for display device |
| CN105161065A (en) * | 2015-09-30 | 2015-12-16 | 深圳市华星光电技术有限公司 | LCD signal control circuit, display panel and display device |
| WO2016138686A1 (en) * | 2015-03-03 | 2016-09-09 | 深圳市华星光电技术有限公司 | Level shift circuit of goa framework liquid crystal panel and level shift method |
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| US9483994B2 (en) | 2014-05-14 | 2016-11-01 | Au Optronics Corp. | Liquid crystal display and gate discharge control circuit thereof |
| US9767758B2 (en) | 2014-12-02 | 2017-09-19 | Boe Technology Group Co., Ltd. | Driving apparatus of display panel and driving method thereof, display device |
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| CN104795040A (en) * | 2015-04-30 | 2015-07-22 | 京东方科技集团股份有限公司 | Array substrate, display device and shutdown ghost improving circuit for display device |
| CN104795040B (en) * | 2015-04-30 | 2017-05-10 | 京东方科技集团股份有限公司 | Array substrate, display device and shutdown ghost improving circuit for display device |
| CN105161065A (en) * | 2015-09-30 | 2015-12-16 | 深圳市华星光电技术有限公司 | LCD signal control circuit, display panel and display device |
| CN106169289B (en) * | 2016-09-27 | 2019-01-04 | 深圳市华星光电技术有限公司 | A kind of array substrate horizontal drive circuit and its over-current protection method, liquid crystal display |
| CN106169289A (en) * | 2016-09-27 | 2016-11-30 | 深圳市华星光电技术有限公司 | A kind of array base palte horizontal drive circuit and over-current protection method, liquid crystal display |
| CN107068036A (en) * | 2017-04-11 | 2017-08-18 | 京东方科技集团股份有限公司 | A kind of drive circuit of display panel, display device and driving method |
| CN107068036B (en) * | 2017-04-11 | 2019-08-20 | 京东方科技集团股份有限公司 | A kind of driving circuit of display panel, display device and driving method |
| CN108305592A (en) * | 2018-02-14 | 2018-07-20 | 京东方科技集团股份有限公司 | Driving unit, display panel and the display device of synchronism output |
| CN110570823A (en) * | 2019-02-22 | 2019-12-13 | 友达光电股份有限公司 | Time schedule controller, display device and picture display method |
| CN114038365A (en) * | 2021-11-29 | 2022-02-11 | 京东方科技集团股份有限公司 | Display panel detection method, device, equipment and storage medium |
| CN114038365B (en) * | 2021-11-29 | 2023-12-26 | 京东方科技集团股份有限公司 | Display panel detection method, device, equipment and storage medium |
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Application publication date: 20130424 |