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CN103035748B - 锗硅BiCMOS工艺中的齐纳二极管及制造方法 - Google Patents

锗硅BiCMOS工艺中的齐纳二极管及制造方法 Download PDF

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CN103035748B
CN103035748B CN201210004113.XA CN201210004113A CN103035748B CN 103035748 B CN103035748 B CN 103035748B CN 201210004113 A CN201210004113 A CN 201210004113A CN 103035748 B CN103035748 B CN 103035748B
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刘冬华
胡君
段文婷
钱文生
石晶
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

本发明公开了一种锗硅BiCMOS工艺中的齐纳二极管，N区由形成于有源区中并被N型深阱包覆；在有源区两侧的浅槽场氧底部形成有赝埋层，N区通过N型深阱和赝埋层相连接。N区的电极通过形成于赝埋层顶部的浅槽场氧中的深孔接触引出。P区由形成于有源区中的一P型离子注入区组成，P区位于N区的顶部并和N区相接触且P区的掺杂浓度大于所述N区的掺杂浓度；P区的电极通过形成于有源区顶部的金属接触引出。本发明还公开了一种锗硅BiCMOS工艺中的齐纳二极管的制造方法。本发明能与锗硅BiCMOS工艺完全集成，能为锗硅BiCMOS的电路设计提供一种稳压器件。

Description

锗硅BiCMOS工艺中的齐纳二极管及制造方法
技术领域
本发明涉及半导体集成电路制造领域，特别是涉及一种锗硅BiCMOS(Bipolar CMOS)工艺中的齐纳二极管，本发明还涉及一种锗硅BiCMOS工艺中的齐纳二极管的制造方法。
背景技术
由于现代通信对高频带下高性能、低噪声和低成本的RF组件的需求，传统的硅(Si)材料器件无法满足性能规格、输出功率和线性度新的要求，功率锗硅(SiGe)异质结双极型晶体管(HBT)则在更高、更宽的频段的功放中发挥重要作用。与砷化镓器件相比，虽然在频率上还处劣势，但SiGe HBT凭着更好的热导率和良好的衬底机械性能，较好地解决了功放的散热问题，SiGe HBT还具有更好的线性度、更高集成度；SiGe HBT仍然属于硅基技术，和CMOS工艺有良好的兼容性，SiGe BiCMOS工艺为功放与逻辑控制电路的集成提供极大的便利，也降低了工艺成本。
稳压管也是一种晶体二极管，它是利用PN结的击穿区具有稳定电压的特性来工作的。稳压管在稳压设备和一些电子电路中获得广泛的应用。把这种类型的二极管称为稳压管，以区别用在整流、检波和其他单向导电场合的二极管。稳压二极管的特点就是击穿后，其两端的电压基本保持不变。这样，当把稳压管接入电路以后，若由于电源电压发生波动，或其它原因造成电路中各点电压变动时，负载两端的电压将基本保持不变。稳压管反向击穿后，电流虽然在很大范围内变化，但稳压管两端的电压变化很小。利用这一特性，稳压管在电路中能起稳压作用。因为这种特性，稳压管主要被作为稳压器或电压基准元件使用。其伏安特性见稳压二极管可以串联起来以便在较高的电压上使用，通过串联就可获得更多的稳定电压。
发明内容
本发明所要解决的技术问题是提供一种锗硅BiCMOS工艺中的齐纳二极管，能与锗硅BiCMOS工艺完全集成，能为锗硅BiCMOS的电路设计提供一种稳压器件。本发明还提供了一种锗硅BiCMOS工艺中的齐纳二极管的制造方法。
为解决上述技术问题，本发明提供的锗硅BiCMOS工艺中的齐纳二极管，形成于硅衬底上，有源区由浅槽场氧隔离，齐纳二极管包括：
一N型深阱，形成于所述有源区中，所述N型深阱的深度大于所述浅槽场氧底部的深度、且所述N型深阱横向延伸进入所述有源区两侧的浅槽场氧底部。
N区，由形成于所述有源区中的一N型离子注入区组成，所述N区的横向尺寸小于等于所述有源区的横向尺寸、且所述N区被所述N型深阱包覆。
赝埋层，由形成于所述有源区两侧的浅槽场氧底部的N型离子注入区组成，所述赝埋层和所述N型深阱在所述浅槽场氧底部相接触，所述N区通过所述N型深阱和所述赝埋层相连接，在所述赝埋层顶部的所述浅槽场氧中形成有深孔接触，该深孔接触引出所述N区的电极。
P区，由形成于所述有源区中的一P型离子注入区组成，所述P区位于所述N区的顶部并和所述N区相接触，所述P区的掺杂浓度大于所述N区的掺杂浓度；在所述有源区顶部形成有金属接触，该金属接触和所述P区接触并引出所述P区的电极。
进一步的改进是，所述N区的工艺条件和锗硅HBT三极管的集电区的工艺条件相同。
进一步的改进是，所述P区的工艺条件和PMOS晶体管的源漏注入区的工艺条件相同。
为解决上述技术问题，本发明提供的锗硅BiCMOS工艺中的齐纳二极管的制造方法包括如下步骤：
步骤一、在硅衬底上形成浅沟槽和有源区。
步骤二、在所述有源区周侧的所述浅沟槽的底部的进行N型离子注入形成赝埋层。
步骤三、在所述浅沟槽中填入氧化硅形成浅槽场氧；在所述硅衬底的正面进行离子注入工艺形成N型深阱，所述N型深阱位于所述有源区中，所述N型深阱的深度大于所述浅槽场氧底部的深度、且所述N型深阱横向延伸进入所述有源区两侧的浅槽场氧底部；所述赝埋层和所述N型深阱在所述浅槽场氧底部相接触。
步骤四、在所述有源区中进行N型离子注入形成N区；所述N区的横向尺寸小于等于所述有源区的横向尺寸、且所述N区被所述N型深阱包覆，所述N区通过所述N型深阱和所述赝埋层相连接。
步骤五、在所述有源区中进行P型离子注入形成P区，所述P区位于所述N区的顶部并和所述N区相接触，所述P区的掺杂浓度大于所述N区的掺杂浓度。
步骤六、在所述赝埋层顶部的浅槽场氧中形成深孔接触引出所述N区的电极；在所述有源区顶部形成和所述P区接触的金属接触并引出所述P区的电极。
进一步的改进是，步骤二中所述赝埋层离子注入的注入剂量为1e14cm-2～1e16cm-2、注入能量为2KeV～50KeV、注入杂质为磷。
进一步的改进是，步骤四中所述N区的N型离子注入工艺采用锗硅HBT三极管的集电区的离子注入工艺，该工艺的条件为：注入杂质为磷、注入剂量为2e12cm-2～5e14cm-2、注入能量为30KeV～350KeV。
进一步的改进是，步骤五中所述P区的P型离子注入的工艺条件和PMOS晶体管的源漏注入的工艺条件相同。
进一步的改进是，步骤三中所述N型深阱的离子注入的注入剂量为2e12cm-2～1e14cm-2、注入能量为1500KeV～2000KeV、注入杂质为磷。
本发明齐纳二极管的N区能和锗硅HBT三极管的集电区的工艺条件相同、P区能和PMOS晶体管的源漏注入区的工艺条件相同，从而使本发明齐纳二极管能与锗硅BiCMOS工艺完全集成，能为锗硅BiCMOS的电路设计提供一种稳压器件。
附图说明
下面结合附图和具体实施方式对本发明作进一步详细的说明：
图1是本发明实施例锗硅BiCMOS工艺中的齐纳二极管的结构示意图；
图2A-图2F是本发明实施例锗硅BiCMOS工艺中的齐纳二极管的制造方法中各步骤的器件结构示意图。
具体实施方式
如图1所示，是本发明实施例锗硅BiCMOS工艺中的齐纳二极管的结构示意图。本发明实施例锗硅BiCMOS工艺中的齐纳二极管形成于P型硅衬底101上，有源区由浅槽场氧201隔离。齐纳二极管包括：
一N型深阱202，形成于所述有源区中，所述N型深阱202的深度大于所述浅槽场氧201底部的深度、且所述N型深阱202横向延伸进入所述有源区两侧的浅槽场氧201底部。
N区301，由形成于所述有源区中的一N型离子注入区组成。所述N区301的工艺条件和锗硅HBT三极管的集电区的工艺条件相同。所述N区301的横向尺寸小于等于所述有源区的横向尺寸、且所述N区301被所述N型深阱202包覆。
赝埋层107，由形成于所述有源区两侧的浅槽场氧201底部的N型离子注入区组成，所述赝埋层107和所述N型深阱202在所述浅槽场氧201底部相接触，所述N区301通过所述N型深阱202实现和所述赝埋层107的连接，在所述赝埋层107顶部的所述浅槽场氧201中形成有深孔接触701，该深孔接触701引出所述N区301的电极。
P区601，由形成于所述有源区中的一P型离子注入区组成。所述P区601的工艺条件和PMOS晶体管的源漏注入区的工艺条件相同。所述P区601位于所述N区301的顶部并和所述N区301相接触，所述P区601的掺杂浓度大于所述N区301的掺杂浓度；在所述有源区顶部形成有金属接触702，该金属接触702和所述P区601接触并引出所述P区601的电极。在所述器件的顶部形成有顶层金属703，该顶层金属703实现器件的互连。
如图2A至图2F所示，是本发明实施例锗硅BiCMOS工艺中的齐纳二极管的制造方法中各步骤的器件结构示意图。本发明实施例锗硅BiCMOS工艺中的齐纳二极管的制造方法包括如下步骤：
步骤一、如图2A所示，采用光刻刻蚀工艺在P型硅衬底101上形成浅沟槽和有源区。刻蚀时所述有源区上方用硬质掩模层做保护，所述硬质掩模层包括氧化层102、氮化层103和氧化层104。
如图2A所示，形成所述浅沟槽之后，淀积一层氧化物并刻蚀，在所述浅沟槽的内侧面形成氧化物侧壁105，所述浅沟槽的底部表面还保留一层氧化物106.
步骤二、如图2A所示，在所述有源区周侧的所述浅沟槽的底部的进行N型离子注入形成赝埋层107。所述赝埋层107的N型离子注入工艺条件为：注入杂质为磷，注入剂量1e14cm-2～1e16cm-2，注入能量为2KeV～50KeV。
步骤三、如图2B所示，在所述浅沟槽中填入氧化硅形成浅槽场氧201。
如图2B所示，进行N型离子注入形成N型深阱202，所述N型深阱202的离子注入的注入剂量为2e12cm-2～1e14cm-2、注入能量为1500KeV～2000KeV、注入杂质为磷。形成后，所述N型深阱202的深度大于所述浅槽场氧201底部的深度、且所述N型深阱202横向延伸进入所述有源区两侧的浅槽场氧201底部。所述赝埋层107和所述N型深阱202在所述浅槽场氧201底部相接触。
步骤四、如图2C所示，在所述有源区中进行N型离子注入形成N区301，所述N区301的横向尺寸小于等于所述有源区的横向尺寸、且所述N区301被所述N型深阱202包覆。所述N区301通过所述N型深阱202实现和所述赝埋层107的连接。所述N区301的N型离子注入工艺采用锗硅HBT三极管的集电区的离子注入工艺，该工艺的条件为：注入杂质为磷、注入剂量为2e12cm-2～5e14cm-2、注入能量为30KeV～350KeV。
本发明实施例方法能和锗硅BiCMOS工艺中锗硅HBT器件以及CMOS器件一起形成即集成在同一硅衬底101。此时在形成本发明实施例齐纳二极管的区域还包括如下步骤：
如图2D所示，在所述硅衬底101的正面淀积氧化物介质层401，该氧化物介质层401用于在锗硅HBT器件的形成区域形成基区窗口；在所述硅衬底101的正面淀积锗硅外延层402，锗硅外延层402用于在锗硅HBT器件的基区。
如图2E所示，在所述硅衬底101的正面淀积另一氧化物介质层501，该另一氧化物介质层501用于在锗硅HBT器件的形成区域形成发射区窗口；在所述硅衬底101的正面淀积发射极多晶硅层502，发射极多晶硅层502用于在锗硅HBT器件的发射区。
如图2F所示，最后将所述硅衬底101的本发明实施例齐纳二极管的区域的所述氧化物介质层401、所述锗硅外延层402、所述另一氧化物介质层501和所述发射极多晶硅层502都去除。
步骤五、如图2F所示，在所述有源区中进行P型离子注入形成P区601，所述P区601位于所述N区301的顶部并和所述N区301相接触，所述P区601的掺杂浓度大于所述N区301的掺杂浓度。所述P区601的P型离子注入的工艺条件和PMOS晶体管的源漏注入的工艺条件相同。
步骤六、如图1所示，在所述赝埋层107顶部的浅槽场氧201中形成深孔接触701引出所述N区301的电极；在所述有源区顶部形成和所述P区601接触的金属接触702并引出所述P区601的电极。最后，在所述器件的顶部形成有顶层金属703，该顶层金属703实现器件的互连。
以上通过具体实施例对本发明进行了详细的说明，但这些并非构成对本发明的限制。在不脱离本发明原理的情况下，本领域的技术人员还可做出许多变形和改进，这些也应视为本发明的保护范围。

Claims (5)

1.一种锗硅BiCMOS工艺中的齐纳二极管的制造方法，其特征在于，包括如下步骤：
步骤一、在硅衬底上形成浅沟槽和有源区；
步骤二、在所述有源区周侧的所述浅沟槽的底部的进行N型离子注入形成赝埋层；
步骤三、在所述浅沟槽中填入氧化硅形成浅槽场氧；在所述硅衬底的正面进行离子注入工艺形成N型深阱，所述N型深阱位于所述有源区中，所述N型深阱的深度大于所述浅槽场氧底部的深度、且所述N型深阱横向延伸进入所述有源区两侧的浅槽场氧底部；所述赝埋层和所述N型深阱在所述浅槽场氧底部相接触；
步骤四、在所述有源区中进行N型离子注入形成N区；所述N区的横向尺寸小于等于所述有源区的横向尺寸、且所述N区被所述N型深阱包覆，所述N区通过所述N型深阱和所述赝埋层相连接；
步骤五、在所述有源区中进行P型离子注入形成P区，所述P区位于所述N区的顶部并和所述N区相接触，所述P区的掺杂浓度大于所述N区的掺杂浓度；
步骤六、在所述赝埋层顶部的浅槽场氧中形成深孔接触引出所述N区的电极；在所述有源区顶部形成和所述P区接触的金属接触并引出所述P区的电极。
2.如权利要求1所述方法，其特征在于：步骤二中所述赝埋层离子注入的注入剂量为1e14cm-2～1e16cm-2、注入能量为2KeV～50KeV、注入杂质为磷。
3.如权利要求1所述方法，其特征在于：步骤四中所述N区的N型离子注入工艺采用锗硅HBT三极管的集电区的离子注入工艺，该工艺的条件为：注入杂质为磷、注入剂量为2e12cm-2～5e14cm-2、注入能量为30KeV～350KeV。
4.如权利要求1所述方法，其特征在于：步骤五中所述P区的P型离子注入的工艺条件和PMOS晶体管的源漏注入的工艺条件相同，所述PMOS晶体管为锗硅BiCMOS工艺中和所述齐纳二极管集成在同一硅衬底上的CMOS器件中的PMOS晶体管。
5.如权利要求1所述方法，其特征在于：步骤三中所述N型深阱的离子注入的注入剂量为2e12cm-2～1e14cm-2、注入能量为1500KeV～2000KeV、注入杂质为磷。
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