CN102832251A - Flexible semitransparent indium gallium zinc oxide (IGZO) thin film transistor - Google Patents
Flexible semitransparent indium gallium zinc oxide (IGZO) thin film transistor Download PDFInfo
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Abstract
The invention provides a flexible semitransparent indium gallium zinc oxide (IGZO) thin film transistor which comprises a buffer protective layer, gate electrodes, a gate insulating layer, a source electrode, a drain electrode, a plastic substrate, an IGZO semiconductor layer and a protecting layer, wherein the buffer protective layer covers the plastic substrate; the gate electrodes are respectively positioned at the central top area of the buffer protective layer and the top areas at the two ends of the buffer protective layer; the gate insulating layer covers the upper parts of the central areas of the gate electrodes; the two ends of the gate insulating layer are respectively covered till the buffer protective layer; the IGZO semiconductor layer is prepared at the upper part of the gate insulating layer by a magnetron sputtering method; the source electrode and the drain electrode are respectively arranged at the two sides of the top of the semiconductor layer, so that the semiconductor layer is covered by the source electrode and the drain electrode; a channel is only formed at the top of the semiconductor layer and between the source electrode and the drain electrode; and the whole channel is covered by the protecting layer. The flexible semitransparent IGZO device is successfully prepared by reducing the deposition temperature and optimizing the deposition of the protective layer and the thickness of a silicon nitride insulating layer.
Description
Technical field
The present invention relates to microelectronics technology, more specifically, relate to a kind of IGZO (In-Ga-Zn-O) thin-film transistor.
Background technology
Flexible show conventional definition be " a kind of flat panel display that constitutes by the low profile flexible substrate, its through crooked, be out of shape, be curled into the cylinder of several centimetres of diameters and do not influence and damage its display performance ".The flexible display application wide range is like mobile phone, notebook computer, e-book, automobile instrument, electronic poster, personal digital assistant, RF identification system, transducer etc.
Flexible display can be divided into four types according to degree of crook: ultra-thin flat-panel monitor (Flat Thin Display), arc display (Curved Displays), bendable display (Displays on Flexible Devices) but and rollable display (Roll Up Displays), but wherein desirable flexible display is a rollable display.
The flexible realization that shows, one of key technology prepares the glass substrate tft array that tft array substitutes conventional rigid with the flexible substrate of organic or inorganic.Obviously, seeking a kind of suitable backing material is the condition of determining of preparing high-quality TFT.The flexible substrate that shows application requirements possesses following requirement: the visible transparency that (1) is higher, the transparency in visible light 400nm-800nm scope reach 85% (being applicable to the display mode of picture LCD and OLED transmission-type); (2) flexible, can bear the bending more than 1000 times; (3) price comparison is low, and is few with the glass price difference, approximately 1-4 branch/inch; (4) chemical property is stable, not with acid-base reaction; (5) good thermal expansion is stable, and thermal coefficient of expansion is less than 20ppm/ ℃; (6) good barrier layer can effectively prevent penetrating of water and air; (7) surface smoothness preferably, surface roughness is less than 5nm.
Current, flexible substrate mainly contains three types, is respectively plastics (Plastic), thin glass (Thin Glass) and sheet metal (Metal Foil), carries out simple declaration in the face of these three kinds of materials down.
Thin glass: thickness is that the thin glass of 50-200 μ m has and performance like the glassy phase and advantage; Lower etc. like good barrier layer, good optical quality, price; Shortcoming is that substrate is highly brittle, and in the process of making, occurs the situation of breaking easily, in addition; Although thin glass has elasticity, still can not be crooked.
Sheet metal: the sheet metal of using at present mainly is a stainless steel material.Can stop penetrating of steam and gas at the bottom of the stainless steel lining, remove this, the thermal pressure that produces during the deposition inorganic layer can reduce, and owing to be sheet metal, the temperature that technology can be born can reach 900 ℃ (fusing point of sheet metal is about 1400 ℃).But; Its shortcoming is also very obvious; For example the metal surface must cover insulating barrier to prevent short circuit; Stainless steel thin slice transparent bad is that the TFT of substrate preparation only is suitable for the demonstration of reflection (like electrophoretic display) and emission type with this material, and the active matrix liquid crystal that is inappropriate for transmission-type shows and OLED is launched in traditional bottom; Sheet metal has elasticity preferably, but it is crooked with the degree of depth still can not to curl.In addition, show that the price of stainless steel thin slice is very expensive for large tracts of land.Simultaneously, the surface roughness of stainless steel thin slice is than higher, control the 5nm that realizes industrialization with interior be not that part is easy to thing.But show that for small size is flexible the stainless steel thin slice is a selection preferably.
Compare above-mentioned two kinds of materials, what more be hopeful to be applied to the industrialization field is plastic base.Plastics have rational mechanical performance, optical property and chemical characteristic; Film is soft, can realize rolling wheel formula processing (Roll to Roll), yet the stability of shape and high gas and the penetrance of steam are its two big defectives.
Dimensional stability mainly is because the glass transformation temperature (Tg) of general transparent polymer film is not high; And want anti-300 ℃-330 ℃ high temperature in the technology of TFT industrialization; The swollen number system number of plastic hot is far longer than glass, therefore greater than 50ppm/ ℃; When temperature raise, the variation meeting of size was to bringing very big difficulty such as technologies such as aiming at exposure in the later stage work.In addition, the surface of plastic film exists some stains and defective.
Fig. 1 is the bottom gate top contact type TFT structure chart that the application adopts, and oxide IGZO is as active layer, and its principle is to control the conduction situation of raceway groove through the electric field strength between change grid and source-drain electrode.Oxide TFT is the N type semiconductor material, and for the N channel TFT, (VG>=Vth) produces the electronics thin layer on the interface between semiconductor layer and the insulating barrier, conducting channel just, the corresponding TFT ON state of residing state this moment when applying certain positive gate voltage; And when grid voltage is reduced to conducting channel and disappears, be high-impedance state between source-drain electrode, the resistance between raceway groove is very big, make source-drain current less (common≤10-12A), the OFF state of corresponding TFT.This with depletion field effect transistor in the inversion layer that forms similar, so the computing formula of metal-oxide-semiconductor field effect transistor can be applied in the transistor.
Since the Hosono of Tokyo polytechnical university in 2004 reports the flexible and transparent TFT based on the IGZO preparation for the first time.IGZO-TFT has received the concern of research institution and industrial quarters, and is being shown in Application for Field, especially the new display spare technology by developing.
As stated, IGZO-TFT is applied in the flat-panel display device as novel active driving circuit, but getting into the commercialization stage still needs and solve many problems.
Up to the present, can not find a kind of backing material in the current material had not only possessed the glass transparent performance but also had possessed frivolous characteristics such as gentle.Simultaneously, in adopting the material of gate electrode in order to meet the physical property of TFT, and when adopting the Cr gate electrode, usually because Cr opaque, and the transparency that can't realize flexible IGZO thin-film transistor that makes.
Summary of the invention
For overcoming above-mentioned defective of the prior art, the present invention proposes a kind of flexible translucent IGZO thin-film transistor.
This flexible translucent IGZO thin-film transistor comprises the buffer protection layer, deletes electrode, gate insulation layer, source electrode and drain electrode, plastic, IGZO semiconductor layer and protective layer, covers the buffer protection layer on the plastic; Gate electrode is positioned at the center top area of buffer protection layer, and forms the alignment mark layer in the top area at the two ends of buffer protection layer; Top, the central area covering gate insulating barrier of gate electrode, the two ends of gate insulation layer cover respectively to the buffer protection layer; Adopt magnetically controlled sputter method to prepare the IGZO semiconductor layer on the top of gate insulation layer; Source, leakage the two poles of the earth lay respectively at the both sides at the top of semiconductor layer, thereby semiconductor layer is covered by source electrode and drain electrode, and only at the top of semiconductor layer, the middle formation passage at the two poles of the earth, protective mulch in passage are leaked in the source.
Pass through said method; Successfully produced flexible translucent IGZO-TFT device; Its output and transfer curve are as shown in Figure 2, can find out that from curve of output device exhibits is exported saturated performance preferably; And source-drain electrode and semiconductor layer can form ohmic contact preferably, do not have the current crowding phenomenon; Can find out that from transfer curve device exhibits goes out threshold performance preferably, threshold voltage is 7V, and on-off ratio is 5 * 10
7, drain-source current was 1.3 * 10 when device was 20V at gate source voltage
4A, calculating saturated mobility is 11.5cm2/Vs, sub-threshold slope is 1V/dec.
Description of drawings
Fig. 1 is bottom gate top contact type TFT structure and fundamental diagram;
Fig. 2 is output of flexible translucent IGZO-TFT device and transfer curve figure;
Fig. 3 is practical magnetic control sputtering system structural principle sketch map;
Fig. 4 is the deposition equation of PECVD depositing system operation principle sketch map and silicon nitride and silica;
Fig. 5 is a ME-3A type etching system schematic diagram;
Fig. 6 is a different materials to the requirement to water and oxygen of the absorption rate of water and oxygen and device;
Fig. 7 is flexible translucent IGZO-TFT device architecture and design parameter;
Fig. 8 is the process chart of flexible translucent IGZO-TFT device preparation;
Fig. 9 is the cleaning sketch map of plastic;
Figure 10 is the graphical Lift-off process chart that adopts of source-drain electrode.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment a kind of flexible translucent IGZO thin-film transistor provided by the invention is described in detail.
The preparation and the characteristic present thereof of flexible translucent IGZO-TFT device architecture thin layer
The application's target is to seek suitable flexible substrate; Explore TFT each layer film material and preparation technology; Through the electrical property of making and test I GZO-TFT device example, analyze and update technological parameter, realize that three primary colors drive the TFT device that the microcapsules display unit requires; Above-mentioned work relates to equipment and comprises magnetic control sputtering system, plasma enhanced chemical vapor deposition (PECVD) system and reactive ion etching (RIE) system etc., following mask body introduction.
Magnetic control sputtering system
In this work, the gate electrode of TFT, source-drain electrode and semiconductor layer all are to adopt the dc magnetron sputtering method preparation.Introduce used sputtering system and basic sputter principle in the experiment below.
Magnetron sputtering is under a metastable vacuum state, to carry out; Cathode targets is to be processed by Coating Materials; Vacuum chamber feeds the argon gas of certain flow during sputter; Under the radio-frequency voltage effect of negative direct current high voltage or 13.56MHz between negative electrode and anode, produce glow discharge, glow discharge makes interelectrode ar atmo ionization form argon ion and electronics.Argon ion quickens the bombardment target under effect of electric field, sputter a large amount of target atom, is on the substrate that neutral target atom is deposited on anode surface to form film.And, under electric field action, quicken to fly to the effect that can receive magnetic field (Lorentz force) in the process of substrate for electronics, electronics is bound in moves in a circle near the plasma zone the target material surface; Because the electronic motion path is very long, in this process, constantly collides with ar atmo; Produce electronics and argon ion; Argon ion constantly bombards target, thereby realizes the characteristics of high speed deposition, and secondary electron plays the effect of keeping glow discharge.
The magnetic control platform that the application adopts is the SP-3 type magnetic control platform of Microelectronics Center, Academia Sinica's development, and Fig. 3 is its sketch map, and it mainly comprises cavity, power-supply system, gas extraction system, aerating system, heating system.Wherein power-supply system is divided into DC power supply and radio-frequency power supply, in the experiment is to adopt DC power supply, and does not use heating system during plated film, and normal temperature is realized plated film down.The technological operation flow process is following, closes cavity after setting-out finishes, and opens mechanical pump and low valve vacuumizes, and treats that vacuum degree reaches below the 7Pa; Close low valve, open high valve, after one minute; Open cooling water, start molecular pump, rotating speed was 600rpm when molecular pump was stablized; Treat that the vacuum degree in the cavity reaches 5 * 10-3Pa, the motor of opening in the cavity makes sample produce revolution (sample itself can be realized rotation simultaneously, can further improve the uniformity of film).In vacuum chamber, feed the Ar gas of certain flow then, the power control switch at opening operation panel interface and target control switch are regulated power, carry out the preparatory sputter of 10min-15min.After treating that preparatory sputter finishes, butterfly, setting-up time parameter, beginning sputter.Sputter is closed power supply and target control switch on the panel after accomplishing, and turns off source of the gas, stops molecular pump, and Guan Shui stops mechanical pump, venting, sampling.
Magnetron sputtering is compared with other film plating process has following advantage: adhesive force is good, uniformity is accomplished the large tracts of land film forming better, easily, can prepare the high-melting point metal film easily at normal temperatures; Preparation film good reproducibility etc., but it also exists such as the target price some shortcomings such as high and utilance is low.
Plasma activated chemical vapour deposition (PECVD) system
In the TFT structure, that resilient coating and insulating barrier adopt is SiNx, and that protective layer adopts is SiO2, and these two kinds of materials all are through plasma chemical vapor deposition system preparation (Plasma EnhancedChemical Vapor Deposition is called for short PECVD).PECVD utilizes the physical action of glow discharge to come a kind of chemical vapour deposition reaction of active population, is the film deposition techniques that integrates plasma glow discharge and chemical vapour deposition (CVD).In the deposition process, glow discharge produces plasma, but plasma inside does not have unified temperature, exists electron gas temperature, ion temperature and neutral particle temperature.So it seems from macroscopic view; This plasma temperature is not high, but its inside is in the state that is stimulated, and its electron energy is enough to make molecular scission; And cause having chemically active material (anakmetomeres, atom, ion, atomic group etc.) and produce; The chemical reaction that original needs at high temperature just can be carried out in the time of in being in plasma field, just can form solid film on substrate under lower temperature even at normal temperatures.
The PECVD depositing system that adopts among the application is an Oxford Instrument Plasma 80Plus system, and Fig. 4 is its operation principle sketch map and deposition SiN
x, SiO
2Chemical equation.Mainly may further comprise the steps with this equipment deposit film: (1) vacuumizes.In native system, two pump housings of mechanical pump and lobe pump are arranged altogether, treat that vacuum degree reaches the required base vacuum degree of experiment, generally be 2mTorr, just begin to carry out subsequent operation.(2) thin film deposition.Two parts are divided in this part, preplating film and formal plated film, and this step is the most key, through suitable deposition parameter is set, prepares quality film preferably.(3) gas circuit is cleaned.In deposition process, reactor chamber and gas circuit all can receive pollution in various degree, therefore all will clean before and after the deposition, guarantee the quality of deposit film on the one hand, guarantee the useful life of equipment on the other hand.
Reactive ion etching (RIE) system
Reactive ion etching (Reaction Ionic Etch is called for short RIE) is a kind of dry etching method.In the preparation process of TFT, be mainly used in SiN
xAnd SiO
2Etching, etching gas is SF
6And O
2The reactive ion etching system that the application adopts is the ME-3A type etching platform of Microelectronics Center, Academia Sinica's development, and Fig. 5 is the reaction cavity structural representation.The operation principle of RIE: generally; Top crown ground connection is as anode (general whole vacuum wall is ground connection also); Bottom electrode connects radio-frequency power supply as negative electrode, needs the substrate base of etching to be placed on the negative electrode, reacting gas according to certain working pressure from power on the pore of the utmost point charge into reative cell.Gas in the reaction cavity is added the radio-frequency voltage greater than the breakdown critical value, form highfield, under the highfield effect; Gas forms with glow discharge and produces energetic plasma; Plasma comprises ion, free radical (atom of free state, molecule or atomic group) and the electronics that is produced by inelastic collision, and they all have very strong chemism, can with the atom generation chemical reaction of the sample surfaces that is etched; Form volatile material, reach the purpose of etching sample.Simultaneously, because near the surface of the direction of an electric field vertical cathode the negative electrode, energetic ion is vertically beaten under certain working pressure to sample surfaces, carries out physical bombardment, makes etching also have good anisotropy.
The selection of backing material
Select the plastic material of company of Du Pont (Dupont) for use, model is Kapton E, and specification is respectively 50 μ m and 25 μ m, and wherein the former is used to prepare flexible device, and the latter prepares the flexible translucent transparent devices.It has high glass transition (Tg=340 ℃); Lower thermal coefficient of expansion (when temperature in 50 ℃ of-200 ℃ of scopes, thermal coefficient of expansion is 16ppm/ ℃), better chemical stability (with preparation TFT in solution do not react); Better waterproof can be (for the thick Kapton E substrate of 50 μ m; The permeability of steam is 5mg/m2/day), in addition, also have advantages such as enough flexibilities and ability of anti-deformation.
The selection of insolated layer materials and preparation thereof
Moisture and air are thousands of times of glass substrate in the penetrance of general plastic.Moisture and airborne oxygen can produce very big influence to the performance of device.Fig. 6 is the absorption rates of various films to moisture and air.Can find out that pure plastic film is the requirement that can not satisfy the TFT device.In order to address this problem, generally be the inorganic thin film passivation layer that on plastic film, plates one deck or sandwich construction.
Because TFT is such responsive not as OLED to air and influence of moisture, silica commonly used, silicon nitride, aluminium oxide etc. are as passivation layer.In the experiment, we select the separator of silicon nitride as device for use.Separator can also be optimized substrate surface for roughness except that can effectively stoping the infiltration of moisture and air, and through its sedimentary condition of control, can the stress of device be optimized.
The selection of gate material
What gate electrode adopted is ito thin film, mainly is because the Cr film is opaque in the visible region, increases the transmitance of device with ito thin film.When magnetron sputtering prepared the gate electrode film, except plating one deck ITO gate electrode, coating Cr film used as the preparation alignment mark simultaneously.
The source-drain electrode material chosen
The same with the gate material requirement, low-resistivity also is the requirement of TFT to source-drain electrode, and in addition, it is that TFT is for important requirement of source-drain electrode material that source-drain electrode and semiconductor layer form good Ohmic contact.It can reduce the resistance between the drain-source, prevents to produce current-crowding effect.Through demonstration, Honsor research group sums up, and in the middle of existing material system, metal Ti and ITO are as IGZO-TFT source-drain electrode two kinds of materials preferably.The metal Ti material not only has the good adhesive force ability with the IGZO layer, and can reduce the contact resistance with active layer.The ITO material removes has lower resistivity, can also form ohmic contact preferably with the IGZO active layer, and have transparency preferably, and the application selects for use the ITO material as source-drain electrode.
The selection of insulating layer material
TFT has the requirement of the following aspects to gate insulation layer: good dielectric voltage withstand performance, high stability and and active layer between form good interfacial characteristics etc.In this application, select for use SiNx as insulating layer material.SiO2 compares with the customary insulation material, and SiNx is except that having suitable puncture voltage, and SiNx also has the following advantages: 1) relative dielectric constant is high, and the silicon dioxide of PECVD preparation is about 3.9, and the value of silicon nitride film is about 8; 2) silicon nitride is strong to alkali-metal blocking capability, can prevent effectively that alkali metal ion from passing through gate insulation layer and getting into raceway groove; 3) chemical stability of silicon nitride is high, and except hydrofluoric acid and hot phosphoric acid, it reacts with other soda acid hardly; 4) silicon nitride has better waterproof and gas permeation resistance, can effectively reduce the influence that gas and water vapor permeable cause device.
IGZO film preparation and sign
The film preparation of IGZO semiconductor film
The application adopts magnetically controlled DC sputtering to prepare the IGZO target, and wherein the IGZO target is provided by Jiangxi Hai Te new material Co., Ltd, the atomic ratio of target: In
2O
3-Ga
2O
3-ZnO=1: 1: 1 (mol ratio), purity: 99.99%.The IGZO film performance is prepared parameter influence, mainly comprises oxygen flow, deposition power, influences such as gas flow.In this application, mainly be the IGZO film that obtains to satisfy application requirements through the adjustment of oxygen flow.Concrete experiment condition is following: the Ar flow is 40sccm, and vacuum degree is 7 * 10
-3Pa, sputtering power are 200W, O
2Gas flow is respectively 0sccm, 5sccm, 10sccm, 15sccm, 20sccm, is substrate with glass.
The selection of passivation protection layer material and film preparation
Oxygen and steam are influential for IGZO-TFT, the main performance both ways: the one, and the oxygen room of airborne oxygen molecule filling semiconductor layer can make the resistivity of IGZO active layer increase.In IGZO-TFT, the electrical property of device is mainly by oxygen room decision, so the Performance Potential of IGZO-TFT must receive the influence of oxygen molecule in the atmosphere, and in addition, the oxygen molecule in the atmosphere can charged son, thereby also can influence the electrical property of device.The 2nd, the hydrone in the atmosphere can form the hole trap center at the IGZO interface, influence the threshold voltage of device.
In order to stop water in air and oxygen that device performance is impacted, on the IGZO active layer, plate layer protective layer.In the non-crystalline silicon tft that commercial product is used, protective layer generally is to adopt SiNx, prepares with the PECVD method.Yet, in IGZO-TFT, but can not use SiNx as protective layer, because preparation SiNx can contain a large amount of H atoms in the PECVD method, the H atom can make the electrical property of device change, even can to cause active layer be conductor from semiconductor variable.Certainly, if prepare silicon nitride, remain and to be used as protective layer through rf magnetron sputtering.
In conjunction with this laboratory condition, the application selects for use silicon dioxide as protective layer, prepares through the PECVD method; The process conditions that adopt are following: temperature: 200 ℃, and N2O:710sccm, 5%SiH4/N2:170sccm; Power: 20W, pressure: 1000mTorr, thickness: about 120nm.
Through exploration to single thin film preparation technology; Acquisition is satisfied the TFT device application and is required electrode layer; Insulating barrier and IGZO active layer thin film preparation process parameter, and realize above-mentioned each layer film, its performance is following: 1. insulating barrier: S iNx film; Disruptive field intensity is 5.8MV/cm, and dielectric constant is 6.03.2. active layer: the IGZO film, present non crystalline structure, the transmitance of visible light reaches more than 80%, In: Ga: the atomic ratio of Zn is 10: 10: 3; Within the specific limits, the resistivity of film sharply increases along with the increase of oxygen flow.Other: SiNx is a resilient coating, realizes with the PECVD method; Select silicon dioxide as protective layer,, can regulate and control the total stress that device receives through Control Parameter.
Design of IGZO-TFT device architecture and preparation
TFT structure and technological process thereof
Select bottom gate top contact type TFT structure, the Thickness Design of its each thin layer is as shown in Figure 7, in actual fabrication process, can have certain error.
This flexible translucent IGZO thin-film transistor comprises the buffer protection layer, deletes electrode, gate insulation layer, source electrode and drain electrode, plastic, IGZO semiconductor layer and protective layer, covers the buffer protection layer on the plastic; Gate electrode is positioned at the center top area of buffer protection layer, and forms the alignment mark layer in the top area at the two ends of buffer protection layer; Top, the central area covering gate insulating barrier of gate electrode, the two ends of gate insulation layer cover respectively to the buffer protection layer; Adopt magnetically controlled sputter method to prepare the IGZO semiconductor layer on the top of gate insulation layer; Source, leakage the two poles of the earth lay respectively at the both sides at the top of semiconductor layer, thereby semiconductor layer is covered by source electrode and drain electrode, and only at the top of semiconductor layer, the middle formation passage at the two poles of the earth, protective mulch in passage are leaked in the source.
Fig. 8 has provided the preparation flow figure of the flexible IGZO-TFT that sets, in the middle of whole flow process, plates 6 layer films altogether, accomplishes 4 photoetching, does detailed introduction in the face of concrete processing step and technological parameter down:
1. the cleaning of flexible substrate.Kapton E substrate is placed in the beaker cleans,, be easy to flock together because film is thinner.So let Kapton E substrate be clipped in the middle cleaning of glass, glass is placed on the glass frame.As shown in Figure 9, wash earlier the surface of Kapton E substrate with cleaning fluid, clean with flushing with clean water, then be placed in acetone, ethanol, the deionized water ultrasonic cleaning 30min respectively, this process repeats once; Then dry up substrate with nitrogen gun; Be placed on 250 ℃ the hot plate about baking 10min; Water that removal retains and organic solvent; And consider that plastic film in follow-up heat treatment process certain mechanical deformation can take place, the high annealing before using can make this phenomenon take place ahead of time, makes sample adapt to follow-up processing conditions.
2. use PECVD deposition SiNx separator.The preparation technology of SiNx separator is referring to table 1;
Table 1
The substrate that will carry out after separator is handled is fixed on the glass plate, to satisfy the needs of later stage technology.
3. the preparation of gate electrode figure.When magnetron sputtering prepared the gate electrode film, except plating one deck ITO gate electrode, coating Cr film used as the preparation alignment mark simultaneously.Adopt dc magnetron sputtering method to prepare the double-deck grid film of ITO/Cr.Through gluing, baking, photoetching are developed with the film for preparing, and etching generates gate electrode figure with the technology of removing photoresist.The etching of ITO electrode is the ammonium ceric nitrate mixed solution, and proportioning is: 9ml perchloric acid+25g ammonium ceric nitrate+100ml deionized water, etch period is approximately 25s.After electrode pattern prepares, use the acetone ultrasonic depolymerization, then with ethanol and washed with de-ionized water, every kind of solvent supersonic 6min-8min.Its deposition process parameters such as table 2.Wherein shown in gluing, baking, photoetching and the etching technics parameter list 3.
Table 2
Table 3
The technological parameter of gluing
Order | Rotating speed (rpm) | Time (s) |
1 (low speed) | 300 | 3 |
2 (at a high speed) | 3000 | 40 |
The baking process parameter
Baking temperature (℃) | The preceding baking time (s) | The back baking time (s) |
105 | 90 | 90 |
Exposure, developing process parameter
4. the preparation of gate insulation layer.Gate insulation layer adopts the SiNx material.Deposition process parameters is as shown in table 4 below.
Table 4
5.IGZO the preparation of semiconductor layer.Semiconductor layer IGZO adopts the magnetron sputtering preparation, has studied the influence to device performance of oxygen flow and power in the preparation process respectively.Deposition process parameters is as shown in table 5; The IGZO film for preparing prepares figure through gluing, photoetching, development and etching technics, and etching liquid adopts the proportioning liquid of concentrated hydrochloric acid (36.5%) and deionized water, and concrete ratio is 36.5%HCl: H
2O=1: 3 (volume ratios), etch period probably are 10s-15s.
Table 5
6. the preparation of source-drain electrode; Source-drain electrode adopts the ITO material; Prepare film through magnetron sputtering, table 6 is the deposition process parameters of ito thin film, and is different with the graphic method that other each layer film forms; Source-drain electrode is to adopt lift-off technology to prepare electrode pattern, and concrete technological process is shown in figure 10.
Table 6
7. protective layer preparation.Protective layer adopts the SiO2 film of PECVD preparation.
8. the etching of insulating barrier and protective layer.Insulating barrier and protective layer adopt the RIE dry etch process, and after etching was intact, cleaning was removed photoresist, and carries out the test of electrical property then.
What should explain at last is; Above embodiment is only in order to describe technical scheme of the present invention rather than the present technique method is limited; The present invention can extend to other modification, variation, application and embodiment on using, and therefore thinks that all such modifications, variation, application, embodiment are in spirit of the present invention and teachings.
Claims (8)
1. flexible translucent IGZO thin-film transistor comprises the buffer protection layer, deletes electrode, gate insulation layer, source electrode and drain electrode, plastic, IGZO semiconductor layer and protective layer, covers the buffer protection layer on the plastic; It is characterized in that gate electrode is positioned at the center top area of buffer protection layer, and form the alignment mark layer in the top area at the two ends of buffer protection layer; Top, the central area covering gate insulating barrier of gate electrode, the two ends of gate insulation layer cover respectively to the buffer protection layer; Adopt magnetically controlled sputter method to prepare the IGZO semiconductor layer on the top of gate insulation layer; Source, leakage the two poles of the earth lay respectively at the both sides at the top of semiconductor layer, and semiconductor layer is covered by source electrode and drain electrode, and only at the top of semiconductor layer, the middle formation passage at the two poles of the earth, protective mulch in passage are leaked in the source.
2. flexible translucent IGZO thin-film transistor as claimed in claim 1 is characterized in that, protective layer adopts SiO
2Film.
3. flexible translucent IGZO thin-film transistor as claimed in claim 1 is characterized in that, the thickness of said plastic is 25 μ m.
4. flexible translucent IGZO thin-film transistor as claimed in claim 3 is characterized in that the IGZO film presents non crystalline structure, and the transmitance of visible light reaches more than 80%, In: Ga: the atomic ratio of Zn is 10: 10: 3.
5. flexible translucent IGZO thin-film transistor as claimed in claim 1 is characterized in that, buffer protection layer and gate insulation layer adopt silicon nitride.
6. flexible translucent IGZO thin-film transistor as claimed in claim 1 is characterized in that, the ITO material is adopted in source electrode, drain electrode.
7. flexible translucent IGZO thin-film transistor as claimed in claim 1 is characterized in that, the alignment mark layer adopts the Cr material.
8. flexible translucent IGZO thin-film transistor as claimed in claim 1 is characterized in that, gate electrode adopts the ITO material.
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CN2011102672118A Pending CN102832252A (en) | 2011-06-15 | 2011-09-09 | Flexible indium gallium zinc oxide (IGZO) thin film transistor |
CN2011102671384A Pending CN102831850A (en) | 2011-06-15 | 2011-09-09 | Device for detecting IGZO (Indium Gallium Zinc Oxide)-TFT (Thin Film Transistor) drive characteristics |
CN2011102671399A Pending CN102832103A (en) | 2011-06-15 | 2011-09-09 | Manufacturing method of MIM (metal layer-insulation layer-metal layer) structure used for testing SiNx insulating layer |
CN 201120338485 Expired - Fee Related CN202307906U (en) | 2011-06-15 | 2011-09-09 | Metal-insulating layer-metal (MIM) structure device for testing SiNx insulating layer |
CN 201120338322 Expired - Fee Related CN202487581U (en) | 2011-06-15 | 2011-09-09 | Flexible IGZO thin film transistor |
CN2011102671204A Pending CN102832130A (en) | 2011-06-15 | 2011-09-09 | Method for manufacturing flexible semitransparent IGZO (In-Ga-Zn-O) thin film transistor (TFT) |
CN 201120338446 Expired - Fee Related CN202285237U (en) | 2011-06-15 | 2011-09-09 | Flexible semi-transparent indium gallium zinc oxide (IGZO) thin-film transistor |
CN2011102672067A Pending CN102832131A (en) | 2011-06-15 | 2011-09-09 | Method for manufacturing flexible IGZO (In-Ga-Zn-O) thin film transistor |
CN201110267190XA Pending CN102832251A (en) | 2011-06-15 | 2011-09-09 | Flexible semitransparent indium gallium zinc oxide (IGZO) thin film transistor |
CN2011102671435A Pending CN102832109A (en) | 2011-06-15 | 2011-09-09 | Method for strengthening thin film in flexible thin film transistor manufacturing process |
CN 201120338472 Expired - Fee Related CN202404869U (en) | 2011-06-15 | 2011-09-09 | Apparatus for detecting IGZO-TFT driving characteristic |
CN2011102671365A Pending CN102832257A (en) | 2011-06-15 | 2011-09-09 | MIM structure device used to test SiNx insulating layer |
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CN2011102671384A Pending CN102831850A (en) | 2011-06-15 | 2011-09-09 | Device for detecting IGZO (Indium Gallium Zinc Oxide)-TFT (Thin Film Transistor) drive characteristics |
CN2011102671399A Pending CN102832103A (en) | 2011-06-15 | 2011-09-09 | Manufacturing method of MIM (metal layer-insulation layer-metal layer) structure used for testing SiNx insulating layer |
CN 201120338485 Expired - Fee Related CN202307906U (en) | 2011-06-15 | 2011-09-09 | Metal-insulating layer-metal (MIM) structure device for testing SiNx insulating layer |
CN 201120338322 Expired - Fee Related CN202487581U (en) | 2011-06-15 | 2011-09-09 | Flexible IGZO thin film transistor |
CN2011102671204A Pending CN102832130A (en) | 2011-06-15 | 2011-09-09 | Method for manufacturing flexible semitransparent IGZO (In-Ga-Zn-O) thin film transistor (TFT) |
CN 201120338446 Expired - Fee Related CN202285237U (en) | 2011-06-15 | 2011-09-09 | Flexible semi-transparent indium gallium zinc oxide (IGZO) thin-film transistor |
CN2011102672067A Pending CN102832131A (en) | 2011-06-15 | 2011-09-09 | Method for manufacturing flexible IGZO (In-Ga-Zn-O) thin film transistor |
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CN 201120338472 Expired - Fee Related CN202404869U (en) | 2011-06-15 | 2011-09-09 | Apparatus for detecting IGZO-TFT driving characteristic |
CN2011102671365A Pending CN102832257A (en) | 2011-06-15 | 2011-09-09 | MIM structure device used to test SiNx insulating layer |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1527116A (en) * | 2003-03-07 | 2004-09-08 | 株式会社半导体能源研究所 | Liquid crystal display device and producing method thereof |
CN101211963A (en) * | 2006-12-29 | 2008-07-02 | 三星Sdi株式会社 | Organic light emitting display and manufacturing method thereof |
JP2009253204A (en) * | 2008-04-10 | 2009-10-29 | Idemitsu Kosan Co Ltd | Field-effect transistor using oxide semiconductor, and its manufacturing method |
CN101796644A (en) * | 2007-09-05 | 2010-08-04 | 佳能株式会社 | Field effect transistor |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030001188A1 (en) * | 2001-06-27 | 2003-01-02 | Nakagawa Osamu Samuel | High-dielectric constant metal-insulator metal capacitor in VLSI multi-level metallization systems |
CN1352462A (en) * | 2001-12-07 | 2002-06-05 | 清华大学 | Double insulation layer thin film field emitting cathode |
CN1277288C (en) * | 2003-11-07 | 2006-09-27 | 南亚科技股份有限公司 | Test mask structure |
CN100383932C (en) * | 2005-07-05 | 2008-04-23 | 华中科技大学 | A silicon wet etching process |
JP2007073705A (en) * | 2005-09-06 | 2007-03-22 | Canon Inc | Oxide semiconductor channel thin film transistor and method for manufacturing the same |
US7763923B2 (en) * | 2005-12-29 | 2010-07-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Metal-insulator-metal capacitor structure having low voltage dependence |
US8154493B2 (en) * | 2006-06-02 | 2012-04-10 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device, driving method of the same, and electronic device using the same |
CN100461433C (en) * | 2007-01-04 | 2009-02-11 | 北京京东方光电科技有限公司 | A kind of TFT array structure and its manufacturing method |
KR100987840B1 (en) * | 2007-04-25 | 2010-10-13 | 주식회사 엘지화학 | Thin film transistor and method for manufacturing same |
CN101364603A (en) * | 2007-08-10 | 2009-02-11 | 北京京东方光电科技有限公司 | A TFT array substrate structure and manufacturing method thereof |
TWI491048B (en) * | 2008-07-31 | 2015-07-01 | Semiconductor Energy Lab | Semiconductor device |
CN101661220B (en) * | 2008-08-27 | 2013-03-13 | 北京京东方光电科技有限公司 | Liquid crystal display panel and mask plate |
CN101752387B (en) * | 2008-12-16 | 2012-02-29 | 京东方科技集团股份有限公司 | E-paper, E-paper thin film transistor (TFT) baseplate and fabrication method thereof |
JP2010205798A (en) * | 2009-02-27 | 2010-09-16 | Japan Science & Technology Agency | Method of manufacturing thin-film transistor |
KR101218090B1 (en) * | 2009-05-27 | 2013-01-18 | 엘지디스플레이 주식회사 | Oxide thin film transistor and method of fabricating the same |
KR101578694B1 (en) * | 2009-06-02 | 2015-12-21 | 엘지디스플레이 주식회사 | Manufacturing method of oxide thin film transistor |
JP5499529B2 (en) * | 2009-06-25 | 2014-05-21 | 大日本印刷株式会社 | Thin film transistor mounting substrate, manufacturing method thereof, and image display device |
KR101248459B1 (en) * | 2009-11-10 | 2013-03-28 | 엘지디스플레이 주식회사 | Liquid crystal display device and method of fabricating the same |
CN101789450B (en) * | 2010-01-26 | 2012-02-01 | 友达光电股份有限公司 | Thin film transistor and method for manufacturing silicon-rich channel layer |
-
2011
- 2011-09-09 CN CN2011102672118A patent/CN102832252A/en active Pending
- 2011-09-09 CN CN2011102671384A patent/CN102831850A/en active Pending
- 2011-09-09 CN CN2011102671399A patent/CN102832103A/en active Pending
- 2011-09-09 CN CN 201120338485 patent/CN202307906U/en not_active Expired - Fee Related
- 2011-09-09 CN CN 201120338322 patent/CN202487581U/en not_active Expired - Fee Related
- 2011-09-09 CN CN2011102671204A patent/CN102832130A/en active Pending
- 2011-09-09 CN CN 201120338446 patent/CN202285237U/en not_active Expired - Fee Related
- 2011-09-09 CN CN2011102672067A patent/CN102832131A/en active Pending
- 2011-09-09 CN CN201110267190XA patent/CN102832251A/en active Pending
- 2011-09-09 CN CN2011102671435A patent/CN102832109A/en active Pending
- 2011-09-09 CN CN 201120338472 patent/CN202404869U/en not_active Expired - Fee Related
- 2011-09-09 CN CN2011102671365A patent/CN102832257A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1527116A (en) * | 2003-03-07 | 2004-09-08 | 株式会社半导体能源研究所 | Liquid crystal display device and producing method thereof |
CN101211963A (en) * | 2006-12-29 | 2008-07-02 | 三星Sdi株式会社 | Organic light emitting display and manufacturing method thereof |
CN101796644A (en) * | 2007-09-05 | 2010-08-04 | 佳能株式会社 | Field effect transistor |
JP2009253204A (en) * | 2008-04-10 | 2009-10-29 | Idemitsu Kosan Co Ltd | Field-effect transistor using oxide semiconductor, and its manufacturing method |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107170831A (en) * | 2017-06-14 | 2017-09-15 | 华南理工大学 | A kind of nanometer paper substrate film transistor and preparation method thereof |
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