CN102547529B - Pop noise suppression circuit and system - Google Patents
Pop noise suppression circuit and system Download PDFInfo
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- CN102547529B CN102547529B CN201210042910.7A CN201210042910A CN102547529B CN 102547529 B CN102547529 B CN 102547529B CN 201210042910 A CN201210042910 A CN 201210042910A CN 102547529 B CN102547529 B CN 102547529B
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Abstract
The invention provides a POP noise suppression circuit. The circuit comprises a power supply terminal, a voltage comparator, a charge-discharge signal enabling terminal, a charge-discharge control unit, a charge-discharge unit, an enabling control terminal, a common mode voltage generation unit and an earth terminal connected with the charge-discharge control unit, the voltage comparator and the charge-discharge unit, wherein the voltage comparator comprises a first current source, a first field-effect transistor (FET) connected with the first current source, a second FET, a third FET connected with the first FET, a fourth FET connected with the second FET and an offset resistor connected between the first current source and the second FET. The invention also provides a POP noise suppression system. The circuit and the system can be used for effectively suppressing POP noise.
Description
Technical field
The present invention relates to a kind of audio frequency processing circuit and system, espespecially a kind of simple in structure and can suppress POP noise suppression circuit and the system of POP noise.
Background technology
POP noise refers to the ubiquitous noise producing in start and shutdown process in audio system.
In audio system start, the input and output voltage of audio system quiescent operation need to be rushed to common-mode voltage, and need this voltage to put to 0 in shutdown, with regard to loudspeaker or the earphone easily in start and shutdown, driving stage being driven, impact and form POP noise like this, and making responsive ear very uncomfortable.Therefore, be necessary to provide a kind of simple in structure and can effectively suppress POP noise suppression circuit and the system of POP noise.
Summary of the invention
In view of above content, be necessary to provide a kind of simple in structure and can effectively suppress POP noise suppression circuit and the system of POP noise.
A POP noise suppression circuit, for an audio system, described POP noise suppression circuit comprises a power end, one voltage comparator being connected with described power end, one discharges and recharges signal Enable Pin, one with described power end, describedly discharge and recharge the control unit that discharges and recharges that signal Enable Pin and described voltage comparator be connected, one discharges and recharges with described the charge/discharge unit that control unit and described voltage comparator are connected, one be connected with described charge/discharge unit enable control end, the one common-mode voltage generation unit being connected with described charge/discharge unit and one and described in discharge and recharge control unit, described voltage comparator and the connected earth terminal of described charge/discharge unit, described voltage comparator comprises one first current source, one the first field effect transistor being connected with described the first current source, one second field effect transistor, one the 3rd field effect transistor being connected with described the first field effect transistor, one the 4th field effect transistor and being connected with described the second field effect transistor is connected in the offset resistor between described the first current source and described the second field effect transistor.
A kind of POP noise suppressing system, for an audio system, described POP noise suppressing system comprises a power end, one is connected with described power end for generation of the voltage comparator of the charging and discharging currents of needs, one for generation of one discharge and recharge control signal discharge and recharge signal Enable Pin, one with described power end, describedly discharge and recharge the control unit that discharges and recharges that signal Enable Pin and described voltage comparator be connected, one is connected for carry out the charge/discharge unit of charge and discharge to described POP noise suppression circuit with described control unit and the described voltage comparator of discharging and recharging, one is connected with described charge/discharge unit for controlling the startup of described POP noise suppression circuit and the control end that enables of closing, one be connected with described charge/discharge unit for generation of the common-mode voltage generation unit of a common-mode voltage and one and described in discharge and recharge control unit, described voltage comparator and the connected earth terminal of described charge/discharge unit.
Relative prior art, POP noise suppression circuit of the present invention and system configuration are simple, and can produce the charging/discharging voltage of slow variation, thereby can effectively suppress the POP noise that audio system forms in switching on and shutting down.
Accompanying drawing explanation
Fig. 1 is the system block diagram of POP noise suppressing system better embodiment of the present invention.
Fig. 2 is the circuit diagram of POP noise suppression circuit better embodiment of the present invention.
Embodiment
Refer to Fig. 1, POP noise suppressing system better embodiment of the present invention comprises a power end, one voltage comparator being connected with this power end, one discharges and recharges signal Enable Pin, one with this power end, this discharges and recharges the control unit that discharges and recharges that signal Enable Pin and this voltage comparator be connected, one discharges and recharges with this charge/discharge unit that control unit and this voltage comparator are connected, one be connected with this charge/discharge unit enable control end, the one common-mode voltage generation unit being connected with this charge/discharge unit and one and this discharge and recharge control unit, this voltage comparator and the connected earth terminal of this charge/discharge unit.
This power end is used to this POP noise suppressing system that the supply power voltage needing is provided; This voltage comparator is for generation of a charging and discharging currents needing; This discharges and recharges signal Enable Pin and discharges and recharges control signal for generation of one, and a charging signals or discharge signal discharge and recharge control unit to this; This discharges and recharges control unit for controlling charging process and the discharge process of this charge/discharge unit; This charge/discharge unit is for carrying out charge and discharge to this POP noise suppressing system, and the slow charging voltage changing of the S type that forms and the slow discharge voltage changing of a S type; This enables control end for controlling the startup of this POP noise suppressing system and closing; This common-mode voltage generation unit is for generation of a common-mode voltage with driving force.
Please refer to Fig. 2, Fig. 2 is the circuit diagram of POP noise suppression circuit better embodiment of the present invention.Wherein, this power end is power end VDD, this voltage comparator comprises one first current source I
, one first field effect transistor M1, one second field effect transistor M2, one the 3rd field effect transistor M3, one the 4th field effect transistor M4 and an offset resistor R0, this discharges and recharges signal Enable Pin for discharging and recharging signal Enable Pin CHAR, this charge/discharge unit comprises one the 5th field effect transistor M5, one the 6th field effect transistor M6, one the 7th field effect transistor M7, one the 8th field effect transistor M8, one the 9th field effect transistor M9, the a tenth field effect transistor M10, the a 11 field effect transistor M11, the a 12 field effect transistor M12, the a 13 field effect transistor M13, the a 14 field effect transistor M14, the a 15 field effect transistor M15, the a 16 field effect transistor M16, the a 17 field effect transistor M17, the a 18 field effect transistor M18, the a 19 field effect transistor M19, one second current source I, one first resistance R 1, one second resistance R 2, one connects capacitor C, one common-mode voltage end Vbypass and a charge and discharge capacitance C
, this discharges and recharges control unit and comprises one the 20 field effect transistor M20, one the 21 field effect transistor M21, one the 22 field effect transistor M22 and one the 23 field effect transistor M23, this common-mode voltage generation unit comprises that a common mode reference voltage produces end Vref and a buffer BUFFER, this enables control end and comprises one first control end PD and second control end contrary with this first control end PD level
, this earth terminal is earth terminal GND.
The physical circuit annexation of POP noise suppression circuit better embodiment of the present invention is as follows: the grid of this first field effect transistor M1 is connected with the 13 drain electrode of field effect transistor M13 and the drain electrode of the 14 field effect transistor M14, and the grid of this second field effect transistor M2 is connected with the 15 source class of field effect transistor M15 and the drain electrode of the 16 field effect transistor M16.The source class of this second field effect transistor M2 is connected with one end of this offset resistor R0, common and this first current source I of the source class of this first field effect transistor M1 and the other end of this offset resistor R0
one end be connected.The drain electrode of this first field effect transistor M1 and the grid of the 3rd field effect transistor M3 and drain electrode are connected, and grid, the 12 grid of field effect transistor M12 and the drain electrode of the 18 field effect transistor M18 of the drain electrode of this second field effect transistor M2 and the grid of the 4th field effect transistor M4 and drain electrode, the 5th field effect transistor M5 are connected.The drain electrode of the 5th field effect transistor M5 is connected with the source class of the 7th field effect transistor M7, the grid of the 6th field effect transistor M6 with drain electrode, the 7th grid of field effect transistor M7, the drain electrode of the 17 field effect transistor M17 is connected this second current source I jointly
one end.The drain electrode of the 7th field effect transistor M7 is connected with grid and drain electrode, the 9th grid of field effect transistor M9 and the drain electrode of the 19 field effect transistor M19 of the 8th field effect transistor M8.The drain electrode of the 9th field effect transistor M9 is connected with the source class of the tenth field effect transistor M10, one end of the tenth drain electrode of field effect transistor M10 and the drain electrode of the 11 field effect transistor M11 and this first resistance R 1 is connected, the source class of the 11 field effect transistor M11 is connected with the drain electrode of the 12 field effect transistor M12, and the other end of this first resistance R 1 is connected with one end of this second resistance R 2 is connected capacitor C jointly one end with this.The 14 source class of field effect transistor M14 is, the other end of the drain electrode of the 15 field effect transistor M15, this second resistance R 2 and this charge and discharge capacitance C
one end be connected with this common-mode voltage end Vbypass.
This discharges and recharges signal Enable Pin CHAR and is connected with the 20 grid of field effect transistor M20 and the grid of the 21 field effect transistor M21, the drain electrode of the 20 field effect transistor M20, the drain electrode of the 21 field effect transistor M21, the grid of the 22 field effect transistor M22, the grid of the grid of the 23 field effect transistor M23 and the tenth field effect transistor M10, the 11 grid of field effect transistor M11 and the grid of the 15 field effect transistor M15 are connected, the drain electrode of the 22 field effect transistor M22, the 23 drain electrode of field effect transistor M23 and the grid of the 13 field effect transistor M13, the 14 grid of field effect transistor M14 and the grid of the 16 field effect transistor M16 are connected.An input of this buffer BUFFER produces end Vref with this common mode reference voltage and is connected, the source class of another input of this buffer BUFFER and output thereof, the 8th field effect transistor M8, the source class of the 9th field effect transistor M9, the 13 source class of field effect transistor M13, the source class of the 19 field effect transistor M19 and this second current source I
the other end be jointly connected.The 20 source class of field effect transistor M20 is, the source class of the 22 field effect transistor M22 and this first current source I
the other end jointly connect this power end VDD.The other end and this charge and discharge capacitance C of the source class of the source class of the source class of the source class of the 3rd field effect transistor M3, the 4th field effect transistor M4, the 5th field effect transistor M5, the 6th field effect transistor M6, the 12 source class of field effect transistor M12, the source class of the 16 field effect transistor M16, the 21 source class of field effect transistor M21, the source class of the 23 field effect transistor M23, this connection capacitor C
the other end be connected with this earth terminal GND.
The principle Analysis of POP noise suppression circuit of the present invention and system is as follows:
When this first control end PD that enables control end is high level, the second control end
during for low level, this POP noise suppression circuit and system are in closed condition; When this first control end PD that enables control end is low level, the second control end
during for high level, this POP noise suppression circuit and system are started working; When this discharges and recharges signal Enable Pin CHAR and is high level, this POP noise suppression circuit and system start charging; When this discharges and recharges signal Enable Pin CHAR and is low level, this POP noise suppression circuit and system start electric discharge.Wherein, this first resistance R 1 is connected capacitor C and has formed the low pass filter in charging process with this, and this second resistance R 2 is connected capacitor C and has formed the low pass filter in discharge process with this.
When start, when circuit powers on, this first control end PD is low level, this second control end
for high level, this discharges and recharges signal Enable Pin CHAR is high level, and now, this charge/discharge unit is opened, and enters charging process.The tenth field effect transistor M10, the 14 field effect transistor M14 and the 16 field effect transistor M16 conducting, the 11 field effect transistor M11, the 13 field effect transistor M13 and the 15 field effect transistor M15 turn-off, the voltage of voltage end Va is followed the change in voltage of this common-mode voltage end Vbypass and changes through the 14 field effect transistor M14 of conducting, owing to just starting to charge, this charge and discharge capacitance C
the voltage of one end is zero, and now the voltage of voltage end Va is also zero; The voltage of voltage end Vb is followed the change in voltage of this earth terminal GND and changes through the 16 field effect transistor M16 of conducting, and in charging process, voltage end Vb is keeping no-voltage always.For voltage comparator, during just charging, the voltage of voltage end Va and voltage end Vb is zero, existence due to offset resistor R0, make two branch currents the imbalance of voltage comparator, be the size that the size of electric current I 2 is far smaller than electric current I 1, after charge1 path mirror image shown in dotted lines in Figure 2, to this charge and discharge capacitance C
charge, charging current is now very little, and the voltage of this common-mode voltage end Vbypass rises slowly.In this process, the 6th field effect transistor M6 provides bias voltage for the 7th field effect transistor M7, along with the rising of the voltage of this common-mode voltage end Vbypass, the charging current I2 of this voltage comparator is also in continuous increase, thereby formed the lower semisection of " S " type charging curve.
Rising along with the voltage of voltage end Va, charging current I2 constantly increases, the 4th field effect transistor M4 grid voltage raise, and the grid voltage of the 7th field effect transistor M7 is constant, increase along with charging current, force the 5th field effect transistor M5 to be operated in linear zone, the electric current of charge1 path reduces gradually, along with reducing of the drain-source voltage of the 5th field effect transistor M5, the 7th field effect transistor M7 is converted into the current mirror image tube of the 6th field effect transistor M6, now charging current is carried out constant current charge through charge2 path, thereby formed the stage casing of " S " type charging curve.
When the voltage of common-mode voltage end Vbypass meets the following conditions:
Vbypass=V
+ | V
|; Wherein, V
with V
be respectively grid terminal voltage and the threshold voltage of the 9th field effect transistor M9.
Continuation rising along with common-mode voltage end Vbypass voltage, the 9th field effect transistor M9 enters linear zone, and the electric current that now flows through the 8th field effect transistor M8 reduces, and charging current reduces, charging rate slows down, thereby has formed the upper semisection of " S " type charging curve.
When shutdown, under circuit during electricity, this first control end PD is low level, this second control end
for high level, this discharges and recharges signal Enable Pin CHAR is low level, and now, discharge process is opened and entered to this charge/discharge unit.The tenth field effect transistor M10, the 14 field effect transistor M14 and the 16 field effect transistor M16 close, the 11 field effect transistor M11, the 13 field effect transistor M13 and the 15 field effect transistor M15 conducting, the voltage of voltage end Va is followed the change in voltage of this common mode reference voltage generation end Vref and changes through the 13 field effect transistor M13 of conducting, in discharge process, the voltage of voltage end Va is keeping common-mode voltage always; The voltage of voltage end Vb is followed the change in voltage of this common-mode voltage end Vbypass and changes through the 15 field effect transistor M15 of conducting, this charge and discharge capacitance C owing to just starting to discharge
the voltage of one end, the voltage of this common-mode voltage end Vbypass equals the voltage that this common mode reference voltage produces end Vref, so the voltage of voltage end Vb equates with the voltage that this common mode reference voltage produces end Vref.Existence due to offset resistor R0; make two branch currents the imbalance of voltage comparator; when the voltage of voltage end Va, the voltage of voltage end Vb and this common mode reference voltage produce the voltage of end Vref while equating; the size of electric current I 2 is far smaller than the size of electric current I 1; discharging current is now very little, and has formed the upper semisection of " S " type discharge curve.
Because the voltage of voltage end Va is keeping common-mode voltage always, decline gradually along with the voltage of voltage end Vb, electric current I 2 through discharge path shown in dotted lines in Figure 2 becomes large gradually, now the grid voltage of the 4th field effect transistor M4 raises, the drain-source voltage of the 12 field effect transistor M12 reduces gradually, when below meeting during condition:
Vbypass=V
=V
-| V
|; V wherein
, V
with V
be respectively drain-source voltage, gate source voltage and the threshold voltage of the 12 field effect transistor M12.
Along with the continuation of the voltage of this common-mode voltage end Vbypass reduces, the 12 field effect transistor M12 is operated in linear zone, now current mirror ability dies down, and electric current I 2 is increasing gradually, discharging current now can change very little within a period of time, can be approximately constant current, thereby form the stage casing of " S " type discharge curve.
Along with the grid voltage continuation rising of the 4th field effect transistor M4, the continuation of drain-source voltage reduces, and discharging current diminishes gradually, thereby has formed the lower semisection of " S " type discharge curve.
POP noise suppression circuit of the present invention and system configuration are simple, and can produce the charging/discharging voltage of slow variation, thereby can effectively suppress the POP noise that audio system forms in switching on and shutting down.
Claims (10)
1. a POP noise suppression circuit, for an audio system, is characterized in that: described POP noise suppression circuit comprises a power end, one voltage comparator being connected with described power end, one discharges and recharges signal Enable Pin, one with described power end, describedly discharge and recharge the control unit that discharges and recharges that signal Enable Pin and described voltage comparator be connected, one discharges and recharges with described the charge/discharge unit that control unit and described voltage comparator are connected, one be connected with described charge/discharge unit enable control end, the one common-mode voltage generation unit being connected with described charge/discharge unit and one and described in discharge and recharge control unit, described voltage comparator and the connected earth terminal of described charge/discharge unit, described voltage comparator comprises one first current source, one the first field effect transistor being connected with described the first current source, one second field effect transistor, one the 3rd field effect transistor being connected with described the first field effect transistor, one the 4th field effect transistor and being connected with described the second field effect transistor is connected in the offset resistor between described the first current source and described the second field effect transistor, and described voltage comparator is for generation of a charging and discharging currents needing.
2. POP noise suppression circuit as claimed in claim 1, is characterized in that: described charge/discharge unit comprises one the 5th field effect transistor, one the 6th field effect transistor, one is connected in the 7th field effect transistor between described the 5th field effect transistor and described the 6th field effect transistor, one the 8th field effect transistor being connected with described the 7th field effect transistor, one the 9th field effect transistor being connected with described the 8th field effect transistor, one the tenth field effect transistor being connected with described the 9th field effect transistor, one the 11 field effect transistor being connected with described the tenth field effect transistor, one the 12 field effect transistor being connected with described the 11 field effect transistor, the 13 field effect transistor, one the 14 field effect transistor being connected with described the 13 field effect transistor, one the 15 field effect transistor being connected with described the 14 field effect transistor, one the 16 field effect transistor being connected with described the 15 field effect transistor, one enables with described the 17 field effect transistor that control end is connected, one the 18 field effect transistor being connected with described the 17 field effect transistor, one is connected in the 19 field effect transistor between described the 8th field effect transistor and described the 9th field effect transistor, one the second current source being connected with described the 6th field effect transistor, one the first resistance being connected with described the tenth field effect transistor and described the 11 field effect transistor, one the second resistance being connected with described the first resistance, one with described the first resistance and described the second resistance connected be connected electric capacity, one common-mode voltage end and a charge and discharge capacitance being connected with described common-mode voltage end.
3. POP noise suppression circuit as claimed in claim 2, it is characterized in that: described in discharge and recharge control unit and comprise that one discharges and recharges with described the 20 field effect transistor that signal Enable Pin is connected, one discharges and recharges with described the 21 field effect transistor that signal Enable Pin is connected, one the 22 field effect transistor and the 23 field effect transistor being connected with described the 22 field effect transistor being connected with described the 20 field effect transistor and described the 21 field effect transistor, described common-mode voltage generation unit comprises that a common mode reference voltage produces end and and produces with described common mode reference voltage the buffer that end is connected, the described control end that enables comprises one first control end and second control end contrary with described the first control end level.
4. POP noise suppression circuit as claimed in claim 3, it is characterized in that: the grid of described the first field effect transistor is connected with described the 13 drain electrode of field effect transistor and the drain electrode of described the 14 field effect transistor, the grid of described the second field effect transistor is connected with described the 15 source class of field effect transistor and the drain electrode of described the 16 field effect transistor, the source class of described the second field effect transistor is connected with one end of described offset resistor, the source class of described the first field effect transistor is connected with one end of the other end of described offset resistor and described the first current source, the drain electrode of described the first field effect transistor is connected with grid and the drain electrode of described the 3rd field effect transistor, the grid of the drain electrode of described the second field effect transistor and described the 4th field effect transistor and drain electrode, the grid of described the 5th field effect transistor, described the 12 grid of field effect transistor and the drain electrode of described the 18 field effect transistor are connected, the drain electrode of described the 5th field effect transistor is connected with the source class of described the 7th field effect transistor, the grid of described the 6th field effect transistor and drain electrode, the grid of described the 7th field effect transistor, common one end that connects described the second current source of drain electrode of described the 17 field effect transistor.
5. POP noise suppression circuit as claimed in claim 4, it is characterized in that: grid and the drain electrode of the drain electrode of described the 7th field effect transistor and described the 8th field effect transistor, described the 9th grid of field effect transistor and the drain electrode of described the 19 field effect transistor are connected, the drain electrode of described the 9th field effect transistor is connected with the source class of described the tenth field effect transistor, one end of described the tenth drain electrode of field effect transistor and the drain electrode of described the 11 field effect transistor and described the first resistance is connected, the source class of described the 11 field effect transistor is connected with the drain electrode of described the 12 field effect transistor, the other end of described the first resistance is connected with described one end that is connected electric capacity jointly with one end of described the second resistance, the source class of described the 14 field effect transistor, the drain electrode of described the 15 field effect transistor, the other end of described the second resistance and one end of described charge and discharge capacitance are connected with described common-mode voltage end.
6. POP noise suppression circuit as claimed in claim 5, it is characterized in that: described in discharge and recharge signal Enable Pin and be connected with described the 20 grid of field effect transistor and the grid of described the 21 field effect transistor, the drain electrode of described the 20 field effect transistor, the drain electrode of described the 21 field effect transistor, the grid of described the 22 field effect transistor, the grid of the grid of described the 23 field effect transistor and described the tenth field effect transistor, described the 11 grid of field effect transistor and the grid of described the 15 field effect transistor are connected, the drain electrode of described the 22 field effect transistor, described the 23 drain electrode of field effect transistor and the grid of described the 13 field effect transistor, described the 14 grid of field effect transistor and the grid of described the 16 field effect transistor are connected, one input of described buffer produces end with described common mode reference voltage and is connected, another input and the output thereof of described buffer, the source class of described the 8th field effect transistor, the source class of described the 9th field effect transistor, the source class of described the 13 field effect transistor, the other end of the source class of described the 19 field effect transistor and described the second current source is connected jointly.
7. POP noise suppression circuit as claimed in claim 6, it is characterized in that: the source class of described the 20 field effect transistor, the described power end of the common connection of the other end of the source class of described the 22 field effect transistor and described the first current source, the source class of described the 3rd field effect transistor, the source class of described the 4th field effect transistor, the source class of described the 5th field effect transistor, the source class of described the 6th field effect transistor, the source class of described the 12 field effect transistor, the source class of described the 16 field effect transistor, the source class of described the 21 field effect transistor, the source class of described the 23 field effect transistor, the other end of described connection electric capacity and the other end of described charge and discharge capacitance are connected with described earth terminal.
8. a POP noise suppressing system, for an audio system, it is characterized in that: described POP noise suppressing system comprises a power end, one is connected with described power end for generation of the voltage comparator of the charging and discharging currents of needs, one for generation of one discharge and recharge control signal discharge and recharge signal Enable Pin, one with described power end, describedly discharge and recharge the control unit that discharges and recharges that signal Enable Pin and described voltage comparator be connected, one is connected for carry out the charge/discharge unit of charge and discharge to described POP noise suppression circuit with described control unit and the described voltage comparator of discharging and recharging, one is connected with described charge/discharge unit for controlling the startup of described POP noise suppression circuit and the control end that enables of closing, one be connected with described charge/discharge unit for generation of the common-mode voltage generation unit of a common-mode voltage and one and described in discharge and recharge control unit, described voltage comparator and the connected earth terminal of described charge/discharge unit, described voltage comparator comprises that one first current source, first field effect transistor being connected with described the first current source, one second field effect transistor, the 3rd field effect transistor being connected with described the first field effect transistor, the 4th field effect transistor and being connected with described the second field effect transistor are connected in the offset resistor between described the first current source and described the second field effect transistor.
9. POP noise suppressing system as claimed in claim 8, it is characterized in that: described in discharge and recharge control unit and comprise that one discharges and recharges with described the 20 field effect transistor that signal Enable Pin is connected, one discharges and recharges with described the 21 field effect transistor that signal Enable Pin is connected, one the 22 field effect transistor and the 23 field effect transistor being connected with described the 22 field effect transistor being connected with described the 20 field effect transistor and described the 21 field effect transistor, described common-mode voltage generation unit comprises that a common mode reference voltage produces end and and produces with described common mode reference voltage the buffer that end is connected, the described control end that enables comprises one first control end and second control end contrary with described the first control end level.
10. POP noise suppressing system as claimed in claim 9, is characterized in that: described charge/discharge unit comprises one the 5th field effect transistor, one the 6th field effect transistor, one is connected in the 7th field effect transistor between described the 5th field effect transistor and described the 6th field effect transistor, one the 8th field effect transistor being connected with described the 7th field effect transistor, one the 9th field effect transistor being connected with described the 8th field effect transistor, one the tenth field effect transistor being connected with described the 9th field effect transistor, one the 11 field effect transistor being connected with described the tenth field effect transistor, one the 12 field effect transistor being connected with described the 11 field effect transistor, the 13 field effect transistor, one the 14 field effect transistor being connected with described the 13 field effect transistor, one the 15 field effect transistor being connected with described the 14 field effect transistor, one the 16 field effect transistor being connected with described the 15 field effect transistor, one enables with described the 17 field effect transistor that control end is connected, one the 18 field effect transistor being connected with described the 17 field effect transistor, one is connected in the 19 field effect transistor between described the 8th field effect transistor and described the 9th field effect transistor, one the second current source being connected with described the 6th field effect transistor, one the first resistance being connected with described the tenth field effect transistor and described the 11 field effect transistor, one the second resistance being connected with described the first resistance, one with described the first resistance and described the second resistance connected be connected electric capacity, one common-mode voltage end and a charge and discharge capacitance being connected with described common-mode voltage end.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210042910.7A CN102547529B (en) | 2012-02-24 | 2012-02-24 | Pop noise suppression circuit and system |
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|---|---|---|---|
| CN201210042910.7A CN102547529B (en) | 2012-02-24 | 2012-02-24 | Pop noise suppression circuit and system |
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| CN102547529A CN102547529A (en) | 2012-07-04 |
| CN102547529B true CN102547529B (en) | 2014-07-30 |
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| CN103037288B (en) * | 2012-12-11 | 2015-04-22 | 无锡友达电子有限公司 | Audio power amplifier shutdown puff suppressing device |
| CN111551212B (en) * | 2020-06-05 | 2022-05-27 | 内蒙古中孚明丰农业科技有限公司 | Crop information acquisition system based on Internet of things |
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|---|---|---|---|---|
| CN101325401A (en) * | 2007-06-12 | 2008-12-17 | 上海沙丘微电子有限公司 | Circuit for restraining start-up and closedown noise of whole difference audio power amplifier |
| CN202475745U (en) * | 2012-02-24 | 2012-10-03 | 四川和芯微电子股份有限公司 | POP muting circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004048880A (en) * | 2002-07-10 | 2004-02-12 | Sharp Corp | Switched capacitor type stabilized power supply unit |
| TWI230557B (en) * | 2003-11-06 | 2005-04-01 | Liteon It Corp | Mute circuit for use in the duration of power switching |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101325401A (en) * | 2007-06-12 | 2008-12-17 | 上海沙丘微电子有限公司 | Circuit for restraining start-up and closedown noise of whole difference audio power amplifier |
| CN202475745U (en) * | 2012-02-24 | 2012-10-03 | 四川和芯微电子股份有限公司 | POP muting circuit |
Non-Patent Citations (1)
| Title |
|---|
| JP特开2004－48880A 2004.02.12 |
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Address after: 610041 Sichuan city of Chengdu province high tech Zone Kyrgyzstan Road 33 block A No. 9 Applicant after: IPGoal Microelectronics (Sichuan) Co., Ltd. Address before: 402 room 7, building 610041, incubator Park, hi tech Zone, Sichuan, Chengdu Applicant before: IPGoal Microelectronics (Sichuan) Co., Ltd. |
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