CN102544195B - Solar cell and manufacturing method thereof - Google Patents
Solar cell and manufacturing method thereof Download PDFInfo
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- CN102544195B CN102544195B CN2010106191822A CN201010619182A CN102544195B CN 102544195 B CN102544195 B CN 102544195B CN 2010106191822 A CN2010106191822 A CN 2010106191822A CN 201010619182 A CN201010619182 A CN 201010619182A CN 102544195 B CN102544195 B CN 102544195B
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Abstract
The invention discloses a manufacturing method of a solar cell. The manufacturing method comprises the following steps of: 1, accelerating P type ions and forming a P type local doping region on the back face of a P type wafer through ion injection; 2, forming an N type doping layer on the front face of the P type wafer; 3, forming coatings on the front face and the back face of the P type wafer, wherein each coating consists of a passivation layer and a reflection reducing coating; 4, forming a surface electrode on the front face of the P type wafer; 5, forming a back face electrode on the back face of the P type wafer, wherein the back face electrode is positioned at a position which corresponds to the P type local doping region; and 6, sintering the P type wafer at the temperature of 700-1,100 DEG C to compound a metal electrode element with a silicon eutectic crystal in the wafer, wherein when a P type is replaced by an N type, the N type is replaced by the P type simultaneously. The invention further discloses a solar cell. In the invention, a selective emitter and a local back field structure are adopted, so that contact resistance between the surface electrode and a substrate is reduced, and the photoelectric conversion efficiency of the solar cell is increased.
Description
Technical field
The present invention relates to a kind of solar cell and preparation method thereof, particularly relate to a kind of solar cell with selective emitting electrode structure and preparation method thereof.
Background technology
After solar cell is subject to illumination, battery produces electron-hole pair after absorbing the incident photon that an energy is greater than band gap width, and electronics and hole are energized into respectively the upper state of conduction band and valence band.Moment after exciting, the energy of incident photon is depended in electronics and hole in the energy position of excitation state.Photo-generated carrier in upper state very fast with the lattice interaction, give phonon by energy and at the bottom of falling back to conduction band and top of valence band, this process is also referred to as the thermalization process, the thermalization process make high-energy photon energy loss a part.After the thermalization process, the transport process of photo-generated carrier will have recombination losses in (barrier region or diffusion region).Last Voltage-output is once pressure drop again, and pressure drop derives from the difference with the work function of electrode material.By above-mentioned analysis, solar battery efficiency is subject to material, device architecture and preparation technology's impact, comprises the light loss of battery, limited mobility, recombination losses, series resistance and the bypass resistance loss etc. of material.For certain material, battery structure and preparation technology's improvement is important to improving photoelectric conversion efficiency.
In general solar cell preparation technology mainly passes through following process, take silicon chip as the example explanation:
1, the surface treatment of silicon chip: prepare on the surface of silicon chip is the first step main technique of manufacturing silicon solar cell, and it comprises chemical cleaning and the surface corrosion of silicon chip.After the silicon ingot having adulterated cuts into the silicon chip that meets production requirement on request, at first will be to its surface treatment, because after cutting, silicon chip surface may have dust, the organic substances such as metal ion and other inorganic matters and grease also can produce certain mechanical damage layer when cutting.Can get rid of these pollutions and damage through sour corrosion and alkaline corrosion, make the silicon chip surface light.Afterwards, silicon chip is put into to sodium hydroxide solution or other acid solution of 1.2%-1.5% and done the pyramid matte, make incident light in surperficial Multi reflection and refraction, increased the absorption of light, improved the efficiency of battery.
2, diffusion system is tied: knot process processed is to generate the different diffusion layer of conduction type on a block matrix material, and it and the front surface treatment of system knot are all the critical processes in the battery manufacture process.Diffusion is a kind of phenomenon of material molecule or atomic motion.The method of thermal diffusion P-N knot processed is to make V family impurity infiltrate P type silicon or III family impurity infiltration N-type silicon by high temperature.The most frequently used V family impurity of silicon solar cell is phosphorus, and what III family impurity was the most frequently used is boron.Requirement to diffusion is to obtain junction depth and the diffusion layer square resistance that is suitable for solar cell P-N knot needs.The shallow junction dead layer is little, and battery shortwave effect is good, and shallow junction causes that series resistance increases, and only is improved the density of gate electrode, could effectively improve the fill factor, curve factor of battery.So just increased technology difficulty.Junction depth is too dark, and dead layer is apparent in view.If diffusion concentration is too large, cause heavy doping effect, the open circuit voltage of battery and short circuit current are descended.In actual battery is made, considered the factor of many aspects, so the junction depth general control of solar cell is at 0.3～0.5 micron, 20～70 ohm of square resistance average out to.At present, silicon solar cell main thermal diffusion method used is liquid source diffusion, this technique be the method for carrying by gas by impurity band as realized in diffusion furnace.
3, trimming: in diffusion process, at the periphery surface of silicon chip, also formed diffusion layer, peripheral diffusion layer can make the upper/lower electrode of battery form short-circuited conducting sleeve, it must be removed.On periphery, existing any small partial short-circuit all can make cell parallel resistance descend, is fatal on the impact of battery.The main method of trimming has etch, extrusion and ion dry etching etc.Now industrial the longest use is plasma method, passes under nitrogen, oxygen and carbon tetrafluoride high pressure and produces aura, by oxonium ion and fluorine ion, alternately to the silicon effect, removes leading with layer of diffusion layer periphery.Because generated P, P in diffusion
2o
5, S
io
2and phosphorosilicate glass, with 10% HF solution, clean 2 minutes now, reach the purpose of decontamination glass.
4, make antireflective coating: illumination is mapped on the silicon chip on plane, and wherein some is reflected, even the silicon face of matte also approximately has 11% reflection loss, at silicon face, covers one deck antireflective coating, can greatly reduce reflection of light.The spraying process adopted now, it is to utilize high temperature to generate titanium dioxide film at silicon face; A kind of method that also has spraying, be by PECVD (plasma chemistry gaseous phase deposition) system, and it is to be controlled by computer, and under vacuum, high-voltage radio-frequency source condition, the ammonia made and silane gas ionization, form silicon nitride film at silicon face.
5, electrode fabrication: electrode is exactly to form the electric conducting material of tight ohmic contact with P-N knot two ends.Such material should meet: with silicon, can form and firmly contact and contact resistance is little, excellent conductivity, shielded area are little, the high requirement of collection efficiency.In the commercialization battery production, a large amount of adopted technique is silver slurry or silver-colored aluminium paste printing at present, and this technique moves to maturity, the ratio of width to height of grid line reduces greatly, the principle of this and battery electrode design---allow the output maximum of battery, as far as possible little and illumination active area battery of the series resistance of battery is as far as possible greatly on all four.
6, electrode fabrication is complete, the next operation-sintering of having arrived.Sintering is last one production process of solar energy monolithic battery, and in this step, good temperature curve is crucial, and sintering time will be got hold of, and at first wants low temperature by the eliminating of the materials such as mixing agent in slurries, heats or is sintered to aluminium-above sintered alloy of silicon eutectic point.After alloying, along with cooling, silicon in liquid phase will solidify again, the recrystallized layer that formation contains a certain amount of aluminium, it is actually a process that silicon is adulterated, it has compensated the donor impurity in the N+ layer of the back side, obtain the P type layer with the aluminium doping, rising along with alloy temperature, the increasing proportion of the aluminium in liquid phase, under enough aluminium amount alloy temperatures, the back side even can form the electric field identical with the place ahead, become back of the body electric field, this technique has been used in large batch of industrial production at present, thereby open circuit voltage and short circuit current have been improved, and reduced Electrodes.Can back of the body knot burn with temperature and the factors such as time and temperature of the doping content of the resistivity of stock, reverse diffusion layer and thickness, back side thickness or printing aluminum layer thickness, sintering relation.Excess Temperature can burn the two poles of the earth of battery, badly damaged battery, and the not high enough ohmic contact formedness that can not guarantee electrode of temperature, so must there be a suitable temperature to remove sintering.The solar battery sheet of monolithic has just completed like this, finally arrives test, is then welding and packaging technology.
Because the concentration of doping ion in thermal diffusion process can't be precisely controlled, cause the conversion efficiency of solar cell to be limited to, can't carry out efficiently opto-electronic conversion.And adopting thermal diffusion process to prepare solar cell, its processing step is more, causes the reduction of production efficiency and the raising of cost.
Summary of the invention
The defect that the technical problem to be solved in the present invention is that the prior art conversion efficiency of solar cell is low in order to overcome, the concentration of doping ion can't be precisely controlled and processing step is complicated, cost is higher in thermal diffusion process, what provide that a kind of processing procedure cost is low, the doping ion concentration is accurately controlled and photoelectric conversion efficiency is high has solar cell of selective emitting electrode structure and preparation method thereof.
The present invention solves above-mentioned technical problem by following technical proposals:
A kind of manufacture method of solar cell, its characteristics are, it comprises the following steps:
Step S
1, accelerate P type ion and the mode by Implantation forms P type local doped region territory at P type chip back surface, those skilled in the art can select the parameter such as the concentration, energy of the doping ion that is applicable to and doping ion to obtain suitable square resistance according to actual needs;
Step S
2, form the N-type doped layer in P type wafer surface;
Step S
3, form coating at P type wafer surface and the back side, this coating is passivation layer and anti-reflection film;
Step S
4, form surface electrode in P type wafer surface;
Step S
5, form backplate at P type chip back surface, this backplate is positioned at the position corresponding with this P type local doped region territory;
Step S
6, by P type wafer sintering at the temperature of 700--1100 ℃, make the silicon eutectic in metal electrode element and wafer compound, wherein preferably, by P type wafer sintering 30 seconds to 30 minutes at the temperature of 850--1000 ℃;
Wherein, when described P type replaces with N-type, N-type replaces with the P type simultaneously.
Preferably, step S
1further comprising the steps of:
Step S
11, mask plate is placed in to the back side of this P type wafer;
Step S
12, accelerate P type ion to 500eV-50keV the mode by Implantation by this P type ion from this P type chip back surface injection, preferably, this P type ion is accelerated to 1keV-40keV, more preferably, this P type ion is accelerated to 5keV-30keV;
Step S
13, form P type local doped region territory in the zone of the not masked plate resistance of P type chip back surface gear, the square resistance in this P type local doped region territory is 10-50 Ω/, preferably, the square resistance in this P type local doped region territory is 15-45 Ω/, more preferably, the square resistance in this P type local doped region territory is 20-40 Ω/.
Preferably, step S
2in method by Implantation or thermal diffusion form this N-type doped layer, the square resistance of formed N-type doped layer is 60-120 Ω/, and wherein preferably, the square resistance of this N-type doped layer is 70-110 Ω/, more preferably, the square resistance of this N-type doped layer is 80-100 Ω/.Those skilled in the art can select applicable technique according to actual needs, for example adopt the mode of thermal diffusion or the mode of Implantation to form this N-type doped layer, if employing thermal diffusion process, before carrying out thermal diffusion, need to one diffusing protection layer be set at chip back surface, because adopting thermal diffusion processes for whole wafer wafer, in order to prevent from destroying the doped layer of other positions that processed, adopt this diffusing protection layer to stop the thermal diffusion of non-machining area, for example can adopt mask plate or use silicon nitride and form this diffusing protection layer by PECVD method (plasma enhanced chemical vapor deposition method), if adopt the technique of Implantation, because Implantation has directivity, thus without the diffusing protection layer is set, but need high annealing, 700-1100 ℃ for example, annealing time is 30 seconds to 30 minutes,
Preferably, step S
3in form coating by PECVD, the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, the anti-reflection film of this coating is silicon nitride film.The thickness of this coating is 60-150nm, and preferably, the thickness of this coating is 70-140nm, and more preferably, the thickness of this coating is 80-120nm.Surface passivation can reduce semi-conductive surface activity, surperficial recombination rate is reduced, its major way is the dangling bonds at saturated semiconductor surface place, reduce surface activity, increase surperficial cleaning procedure, avoid forming complex centre due to impurity in the introducing of superficial layer, with this, reduce the recombination velocity of minority carrier.By surface passivation, make surface recombination reduce, thereby improve effective minority carrier life time.Anti-reflection film can reduce surperficial sun reflection of light, improves the utilance of sunlight.Adopt above-mentioned coating to be the effective means that improves the solar cell photoelectric conversion efficiency.
Preferably, step S
4middle employing silver is starched and is passed through the silk screen printing method for producing surface electrode, and those skilled in the art can select other known materials and already known processes to make surface electrode according to actual needs.
Preferably, step S
5middle employing silver slurry or silver-colored aluminium paste are also made backplate by silk screen print method on the zone corresponding with this P type local doped region territory.
Preferably, step S
5further comprising the steps of:
Step S
51, can burn silver slurry or the silver-colored aluminium paste of passivation layer and dry at this P type local doped region territory accurate overprinting;
Step S
52, be pressure-plated with the silver slurry that does not burn passivation layer by silk screen print method;
Step S
53, silver slurry or the silver-colored aluminium paste that can burn passivation layer be connected with the formation backplate with the silver slurry that does not burn passivation layer.The specific implementation of secondary printing is known in those skilled in the art, so do not launch narration.
Preferably, in described silver-colored aluminium paste, the content of aluminium is greater than 3%, and more preferably, in described silver-colored aluminium paste, the content of aluminium is greater than 5%, and described percentage is the mass percent that aluminium accounts for silver-colored aluminium paste total amount.
The solar cell that the present invention also provides a kind of manufacture method of using solar cell as above to make, its characteristics are, it comprises:
One P type wafer;
One is arranged in the P type local doped region territory of this P type chip back surface;
One is arranged in the N-type doped layer of this P type wafer surface;
Lay respectively at the coating on this back side, P type local doped region territory and this N-type doped layer surface, this coating is passivation layer and anti-reflection film;
Be positioned at the surface electrode on this N-type doped layer surface;
And the backplate that is positioned at this P type chip back surface;
Wherein, the metallic element in described surface electrode and backplate and the silicon eutectic in wafer are compound, and this backplate is positioned at the position corresponding with this P type local doped region territory,
Wherein, when described P type replaces with N-type, N-type replaces with the P type simultaneously.
Preferably, the square resistance in this P type local doped region territory is 10-50 Ω/, and wherein preferably, the square resistance in this P type local doped region territory is 15-45 Ω/, and more preferably, the square resistance in this P type local doped region territory is 20-40 Ω/.
Preferably, the square resistance of this N-type doped layer is 60-120 Ω/, and wherein preferably, the square resistance of this N-type doped layer is 70-110 Ω/, and more preferably, the square resistance of this N-type doped layer is 80-100 Ω/.
Preferably, the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, and the anti-reflection film of this coating is silicon nitride film.
In addition, only need to be in said process, transposing base material and the impurity material adulterated in the mode of Implantation or diffusion growth, the method is equally applicable to the making of N-type solar wafer, and when described P type replaces with N-type, N-type replaces with the P type simultaneously.What but now on N-type base wafer surface, inject is the P type ion such as boron ion, to form the doping of P type.
Measuring the photovoltaic performance of solar cell and assembly, is under stable natural daylight or simulated solar irradiation, under steady temperature, depicts its output current-voltage response, measures the irradiance of incident light to calculate the photoelectric conversion efficiency of battery simultaneously.Photovoltaic energy resource system technical committee for standardization (TCST) (IEC-TC82) has stipulated standard test condition.The photoelectric conversion efficiency of the solar cell made according to the method described above is more than 19.25%.
Positive progressive effect of the present invention is:
1, adopt the structure of selective emitter and local back surface field, reduced the contact resistance between surface electrode and substrate, the solar energy conversion efficiency can improve 10% left and right.Specifically, at present on production line, the photoelectric conversion efficiency of the solar cell of volume production is in 17.5% left and right, and the conversion efficiency of solar cell of the present invention can be increased to 19.25% left and right.
2, the solar cell that the present invention makes has bilateral structure, can be subject to light in two sides, different from traditional single face battery like this, the back side of the solar cell that the present invention makes also can utilize the sunlight of scattering sunlight and reflection, and the solar energy conversion efficiency can improve 10% left and right thus.
3, adopt Implantation to be adulterated, the concentration of doping ion has obtained accurate control, more favourable to the efficiency that improves opto-electronic conversion compared with the doping of thermal diffusion process, has also reduced processing step simultaneously, reduces cost of manufacture.
The accompanying drawing explanation
The decomposition step schematic diagram that Fig. 1-Fig. 5 is making solar cell of the present invention.
Embodiment
Provide preferred embodiment of the present invention below in conjunction with accompanying drawing, to describe technical scheme of the present invention in detail.
Embodiment 1
With reference to figure 1, step S
1, accelerate the boron ion and the mode by Implantation forms P type local doped region territory 2 at P type wafer 1 back side.Specifically, first mask plate 20 is placed in to the back side of this P type wafer 1; Accelerating this boron ion injects this boron ion to 500eV and by the mode of Implantation again from this P type wafer 1 back side; The last zone just stopped at the not masked plate 20 in P type wafer 1 back side forms P type local doped region territory 2.The square resistance in thus obtained this P type local doped region territory 2 is 10 Ω/, and the arrow in Fig. 1 is depicted as the direction of Implantation, is only for the ease of understanding, should not be construed as limitation of the present invention.
With reference to figure 2, step S
2, form N-type doped layer 3 on P type wafer 1 surface.Method by Implantation in the present embodiment forms this N-type doped layer 3, phosphonium ion is accelerated to 500eV to carry out Implantation, the square resistance of formed N-type doped layer 3 is 60 Ω/, needs high annealing after completing injection, and annealing 30 minutes under 700 ℃ is so that the impurity activation.
With reference to figure 3, step S
3, form coating 4 at P type wafer surface and the back side, this coating 4 is passivation layer and anti-reflection film.Specifically, by PECVD, form coating, the passivation layer of this coating is silica, and the anti-reflection film of this coating is silicon nitride film.The thickness of this coating is 60nm.
With reference to figure 4, step S
4, form surface electrode 5 on P type wafer 1 surface.In the present embodiment, adopt silver to starch and pass through the silk screen printing method for producing surface electrode.
With reference to figure 5, step S
5, form backplate 6 at P type wafer 1 back side, this backplate 6 is positioned at the position corresponding with this P type local doped region territory 2; Step S
6, by P type wafer sintering at the temperature of 700 ℃, make the silicon eutectic in metal electrode element and wafer compound.Wherein, step S
5middle employing silver slurry is also made backplate by silk screen print method on the zone corresponding with this P type local doped region territory.Thus, described solar cell completes.
Embodiment 2
With reference to figure 1, step S
1, accelerate the boron ion and the mode by Implantation forms P type local doped region territory 2 at P type wafer 1 back side.First mask plate 20 is placed in to the back side of this P type wafer 1; Then accelerating the boron ion injects this boron ion to 50keV and by the mode of Implantation from this P type wafer 1 back side; The zone so just stopped at the not masked plate 20 in P type wafer 1 back side forms P type local doped region territory 2, and the square resistance in the P type local doped region territory 2 obtained is 50 Ω/.In addition, the arrow in Fig. 1 is depicted as the direction of Implantation, is only for the ease of understanding, should not be construed as limitation of the present invention.
With reference to figure 2-Fig. 2 a, step S
2, form N-type doped layer 3 on P type wafer 1 surface.Wherein the method by thermal diffusion forms this N-type doped layer 3, and the square resistance of formed N-type doped layer 3 is 120 Ω/.With reference to figure 2a; before carrying out thermal diffusion; need to one diffusing protection layer 21 be set at chip back surface; because adopting thermal diffusion processes for whole wafer wafer; in order to prevent from destroying the doped layer of other positions that processed; adopt this diffusing protection layer to stop the thermal diffusion of non-machining area; use silicon nitride and form this diffusing protection layer by PECVD method (plasma enhanced chemical vapor deposition method); after completing thermal diffusion, by the wet chemistry method, remove this silicon nitride diffusing protection layer.
With reference to figure 3, step S
3, form coating 4 at P type wafer surface and the back side, this coating 4 is passivation layer and anti-reflection film.Specifically, by PECVD, form coating, the lamination that the passivation layer of this coating is carborundum, aluminium oxide, silicon nitride film, the anti-reflection film of this coating is silicon nitride film.The thickness of this coating is 150nm.
With reference to figure 4, step S
4, form surface electrode 5 on P type wafer 1 surface.Adopt silver to starch and pass through the silk screen printing method for producing surface electrode.
With reference to figure 5, step S
5, form backplate at P type chip back surface, this backplate is positioned at the position corresponding with this P type local doped region territory; Step S
6, by P type wafer sintering at the temperature of 1100 ℃, make the silicon eutectic in metal electrode element and wafer compound.Wherein, step S
5the silver-colored aluminium paste of middle employing is also made backplate by silk screen print method on the zone corresponding with this P type local doped region territory.In order to obtain more excellent battery performance, adopt the mode of secondary printing as described below to make backplate: at first at these P type local doped region territory 2 accurate overprintings, can burn the silver-colored aluminium paste of passivation layer and dry; Then by silk screen print method, be pressure-plated with the silver slurry that does not burn passivation layer; The silver-colored aluminium paste that finally can burn passivation layer is connected to form backplate 6 with the silver slurry that does not burn passivation layer.The specific implementation of secondary printing is known in those skilled in the art, so do not launch narration.In described silver-colored aluminium paste, the content of aluminium is 3%, and described percentage is the mass percent that aluminium accounts for silver-colored aluminium paste total amount.Thus, described solar cell completes.
With reference to figure 1, step S
1, accelerate the boron ion and the mode by Implantation forms P type local doped region territory 2 at P type wafer 1 back side.Specifically, step S
1further comprising the steps of: the back side that at first mask plate 20 is placed in to this P type wafer 1; Then accelerating the boron ion injects this boron ion to 30keV and by the mode of Implantation from this P type wafer 1 back side; The zone stopped at the not masked plate 20 in P type wafer 1 back side thus forms P type local doped region territory 2, and the square resistance in the P type local doped region territory 2 of formation is 30 Ω/.In addition, the arrow in Fig. 1 is depicted as the direction of Implantation, is only for the ease of understanding, should not be construed as limitation of the present invention.
With reference to figure 2, step S
2, form N-type doped layer 3 on P type wafer 1 surface.The method by Implantation forms this N-type doped layer 3 to 30keV wherein to accelerate phosphonium ion, and the square resistance of formed N-type doped layer 3 is 100 Ω/.Need high annealing after completing Implantation, anneal 10 minutes at the temperature of 850 ℃.
With reference to figure 3, step S
3, form coating 4 at P type wafer surface and the back side, this coating 4 is passivation layer and anti-reflection film.Specifically, by PECVD, form coating, the passivation layer of this coating is the lamination in silicon nitride and amorphous silicon membrane, and the anti-reflection film of this coating is silicon nitride film.The thickness of this coating is 80nm.
With reference to figure 4, step S
4, form surface electrode 5 on P type wafer 1 surface.For example adopt silver to starch and pass through the silk screen printing method for producing surface electrode.
With reference to figure 5, step S
5, form backplate 6 at P type wafer 1 back side, this backplate 6 is positioned at the position corresponding with this P type local doped region territory 2; Step S
6, by P type wafer sintering at the temperature of 850 ℃, make the silicon eutectic in metal electrode element and wafer compound.Wherein, step S
5the silver-colored aluminium paste of middle employing is also made backplate 6 on the zone corresponding with this P type local doped region territory by silk screen print method.In order to obtain more excellent battery performance, adopt the mode of following secondary printing to make backplate, at first at these P type local doped region territory 2 accurate overprintings, can burn the silver-colored aluminium paste of passivation layer and dry; Then by silk screen print method, be pressure-plated with the silver slurry that does not burn passivation layer; The silver-colored aluminium paste that finally can burn passivation layer is connected to form backplate 6 with the silver slurry that does not burn passivation layer.The specific implementation of secondary printing is known in those skilled in the art, so do not launch narration.In wherein said silver-colored aluminium paste, the content of aluminium is 5%, and described percentage is the mass percent that aluminium accounts for silver-colored aluminium paste total amount.Thus, described solar cell completes.
With reference to figure 1, step S
1, accelerate phosphonium ion and the mode by Implantation forms N-type local doped region territory at the N-type chip back surface.Specifically, at first mask plate is placed in to the back side of this N-type wafer; Then accelerating phosphonium ion injects this phosphonium ion to 500eV and by the mode of Implantation from this N-type chip back surface; Form N-type local doped region territory in the zone of the not masked plate resistance gear of N-type chip back surface thus, the square resistance in this N-type local doped region territory is 10 Ω/.
With reference to figure 2, step S
2, form P type doped layer in the N-type wafer surface.Wherein the method by Implantation forms this P type doped layer, and the square resistance of formed P type doped layer is 60 Ω/.Need high annealing after completing Implantation, under 700 ℃, annealing is 30 minutes.
With reference to figure 3, step S
3, form coating at N-type wafer surface and the back side, this coating is passivation layer and anti-reflection film.Specifically, by PECVD, form coating, the passivation layer of this coating is silica, and the anti-reflection film of this coating is silicon nitride film.The thickness of this coating is 60nm.
With reference to figure 4, step S
4, form surface electrode in the N-type wafer surface.In the present embodiment, adopt silver to starch and pass through the silk screen printing method for producing surface electrode.
With reference to figure 5, step S
5, form backplate at the N-type chip back surface, this backplate is positioned at the position corresponding with this N-type local doped region territory; Step S
6, by N-type wafer sintering at the temperature of 850 ℃, make the silicon eutectic in metal electrode element and wafer compound.Wherein, step S
5middle employing silver slurry is also made backplate by silk screen print method on the zone corresponding with this N-type local doped region territory.In order to obtain more excellent battery performance, can adopt the mode of secondary printing as described below to make backplate: the silver that at first at this N-type local doped region territory accurate overprinting, can burn passivation layer is starched and is dried; Then by silk screen print method, be pressure-plated with the silver slurry that does not burn passivation layer; The silver slurry that finally can burn passivation layer is connected to form backplate with the silver slurry that does not burn passivation layer.The specific implementation of secondary printing is known in those skilled in the art, so do not launch narration.Thus, described solar cell completes.
Adopting the advantage of selective emitter is to improve the open circuit voltage Voc of solar cell, short circuit current Isc and fill factor, curve factor F.F., thus make battery obtain high photoelectric conversion efficiency.And such benefit just at solar cell in different zone different, the diffusion depth difference of doping content height bring.
Although more than described the specific embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited by appended claims.Those skilled in the art, under the prerequisite that does not deviate from principle of the present invention and essence, can make various changes or modifications to these execution modes, but these changes and modification all fall into protection scope of the present invention.
Claims (12)
1. the manufacture method of a solar cell, is characterized in that, it comprises the following steps:
Step S
1, accelerate P type ion and the mode by Implantation forms P type local doped region territory at P type chip back surface;
Step S
2, form the N-type doped layer in the surface of P type wafer;
Step S
3, form coating on the surface of P type wafer and the back side, this coating is passivation layer and anti-reflection film;
Step S
4, form surface electrode in P type wafer surface;
Step S
5, form backplate at P type chip back surface, this backplate is positioned at the position corresponding with this P type local doped region territory;
Step S
6, by P type wafer sintering at the temperature of 700--1100 ℃, make metal electrode element and wafer eutectic compound,
Wherein, when described P type replaces with N-type, N-type replaces with the P type simultaneously.
2. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
1further comprising the steps of:
Step S
11, mask plate is placed in to the back side of this P type wafer;
Step S
12, accelerate P type ion to 500eV-50keV the mode by Implantation by this P type ion from this P type chip back surface injection;
Step S
13, form P type local doped region territory in the zone of the not masked plate resistance of P type chip back surface gear, the square resistance in this P type local doped region territory is 10-50 Ω/.
3. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
2in method by Implantation or thermal diffusion form this N-type doped layer, the square resistance of formed N-type doped layer is 60-120 Ω/.
4. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
3in form coating by PECVD, the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, the anti-reflection film of this coating is silicon nitride film.
5. the manufacture method of solar cell as claimed in claim 1, is characterized in that, step S
4middle employing silver is starched and is passed through the silk screen printing method for producing surface electrode.
6. as the manufacture method of the described solar cell of any one in claim 1-5, it is characterized in that step S
5middle employing silver slurry or silver-colored aluminium paste are also made backplate by silk screen print method on the zone corresponding with this P type local doped region territory.
7. the manufacture method of solar cell as claimed in claim 6, is characterized in that, step S
5further comprising the steps of:
Step S
51, can burn silver slurry or the silver-colored aluminium paste of passivation layer and dry at this P type local doped region territory accurate overprinting;
Step S
52, be pressure-plated with the silver slurry that does not burn passivation layer by silk screen print method;
Step S
53, silver slurry or the silver-colored aluminium paste that can burn passivation layer be connected with the formation backplate with the silver slurry that does not burn passivation layer.
8. the manufacture method of solar cell as claimed in claim 7, is characterized in that, in described silver-colored aluminium paste, the content of aluminium is greater than 3%, and described percentage is the mass percent that aluminium accounts for silver-colored aluminium paste total amount.
9. the solar cell that the manufacture method of a use solar cell as claimed in claim 1 makes, is characterized in that, it comprises:
One P type wafer;
One is arranged in the P type local doped region territory of this P type chip back surface;
One is arranged in the N-type doped layer of this P type wafer surface;
Lay respectively at the coating on this back side, P type local doped region territory and this N-type doped layer surface, this coating is passivation layer and anti-reflection film;
Be positioned at the surface electrode on this N-type doped layer surface;
And the backplate that is positioned at this P type chip back surface;
Wherein, the metallic element in described surface electrode and backplate and wafer eutectic are compound, and this backplate is positioned at the position corresponding with this P type local doped region territory,
Wherein, when described P type replaces with N-type, N-type replaces with the P type simultaneously.
10. solar cell as claimed in claim 9, is characterized in that, the square resistance in this P type local doped region territory is 10-50 Ω/.
11. solar cell as claimed in claim 9, is characterized in that, the square resistance of this N-type doped layer is 60-120 Ω/.
12. solar cell as claimed in claim 9, is characterized in that, the passivation layer of this coating is one or more the lamination in silica, carborundum, aluminium oxide, silicon nitride or amorphous silicon membrane, and the anti-reflection film of this coating is silicon nitride film.
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Families Citing this family (15)
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| CN103904138A (en) * | 2012-12-27 | 2014-07-02 | 北京汉能创昱科技有限公司 | Full back side contact crystalline silicon cell and preparation method thereof |
| CN104241402A (en) * | 2013-06-20 | 2014-12-24 | 晶科能源有限公司 | Solar cell antireflection film and manufacturing method thereof |
| CN103311376A (en) * | 2013-06-26 | 2013-09-18 | 英利集团有限公司 | Manufacturing method for N type solar cell |
| CN103500774B (en) * | 2013-09-18 | 2016-08-17 | 南京航空航天大学 | A kind of method utilizing P-type silicon ball to prepare local back surface field as boron source |
| CN103618009A (en) * | 2013-10-18 | 2014-03-05 | 浙江晶科能源有限公司 | Silk-screen printing back passivation battery and preparation method thereof |
| CN103646991A (en) * | 2013-11-28 | 2014-03-19 | 奥特斯维能源（太仓）有限公司 | Preparation method of P-type crystal silicon double-sided cell |
| CN103646992A (en) * | 2013-11-28 | 2014-03-19 | 奥特斯维能源（太仓）有限公司 | Preparation method of P-type crystal silicon double-sided cell |
| CN105047755B (en) * | 2015-07-01 | 2017-03-01 | 遵义师范学院 | The manufacture method of passivation on double surfaces solaode |
| CN108352413B (en) * | 2015-10-25 | 2021-11-02 | 索拉昂德有限公司 | Method for manufacturing double-sided battery |
| CN105845776A (en) * | 2016-04-26 | 2016-08-10 | 泰州中来光电科技有限公司 | Local back surface N-type photovoltaic cell preparation method, local back surface N-type photovoltaic cell, local back surface N-type photovoltaic cell assembly and local back surface N-type photovoltaic cell system |
| CN107845692A (en) * | 2016-09-20 | 2018-03-27 | 上海神舟新能源发展有限公司 | A kind of preparation method of modified back side tunnel oxidation passivation contact high-efficiency battery |
| CN109906515A (en) * | 2016-10-25 | 2019-06-18 | 信越化学工业株式会社 | The manufacturing method of high photoelectricity conversion efficiency solar battery and high photoelectricity conversion efficiency solar battery |
| CN106876488A (en) * | 2017-01-25 | 2017-06-20 | 泰州乐叶光伏科技有限公司 | N-type double-side cell and its processing method |
| AU2018399942B2 (en) * | 2018-01-08 | 2023-02-02 | Solaround Ltd. | Bifacial photovoltaic cell and method of fabrication |
| CN109494261B (en) * | 2018-10-19 | 2024-06-21 | 晶澳（扬州）太阳能科技有限公司 | Silicon-based solar cell, preparation method and photovoltaic module |
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Address after: 201203 Shanghai City Newton Road, Zhangjiang High Tech Park of Pudong New Area No. 200 Building No. 7, No. 1 Patentee after: KINGSTONE SEMICONDUCTOR COMPANY LTD. Address before: 201203 Shanghai City Newton Road, Zhangjiang High Tech Park of Pudong New Area No. 200 Building No. 7, No. 1 Patentee before: Shanghai Kaishitong Semiconductor Co., Ltd. |