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CN102385029A - Method for testing high-voltage MOS device - Google Patents

Method for testing high-voltage MOS device Download PDF

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Publication number
CN102385029A
CN102385029A CN2011102476875A CN201110247687A CN102385029A CN 102385029 A CN102385029 A CN 102385029A CN 2011102476875 A CN2011102476875 A CN 2011102476875A CN 201110247687 A CN201110247687 A CN 201110247687A CN 102385029 A CN102385029 A CN 102385029A
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test
mos component
pressure mos
voltage
testing
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CN2011102476875A
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韦敏侠
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The utility model provides a method for testing a high-voltage MOS (Metal Oxide Semiconductor) device. The method is used for testing whether the high-voltage MOS device of each chip on a semiconductor wafer becomes invalid, and comprises the following steps of: optionally selecting a plurality of chips on the semiconductor wafer and testing the high-voltage MOS devices thereof; grounding one pole of the high-voltage MOS device of each chip and connecting the other pole and the gate thereof to a test end; gradually increasing a test voltage applied to the test end, and simultaneously measuring the corresponding source-drain current of each high-voltage MOS device, wherein the initial value of the test voltage is lower than the saturation voltage of the high-voltage MOS device; forming the output characteristic curve of the high-voltage MOS device of each chip according to the test voltage and the corresponding source-drain current; and determining whether the high-voltage MOS device becomes invalid according to the output characteristic curve. Compared with the prior art, the method is to test the source-drain currents by gradually increasing and adjusting the test voltage, so that the problem of wrong determination due to low source-drain currents caused by the parasitic effect can be avoided.

Description

The high-pressure MOS component method of testing
Technical field
The present invention relates to the semiconducter device testing field, relate in particular to the method for testing of a kind of high-pressure MOS component (HVMOS).
Background technology
In the rear end of semiconductor fabrication process, need carry out functional test to the chip on the semiconductor crystal wafer usually.Testing good wafer could be as the effectively follow-up use of product input.Growing along with wafer size, the number of chips on the single-wafer is also more and more, can not test the device function of all chips one by one, only can be on wafer its device function of the some somes tests of picked at random.
High-pressure MOS component (HV MOS) application in recent years is increasingly extensive, fields such as for example power supply control, driving circuit.Its WV tens volts in addition on hectovolt, many physical characteristicss that high voltage brought the especially integrity problem of high-pressure MOS component are the directions of exploitation, and the reliability testing of high-pressure MOS component is then seemed particularly important.
With the high pressure NMOS part is example, and Fig. 1 shows its semiconductor structure, similar with the basic structure of common MOS transistor, comprises source-drain electrode and grid.Existing device detection method mainly is, grid voltage Vg and drain voltage Vd are directly fed test voltage Vdd, and with source ground, the source-drain current Ids that flows through in the testing high voltage nmos device.Before test, can set a current value usually, if said electric current I ds and this setting value are coincide, assert that then this device is a non-defective unit.
Test voltage Vdd needs not be equal to the normal working voltage of high-pressure MOS component, and it is higher that common test voltage can be set.The inventor finds that in test process there is following problem in existing method: test voltage Vdd is higher, and sometimes electric current I ds does not often reach the standard of setting, and is judged as inefficacy.But this crash rate and differing greatly of estimating, after having got rid of technological reason, should be relevant with method of testing.Through further research; Though inventor's deduction carrier velocity is saturated to be not the distinctive character of high tension apparatus; But because the electric field intensity of high tension apparatus is usually than the high one magnitude of common MOS; Cause saturated being easier to of speed to be taken place, and generation speed is fixing saturated opportunity, promptly saturation current is inconsistent.So just, explained above-mentioned phenomenon, it is too high to suppose that test voltage Vdd is provided with, and makes that the junction voltage between source-drain electrode and the substrate is too high; (position that dotted line encloses among Fig. 1) produces quadratic effect at these positions easily; For example parasitic fields effect etc. makes Ids saturated, and does not reach the size of expection.Above-mentioned phenomenon can make existing method of testing can't judge correctly whether high-pressure MOS component lost efficacy.
Summary of the invention
The object of the present invention is to provide a kind of method of testing of high-pressure MOS component, effectively solve source-drain current because the too early saturated and inaccurate problem of test that cause.
The method of testing of high-pressure MOS component provided by the invention, whether the high-pressure MOS component that is used for each chip on the measuring semiconductor wafer lost efficacy, and comprising:
Optional plurality of chips is tested its high-pressure MOS component on semiconductor crystal wafer;
With a utmost point ground connection of the high-pressure MOS component of said each chip, another utmost point and grid connect test lead;
The test voltage that progressively raises and apply at said test lead, and measure the corresponding source-drain current of each high-pressure MOS component simultaneously; The initial value of said test voltage is less than the saturation voltage of said high-pressure MOS component;
According to said test voltage and corresponding source-drain current, form the output characteristic curve of the high-pressure MOS component of each chip;
Judge according to said output characteristic curve whether said high-pressure MOS component lost efficacy.
Optional, adopt fixing amplitude to increase progressively the test voltage that puts on test lead.Said test voltage is started from scratch and is increased progressively or begin to increase progressively from the threshold voltage of said high-pressure MOS component.
Optional, said judgement was lost efficacy and was comprised: the output characteristic curve of the high-pressure MOS component of each chip is compared each other, thereby judge ineffective part.
Optional, said judgement was lost efficacy and was comprised: set up the standard output characteristic curve of high-pressure MOS component, thereby the output characteristic curve of the high-pressure MOS component of each test is relatively judged ineffective part with it.
Optional, said judgement was lost efficacy and comprised: set the critical value of the saturation region test voltage of said high-pressure MOS component, the high-pressure MOS component that test voltage is just got into the saturation region less than said critical value the time is judged to be ineffective part.
Compared with prior art, method of testing provided by the invention adopts the mode that increases progressively the adjustment test voltage, and the test source leakage current can be avoided because of ghost effect causes source-drain current too small, and the problem that makes a mistake and judge.
Description of drawings
Through the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purposes, characteristic and advantage of the present invention will be more clear.The parts identical with prior art have used identical Reference numeral in the accompanying drawing.Accompanying drawing and not drawn on scale focus on illustrating purport of the present invention.In the accompanying drawings for clarity sake, amplified the size of layer with the zone.
Fig. 1 is the semiconductor structure of high pressure NMOS part;
Fig. 2 is for adopting the transistor output characteristic curve of existing method of testing;
Fig. 3 is the process flow diagram of method of testing according to the invention;
Fig. 4 is for adopting the transistor output characteristic curve of method of testing of the present invention.
Fig. 5 is the test comparison figure of method of testing of the present invention and existing method of testing.
Embodiment
Can know that from the background technology part existing high-pressure MOS component method of testing applies fixing test voltage on grid and source electrode; The source-drain current that test is flowed through; Because of the ghost effect that high pressure brought, influence the electric property of MOS device easily, cause test inaccurate.
Fig. 2 shows the transistor output characteristic curve that adopts existing method of testing.As shown in Figure 2, suppose that under normal circumstances the output characteristic curve of this high-pressure MOS component should be dotted line (because usually during test, grid links to each other with drain electrode, therefore at this family curve just section, high-pressure MOS component is not opened, and source-drain current is 0).The critical voltage value of its saturation region is V, and saturation current is I.And if test voltage is to put on suddenly on the high-pressure MOS component; And this test voltage is in high pressure section (like the A point among the figure); Instantaneous high voltage leaks in the source of high-pressure MOS component and produces very strong knot electric field between doped region and the substrate, produces a series of ghost effect easily herein, for example charge carrier thermal effect of high temperature initiation or the like; This moment, the size of source-drain current was I ', and can't arrive the predicted value I according to former output characteristic curve.Because it is because of the improper ghost effect that produces of detection method causes that this source-drain current value does not reach the situation of estimating size, but not device itself lost efficacy.If with original decision procedure then possibly obtain inaccurate result.
Whether above-mentioned ghost effect can occur,, can avoid the situation of above erroneous judgement to take place through the retrofit testing method though depend on the self structure of high-pressure MOS component and the design of electrical parameter.
As shown in Figure 3, the invention provides a kind of method of testing of high-pressure MOS component, concrete, this method of testing is applied to the high-pressure MOS component of each chip on the semiconductor crystal wafer is carried out functional test, and said method of testing comprises the steps:
S101, on semiconductor crystal wafer optional plurality of chips, test its high-pressure MOS component;
Said as background technology, semiconductor die size is bigger now, and top core number is numerous.It is unrealistic doing the circuit function test one by one.Usually 5 to 10 chips of picked at random are tested therein.
It is pointed out that owing to the semiconductor structure of each chip on the same block semiconductor wafer is all identical, so its high-pressure MOS component of test described here, what should be directed against is the same function on the different chips, the high-pressure MOS component of structure.Rather than the high-pressure MOS component of difference in functionality, structure tested, otherwise just lost the usefulness of comparison or functional test.
S102, with a utmost point ground connection of the high-pressure MOS component of said each chip, another utmost point and grid connect test lead;
The function identical with prior art, that this high-pressure MOS component is just tested in the called function test.Therefore the simplest way is exactly, and makes it be operated in the linear amplification district, between leak in the source, applies voltage, the test source leakage current.According to the flow direction of electric current, nmos device and PMOS device to connect method different.Be directed to nmos device, usually its grid be connected test lead with drain electrode, and apply positive test voltage, and with its grounded drain.The PMOS device to connect method opposite.Above circuit is connected to those skilled in the art's known technology, repeats no more here.
When the test voltage that applies is greater than threshold voltage in grid and the drain electrode, just can between source-drain electrode, produce electric current; Further, when this test voltage satisfied the saturation voltage less than the MOS device simultaneously, this MOS device worked in the linear amplification district, and said electric current increases along with the increase of test voltage.If high-pressure MOS component is operate as normal in said linear amplification district; So fixing test voltage should be with respect to fixing source-drain current; Usually according to the size of source-drain current, just can judge whether this high-pressure MOS component is normal, if too less than normal then can judge its inefficacy.And situation bigger than normal only if short circuit has taken place between the source-drain electrode, otherwise is unlikely to take place, usually not in the scope of functional test.It below also is the way of existing method of testing.But for the present invention,, judge the size of source-drain current, be not sufficient to conclude whether high-pressure MOS component lost efficacy because the possibility of aforementioned mechanism only relies on fixing test voltage.The main contents of method of testing of the present invention are that follow-up three is rapid step by step.
S103, the test voltage that progressively raises and apply at said test lead, and measure the source-drain current of each high-pressure MOS component simultaneously;
S104, according to said test voltage and corresponding source-drain current, form the output characteristic curve of the high-pressure MOS component of each chip;
S105, judge according to said output characteristic curve whether said high-pressure MOS component lost efficacy.
Different with prior art, method of testing of the present invention is not to apply fixing test voltage at test lead.But adopted the mode of the test voltage that progressively raises, measure the wherein selected pairing source-drain current of test point simultaneously.
As possibility, the initial voltage of test voltage can also can be the threshold voltage of high-pressure MOS component for 0; Can adopt the mode of fixed amplitude progressively to increase progressively.Whenever be incremented to the magnitude of voltage of a test point, write down one time source-drain current, these RPs are linked up just form complete output characteristic curve.
Fig. 4 is the output characteristic curve figure of method of testing of the present invention, along with test voltage when 0 progressively raises, originally high-pressure MOS component is in cut-off region; Then along with test voltage gradually greater than threshold voltage, source-drain current size with grid voltage irrelevant and with source-drain voltage difference linear dependence, thereby get into the linear amplification district; No longer change after rising to certain value at last, thereby get into the saturation region with test voltage.If test voltage directly begins to raise from threshold voltage, then can skip above-mentioned cut-off region.This testing mechanism is that test voltage is less in the time of initial, and high-pressure MOS component is not in the saturation region certainly.As for specifically being positioned at cut-off region still is the linear amplification district, depends on the initial voltage magnitude of test voltage.Through the output characteristic curve of high-pressure MOS component is compared each other or selection standard with reference to than reciprocity mode, can judge whether operate as normal of this high-pressure MOS component easily.
Because test voltage progressively raises among the present invention, therefore can avoid the accumulation (for example can not produce high temperature, cause charge carrier thermal effect etc.) of some ghost effects, thereby, avoid the influence of ghost effect at the high pressure section because instantaneous knot electric field is excessive.Concrete, suppose to adopt existing method of testing, test voltage directly applies a higher voltage; Might be because the ghost effect that instantaneous knot electric field causes excessively by force between doped region and the substrate be leaked in the source; Make high-pressure MOS component get into the saturation region, source-drain current Ids is too small, thereby produces erroneous judgement; And adopt method of testing of the present invention, and test voltage is when 0 slowly rises to a higher voltage, and above-mentioned ghost effect can not take place, and still is in the linear amplification district, and source-drain current Ids can judge accurately whether this high-pressure MOS component lost efficacy according to this moment.
In addition, can judge whether operate as normal of high-pressure MOS component from following a plurality of methods according to the output characteristic curve that obtains.
As an optional embodiment; Owing to selected the high-pressure MOS component of the same functional structure of a plurality of chips to test on the semiconductor crystal wafer; Therefore can the output characteristic curve of the high-pressure MOS component of each chip be compared each other, wherein be judged to be ineffective part with other high-pressure MOS component output characteristic curves differ greatly.If be normally effectively, each bar output characteristic curve should be consistent (also is in allowed band even deviation is arranged).This decision method implements comparatively rapidly simple, is effectively but do not get rid of the few part of devices of existence, and the situation of most of component failure, so restricted application.
As another optional embodiment, can also look for a known normal effectively high-pressure MOS component in advance, adopt identical test voltage rising method, set up the output characteristic curve of standard; Then in follow-up test, thereby the output characteristic curve of the high-pressure MOS component of each test is relatively judged ineffective part with it.If differ greatly, judge that then this high-pressure MOS component lost efficacy.The much calculations of concrete difference were lost efficacy is according to device self parameter and to the requirement of product yield, and artificial the setting do not have common standards.
As another optional embodiment, set the critical value of the saturation region test voltage of said high-pressure MOS component.Suppose that in the process of the test voltage that progressively raises when said test voltage during less than said critical value, high-pressure MOS component just gets into the saturation region, then determines that it is ineffective part.
Fig. 5 provides the test comparison figure of method of testing of the present invention and existing method of testing.For the high-pressure MOS component of a certain specific function structure, on same semiconductor crystal wafer, select five chips, adopt method of testing of the present invention and existing method of testing to test respectively.At first adopt method of testing of the present invention; Test voltage slowly is increased to Vdd (present embodiment adopts the chip power supply voltage 3.8V of standard) from 0; The source-drain current of high-pressure MOS component that records five chips is more consistent; All about 4.27E+02 (2 powers of scientific notation 10) microampere, should judge to be effective product.Have method of testing now and adopt; Directly apply Vdd, record in the source-drain current of high-pressure MOS component of five chips, only have chip 2 and previous test result consistent at test lead; And the source-drain current of other chips is all less than normal; And differ greatly, if judge that with this other chips all lost efficacy, and had then formed erroneous judgement.
To sum up, high-pressure MOS component method of testing of the present invention can be avoided because the ghost effect in the high-pressure MOS component gets into the saturation region too early, causes the inaccurate problem of erroneous judgement test.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting claim; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.

Claims (7)

1. the method for testing of a high-pressure MOS component, whether the high-pressure MOS component that is used for each chip on the measuring semiconductor wafer lost efficacy, and it is characterized in that, comprising:
Optional plurality of chips is tested its high-pressure MOS component on semiconductor crystal wafer;
With a utmost point ground connection of the high-pressure MOS component of said each chip, another utmost point and grid connect test lead;
The test voltage that progressively raises and apply at said test lead, and measure the corresponding source-drain current of each high-pressure MOS component simultaneously; The initial value of said test voltage is less than the saturation voltage of said high-pressure MOS component;
According to said test voltage and corresponding source-drain current, form the output characteristic curve of the high-pressure MOS component of each chip;
Judge according to said output characteristic curve whether said high-pressure MOS component lost efficacy.
2. method of testing as claimed in claim 1 is characterized in that, adopts fixing amplitude to increase progressively the test voltage that puts on test lead.
3. method of testing as claimed in claim 2 is characterized in that said test voltage is started from scratch and increased progressively.
4. method of testing as claimed in claim 2 is characterized in that, said test voltage begins to increase progressively from the threshold voltage of said high-pressure MOS component.
5. method of testing as claimed in claim 1 is characterized in that, said judgement was lost efficacy and comprised: the output characteristic curve of the high-pressure MOS component of each chip is compared each other, thereby judge ineffective part.
6. method of testing as claimed in claim 1 is characterized in that, said judgement was lost efficacy and comprised: set up the standard output characteristic curve of high-pressure MOS component, thereby the output characteristic curve of the high-pressure MOS component of each test is relatively judged ineffective part with it.
7. method of testing as claimed in claim 1; It is characterized in that; Said judgement was lost efficacy and comprised: set the critical value of the saturation region test voltage of said high-pressure MOS component, the high-pressure MOS component that test voltage is just got into the saturation region less than said critical value the time is judged to be ineffective part.
CN2011102476875A 2011-08-26 2011-08-26 Method for testing high-voltage MOS device Pending CN102385029A (en)

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WO2014114180A1 (en) * 2013-01-23 2014-07-31 无锡华润上华科技有限公司 Test method and system for cut-in voltage
CN105137329A (en) * 2015-09-12 2015-12-09 上海华虹宏力半导体制造有限公司 Method and system for checking floating of grid of MOS field effect transistor in circuit
CN105895548A (en) * 2016-06-14 2016-08-24 西安邮电大学 Grid modulation generation current based method for extracting substrate doping concentration of metal-oxide-semiconductor field-effect transistor (MOSFET)
CN106124832A (en) * 2016-08-08 2016-11-16 武汉新芯集成电路制造有限公司 The method for measurement of a kind of components and parts saturation current and measurement system
CN107202946A (en) * 2017-05-22 2017-09-26 西安电子科技大学 The measuring method of CMOS inverter MOS threshold voltages
CN109596961A (en) * 2018-10-23 2019-04-09 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) The method for testing reliability of GaN device, device and system
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CN113567842A (en) * 2021-09-26 2021-10-29 成都嘉纳海威科技有限责任公司 Chip screening method based on gradient self-checking
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CN102680819A (en) * 2012-04-28 2012-09-19 中国科学院电工研究所 Accelerated life test circuit and test method of power electronic device
US9696371B2 (en) 2013-01-23 2017-07-04 Csmc Technologies Fab2 Co., Ltd. Test method and system for cut-in voltage
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CN105137329A (en) * 2015-09-12 2015-12-09 上海华虹宏力半导体制造有限公司 Method and system for checking floating of grid of MOS field effect transistor in circuit
CN105137329B (en) * 2015-09-12 2018-07-20 上海华虹宏力半导体制造有限公司 The hanging method and system of metal-oxide-semiconductor field effect transistor grid in a kind of inspection circuit
CN105895548A (en) * 2016-06-14 2016-08-24 西安邮电大学 Grid modulation generation current based method for extracting substrate doping concentration of metal-oxide-semiconductor field-effect transistor (MOSFET)
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CN106124832A (en) * 2016-08-08 2016-11-16 武汉新芯集成电路制造有限公司 The method for measurement of a kind of components and parts saturation current and measurement system
CN106124832B (en) * 2016-08-08 2019-04-30 武汉新芯集成电路制造有限公司 A kind of method for measurement and measurement system of component saturation current
CN107202946A (en) * 2017-05-22 2017-09-26 西安电子科技大学 The measuring method of CMOS inverter MOS threshold voltages
CN107202946B (en) * 2017-05-22 2019-07-02 西安电子科技大学 The measurement method of CMOS inverter MOS threshold voltage
CN109596961A (en) * 2018-10-23 2019-04-09 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) The method for testing reliability of GaN device, device and system
CN109975682A (en) * 2019-04-11 2019-07-05 广东省半导体产业技术研究院 A kind of device lifetime test platform and system
CN110504184A (en) * 2019-08-27 2019-11-26 上海华力集成电路制造有限公司 Aoxidize layer defects phenomenon risk assessment feeler switch and the test method using it
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