CN102208383B - Circuit board and formation method thereof - Google Patents
Circuit board and formation method thereof Download PDFInfo
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- CN102208383B CN102208383B CN 201010158418 CN201010158418A CN102208383B CN 102208383 B CN102208383 B CN 102208383B CN 201010158418 CN201010158418 CN 201010158418 CN 201010158418 A CN201010158418 A CN 201010158418A CN 102208383 B CN102208383 B CN 102208383B
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- contiguous block
- circuit board
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- conducting strip
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Abstract
The invention provides a circuit board and a formation method thereof. The circuit board comprises: a substrate; at least one conductive pad which is arranged on the substrate; a protection layer which is arranged on the substrate and possesses at least one opening to at least expose parts of the conductive pad; a conductive connecting block which is filling in the opening and is electrically connected to the conductive pad; a pictured conductive metal layer which is arranged on the conductive connecting block and is electrically contacted with the conductive connecting block. Wherein, the pictured conductive metal layer is completely arranged on the opening of the protection layer. The circuit board is provided with conductive convex blocks with fine spacing and precisely controllable volumes. The conductive convex blocks can be integrated with chips which possess high wiring density and small volume.
Description
Technical field
The present invention relates to a kind of circuit board and forming method thereof, relate in particular to a kind of circuit board with conductive projection.
Background technology
Along with electronic product continue towards light, thin, short, little, at a high speed, high frequency, and multi-functional direction develop, make the volume of chip dwindle thereupon, and the I/O number increases thereupon, it causes wire structures more intensive, and the quantity of the welding conductive structure of chip is increased respectively and shortening with to each other spacing, the integration difficulty between chip and the circuit board is improved.
In addition, in known technology, the method that forms the welding conductive structure on circuit board is with scraper tin cream to be clamp-oned in the open loop of steel plate, and carries out reflow and form spherical conductive structure with green the painting in substrate.Yet, being subject to steel plate open loop restriction, spherical conductive structure spacing to each other is difficult for dwindling, and easily causes down the problem of tin amount shakiness because of green lacquer surface irregularity.If the tin amount too much easily causes tin bridge phenomenon down, cross and to cause the tin sphere volume too small at least.In other words, known welding conductive structure is except spacing to each other is excessive, and its volume accuracy is also wayward, and same flatness is relatively poor, is difficult to significantly promote with wiring density and the chip of volume-diminished is integrated.
Therefore, industry is badly in need of novel circuit board and forming method thereof, in the hope of solving or alleviate the problems referred to above.
Summary of the invention
In order to solve prior art problems, one embodiment of the invention provides a kind of circuit board, comprising: a substrate; At least one conductive pad is positioned on this substrate; One protective layer is positioned on this substrate, and this protective layer has at least one opening, at least this conductive pad of exposed portions serve; One conduction contiguous block is filled among this opening, and electrically connects this conductive pad; And a pattern conductive metal level, be positioned on this conduction contiguous block, and electrically contact with this conduction contiguous block, wherein this pattern conductive metal level is positioned on this opening of this protective layer fully.
One embodiment of the invention provides a kind of formation method of circuit board, comprising: a substrate is provided, has at least one conductive pad, expose in the surface of this substrate; Form a patterning protective layer on this substrate and this conductive pad, this patterning protective layer has at least one opening, at least this conductive pad of exposed portions serve; Insert a conduction contiguous block in this opening, this conduction contiguous block electrically connects this conductive pad; One conducting strip is engaged on this conduction contiguous block; And this conducting strip is patterned as a pattern conductive metal level, this pattern conductive metal level electrically contacts with this conduction contiguous block, and is positioned at fully on this opening of this protective layer.
Circuit board of the present invention has the precisely conductive projection of control of fine pitch and the big I of volume, can smoothly and wiring density significantly promotes and the integration of the chip of volume-diminished.
For allow above-mentioned purpose of the present invention, feature, and advantage can become apparent, below cooperate appended accompanying drawing, be described in detail below:
Description of drawings
Figure 1A-Fig. 1 G shows the process section according to the circuit board of the embodiment of the invention.
Wherein, description of reference numerals is as follows:
100～substrate;
102～conductive pad;
103,116～surface-treated layer;
104～protective layer;
104a～surface;
105～opening;
106～barrier layer;
108～conduction contiguous block;
109～joint interface;
110～conducting strip;
110a～pattern conductive metal level;
112～pressing fixture;
114～cover layer;
118～soldered ball.
Embodiment
Below describe the present invention in detail with embodiment and conjunction with figs., will be appreciated that following narration provides many different embodiment or example, of the present invention multi-form in order to implement.The specific element of the following stated and arrangement mode are to the greatest extent simple description of the present invention.Certainly, these are only in order to give an example but not restriction of the present invention.In addition, in different embodiment, may use mark or the sign of repetition.These only repeat to have any relevance in order simply clearly to narrate the present invention, not necessarily represent between the different embodiment that discuss and/or the structure.In addition, when address that one first material layer is positioned on one second material layer or on the time, comprise that first material layer directly contacts with second material layer or be separated with the situation of one or more other materials layers.And in the accompanying drawings, the shape of embodiment or thickness can enlarge, to simplify or convenient the sign.In addition, the not shown or element described is the form known to those of ordinary skills.
Figure 1A-Fig. 1 G shows the process section according to the circuit board of the embodiment of the invention.Shown in Figure 1A, substrate 100 is provided, it has at least one conductive pad 102, exposes in the surface of substrate 100.Though in Figure 1A illustrated embodiment, conductive pad 102 protrudes from the surface of substrate 100, the right embodiment of the invention is not limited thereto.In other embodiments, conductive pad 102 may be embedded among the substrate 100.Substrate 100 is a printed circuit board (PCB) for example, has many internal wiring structures that electrically connect with conductive pad 102.The internal wiring structure example is multiple layer metal layer structure in this way, and is known by those of ordinary skills, and multiple variation can be arranged, and do not draw in accompanying drawing for simplifying accompanying drawing.
Then, as shown in Figure 1B, on substrate 100 and conductive pad 102, form patterning protective layer 104.Patterning protective layer 104 has at least one opening 105, at least the conductive pad 102 of exposed portions serve.Protective layer 104 for example is welding resisting layer, and its material for example is (but being not limited to) anti-weldering insulating barrier (SR), AjinomotoBuild-up Film (ABF), polyimides (PI) or aforesaid combination.In one embodiment, can be prior to being coated with protective layer on the substrate 100, and form the opening 105 that exposes conductive pad 102 by Patternized technique (for example being exposure and developing process).
As shown in Figure 1B, in one embodiment, form surface-treated layer 103 on the surface of the alternative conductive pad 102 that in opening 105, exposes.The material of surface-treated layer 103 can for example include, but is not limited to tin, nickel, gold, palladium, silver or aforesaid alloy or combination.Surface-treated layer 103 for example can protect the conductive pad 102 under it to avoid polluting or oxidation, and can be conducive to engaging between follow-up electric conducting material and the conductive pad 102 that will insert in the opening 105.
Shown in Fig. 1 C, then in opening 105, insert conduction contiguous block 108.In one embodiment, can be prior to forming barrier layer 106 on the protective layer 104.Barrier layer 106 only makes opening 105 expose in order to the upper surface that blocks protective layer 104.Barrier layer 106 for example can be overcovers such as template or dry film.In one embodiment, be to be the barrier layer with the photosensitive dry film of tool, and see through photoetching process and opening 105 is exposed its patterning.
Then, will conduct electricity contiguous block 108 inserts in the opening 105.For example, can utilize scraper that conductive paste (as tin cream) is scraped in the opening 105 to form conduction contiguous block 108.At this moment, barrier layer 106 can avoid conductive paste to coat on opening 105 zone in addition.After forming conduction contiguous block 108, removable barrier layer 106.Perhaps, also can adopt and plant the mode that ball inserts and in opening 105, form conduction contiguous block 108.In one embodiment, conduction contiguous block 108 directly contacts with protective layer 104.That is, do not have the other materials layer between the sidewall of the opening 105 in conduction contiguous block 108 and the protective layer 104.
In addition, in one embodiment, on the whole conduction contiguous block 108 fills up opening 105 fully.In another embodiment, conduction contiguous block 108 is projection slightly, for example within protruding about 5 μ m.That is, the upper surface of conduction contiguous block 108 is positioned on the upper surface 104a of protective layer 104.The material of conduction contiguous block 108 also can be other electric conducting materials except can be tin, for example be copper, tin, silver, nickel, chromium, tungsten, aluminium, gold or aforesaid alloy or combination.
Then, shown in Fig. 1 D, conducting strip 110 is engaged on the conduction contiguous block 108.For example, can use pressing fixture 112 that conducting strip 110 is positioned on the conduction contiguous block 108, and conducting strip 110 is exerted pressure so that conducting strip 110 is engaged with each other with conduction contiguous block 108.In one embodiment, can when being exerted pressure, conducting strip 110 heat to promote it to engage conducting strip 110 with conduction contiguous block 108 simultaneously.In one embodiment, be that conducting strip 110 and conduction contiguous block 108 are heated between about 180 ℃ to about 260 ℃.Yet those of ordinary skills are when understanding, and above-mentioned specific range of temperatures is not in order to limit the execution mode of the embodiment of the invention only for illustrating usefulness.In other embodiments, may adopt different heating-up temperatures because conducting strip 110 is different with the conduction material of contiguous block 108 and/or institute's applied pressure.Conducting strip 110 will produce joint interface 109 between the two after being engaged with each other with conduction contiguous block 108.In one embodiment, joint interface 109 (or upper surface of conduction contiguous block 108) on the whole flushes with the upper surface 104a of protective layer 104, for example shown in the embodiment of Fig. 1 E.Yet it should be noted that the execution mode of the embodiment of the invention is not limited thereto, in another embodiment, conduction contiguous block 108 is after hot pressing technique, and still the possibility dimpling is for the upper surface 104a of protective layer 104.In this case, joint interface 109 is positioned on the upper surface 104a of protective layer 104.In addition, the thickness of conducting strip 110 will influence the height of formed conductive projection, and therefore visual demand is selected the conducting strip 110 that is fit to thickness for use, and its thickness for example can be between (but being not limited to) about 1 μ m between about 100 μ m.
The material of conducting strip 110 for example includes, but is not limited to copper, tin, silver, nickel, aluminium, tungsten or aforesaid alloy or combination.In one embodiment, conducting strip 110 differs from one another with the material of conduction contiguous block 108.For example, the material of conducting strip 110 is copper, and the material of conduction contiguous block 108 is tin.After conducting strip 110 and conduction contiguous block 108 are engaged with each other, may produce signal bronze in joint interface 109 places.In another embodiment, conducting strip 110 is mutually the same with the material of conduction contiguous block 108, for example can be tin or be all copper.In this case, still may between conducting strip 110 and conduction contiguous block 108, observe joint interface 109.For example, can utilize electron microscope observation.
Then, conducting strip 110 is patterned as a pattern conductive metal level.Shown in Fig. 1 E, in one embodiment, can on conducting strip 110, form cover layer 114.Cover layer 114 for example is the photoresist layer.The shape of cover layer 114, size, and the visual demand that distributes freely adjust.In this embodiment, the part that conducting strip 110 lining cap rocks 114 cover will keep, and the part that the cap rock 114 that is not covered covers will remove to form pattern conductive metal level (the pattern conductive metal level 110a shown in Fig. 1 F).In one embodiment, conducting strip 110 that cap rock 114 covers removes can to adopt etched mode not to be covered.
Shown in Fig. 1 F, via above-mentioned technology, on conduction contiguous block 108, formed the pattern conductive metal level 110a that electrically contacts with it, and pattern conductive metal level 110a is positioned at fully on the opening 105 of protective layer 104.That is, pattern conductive metal level 110a is not positioned among the opening 105 fully.Owing to pattern conductive metal level 110a can photoetching and etch process form, thereby the size of pattern conductive metal level 110a, shape, and distribute and all can control more subtly.In addition, owing to be not involved in steel plate is not set on the protective layer in the forming process of pattern conductive metal level 110a, so the volume size of pattern conductive metal level 110a can control more accurately, and is not protected the layer more irregular influence in 104 surfaces.
In addition, in one embodiment, alternative going up in pattern conductive metal level 110a forms surface-treated layer 116.The material of surface-treated layer 116 can for example include, but is not limited to tin, nickel, gold, palladium, silver or aforesaid alloy or combination.Surface-treated layer 116 for example can protect the pattern conductive metal level 110a under it to avoid polluting or oxidation, and can be conducive to pattern conductive metal level 110a and engage with other conductive members.In one embodiment, the surface of surface-treated layer 116 complete overlay pattern conductive metal layer 110a.
In one embodiment, the board structure of circuit shown in Fig. 1 F can be integrated with chip.For example, can will be combined in the soldered ball of pattern conductive metal level 110a and 116 common conductive projections insertion chips of forming of surface-treated layer or with the conductive pole of chip, and chip is arranged on the circuit board.Perhaps, in another embodiment, also can further on pattern conductive metal level 110a, soldered ball be set.
Shown in Fig. 1 G, in one embodiment, alternative arranges soldered ball 118 on pattern conductive metal level 110a.Owing to be pre-formed conductive structures such as conduction contiguous block 108 and pattern conductive metal level 110a, therefore volume and the area occupied thereof of formed soldered ball 118 can be less, thereby can effectively shorten the spacing between soldered ball and the soldered ball.In addition, the height of soldered ball 118 also can more effectively be controlled, and helps to promote the coplanarity with the conductive projection of die terminals.In one embodiment, the board structure of circuit shown in Fig. 1 G can be integrated with chip.For example, can use soldered ball 118 and engage (that is Flip-Chip Using) with soldered ball on the chip.Perhaps, can be formed with metal column or conductive pole on the chip, and the metal column on the chip or conductive pole can be inserted among the soldered ball 118 of circuit board, and chip is arranged on the circuit board.
The circuit board of the embodiment of the invention has the precisely conductive projection of control of the big I of fine pitch and volume, can smoothly and wiring density significantly promotes and the integration of the chip of volume-diminished.
Though the present invention has disclosed preferred embodiment as above; so it is not in order to limit the present invention; any those of ordinary skills; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the scope that claim defines.
Claims (5)
1. the formation method of a circuit board comprises:
One substrate is provided, has at least one conductive pad, expose in the surface of this substrate;
Form a patterning protective layer on this substrate and this conductive pad, this patterning protective layer has at least one opening, at least this conductive pad of exposed portions serve;
Form a barrier layer on this substrate, this barrier layer is blocked the upper surface of this protective layer and this at least one opening is exposed;
After forming this barrier layer, in this opening, insert a conductive paste to form a conduction contiguous block, this conduction contiguous block electrically connects this conductive pad;
After forming this conduction contiguous block, remove this barrier layer;
One conducting strip is engaged on this conduction contiguous block;
This conducting strip is patterned as a pattern conductive metal level, this pattern conductive metal level electrically contacts with this conduction contiguous block, and be positioned at fully on this opening of this protective layer, wherein the material of this conduction contiguous block is different from the material of this pattern conductive metal level; And
On this pattern conductive metal level, form a surface-treated layer.
2. the formation method of circuit board as claimed in claim 1 wherein is somebody's turn to do the upper surface of conduction contiguous block and this upper surface flush of this protective layer.
3. the formation method of circuit board as claimed in claim 1, wherein the step that this conducting strip is engaged on this conduction contiguous block comprises:
This conducting strip is positioned on this conduction contiguous block; And
This conducting strip is exerted pressure so that this conducting strip and this conduction contiguous block are engaged with each other.
4. the formation method of circuit board as claimed in claim 3 also is included in when this conducting strip exerted pressure, and this conducting strip and this conduction contiguous block are heated to a temperature.
5. the formation method of circuit board as claimed in claim 4, wherein this temperature is between 180 ℃ to 260 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010158418 CN102208383B (en) | 2010-03-31 | 2010-03-31 | Circuit board and formation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010158418 CN102208383B (en) | 2010-03-31 | 2010-03-31 | Circuit board and formation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102208383A CN102208383A (en) | 2011-10-05 |
| CN102208383B true CN102208383B (en) | 2013-08-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201010158418 Active CN102208383B (en) | 2010-03-31 | 2010-03-31 | Circuit board and formation method thereof |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001063991A1 (en) * | 2000-02-25 | 2001-08-30 | Ibiden Co., Ltd. | Multilayer printed wiring board and method for producing multilayer printed wiring board |
| CN1980530A (en) * | 2005-11-30 | 2007-06-13 | 全懋精密科技股份有限公司 | Method for making circuit-board conductive lug structure |
-
2010
- 2010-03-31 CN CN 201010158418 patent/CN102208383B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001063991A1 (en) * | 2000-02-25 | 2001-08-30 | Ibiden Co., Ltd. | Multilayer printed wiring board and method for producing multilayer printed wiring board |
| CN1980530A (en) * | 2005-11-30 | 2007-06-13 | 全懋精密科技股份有限公司 | Method for making circuit-board conductive lug structure |
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| Publication number | Publication date |
|---|---|
| CN102208383A (en) | 2011-10-05 |
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