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CN102116986A - Electronic paper display device and manufacturing method thereof - Google Patents

Electronic paper display device and manufacturing method thereof Download PDF

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Publication number
CN102116986A
CN102116986A CN2009102480746A CN200910248074A CN102116986A CN 102116986 A CN102116986 A CN 102116986A CN 2009102480746 A CN2009102480746 A CN 2009102480746A CN 200910248074 A CN200910248074 A CN 200910248074A CN 102116986 A CN102116986 A CN 102116986A
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layer
metal
gate
electrode layer
data line
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CN102116986B (en
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吴勇
马骏
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Shanghai Tianma Microelectronics Co Ltd
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Shanghai Tianma Microelectronics Co Ltd
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Abstract

The invention provides an electronic paper display device and a manufacturing method thereof, wherein the display device comprises: a glass substrate; data lines, gate lines and thin film transistors formed on the glass substrate; the thin film transistor comprises a source electrode metal layer, a drain electrode metal layer, a silicon island, a gate dielectric layer and a grid electrode metal layer, wherein the silicon island is connected with the source electrode metal layer and the drain electrode metal layer and provides a conductive channel; the data line is connected with the drain electrode metal layer, and the gate line is connected with the gate electrode metal layer; a pixel electrode layer on the thin film transistor; the electronic paper film layer is positioned on the pixel electrode layer; on the vertical interface, a common electrode layer is arranged between the pixel electrode layer and the source metal layer at intervals, and the pixel electrode layer is electrically connected with the source metal layer. The invention has the characteristics of simple structure, easy manufacture, lower cost and better display effect.

Description

Display device of electronic paper and manufacture method thereof
Technical field
The present invention relates to electrophoretic display apparatus and make the field, relate in particular to a kind of electrophoretic display apparatus and manufacture method thereof that is used for Electronic Paper (E-Paper).
Background technology
Electronic paper technology is that a kind of sensitive paper of can realizing is equally read comfortable, ultra-thin light, flexible display technique.And Electronic Paper (E-Paper) promptly is a kind of electronic console of similar paper, it has the advantage of traditional paper concurrently, the visual perception is almost completely identical with paper, can refresh displaying contents as the continuous conversion of traditional LCD again, and than the power saving more of traditional LCD.Therefore Electronic Paper has the application prospect of alternative traditionally on paper books.
Fig. 1 is the basic display principles figure of Electronic Paper, and wherein E-paper thin film layer 1 comprises: upper substrate 2 and infrabasal plate 4 and be filled in upper substrate 2 and infrabasal plate 4 between electrophoresis liquid 3, have many charged particles in the described electrophoresis liquid 3.Can control described charged particle by the voltage between change upper substrate 2 and the infrabasal plate 4 and in electrophoresis liquid 3, move, and reach the fixed position.Charged particle near upper substrate 2 can reflect the light of incident, and the no show still of the incident ray of remainder is just absorbed by electrophoresis liquid 3 away from the charged particle of upper substrate 2, thereby therefore visually can present different GTG display images.
Suppose that charged particle is a positive charge, when driving Electronic Paper, general elder generation applies negative voltage between upper substrate 2 and infrabasal plate 4 makes the position of charged particle in electrophoresis liquid 3 make zero, and promptly generally is attached near the infrabasal plate 4.The light of incident this moment will be absorbed by electrophoresis liquid 3, from visually presenting an initial black picture.Afterwards, between upper and lower base plate, apply the positive voltage of distinct pulse widths according to the size of GTG, make charged particle under electric field driven, move to upper substrate 2 for each pixel.According to traveling time length difference, make charged particle in electrophoresis liquid 3, also have nothing in common with each other with respect to the position of upper substrate 2, the electrophoresis liquid 3 that incident ray sees through different depth exposes to charged particle, reflect the light of different light intensity, thereby the pixel that forms different GTGs shows, forms image frame.
Because electrophoresis liquid 3 is comparatively dense, the coefficient of viscosity is big, the mobile needs bigger extra electric field of charged particle in electrophoresis liquid 3, therefore keep the stage at picture image, the upper substrate 2 of E-paper thin film layer 1 and the electromotive force position between the infrabasal plate 4 level off to equal, can make charged particle holding position in electrophoresis liquid 3, show tableaux, visually give soft papery sense thereby can be further implemented under the situation of low energy consumption.
(be generally 200ms~500ms) and when refreshing the image of change Electronic Paper,, need bigger driving voltage (being generally 15v) and long response time for the charged particle in the electrophoresis liquid 3 that drives thickness.Fig. 2 is the structural representation of existing display device of electronic paper, in conjunction with Fig. 2 and shown in Figure 1, the method that existing active driving Electronic Paper is adopted is: 10 pairs of Electronic Paper of gate line that the driving voltage by certain frequency (being generally 50Hz) puts on each pixel scan, according to the pairing voltage pulsewidth of the different GTGs of each pixel, on the data line 5 of each pixel, import display voltage, thereby the pressing time of controlling each pixel to be showing different GTGs, and then produces image.Change tableaux after image shows over to and keep the stage when finishing, only need gate line 10 and the lower common electric voltage of data line 5 inputs, can either keep the static of charged particle in the e-book thin layer 1 to each pixel.Above-mentioned each driving voltage all will put on infrabasal plate 4 one examples of E-paper thin film layer 1 by display base plate, and upper substrate 2 one sides are kept constant low potential all the time, for example direct ground connection etc.
Mobilely make that the GTG of pixel changes on the Electronic Paper and change display image owing to what the change in voltage on above-mentioned data line 5 or the gate line 10 all may cause charged particle, therefore the side near E-paper thin film layer 1 need form indium tin oxide layer (ITO) 6 on the described display base plate, GTG by each pixel on the described indium tin oxide layer 6 control Electronic Paper this means that there are overlapping in data line 5 or gate line 10 with indium tin oxide layer 6 on the vertical interface of display base plate.Because gate line 10 only plays the selection effect that drives to each pixel, and may there be coupling capacitance in the overlapping of data line 5 and indium tin oxide layer 6 part, therefore the change in voltage on the data line can cause that thereby the coupling that shows current potential influences display effect, therefore in the prior art, also need between data line 5 and indium tin oxide layer 6, overlay one deck organic film 7 to reduce the influence of described coupling capacitance.Owing to the leakage current characteristic of E-paper thin film layer 1 and slower response speed, therefore for traditional LCD, display device of electronic paper need not to consider the influence of aperture opening ratio simultaneously, generally all adopts maximum memory capacitance design with stable potential.
Because the existence of above-mentioned organic film 7, the formation technology of existing display device of electronic paper are comparatively complicated, the coating of organic film 7, exposure and etching all can cause the decline of yield and the rising of production cost.
Summary of the invention
Technical matters solved by the invention is, a kind of display device of electronic paper and manufacture method thereof are provided, and has more simple board structure than prior art, and makes simple, with low cost.
A kind of display device of electronic paper provided by the present invention comprises:
Glass substrate; Be formed at data line, gate line and thin film transistor (TFT) on the glass substrate; Described thin film transistor (TFT) comprises that source metal, drain metal layer, connection source metal and drain metal layer provide silicon island, gate dielectric layer and the gate metal layer of conducting channel; Described data line is connected with drain metal layer, and gate line is connected with gate metal layer; Be positioned at the pixel electrode layer on the thin film transistor (TFT); Be positioned at the E-paper thin film layer on the pixel electrode layer; Wherein on vertical interface, be separated with common electrode layer between going back between described pixel electrode layer and data line and the source metal, and pixel electrode layer is electrically connected with source metal.
Optionally, described thin film transistor (TFT) is a top gate structure.
Optionally, described silicon island connects source metal and drain metal layer, and the surface of cover part drain metal layer or data line, makes on the vertical interface silicon island with drain metal layer and grid separately.
Optionally, described silicon island connects source metal and drain metal layer, and is positioned between the two.
Optionally, described thin film transistor (TFT) is a bottom grating structure.
Optionally, the material of described silicon island is an amorphous silicon.
Optionally, the material of described source metal, drain metal layer and data line is a kind of or combination in copper, tungsten, aluminium, the tantalum.
Optionally, described data line and drain metal layer are same metal level.Described gate line and gate metal layer are same metal level.Described common electrode layer and gate line are positioned at on one deck metal, and etching forms.The material of described gate line and common electrode layer is a kind of or combination in copper, tungsten, aluminium, the tantalum.
Optionally, described gate dielectric layer extends between common electrode layer and the source metal.The material of described gate dielectric layer is silicon nitride or silicon dioxide.
The material and the gate dielectric layer that also are formed with the described passivation layer of passivation layer between described pixel electrode layer and gate line and the common electrode layer are identical.
Described display device of electronic paper also comprises and runs through passivation layer, gate dielectric layer, and the through hole that does not overlap with common electrode layer, and pixel electrode layer is electrically connected by described through hole with source metal.
Optionally, described pixel electrode layer is an indium tin oxide layer, and described indium tin oxide layer maximization is covered in passivation layer surface.
Described E-paper thin film layer comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer.
The invention provides a kind of formation method of display device of electronic paper, comprise the steps:
Glass substrate is provided; Surface deposition metal and etching at glass substrate form source metal, drain metal layer and data line, and described data line is connected with drain metal layer; Surface deposition silicon and etching at described source metal, drain metal layer and data line form the silicon island, and described silicon island connects the surface of source metal and drain metal layer and cover part drain metal layer or data line; In described silicon island, source metal, drain metal layer and data line surface form gate dielectric layer; Form gate metal layer, gate line and common electrode layer at described gate dielectric layer surface deposition metal and etching, described gate metal layer covers the silicon island, described common electrode layer cover data line and source metal, and described gate line is connected with gate metal layer; Surface in described gate metal layer, gate line and common electrode layer forms passivation layer; At the surf zone of passivation layer, form pixel electrode layer, described pixel electrode layer is electrically connected with source metal; Surface at pixel electrode layer forms the E-paper thin film layer.
Optionally, also comprise after forming described passivation layer: run through passivation layer, gate dielectric layer formation through hole, source metal is exposed in the bottom of described through hole, and through hole does not overlap mutually with common electrode layer.
Optionally, described pixel electrode layer is an indium tin oxide layer, and the maximization of described indium tin oxide layer is covered in passivation layer surface, and is filled in the described through hole during film forming, thereby is electrically connected with source metal.
Optionally, described surface deposition metal concrete grammar at glass substrate is a sputtering technology.Described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.
Optionally, described data line and drain metal layer are same metal level.Optionally, the material of described silicon island is an amorphous silicon.The material of described gate dielectric layer is silicon nitride or silicon dioxide, forms by chemical vapor deposition method.
Optionally, described is sputtering technology at gate dielectric layer surface deposition metal concrete grammar.Described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.Described gate line and gate metal layer are same metal level.
Optionally, the material of described passivation layer is identical with gate dielectric layer.
Described E-paper thin film layer fits in the pixel electrode laminar surface, comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer.
The present invention also provides the formation method of another kind of display device of electronic paper, comprises the steps:
Glass substrate is provided; Surface deposition silicon and etching at glass substrate form the silicon island; Surface deposition metal and etching at described silicon island and glass substrate form source metal, drain metal layer and data line, described data line is connected with drain metal layer, and described source metal and drain metal layer are positioned at the both sides, silicon island and connect by the silicon island; In described silicon island, source metal, drain metal layer and data line surface form gate dielectric layer; Form gate metal, gate line and common electrode layer at described gate dielectric layer surface deposition metal and etching, described gate metal layer covers the silicon island, described common electrode layer cover data line and source metal, and described gate line is connected with gate metal layer; Surface in described gate metal layer, gate line and common electrode layer forms passivation layer; At the surf zone of passivation layer, form pixel electrode layer, described pixel electrode layer is electrically connected with source metal; Surface at pixel electrode layer forms the E-paper thin film layer.
Optionally, also comprise after forming described passivation layer: run through passivation layer, gate dielectric layer formation through hole, source metal is exposed in the bottom of described through hole, and through hole does not overlap with common electrode layer.Described pixel electrode layer is an indium tin oxide layer, and the maximization of described indium tin oxide layer is covered in passivation layer surface, and is filled in the described through hole during film forming, thereby is electrically connected with source metal.
Optionally, described surface deposition metal concrete grammar at glass substrate is a sputtering technology.Described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.Described data line and drain metal layer are same metal level.
Optionally, the material of described silicon island is an amorphous silicon.The material of described gate dielectric layer is silicon nitride or silicon dioxide, forms by chemical vapor deposition method.
Optionally, described is sputtering technology at gate dielectric layer surface deposition metal concrete grammar.Described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.Described gate line and gate metal layer are same metal level.The material of described passivation layer is identical with gate dielectric layer.
Described E-paper thin film layer fits in the pixel electrode laminar surface, comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer
The present invention compared with prior art, adopt the method that common electrode layer is blocked data line to make the alternating voltage on the data line not influence to the demonstration current potential on the pixel electrode layer especially indium tin oxide layer, and need not to make organic film, and simplify board structure and formed technology, reduce cost.Further, the design by indium tin oxide layer cover data line makes the motion of bead in the E-paper thin film on the data line also be subjected to the control of pixel current potential, can not have influence on the motion of bead in the film because of the change in voltage on the data line.And indium tin oxide layer, common electrode layer, source metal form sandwich structure, and the area that utilizes of maximal efficiency forms memory capacitance, can obtain better display effect by the steady display current potential.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose of the present invention, feature and advantage will be more clear.Parts same as the prior art have used identical Reference numeral in the accompanying drawing.Accompanying drawing and not drawn on scale focus on illustrating purport of the present invention.In the accompanying drawings for clarity sake, amplified the size in layer and zone.
Fig. 1 is the basic display principles figure of electronic paper technology;
Fig. 2 is the structural representation of existing display device of electronic paper;
Fig. 3 is that display device of electronic paper of the present invention forms method flow diagram;
Fig. 4 to Figure 13 is that display device of electronic paper first embodiment of the present invention forms synoptic diagram;
Figure 14 is the display device of electronic paper first example structure vertical view of the present invention;
Figure 15 is that the another kind of display device of electronic paper of the present invention forms method flow diagram;
Figure 16 to Figure 20 is that display device of electronic paper second embodiment of the present invention forms synoptic diagram.
Embodiment
By background technology as can be known, in the display device of electronic paper of prior art, the current potential of thin film transistor (TFT) control pixel electrode layer (being generally indium tin oxide layer) is further controlled the motion of charged particle in the E-paper thin film layer and is shown that different GTGs form the purpose of figures.Existing stray capacitance can make the alternating voltage influence on the data line show current potential between data line and the pixel electrode layer, needs between increase organic film to reduce stray capacitance and reduces the influence of crosstalking for showing.The present invention is then by making the method for common electrode layer and ground connection between data line and indium tin oxide layer, the alternating voltage that shields above-mentioned data line is for the influence that shows current potential, thereby saved the operation that forms organic membrane, simplify board structure and forming method thereof, can improve yield and reduce cost.
Below in conjunction with Figure of description, the specific embodiment of the invention is done further introduction.
Fig. 3 is that a kind of display device of electronic paper of the present invention forms method flow diagram, and concrete steps comprise:
Step S10, provide glass substrate.
Step S11, form source metal, drain metal layer and data line at the surface deposition metal of glass substrate and etching, described data line is connected with drain metal layer.
Wherein as possibility, described data line and drain metal layer can be isolated with source metal for same layer metal.
Step S12, form the silicon island at the surface deposition silicon of described source metal, drain metal layer and data line and etching, described silicon island connects the surface of source metal and drain metal layer and cover part drain metal layer or data line;
Wherein, the silicon island is equivalent to provide between source metal and drain metal layer the formation thin film transistor (TFT) required raceway groove.
Step S13, in described silicon island, source metal, drain metal layer and data line surface form gate dielectric layer;
Wherein, gate dielectric layer not only covers provides surface, the silicon island of raceway groove, also will cover the effect that the layer insulation medium is played on source metal, drain metal layer and data line surface simultaneously.
Step S14, form gate metal layer, gate line and common electrode layer in described gate dielectric layer surface deposition metal and etching, described gate metal layer covers the silicon island, described common electrode layer cover data line and source metal, described gate line is connected with gate metal layer;
Wherein, because the silicon island is covered in the surface of part drain metal layer or data line, therefore help to weaken on vertical interface, what the overlapping part between above-mentioned double layer of metal and the gate line was produced crosstalks.
Step S15, form passivation layer on the surface of described gate line and data line;
Wherein, can adopt the material identical and form technology for simplifying the described passivation layer of technology with gate dielectric layer.
Step S16, run through passivation layer, gate dielectric layer and form through hole, the bottom of described through hole is exposed source metal and is not overlapped with common electrode layer;
Step S17, form pixel electrode layer in passivation layer surface, described pixel electrode layer is electrically connected with source metal by through hole;
Step S18, form the E-paper thin film layer on the surface of pixel electrode layer.
Wherein, described E-paper thin film layer comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer.
Below in conjunction with specific embodiment above-mentioned formation method is done further introduction.
Fig. 4 to Figure 13 is the formation synoptic diagram of display device of electronic paper first embodiment of the present invention.
As shown in Figure 4, provide glass substrate 100, described glass substrate 100 is as the supporting baseplate of whole display base plate; On described glass substrate 100, form the first metal layer 101.
Described the first metal layer 101 can form by methods such as chemical vapor deposition, sputters, and material can be metal such as copper, aluminium, tungsten, tantalum or its alloy, combination.In the present embodiment, the first metal layer 101 preferred sputtering technologies that adopt form.
As shown in Figure 5, the described the first metal layer 101 of etching forms data line 102, drain metal layer and source metal 103, and described drain metal layer is connected with data line 102.
As possibility, in the present embodiment data line 102 and drain metal layer are made as with one deck metal, can simplify the photoetching masterplate, in subsequent step, described drain metal layer all uses data line 102 to replace.Be separated by between source metal 103 and the data line 102 simultaneously and leave, spacing between the two is the channel width between source in the thin film transistor (TFT), the drain electrode, therefore can select as required and adjust.
As shown in Figure 6, at described source metal 103, data line 102 and the glass baseplate surface depositing silicon simple substance that exposes, and etched portions forms silicon island 104.Make described silicon island 104 connect source metal 103 and data line 102, and the surface of cover part source metal 103 and data line 102.
Because silicon island 104 is connected source metal 103 with data line 102, therefore being equivalent between provides the formation thin film transistor (TFT) required raceway groove.And the surface of silicon island 104 cover part source metal 103 and data line 102, therefore the surface elevation of silicon island 104 is a little more than source metal 103 and data line 102, because too high height will influence the formation of raceway groove between source metal 103 and the data line 102, therefore should select as required to adjust.In the present embodiment, the material of described silicon island 104 is selected for use and is amorphous silicon, satisfies the needs that form raceway groove on the one hand, has the effect of crosstalking of isolating on the other hand.
As shown in Figure 7, form gate dielectric layer 105 on the surface of described silicon island 104, source metal 103, data line 102.
The part on described gate dielectric layer 105 104 surfaces in the silicon island plays the gate medium effect of thin film transistor (TFT), and the effect that the part that is positioned at source metal 103 and data line 102 then plays the layer insulation medium can prevent the generation of leakage current.In the present embodiment, the material of described gate dielectric layer 105 can be chosen as insulating medium material commonly used such as silicon nitride, monox, and be positioned at the thickness of silicon island 104 surface portions, the silicon island, gate line control bottom 104 that will influence follow-up formation equally forms raceway groove, also should select as required to adjust.
As shown in Figure 8, at surface deposition second metal level 106 of described gate dielectric layer 105.Described second metal level 106 also can form by methods such as chemical vapor deposition, sputters, and material can be metal such as copper, aluminium, tungsten, tantalum or its alloy, combination.In the present embodiment, second metal level, the 106 preferred sputtering technologies that adopt form, and material is selected identical with the first metal layer 101.
As shown in Figure 9, described second metal level 106 of etching, form gate metal layer, gate line 107 and common electrode layer 108, make described gate metal layer cover silicon island 104, and common electrode layer 108 cover data lines 102, source metal 103, described gate line 107 is connected with gate metal layer.
As possibility, in the present embodiment gate line 107 and gate metal layer are made as with one deck metal equally, also can simplify the photoetching masterplate.Gate line 107 is positioned at the gate electrode of the part of silicon island 104, gate dielectric layer 105 surface coverage bottom as thin film transistor (TFT).
In said structure, gate line 107, silicon island 104, gate dielectric layer 105, source metal 103, data line 102 have constituted thin film transistor (TFT).And the part on 104 cover data lines, 102 surfaces, silicon island can play reduction data line 102 and gate line 107 and overlap mutually the effect of crosstalking between the part.
As shown in figure 10, at the surface deposition passivation layer 109 of described gate line 107 and common electrode layer 108.
As preferred version, in the present embodiment, described passivation layer 109 can adopt material and the formation method identical with gate dielectric layer 105, forms technology so that simplify.
As shown in figure 11, run through passivation layer 109 and gate dielectric layer 105 formation through holes 110, source metal 103 is exposed in the bottom of described through hole 110.Because being the pixel electrode layers (indium tin oxide layer) with follow-up formation, the effect of through hole 110 is electrically connected with source metal 103, therefore common electrode layer 108 should be avoided in the position of through hole 110, do not overlap with it, also will be in simultaneously in the pixel electrode layer coverage of follow-up formation.
As shown in figure 12, form pixel electrode layer 111 on the surface of described passivation layer 109.Described pixel electrode layer 111 is electrically connected with source metal 103 by through hole 110.
In the present embodiment, described pixel electrode layer 111 is an indium tin oxide layer, therefore when carrying out the indium tin oxide target film forming on passivation layer 109 surfaces by methods such as chemical vapor depositions, described indium tin oxide target material is filling vias 110, thereby makes pixel electrode layer 111 be electrically connected with source metal 103.
As shown in figure 13, at the surface of pixel electrode layer 111 applying E-paper thin film layer 112.Described E-paper thin film layer 112 comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer, among the figure and the concrete structure of not shown E-paper thin film layer 112.
Figure 14 is the schematic top plan view of above-mentioned display device of electronic paper, further specifies below in conjunction with Figure 14 and Figure 13.Because in the electronic paper technology, the pixel display area territory is the scope that gate line 107 and 102 of data lines can influence control, therefore on vertical interface, pixel electrode layer 111 is covering gate polar curve 107 and data line 102 simultaneously.Owing to the leakage current characteristic of Electronic Paper imaging technique and slower response speed, therefore need not to consider the problem of aperture opening ratio, in order to obtain big as far as possible memory capacitance, indium tin oxide target should be covered in passivation layer 109 surfaces substantially in the pixel electrodes layer 111.
From the diagram as can be known, pixel electrode layer 111, common electrode layer 108 and source metal 103 threes overlap on vertical interface and have constituted sandwich structure, form the memory capacitance of pixel, because the area coverage of pixel electrode layer 111 is bigger, having utilized the pixel display area territory as much as possible also is elemental area, therefore above-mentioned memory capacitance also has bigger electric capacity, helps to improve display quality.On the other hand, pixel electrode layer 111, common electrode layer 108 and data line 102 also overlap on vertical interface mutually, if with common electrode layer 108 ground connection, just can reduce alternating voltage on the data line 102 to the harmful effect of the demonstration current potential on the pixel electrode layer 111, play the shielding action that is equivalent to organic film in the prior art.
In addition by above-mentioned specific embodiment, the display device of electronic paper of the present invention that forms, in use, the motion of the interior charged particles of demonstration control of Electric potentials E-paper thin film layer 112 that gate line 107 also can be by influence pixel electrode layer 111 is with the display pixel GTG.And owing to the alternative frequency of voltage on the gate line 107 is exactly the charge frequency (i.e. frequency is selected in scanning) of pixel, the stray capacitance that is produced between gate line 107 and the pixel electrode layer 111 may make the demonstration current potential on the pixel electrode layer 111 be subjected to the capacitance partial pressure influence, therefore can utilize on data line 102, increase by one fixedly pressure reduction compensate this stray capacitance dividing potential drop, avoid influencing display effect.
In first embodiment, the thin film transistor (TFT) of display device of electronic paper adopts top gate structure, and wherein provides the silicon island of conducting channel also to cover the surface of part drain metal layer or data line, plays and reduces the effect of crosstalking.Except that above-mentioned top gate structure, thin film transistor (TFT) can also adopt traditional top gate structure, making provides the silicon island of conducting channel only to play the connection effect between drain metal layer and source metal, can further simplify processing step, thereby reduce production costs, promptly form the silicon island earlier, make source metal and drain metal layer again.Only be that with the foregoing description difference the silicon island no longer has and reduces gate line to the overlap cross talk effect of part of data line, it is bigger to be suitable for panel size, and described crosstalking such as can accept or ignore at service condition.
Therefore the present invention also provides another kind of display device of electronic paper manufacture method, its process flow diagram as shown in figure 14, basic step comprises:
Step S20, provide glass substrate.
Step S21, form the silicon island at the surface deposition silicon of glass substrate and etching.
Step S22, form source metal, drain metal layer and data line at the surface deposition metal of described silicon island and glass substrate and etching, described data line is connected with drain metal layer, and source metal and drain metal layer then connect by the silicon island;
Wherein, the silicon island is equivalent to provide between source metal and drain metal layer the formation thin film transistor (TFT) required raceway groove.
Step S23, in described silicon island, source metal, drain metal layer and data line surface form gate dielectric layer;
Wherein, gate dielectric layer not only covers provides surface, the silicon island of raceway groove, also will cover the effect that the layer insulation medium is played on source metal, drain metal layer and data line surface simultaneously.
Step S24, form gate metal layer, gate line and common electrode layer in described gate dielectric layer surface deposition metal and etching, described gate metal layer covers the silicon island, described common electrode layer cover data line and drain metal layer, described gate line is connected with gate metal layer;
Step S25, form passivation layer on the surface of described gate line and common electrode layer;
Wherein, can adopt the material identical and form technology for simplifying the described passivation layer of technology with gate dielectric layer.
Step S26, run through passivation layer, gate dielectric layer and form through hole, the bottom of described through hole is exposed source metal and is not overlapped with common electrode layer;
Step S27, form pixel electrode layer in passivation layer surface, described pixel electrode layer is electrically connected with source metal by through hole;
Step S28, form the E-paper thin film layer on the surface of pixel electrode layer.
Below in conjunction with specific embodiment above-mentioned formation method is done further introduction.
Figure 16 to Figure 20 is the formation synoptic diagram of display device of electronic paper second embodiment of the present invention.
As shown in figure 16, provide glass substrate 200, described glass substrate 200 is as the supporting baseplate of whole display base plate; Depositing silicon simple substance and etching form silicon island 201 on described glass substrate 200.
In the present embodiment, the material of described silicon island 201 can be selected amorphous silicon, polysilicon etc. for use, play the effect that raceway groove is provided in the thin film transistor (TFT) of follow-up formation, the length of described silicon island 201 is the channel width between the source-drain electrode, therefore can select according to concrete needs.
As shown in figure 17, in described silicon island 201 and glass substrate that all the other expose to the open air 200 surfaces form the first metal layers 202.
Described the first metal layer 202 can form by methods such as chemical vapor deposition, sputters, and material can be metal such as copper, aluminium, tungsten, tantalum or its alloy, combination.In the present embodiment, the first metal layer 202 preferred sputtering technologies that adopt form.
As shown in figure 18, the described the first metal layer 202 of etching forms source metal 204, drain metal layer and data line 203, and described data line 203 is connected with drain metal layer.
As possibility, in the present embodiment data line 203 and drain metal layer are made as with one deck metal, can simplify the photoetching masterplate, in subsequent step, described drain metal layer all uses data line 203 to replace.Be separated by between source metal 204 and the data line 203 simultaneously and leave, only be connected between the two by silicon island 201.Because the restriction of photoetching masterplate, therefore can't control being connected of the remaining metal level of described etching and silicon island 201 accurately.The method that present embodiment adopted is, 201 surf zone etching the first metal layer 202 forms openings in the silicon island only to utilize mask, the metal on opening both sides is respectively as source metal 204 and data line 203, so among Figure 16, all residual surface that has part to be covered in silicon island 201 of source metal 204 and data line 203.
As shown in figure 19, form gate dielectric layer 205 on the surface of described silicon island 201, source metal 204, data line 203.
The part on described gate dielectric layer 205 201 surfaces in the silicon island plays the gate medium effect of thin film transistor (TFT), and the part that is positioned at source metal 204 and data line 203 surfaces then plays the effect of layer insulation medium, can prevent the generation of leakage current.In the present embodiment, the material of described gate dielectric layer 205 can be chosen as insulating medium material commonly used such as silicon nitride, monox, and be positioned at the thickness of silicon island 201 surface portions, the silicon island, gate metal layer control bottom 201 of the follow-up formation of influence is formed raceway groove, should select as required to adjust.
Forming the subsequent step that gate dielectric layer 205 backs are carried out, the formation technology and first embodiment of second embodiment of the invention can be identical, so no longer are repeated in this description in the present embodiment, finally should form display device of electronic paper structure as shown in figure 20.
The formed display device of electronic paper of above-mentioned two embodiment all can be realized the present invention's goal of the invention, and has similar working mechanism, and difference only is the design of the thin film transistor (TFT) of top gate structure.In addition, thin film transistor (TFT) can also adopt bottom grating structure among the present invention, and promptly gate metal layer is positioned at the below of source metal, drain metal layer, and is connected by making contact hole and gate line etc.As conventional structure, those skilled in the art of the present invention should push away easily, repeat no more.
The present invention has all saved one deck organic film than prior art, constituted the high capacity pixel storage capacitor of sandwich structure simultaneously by pixel electrode layer, common electrode layer and source metal, utilized alternating voltage on the common electrode layer shadow data line on the other hand the interference of the demonstration current potential of pixel electrode layer.Therefore, that the present invention has is simple in structure, be easy to make the characteristics that cost is lower, display effect is preferable.
Though the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can do various changes and modification, so protection scope of the present invention should be as the criterion with claim institute restricted portion.

Claims (44)

1. a display device of electronic paper is characterized in that, comprising:
Glass substrate;
Be formed at data line, gate line and thin film transistor (TFT) on the glass substrate;
Described thin film transistor (TFT) comprises that source metal, drain metal layer, connection source metal and drain metal layer provide silicon island, gate dielectric layer and the gate metal layer of conducting channel; Described data line is connected with drain metal layer, and gate line is connected with gate metal layer;
Be positioned at the pixel electrode layer on the thin film transistor (TFT);
Be positioned at the E-paper thin film layer on the pixel electrode layer;
Wherein on vertical interface, be separated with common electrode layer between going back between described pixel electrode layer and data line and the source metal, and pixel electrode layer is electrically connected with source metal.
2. display device of electronic paper as claimed in claim 1 is characterized in that, described thin film transistor (TFT) is a top gate structure.
3. display device of electronic paper as claimed in claim 2, it is characterized in that, described silicon island connects source metal and drain metal layer, and the surface of cover part drain metal layer or data line, makes on the vertical interface silicon island with drain metal layer and gate line separately.
4. display device of electronic paper as claimed in claim 2 is characterized in that, described silicon island connects source metal and drain metal layer, and is positioned between the two.
5. display device of electronic paper as claimed in claim 1 is characterized in that, described thin film transistor (TFT) is a bottom grating structure.
6. display device of electronic paper as claimed in claim 1 is characterized in that, the material of described silicon island is an amorphous silicon.
7. display device of electronic paper as claimed in claim 1 is characterized in that, the material of described source metal, drain metal layer and data line is a kind of or combination in copper, tungsten, aluminium, the tantalum.
8. display device of electronic paper as claimed in claim 1 is characterized in that, described data line and drain metal layer are same metal level.
9. display device of electronic paper as claimed in claim 1 is characterized in that, described gate line and gate metal layer are same metal level.
10. display device of electronic paper as claimed in claim 1 is characterized in that, described common electrode layer and gate line are positioned at on one deck metal, and etching forms.
11. display device of electronic paper as claimed in claim 10 is characterized in that, the material of described gate line and common electrode layer is a kind of or combination in copper, tungsten, aluminium, the tantalum.
12. display device of electronic paper as claimed in claim 1 is characterized in that, described gate dielectric layer extends between common electrode layer and the source metal.
13. display device of electronic paper as claimed in claim 12 is characterized in that, the material of described gate dielectric layer is silicon nitride or silicon dioxide.
14. display device of electronic paper as claimed in claim 1 is characterized in that, also is formed with passivation layer between described pixel electrode layer and gate line and the common electrode layer.
15. display device of electronic paper as claimed in claim 14 is characterized in that, the material of described passivation layer is identical with gate dielectric layer.
16. display device of electronic paper as claimed in claim 14 is characterized in that, also comprises running through passivation layer, gate dielectric layer, and the through hole that does not overlap with common electrode layer, pixel electrode layer is electrically connected by described through hole with source metal.
17. display device of electronic paper as claimed in claim 1 is characterized in that, described pixel electrode layer is an indium tin oxide layer, and described indium tin oxide layer maximization is covered in passivation layer surface.
18. display device of electronic paper as claimed in claim 1 is characterized in that, described E-paper thin film layer comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer.
19. the formation method of a display device of electronic paper is characterized in that, comprises the steps:
Glass substrate is provided;
Surface deposition metal and etching at glass substrate form source metal, drain metal layer and data line, and described data line is connected with drain metal layer;
Surface deposition silicon and etching at described source metal, drain metal layer and data line form the silicon island, and described silicon island connects the surface of source metal and drain metal layer and cover part drain metal layer or data line;
In described silicon island, source metal, drain metal layer and data line surface form gate dielectric layer;
Form gate metal layer, gate line and common electrode layer at described gate dielectric layer surface deposition metal and etching, described gate metal layer covers the silicon island, described common electrode layer cover data line and source metal, and described gate line is connected with gate metal layer;
Surface in described gate metal layer, gate line and common electrode layer forms passivation layer;
At the surf zone of passivation layer, form pixel electrode layer, described pixel electrode layer is electrically connected with source metal;
Surface at pixel electrode layer forms the E-paper thin film layer.
20. manufacture method as claimed in claim 19 is characterized in that, also comprises after forming described passivation layer: run through passivation layer, gate dielectric layer formation through hole, source metal is exposed in the bottom of described through hole, and through hole does not overlap mutually with common electrode layer.
21. manufacture method as claimed in claim 20 is characterized in that, described pixel electrode layer is an indium tin oxide layer, and the maximization of described indium tin oxide layer is covered in passivation layer surface, and is filled in the described through hole during film forming, thereby is electrically connected with source metal.
22. manufacture method as claimed in claim 19 is characterized in that, described surface deposition metal concrete grammar at glass substrate is a sputtering technology.
23. manufacture method as claimed in claim 22 is characterized in that, described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.
24. manufacture method as claimed in claim 19 is characterized in that, described data line and drain metal layer are same metal level.
25. manufacture method as claimed in claim 19 is characterized in that, the material of described silicon island is an amorphous silicon.
26. manufacture method as claimed in claim 19 is characterized in that, the material of described gate dielectric layer is silicon nitride or silicon dioxide, forms by chemical vapor deposition method.
27. manufacture method as claimed in claim 19 is characterized in that, described is sputtering technology at gate dielectric layer surface deposition metal concrete grammar.
28. manufacture method as claimed in claim 27 is characterized in that, described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.
29. manufacture method as claimed in claim 19 is characterized in that, described gate line and gate metal layer are same metal level.
30. manufacture method as claimed in claim 19 is characterized in that, the material of described passivation layer is identical with gate dielectric layer.
31. manufacture method as claimed in claim 19 is characterized in that, described E-paper thin film layer fits in the pixel electrode laminar surface, comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer.
32. the formation method of a display device of electronic paper is characterized in that, comprises the steps:
Glass substrate is provided;
Surface deposition silicon and etching at glass substrate form the silicon island;
Surface deposition metal and etching at described silicon island and glass substrate form source metal, drain metal layer and data line, described data line is connected with drain metal layer, and described source metal and drain metal layer are positioned at the both sides, silicon island and connect by the silicon island;
In described silicon island, source metal, drain metal layer and data line surface form gate dielectric layer;
Form gate metal, gate line and common electrode layer at described gate dielectric layer surface deposition metal and etching, described gate metal layer covers the silicon island, described common electrode layer cover data line and source metal, and described gate line is connected with gate metal layer;
Surface in described gate metal layer, gate line and common electrode layer forms passivation layer;
At the surf zone of passivation layer, form pixel electrode layer, described pixel electrode layer is electrically connected with source metal;
Surface at pixel electrode layer forms the E-paper thin film layer.
33. manufacture method as claimed in claim 32 is characterized in that, also comprises after forming described passivation layer: run through passivation layer, gate dielectric layer formation through hole, source metal is exposed in the bottom of described through hole, and through hole does not overlap with common electrode layer.
34. manufacture method as claimed in claim 33 is characterized in that, described pixel electrode layer is an indium tin oxide layer, and the maximization of described indium tin oxide layer is covered in passivation layer surface, and is filled in the described through hole during film forming, thereby is electrically connected with source metal.
35. manufacture method as claimed in claim 32 is characterized in that, described surface deposition metal concrete grammar at glass substrate is a sputtering technology.
36. manufacture method as claimed in claim 35 is characterized in that, described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.
37. manufacture method as claimed in claim 32 is characterized in that, described data line and drain metal layer are same metal level.
38. manufacture method as claimed in claim 32 is characterized in that, the material of described silicon island is an amorphous silicon.
39. manufacture method as claimed in claim 32 is characterized in that, the material of described gate dielectric layer is silicon nitride or silicon dioxide, forms by chemical vapor deposition method.
40. manufacture method as claimed in claim 32 is characterized in that, described is sputtering technology at gate dielectric layer surface deposition metal concrete grammar.
41. manufacture method as claimed in claim 40 is characterized in that, described metal is a kind of or combination in copper, tungsten, aluminium, the tantalum.
42. manufacture method as claimed in claim 32 is characterized in that, described gate line and gate metal layer are same metal level.
43. manufacture method as claimed in claim 32 is characterized in that, the material of described passivation layer is identical with gate dielectric layer.
44. manufacture method as claimed in claim 32 is characterized in that, described E-paper thin film layer fits in the pixel electrode laminar surface, comprises infrabasal plate, upper substrate, is filled in the electrophoretic layer between infrabasal plate and the upper substrate, has charged particle in the described electrophoretic layer.
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Cited By (3)

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CN103559841A (en) * 2013-11-21 2014-02-05 深圳晶华显示器材有限公司 Flexible electronic paper display device and manufacturing method thereof
CN106847831A (en) * 2017-03-08 2017-06-13 深圳市华星光电技术有限公司 Thin-film transistor array base-plate and its manufacture method
CN115639712A (en) * 2022-11-08 2023-01-24 滁州惠科光电科技有限公司 Pixel structure, array substrate and electronic paper

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JP3307150B2 (en) * 1995-03-20 2002-07-24 ソニー株式会社 Active matrix display
JPH10240162A (en) * 1997-02-28 1998-09-11 Sony Corp Active matrix display device
KR100400627B1 (en) * 1999-03-18 2003-10-08 산요덴키가부시키가이샤 Active matrix type display apparatus
JP2004219991A (en) * 2002-12-27 2004-08-05 Sharp Corp Substrate for display device and liquid crystal display device having the same

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Publication number Priority date Publication date Assignee Title
CN103559841A (en) * 2013-11-21 2014-02-05 深圳晶华显示器材有限公司 Flexible electronic paper display device and manufacturing method thereof
CN103559841B (en) * 2013-11-21 2016-06-29 深圳晶华显示器材有限公司 A kind of manufacture method of flexible electronic paper display device
CN106847831A (en) * 2017-03-08 2017-06-13 深圳市华星光电技术有限公司 Thin-film transistor array base-plate and its manufacture method
CN115639712A (en) * 2022-11-08 2023-01-24 滁州惠科光电科技有限公司 Pixel structure, array substrate and electronic paper
CN115639712B (en) * 2022-11-08 2023-09-26 滁州惠科光电科技有限公司 Pixel structure, array substrate and electronic paper

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