CN101958375B - Nitride semiconductor structure and manufacturing method thereof - Google Patents
Nitride semiconductor structure and manufacturing method thereof Download PDFInfo
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- CN101958375B CN101958375B CN 200910160715 CN200910160715A CN101958375B CN 101958375 B CN101958375 B CN 101958375B CN 200910160715 CN200910160715 CN 200910160715 CN 200910160715 A CN200910160715 A CN 200910160715A CN 101958375 B CN101958375 B CN 101958375B
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Abstract
The invention discloses a nitride semiconductor substrate and a manufacturing method thereof, wherein the nitride semiconductor substrate comprises an epitaxial substrate, a nitride pillar layer, a nitride semiconductor layer and a mask layer. The nitride pillar layer consists of a plurality of first pillars arranged in pattern and a plurality of second pillars arranged in pattern. The nitride pillar layer is formed on the epitaxial substrate, the width of the cross section of each second pillar is smaller than that of the cross section of each first pillar, and the distance between each two second pillars is larger than that between each two first pillars. The mask layer covers the surfaces of the first pillars, the second pillars and the epitaxial substrate. The nitride semiconductor layer is formed on the nitride pillar layer.
Description
Technical field
The present invention relates to a kind of nitride semiconductor structure and manufacture method thereof.
Background technology
Light-emitting diode (LED) and laser (LD) are used on the market widely in recent years, blue light and the yellow fluorescent powder combination of for example making with gallium nitride (GaN) can obtain white light, just all bright than conventional bulb light source before and power saving in brightness or aspect the power consumption can significantly not reduce power consumption.In addition, the life-span is longer than conventional bulb about more than tens thousand of hours the life-span of light-emitting diode.
In the manufacture process of gallium nitride semiconductor light emitting element, because the lattice constant between gallium nitride semiconductor layers and the epitaxial substrate and the difference of thermal coefficient of expansion, easily cause gallium nitride semiconductor in epitaxial process, to produce threading dislocation and thermal stress, thereby affect the luminous efficiency of light-emitting component.
Knownly comprise and utilizes luminescence method separating the method for gallium nitride semiconductor layers with epitaxial substrate, make laser light penetrate interface between substrate irradiated substrate and the gallium nitride semiconductor layers, reach the purpose of separation gallium nitride semiconductor layers and epitaxial substrate.In addition, the resistance barrier structure (barrier structure) that also can utilize wet etching directly to remove between substrate and the gallium nitride semiconductor layers reaches the connecting structure that weakens between gallium nitride semiconductor layers and the epitaxial substrate, and then separates gallium nitride semiconductor layers and epitaxial substrate.In addition, can also be used in and carry out vapor phase etchant under the high temperature and directly remove boundary layer between gallium nitride semiconductor layers and the epitaxial substrate, reach the purpose of separating gallium nitride semiconductor layers and epitaxial substrate.
For example US Patent No. 6,582, and 986 form the method for gallium nitride semiconductor layers with regard to having disclosed a kind of mode of utilizing unsettled extension (pendeo-epitaxy).This method is applicable to this class of silicon carbide substrate and is easy to etched material, and the resilient coating of being used as crystal seed between epitaxial substrate and the gallium nitride semiconductor layers situation that easily has stress to concentrate.
The open WO2007/107757 of PCT patent has then disclosed a kind of mode of adjusting the extension parameter of utilizing, as shown in Figure 1, directly carry out extension (epitaxy) in epitaxial substrate 100 surfaces, on nitration case 101, to form gallium nitride nano-pillar (GaN nanocolumn) 102.Afterwards, take gallium nitride nano-pillar 102 as crystal seed, carry out the epitaxial lateral overgrowth growth and form thick film gallium nitride semiconductor layer 104, carry out again temperature reduction technology and make gallium nitride semiconductor layers 104 and epitaxial substrate 100 interfaces split (crack) afterwards, then impose mechanical force and allow gallium nitride semiconductor layers 104 and epitaxial substrate 100 isolate nitrogenize gallium thick film.
Summary of the invention
One embodiment of the invention proposes a kind of nitride semiconductor base plate, comprises epitaxial substrate, nitride post layer, nitride semiconductor layer and mask layer, and wherein nitride post layer comprises the first post of patterned arrangement and the second post of patterned arrangement.Above-mentioned nitride post layer is to be formed on the epitaxial substrate, and wherein the cross-sectional width of each the second post is less than the cross-sectional width of each the first post, and the distance between each second post is greater than the distance between each first post.Mask layer then covers the surface of the first post, the second post and epitaxial substrate.Above-mentioned nitride semiconductor layer is formed on the nitride post layer.
Another embodiment of the present invention proposes a kind of manufacture method of nitride semiconductor base plate, is included in the first post that the epitaxial substrate surface forms a plurality of patterned arrangement, forms sidewall and the part end face that one deck mask layer covers the first post in the epitaxial substrate surface again.Then, form the second post of a plurality of patterned arrangement at the first post, wherein the cross-sectional width of each the second post is less than the cross-sectional width of each the first post, and the distance between each second post is greater than the distance between each first post.Then, see through the second post and carry out epitaxial lateral overgrowth technique, to form nitride semiconductor layer.
An again embodiment of the present invention proposes a kind of nitride semiconductor base plate, comprises nitride-based semiconductor post layer, nitride semiconductor layer and the mask layer of epitaxial substrate, patterning.Above-mentioned nitride-based semiconductor post layer comprises the first empty structure of several patterns arrangement and the second empty structure that is formed at the first empty interstructural several patterns arrangement, and wherein the second empty structure is nano-scale.Nitride-based semiconductor post layer is to be formed on the epitaxial substrate, and nitride semiconductor layer is to be formed on the nitride-based semiconductor post layer.Mask layer then covers the surface of nitride-based semiconductor post layer and epitaxial substrate.
Another embodiment of the present invention proposes a kind of manufacture method of nitride semiconductor base plate, be included in the nitride-based semiconductor post layer that the epitaxial substrate surface forms patterning, it has the first empty structure of several patterns arrangement and several second empty structures of the patterned arrangement between the first empty structure, and wherein the above-mentioned second empty structure is nano-scale.Then, sidewall and epitaxial substrate surface at nitride-based semiconductor post layer form mask layer, carry out again epitaxial lateral overgrowth technique (epitaxial lateral over growth, ELOG) take nitride-based semiconductor post layer as crystal seed, to form nitride semiconductor layer.
For the present invention can be become apparent, embodiment cited below particularly, and cooperation accompanying drawing are described in detail below.
Description of drawings
Fig. 1 is the diagrammatic sectional view of known a kind of nitride semiconductor base plate.
Fig. 2 is the diagrammatic sectional view according to a kind of nitride semiconductor base plate of the first embodiment of the present invention.
Fig. 3 is the diagrammatic sectional view of a kind of nitride semiconductor base plate according to a second embodiment of the present invention.
Fig. 4 A to Fig. 4 I is the manufacturing process profile of a kind of nitride semiconductor base plate of a third embodiment in accordance with the invention.
Fig. 5 A to Fig. 5 H is the manufacturing process profile of a kind of nitride semiconductor base plate of a fourth embodiment in accordance with the invention.
Fig. 6 A and Fig. 6 B are the SEM photo of a third embodiment in accordance with the invention and the 4th embodiment embryo sample of making.
Fig. 7 A is the diagrammatic sectional view according to another kind of nitride semiconductor base plate of the present invention.
Fig. 7 B is the nitride semiconductor base plate of Fig. 7 A forms the nitride-based semiconductor separate substrates by separating technology schematic diagram.
Fig. 8 A to Fig. 8 H is the manufacturing process profile according to another kind of nitride semiconductor base plate of the present invention.
Fig. 8 I is the manufacturing process profile according to nitride-based semiconductor separate substrates of the present invention.
Description of reference numerals
100,200,300,400,702,800: epitaxial substrate
102,202,302,704,806a: nitride post layer
104,204,304,406,508: the first posts
106,206,306,414,514: the second posts
108,208,308,416,516,706,820: nitride semiconductor layer
110,210,310,412,708,818: mask layer
312,518: assembly
402,502: material layer
404,404a, 506: pattern mask
404b, 406a, 508a: end face
408,510: film
410: the photoresist layer
504,504a: separating layer
700: nitride semiconductor base plate
710: the first empty structures
712: the second empty structures
714: separating technology
802: the nitride semi-conductor material layer
804: photoresist
804a: patterning photoresist
806: the nitride-based semiconductor patterned layer
808: the sacrificial mask layer
810: metallic film
812: patterned mask layer
814: the three empty structures
The 814 ': the 5th empty structure
816: the four empty structures
The 816 ': the 6th empty structure
A1, a2: cross-sectional width
A3: spacing
A4, b3, W1, W2, W3: width
B1, b2: distance
H: highly
T1, t2, t3: thickness
Embodiment
Fig. 2 is the diagrammatic sectional view according to a kind of nitride semiconductor base plate of the first embodiment of the present invention.
Please refer to Fig. 2, the nitride semiconductor base plate among the first embodiment comprises epitaxial substrate 200, nitride post layer 202 (it is made of first post (pillars) 204 of a plurality of patterned arrangement and the second post 206 of a plurality of patterned arrangement), nitride semiconductor layer 208 and mask layer 210.Wherein, the material of epitaxial substrate 200 baseplate material of sapphire, carborundum, silicon, GaAs etc. or other suitable epitaxy techniques for example.The material of nitride post layer 202 is the III group-III nitride for example, such as the nitride of boron, aluminium, gallium, indium, thallium or its combination.In addition, epitaxial substrate 200 can be different from the thermal coefficient of expansion of nitride semiconductor layer 208.Above-mentioned nitride post layer 202 is to be formed on the epitaxial substrate 200, and 208 of whole nitride semiconductor layers are to be formed on the nitride post layer 202, and mask layer 210 then covers the surface of the first post 204, the second post 206 and epitaxial substrate 200.Wherein, the first post 204 and the second post 206 can pass through optical lithography (photolithography) and etch process (etching), reach to meet the required size of follow-up separation process.
In Fig. 2, block by the cross section of the first post 204 and the second post 206 picture, but the arrangement mode of the first post 202 or the second post 204 can be arranged in strip, point-like or netted on the whole in fact.Moreover, by cross section, mask layer 210 forms a cavity between the first post 204 and the second post 206, and the cross-sectional width a2 of the second post 206 is less than the cross-sectional width a1 of the first post 204, distance b 2 between adjacent two second posts 206 is greater than the distance b 1 between adjacent two first posts 204, so when the thickness of follow-up nitride semiconductor layer 208 thick to the enough intensity of accumulation the time, when falling at ambient temperature, because of the thermal expansion coefficient difference of epitaxial substrate 200 with nitride post layer 202 (comprising the first post 204 and the second post 206), so can between the interface, the most weak local natural separation of intensity become the independently nitride semiconductor base plate of (freestanding), namely become the nitride-based semiconductor separate substrates in arbitrary interface of 208 of the second post 206 and nitride semiconductor layers natural separation.
For instance, the cross-sectional width a2 of cross-sectional width a1/ second post 206 of the first post 204, and the distance b 2 between 1/ adjacent two second posts 206 of the distance b between adjacent two first posts 204 can be by optical lithography and etch process, reaches to meet the required size of follow-up separation process.For convenience of description, the ratio of the distance between existing cross-sectional width with the first post 204 or the second post 206 and corresponding adjacent two posts is defined as filling factor (fill factor, FF), that is FF1=a1/b1, FF2=a2/b2.For example, in the present embodiment, FF1 can less than or equal to 1 and FF2 can be less than or equal to 0.8; Wherein, FF1 be preferably 0.75 and FF2 be preferably 0.6.The dimension scale of each member of above-mentioned disclosure only is a kind of enforcement aspect, the present invention is not caused restriction in the application, and this is that the persons of ordinary skill in the technical field of the present invention can use existing technology to adjust according to the actual state appropriateness to be finished; For instance, the scope of the cross-sectional width a1 of each the first post 204 is between 2.1 μ m～4.2 μ m; The scope of the cross-sectional width a2 of each the second post 206 is between 1.3 μ m～3.6 μ m.In addition, as not separating the nitride semiconductor layer 208 and nitride post layer 202 among Fig. 2, also can adjust FF1 and FF2 reaches by appropriateness; For instance, FF1 can be greater than 1; FF2 can be greater than 0.8.
In addition, each nitride layer 202 is made of a plurality of rules or irregular nano level columnar structure except as shown in Figure 2, in order to releasable material stress and further dislocation (dislocation) density that reduces.
In an embodiment of the present invention, the demand of nitride semiconductor layer 208 visual reality is adjusted its thickness from technique, for example when the thickness t 3 of nitride semiconductor layer 208 during greater than 100 μ m, nitride semiconductor layer 208 can form the nitride-based semiconductor separate substrates by separating technology; Perhaps, shown in next figure, become film.
Fig. 3 is the diagrammatic sectional view of a kind of nitride semiconductor base plate according to a second embodiment of the present invention.
Please refer to Fig. 3, the nitride semiconductor base plate among the second embodiment comprises epitaxial substrate 300, nitride post layer 302 (it is comprised of the first post 304 of a plurality of patterned arrangement and the second post 306 of a plurality of patterned arrangement), nitride semiconductor layer 308 and mask layer 310.Wherein the material of each member and size are all identical with the first embodiment or similar, both differences only equal the thickness t 2 of mask layer 310 in the thickness t 1 of the second post 306, so nitride semiconductor layer 308 is large with the contact area of beneath mask layer 310, so be suitable for forming the nitride semiconductor layer 308 of filminess.The nitride semiconductor layer 308 of this class can not separate with epitaxial substrate 300 first, and directly carry out the making of subsequent components 312 (for example: light-emitting diode (LED) assembly or laser module) on nitride semiconductor layer 308 surfaces, and can in the end use prior art to separate epitaxial substrate 300 and nitride semiconductor layer 308.
Fig. 4 A to Fig. 4 I then is the manufacturing process profile of a kind of nitride semiconductor base plate of a third embodiment in accordance with the invention.
At first, need to form in epitaxial substrate 400 surfaces the first post of several patterns arrangement, and this road technique is to be shown among Fig. 4 A to Fig. 4 B at the 3rd embodiment.Please first with reference to Fig. 4 A, form layer of material layers 402 on epitaxial substrate 400 surfaces, the material of above-mentioned epitaxial substrate 400 is the baseplate material of sapphire, carborundum, silicon, GaAs etc. or other suitable epitaxy techniques for example.The material of above-mentioned material layer 402 is the III group-III nitride for example, and such as the nitride of boron, aluminium, gallium, indium, thallium or its combination, and the thickness of material layer 402 is for example between 3 μ m～5 μ m.Then, form one deck pattern masks 404 at material layer 402, and the surface of exposed portions serve material layer 402, wherein for example silicon nitride or photoresist of the material of pattern mask 404.
Then, please refer to Fig. 4 B, take pattern mask 404 as mask, remove material layer 402 and the first post 406 of formation several patterns arrangement, the step of above-mentioned removal material layer 402 can comprise the epitaxial substrate 400 of removing part.Afterwards, can utilize if necessary etch process that the first post 406 is made a plurality of rules or irregular nano level columnar structure, in order to releasable material stress and the further dislocation density that reduces.
Then, in order to form one deck mask layer in epitaxial substrate 400 surfaces, be the technique that adopts Fig. 4 C to Fig. 4 G in the 3rd embodiment.Please refer to Fig. 4 C, the pattern mask 404 among the first etch figures(s) 4B becomes width as the pattern mask 404a of W1 to reduce its width.At this moment, the part end face 406a that is not patterned the first post 406 of mask 404a covering can expose.
Subsequently, please refer to Fig. 4 D, comprehensive formation thin film 408, the part surface of overlay pattern mask 404a, the first post 406 and epitaxial substrate 400.The material of film 408 is silicon nitride, silica, tungsten etc. for example.
Then, please refer to Fig. 4 E, for removing the film 408 on the part pattern mask 404a, can first comprehensive formation one deck photoresist layer 410 cover film 408.
Then, please refer to Fig. 4 F, etching photoresist layer 410 exposes the film 408 on the end face 404b of pattern mask 404a, again take photoresist layer 410 as mask, removes the film 408 that exposes, and the end face 404b of pattern mask 404a is exposed.
Afterwards, please refer to Fig. 4 G, pattern mask 404a among Fig. 4 F and photoresist layer 410 are removed, to expose the part end face 406a of the first post 406, just form one deck and cover the sidewall of the first post 406 and the mask layer 412 on part end face and epitaxial substrate 400 surfaces.
Then, please refer to Fig. 4 H, from the second post 414 of the part end face 406a of the first post 406 epitaxial growth several patterns arrangement, wherein the radius of each the second post 414 less than the cross-sectional width of each the first post 406, distance between adjacent two second posts 414 greater than the distance between adjacent two first posts 406.And the method for above-mentioned epitaxial growth the second post 414 for example has hydride vapour phase epitaxy method (HVPE), metal organic vapor method or molecular beam epitaxy (MBE).As for the material of the second post 414 III group-III nitride for example, such as nitride of boron, aluminium, gallium, indium, thallium or its combination etc.; Preferably select the material identical with the first post 406.The first post 406 and the second post 414 are because be to show with profile type, so although picture is block, the arrangement mode of the first post 406 or the second post 414 can be arranged in strip, point-like or netted on the whole.Then, see through the second post 414 and carry out epitaxial lateral overgrowth technique, to form nitride semiconductor layer 416, its material is gallium nitride, aluminium nitride, indium gallium nitride, aluminium gallium nitride alloy or aluminum indium gallium nitride for example.Above-mentioned epitaxial lateral overgrowth technique is hydride vapour phase epitaxy method, metal organic vapor method or molecular beam epitaxy for example.
At last, please refer to Fig. 4 I, when the thickness of nitride semiconductor layer 416 greatly to as 100 μ m when above, can select to provide temperature reduction technology, nitride semiconductor layer 416 is separated from epitaxial substrate 400 surfaces, shown in Fig. 4 I, because the shear stress that the difference of storeroom thermal coefficient of expansion causes discharges, and can be from weak the second post 414 of structural strength and the interface natural fracture between the nitride semiconductor layer 416.
Except the technique of above-mentioned the 3rd embodiment, the present invention also can use other techniques to reach, such as next embodiment.
Fig. 5 A to Fig. 5 G is the manufacturing process profile of a kind of nitride semiconductor base plate of a fourth embodiment in accordance with the invention.
At first, need to form several first posts in epitaxial substrate 500 surfaces, and this road technique is to be shown among Fig. 5 A to Fig. 5 D at the 4th embodiment.Please refer to Fig. 5 A, sequentially form layer of material layer 502 and one deck separating layer 504 prior to epitaxial substrate 500 surfaces, nitride of the material of material layer 502 such as III group-III nitride such as boron, aluminium, gallium, indium, thallium or its combination etc. wherein, its thickness is for example between 3 μ m～5 μ m; The material of separating layer 504 can select to be suitable for the material by wet etching, such as metal oxide (as: indium tin oxide), thickness for example between 100nm～200nm.
Then, please refer to Fig. 5 B, form one deck pattern masks 506 in separating layer 504, and the surface of exposed portions serve separating layer 504, wherein for example silicon nitride or photoresist of the material of pattern mask 506.
Subsequently, please refer to Fig. 5 C, take pattern mask 506 as mask, remove separating layer 504, further etch separates layer 504 to reduce its width, becomes the separating layer 504a that width is W2 again.At this moment, the width W 2 of patterning separating layer 504a is less than the width W 3 of pattern mask 506.
Then, please refer to Fig. 5 D, take pattern mask 506 as mask, remove the material layer 502 of Fig. 5 C and form the first post 508 of several patterns arrangement.The method of above-mentioned removal material layer 502 is anisotropic etching for example.In addition, in the step of removing material layer 502, also can comprise the epitaxial substrate 500 of removing part, continuous to guarantee between the first post 508.
Then, in order to form one deck mask layer in epitaxial substrate 500 surfaces, please refer to Fig. 5 E to Fig. 5 F, the comprehensive formation thin film 510 of elder generation, the part surface of overlay pattern mask 506, separating layer 504a, the first post 508 and epitaxial substrate 500.The material of film 510 is silicon nitride, silica, tungsten etc. for example.
Afterwards, please refer to Fig. 5 F, remove separating layer 504a, with strip pattern mask 506 and part film 510, and form mask layer 512 and expose the part end face 508a of the first post 508.Afterwards, can utilize if necessary etch process that the first post 508 is made a plurality of rules or irregular nano level columnar structure, in order to releasable material stress and the further dislocation density that reduces.
Then, please refer to Fig. 5 G, from the second post 514 of the part end face 508a of the first post 508 epitaxial growth several patterns arrangement, its method such as hydride vapour phase epitaxy method (HVPE), metal organic vapor method or molecular beam epitaxy (MBE).As for the material of the second post 514 nitride for example, such as gallium nitride, aluminium nitride, aluminium gallium nitride alloy etc.; Preferably select the material identical with the first post 508.Then, see through the second post 514 and carry out epitaxial lateral overgrowth technique, to form nitride semiconductor layer 516, for example hydride vapour phase epitaxy method, metal organic vapor method or molecular beam epitaxy of epitaxial lateral overgrowth technique wherein.The material of above-mentioned nitride semiconductor layer 516 is gallium nitride, aluminium nitride, indium gallium nitride, aluminium gallium nitride alloy or aluminum indium gallium nitride for example.
At last, please refer to Fig. 5 H, be suitable for forming film according to the formed nitride semiconductor layer 516 of the 4th embodiment, can not separate with heterogeneous substrate 500, and directly carry out the making of subsequent components 518 (for example: light-emitting diode (LED) assembly or laser module) on nitride semiconductor layer 516 surfaces.And, can select not carry out separating or in the end use prior art to separate heterogeneous substrate 500 and nitride semiconductor layer 516.
No matter be the first (or 3rd) embodiment and second (or 4th) embodiment, can both make individually in theory and separate or unseparated structure, its difference is the Thickness Design of each other FF1, FF2 and nitride semiconductor layer.Design as for each other FF1, FF2 and nitride semiconductor layer thickness belongs to the persons of ordinary skill in the technical field of the present invention, can carry out adjustment on the parameter according to the demand on the actual operation, does not therefore give unnecessary details in the text.
Fig. 6 A and Fig. 6 B namely are respectively the SEM photo of the embryo sample of making according to the third embodiment of the present invention and the 4th embodiment, the SEM photo when wherein Fig. 6 A manufacturing process of being roughly the 3rd embodiment is come Fig. 4 G; SEM photo when the manufacturing process that Fig. 6 B then is roughly the 4th embodiment is come Fig. 5 F.
Fig. 7 A is a kind of diagrammatic sectional view of nitride semiconductor base plate according to another embodiment of the present invention.
Please refer to Fig. 7 A, nitride semiconductor base plate 700 comprises nitride-based semiconductor post layer 704, nitride semiconductor layer 706 and the mask layer 708 of epitaxial substrate 702, patterning.Nitride-based semiconductor post layer 704 is made of the first empty structure 710 of several patterns arrangement and the second empty structure 712 of several patterns arrangement, and wherein the second empty structure 712 is nano-scale; For instance, the height of the second empty structure 712 for example between 1 μ m～5 μ m, the width of the second empty structure 712 is for example between 30nm～500nm.The height of the first empty structure 710 is then for example between 1 μ m～10 μ m.And dimension scale disclosed here only is a kind of enforcement aspect, the present invention is not caused restriction in the application, and this is that the persons of ordinary skill in the technical field of the present invention can use existing technology to adjust according to the actual state appropriateness to be finished.In addition, by cross section, the first empty structure 710 is the structure of periodic arrangement, and the second 712 on empty structure can be the structure that regularly arranged or irregular (random) arranges.And the arrangement mode of the first empty structure 710 can be arranged in strip, point-like or netted on the whole.
The material of above-mentioned epitaxial substrate 702 is the baseplate material of sapphire, carborundum, silicon, GaAs etc. or other suitable epitaxy techniques for example then.The material of nitride-based semiconductor post layer 704 is the III group-III nitride for example, such as the nitride of boron, aluminium, gallium, indium, thallium or its combination.Above-mentioned nitride-based semiconductor post layer 704 is to be formed on the epitaxial substrate 702, and 706 of whole nitride semiconductor layers are to be formed on the nitride-based semiconductor post layer 704, and mask layer 708 then covers the surface of nitride-based semiconductor post layer 704 and epitaxial substrate 702.The material of mask layer can be dielectric material, such as silica or silicon nitride.
Moreover, the demand of nitride semiconductor layer 706 visual reality forms thick film or film from technologic adjustment, for example when the thickness of nitride semiconductor layer 706 during greater than 50 μ m, it can form the nitride-based semiconductor separate substrates by separating technology 714, the mask layer 708 that comprises nitride semiconductor layer 706, nitride-based semiconductor post layer 704 and surface thereof is shown in Fig. 7 B.
Accept above-mentionedly, the spacing a3 of the first empty structure 710 and its width a4 (shown in Fig. 7 A) can pass through optical lithography (photolithography) and etch process (etching), reach to meet above-mentioned separating technology 714 required sizes; The height h of the second empty structure 712 and its width b3 then can be irregular nano-scale structure.For convenience of description, now the spacing a3 of the first empty structure 710 and the ratio of width a4 are defined as filling factor (fill factor, FF), that is FF=a3/a4.For instance, in the present embodiment FF is less than or equal to 2 (for example being 1); And the height h of the second empty structure 712 can be 1 μ m.The dimension scale of each layer disclosed here only is a kind of enforcement aspect, the present invention is not caused restriction in the application, this is that the persons of ordinary skill in the technical field of the present invention can use existing technology to be finished according to the adjustment of actual state appropriateness, for example the scope of a3 is between 1 μ m～10 μ m, preferably between 1 μ m～5 μ m; B3 is for example between 30nm～500nm, preferably between 30nm～300nm.
Please referring again to Fig. 7 B, when the thickness of follow-up nitride semiconductor layer 706 thick to the enough intensity of accumulation the time, can be in ambient temperature when epitaxial temperature drops to room temperature, because of the difference of epitaxial substrate 702 with nitride-based semiconductor post layer 704 epitaxial material thermal coefficient of expansion, the most weak local natural separation of intensity becomes the nitride-based semiconductor separate substrates between the interface, namely for example in the interface natural separation of 702 of the nitride-based semiconductor post layer 704 of patterning and epitaxial substrates.
In addition, if nitride semiconductor layer 706 is in order to as film (for example thickness is less than 50 μ m), then 700 of the nitride semiconductor base plates of Fig. 7 A can be used to be used as nitride template (template), can see through equally the design of FF value and h, for example be FF more than or equal to 0.5, h is less than or equal to 5 μ m, descend and the unlikely purpose that causes nitride semiconductor layer 706 cracked (crack) to reach dislocation density.
Fig. 8 A to Fig. 8 H is the manufacturing process profile of another nitride semiconductor base plate of the present invention.
At first, please form one deck nitride semi-conductor material layers 802 on epitaxial substrate 800 surfaces first with reference to Fig. 8 A, the material of above-mentioned epitaxial substrate 800 is the baseplate material of sapphire, carborundum, silicon, GaAs etc. or other suitable epitaxy techniques for example.The material of above-mentioned nitride semi-conductor material layer 802 is the III group-III nitride for example, such as the nitride of boron, aluminium, gallium, indium, thallium or its combination.And the thickness of nitride semi-conductor material layer 802 is for example between 1 μ m～10 μ m.And the method that forms nitride semi-conductor material layers 802 on epitaxial substrate 800 surface is hydride vapour phase epitaxy method (HVPE), metal organic vapor method or molecular beam epitaxy (MBE) for example.Then, form one deck photoresist 804 at nitride semi-conductor material layer 802.
Then, please refer to Fig. 8 B, utilize the technology such as optical lithography, photoresist 804 developments are formed the photoresist 804a of the patterning on exposed portions serve nitride semi-conductor material layer 802 surface.Afterwards, take patterning photoresist 804a as mask, utilize such as the etching mode of RIE or ICP and remove nitride semi-conductor material layer 802, to form nitride-based semiconductor patterned layer 806.And when removing the step of nitride semi-conductor material layer 802 epitaxial substrate 800 of part that can be removed also.
Then, please refer to Fig. 8 C, remove first patterning photoresist 804a (such as Fig. 8 B), form one deck sacrificial mask layer 808 in nitride-based semiconductor patterned layer 806 and epitaxial substrate 800 surfaces again, cover the surface of nitride-based semiconductor patterned layer 806.And sacrificial mask layer 808 can be dielectric material, for example is silica or silicon nitride.
Subsequently, please refer to Fig. 8 D, form metallic film 810 at sacrificial mask layer 808 surface (sidewall that does not comprise sacrificial mask layer 808), and the metallic film in the present embodiment 810 is as example take metallic nickel.
Then, please refer to Fig. 8 E, carry out high-temperature annealing process (for example being 850 ℃), make metallic film 810 because the surface tension difference of epitaxial material is gathered into for example spherical metal between 30nm～500nm of radius automatically, and form patterned mask layer 812 (being spherical metal) in sacrificial mask layer 808 surface, wherein patterned mask layer 812 has the pattern of nano-scale.
Then, please refer to Fig. 8 F, with patterned mask layer 812 as mask, utilize the anisotropic etching process such as RIE or ICP, etch sacrificial mask layer 808 and nitride-based semiconductor patterned layer 806, and obtain having the nitride-based semiconductor post layer 806a of the 4th empty structure 816 of the 3rd empty structure 814 of several patterns arrangement and several patterns arrangement.Material such as gallium nitride, aluminium nitride, aluminium gallium nitride alloy, indium nitride, InGaN or the aluminum indium gallium nitride etc. of above-mentioned nitride-based semiconductor post layer 806a.Afterwards, remove sacrificial mask layer 808 and patterned mask layer 812.
Then, please refer to Fig. 8 G, form mask layer 818 on sidewall and epitaxial substrate 800 surfaces of nitride-based semiconductor post layer 806a.For instance, the making of mask layer 818 can be the dielectric film that first comprehensive formation one deck covers nitride-based semiconductor post layer 806a and epitaxial substrate 800 surfaces, remove again the dielectric film on the end face of nitride-based semiconductor post layer 806a, wherein the material of mask layer 818 can be dielectric material, for example is silica or silicon nitride.
Then, please refer to Fig. 8 H, carry out epitaxial lateral overgrowth technique take nitride-based semiconductor post layer 806a as crystal seed, forming nitride semiconductor layer 820, and form the 5th empty structure 814 ' and the 6th empty structure 816 ' of this figure.The material of nitride semiconductor layer 820 is gallium nitride, aluminium nitride, indium nitride, indium gallium nitride, aluminium gallium nitride alloy or aluminum indium gallium nitride for example.Above-mentioned epitaxial lateral overgrowth technique for example is hydride vapour phase epitaxy method, metal organic vapor method or molecular beam epitaxy on demand.
When the thickness of nitride semiconductor layer 820 as reaching 50 μ m when above, can select to provide temperature reduction technology, make nitride semiconductor layer 820 because the shear stress that the difference of storeroom thermal coefficient of expansion causes discharges, so that between the interface the most weak place such as nitride semiconductor layer 820 and the nitride-based semiconductor post layer 806a natural separation of intensity, shown in Fig. 8 I.
Cylinder at the nitride semiconductor layer of one embodiment of the invention and the interface between the substrate by the patterned arrangement of two-layer different size consists of, and the cross-sectional width of the second post of close nitride semiconductor layer is less than the cross-sectional width of the first post of close substrate, and the distance between each second post is greater than the distance between each first post, and make the contact point reduction between gallium nitride semiconductor layers and the second post and bear incessantly stress, and then thus fracture, reach the purpose of separating gallium nitride semiconductor layers and substrate.In addition, even be applied to nitride semiconductor thin film, also can be less because of the cross-sectional width of the second post of the present invention, and in epitaxial lateral overgrowth growth (epitaxial lateral over growth, ELOG) during nitride semiconductor layer, lower the infringement of the luminous efficiency of the dislocation distribution of epitaxial loayer (that is, nitride semiconductor layer) and the gallium nitride semiconductor layers that thermal stress causes.In addition, the nitride-based semiconductor post layer that another embodiment of the present invention consists of by the second empty structure that forms by the first empty structure of several patterns arrangement and nano-scale, when the growth nitride semiconductor thin film, can see through that nitride-based semiconductor post layer is grown up in the mode of epitaxial lateral overgrowth and the dislocation that lowers epitaxial loayer distributes, but and first, second empty structure also releasable material stress and thermal stress, break and the infringement that causes the nitride semiconductor layer luminous efficiency avoiding; If during growth nitride-based semiconductor thick film, except the dislocation that can reduce epitaxial loayer distributes, the nitride-based semiconductor post layer of patterning is in the process of cooling, a kind of approach of natural separation also is provided, the shear stress that difference because of thermal coefficient of expansion is caused discharges, and in the most weak interface natural fracture of intensity, to be separated into independent (freestanding) substrate of nitride-based semiconductor.
Although the present invention discloses as above with embodiment; so it is not to limit the present invention; any persons of ordinary skill in the technical field of the present invention; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention defines and is as the criterion when looking appended claim.
Claims (29)
1. nitride semiconductor base plate, it is characterized in that: this nitride semiconductor base plate comprises:
Epitaxial substrate;
Nitride post layer is formed on this epitaxial substrate, and wherein this nitride post layer comprises:
The first post of a plurality of patterned arrangement; And
The second post of a plurality of patterned arrangement, be formed on the first post of these a plurality of patterned arrangement, wherein respectively the cross-sectional width of this second post less than the cross-sectional width of this first post respectively, and respectively the distance between this second post more than or equal to the distance between this first post respectively;
Nitride semiconductor layer is formed on this second post of this nitride post layer; And
Mask layer covers the surface of this first post, this second post and this epitaxial substrate.
2. nitride semiconductor base plate as claimed in claim 1, it is characterized in that: the material of this nitride semiconductor layer comprises gallium nitride, aluminium nitride, indium gallium nitride, aluminium gallium nitride alloy or aluminum indium gallium nitride.
3. nitride semiconductor base plate as claimed in claim 1 is characterized in that: respectively the cross-sectional width of this first post and respectively the ratio of the distance between this first post greater than 1.
4. nitride semiconductor base plate as claimed in claim 1 is characterized in that: respectively the cross-sectional width of this second post and respectively the ratio of the distance between this second post greater than 0.8.
5. nitride semiconductor base plate as claimed in claim 1, it is characterized in that: respectively the thickness of this second post equals the thickness of this mask layer.
6. nitride semiconductor base plate as claimed in claim 1, it is characterized in that: the material of this nitride post layer comprises the III group-III nitride.
7. nitride semiconductor base plate as claimed in claim 6, it is characterized in that: this III group-III nitride comprises the nitride of boron, aluminium, gallium, indium, thallium or its combination.
8. nitride semiconductor base plate as claimed in claim 1, it is characterized in that: the material of this epitaxial substrate comprises sapphire, carborundum, silicon or GaAs.
9. nitride semiconductor base plate as claimed in claim 1 is characterized in that: the arrangement mode of these a plurality of the first posts or these a plurality of the second posts comprises and is arranged in strip, point-like or netted.
10. nitride semiconductor base plate as claimed in claim 1, it is characterized in that: this epitaxial substrate is different from the thermal coefficient of expansion of this nitride semiconductor layer.
11. nitride semiconductor base plate as claimed in claim 1 is characterized in that: the thickness of this nitride semiconductor layer is during greater than 100 μ m, and this nitride semiconductor layer can form the nitride-based semiconductor separate substrates by separating technology.
12. nitride semiconductor base plate as claimed in claim 1 is characterized in that: respectively the cross-sectional width of this first post and respectively the ratio of the distance between this first post less than or equal to 1.
13. nitride semiconductor base plate as claimed in claim 1 is characterized in that: respectively the cross-sectional width of this second post and respectively the ratio of the distance between this second post less than or equal to 0.8.
14. the manufacture method of a nitride semiconductor base plate is characterized in that: this manufacture method comprises:
Form the first post of a plurality of patterned arrangement in the epitaxial substrate surface;
Form mask layer in this epitaxial substrate surface, cover sidewall and the part end face of these a plurality of the first posts;
Form the second post of a plurality of patterned arrangement on these a plurality of first posts, wherein the cross-sectional width of this second post is less than the cross-sectional width of this first post, and respectively the distance between this second post more than or equal to the distance between this first post respectively; And
See through these a plurality of second posts and carry out epitaxial lateral overgrowth technique, to form nitride semiconductor layer.
15. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the material of this nitride semiconductor layer comprises gallium nitride, aluminium nitride, indium gallium nitride, aluminium gallium nitride alloy or aluminum indium gallium nitride.
16. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the arrangement mode of these a plurality of the first posts or these a plurality of the second posts comprises and is arranged in strip, point-like or netted.
17. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the step that forms these a plurality of the first posts of patterned arrangement comprises:
Form material layer in this epitaxial substrate surface;
On this material layer, form pattern mask, and the surface of this material layer of exposed portions serve; And
Take this pattern mask as mask, remove this material layer, to form these a plurality of first posts.
18. the manufacture method of nitride semiconductor base plate as claimed in claim 17 is characterized in that: the step that forms this mask layer comprises:
This pattern mask of etching is to reduce the width of this pattern mask;
Comprehensive formation film covers the part surface of this pattern mask, these a plurality of the first posts and this epitaxial substrate;
Remove this film on the end face of this pattern mask; And
Remove this pattern mask, to form this mask layer and to expose the part end face of these a plurality of the first posts.
19. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the method that forms these a plurality of the second posts of patterned arrangement comprises certainly these a plurality of second posts of part end face epitaxial growth of these a plurality of the first posts.
20. the manufacture method of nitride semiconductor base plate as claimed in claim 19 is characterized in that: the method for these a plurality of the second posts of epitaxial growth comprises hydride vapour phase epitaxy method, metal organic vapor method or molecular beam epitaxy.
21. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: form and also comprise after this nitride semiconductor layer temperature reduction technology is provided, this nitride semiconductor layer is separated from this epitaxial substrate surface.
22. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the step that forms these a plurality of the first posts of patterned arrangement comprises:
Sequentially form material layer and separating layer in this epitaxial substrate surface;
On this separating layer, form pattern mask, and the surface of this separating layer of exposed portions serve;
Take this pattern mask as mask, remove this separating layer;
This separating layer of etching is to reduce the width of this separating layer; And
Take this pattern mask as mask, remove this material layer and form this a plurality of the first posts.
23. the manufacture method of nitride semiconductor base plate as claimed in claim 22 is characterized in that: the material of this separating layer comprises metal oxide.
24. the manufacture method of nitride semiconductor base plate as claimed in claim 22 is characterized in that: the step that forms this mask layer comprises:
Comprehensive formation film covers the part surface of these a plurality of first posts, this separating layer, this pattern mask and this epitaxial substrate; And
Remove this separating layer, divesting this pattern mask and this film of part, and form this mask layer and expose the part end face of these a plurality of the first posts.
25. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: this epitaxial lateral overgrowth technique comprises hydride vapour phase epitaxy method, metal organic vapor method or molecular beam epitaxy.
26. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the material of these a plurality of the first posts or these a plurality of the second posts comprises the III group-III nitride.
27. the manufacture method of nitride semiconductor base plate as claimed in claim 26 is characterized in that: this III group-III nitride comprises the nitride of boron, aluminium, gallium, indium, thallium or its combination.
28. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the material of this epitaxial substrate comprises sapphire, carborundum, silicon or GaAs.
29. the manufacture method of nitride semiconductor base plate as claimed in claim 14 is characterized in that: the thickness of this nitride semiconductor layer is during greater than 100 μ m, and this nitride semiconductor layer can form the nitride-based semiconductor separate substrates by separating technology.
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