CN101925119B - Communication method, system and device for enhancing system capacity - Google Patents
Communication method, system and device for enhancing system capacity Download PDFInfo
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Abstract
The invention relates to a communication method for enhancing system capacity, comprising the following steps of: setting more than one clock rate at a data sending end and a data receiving end; dividing data to be sent into division blocks by the data sending end, transforming the division blocks and obtaining a count value according to the transformed division blocks and the clock rate; respectively setting start bits and stop bits of the transformed division blocks in resource elements sent by the data sending end, wherein the number of the resource elements positioned between the start bits and the stop bits of the transformed division blocks is the count value; starting to count by the data receiving end when receiving the start bits of the transformed division blocks and stopping counting after receiving the stop bits of the transformed division blocks so as to obtain the count value; and obtaining the transformed division blocks by the data receiving end through the count value and the clock rate and then carrying out inverse transformation on the transformed division blocks to obtain the division blocks. The invention also discloses communication system and device for enhancing the system capacity. The embodiment of the invention can be used for reducing the actual transmission quantity, thereby effectively enhancing the capacity of a downlink relay link.
Description
Technical field
The present invention relates to relaying cellular communication system information transmission technology field, more specifically, relate to a kind of communication means, system and device that improves power system capacity.
Background technology
Wireless relaying technique provides a kind of solution with high performance-price ratio, introduces via node between base station and terminal, forms novel relaying cellular communication system, can effectively improve network coverage quality, capacity and improve resource utilization.Wireless relaying technique is introduced Long Term Evolution (Long TermEvolution, LTE) system, between the base station of LTE system and terminal, introduce via node, formed advanced (Long Term Evolution Advanced, the LTE advanced) system of Long Term Evolution.The introducing of via node is larger on allocation of radio resources and scheduling impact.From the angle of allocation of radio resources, the base station not only will be the access link Resources allocation, also will be newly-increased interface repeated link Resources allocation, and resource element is the least unit of running time-frequency resource in the LTE-advanced system.And from scheduling, generally have dual mode, a kind of is that the scheduling that interior all nodes of multihop cell comprise the user (UE) that relaying (RS) and RS cover is responsible in the base station, is called the centralized dispatching mode; Another is that the base station only is responsible for repeated link and is transmitted the namely scheduling of RS itself, and the UE of RS covering finishes scheduled transmission by RS, and this mode is called distributed scheduling.According to discussion known today and the conclusion reached, type 1 relaying will widely be adopted.Type 1 relaying is a via node with layer three function, namely supports X2 and S1 interface, can automatically set up the MR-BS equipment of carrying.Can find out based on such framework, more directly be the method that adopts distributed scheduling.
Throughput of system ability under the LTE advanced system distributed scheduling depends on multiplexing capacity and the throughput of repeated link.If Resource Allocation Formula is semi-static, the throughput that requires on each repeated link interface is depended on the running time-frequency resource amount of distributing on the repeated link and the channel quality of repeated link.The running time-frequency resource amount refers to, the time slot persistence length that repeated link can be assigned to and the number of frequency bands of frequency domain size.
With via node be positioned over can bring enough little shadow fading and enough good repeated link signal to noise ratio the position with the assurance repeated link reliability transmission, the path loss of repeated link reduces greatly so.Improve the throughput that requires on each repeated link interface and just depend on the running time-frequency resource amount of distributing on the repeated link.
Each via node has certain coverage, by the UE of relay node services via the via node forwarding data.Because the synthesis model of existing different frame structure, the number of subframes that repeated link can be assigned to is extremely limited, data in the subframe transfer to receiving terminal successively with binary sequence, and receiving terminal carries out the respective handling such as demodulation to the binary data that receives again.Along with the raising of via node number, several via nodes all will take running time-frequency resource amount separately in same subframe, and the binary data that transmits increases, and this causes bottleneck effect serious.Bottleneck effect refers to the demand of the rare UE of not satisfying of Radio Resource, thereby causes throughput limited.
Summary of the invention
The embodiment of the invention proposes a kind of communication means that improves power system capacity, to solve the bottleneck effect in the via node down link.
The embodiment of the invention also proposes a kind of communication system that improves power system capacity, to solve the bottleneck effect in the via node down link.
The embodiment of the invention also proposes a kind of communication transmitting terminal that improves power system capacity, to solve the bottleneck effect in the via node down link.
The embodiment of the invention also proposes a kind of communication receiver that improves power system capacity, to solve the bottleneck effect in the via node down link.
The technical scheme of the embodiment of the invention is as follows:
A kind of communication means that improves power system capacity, the method comprises:
An above clock rate is set;
Be block with Data Division to be sent, the conversion block obtains count value according to block and clock rate after the conversion;
The start bit of block and stop bit place respectively the resource element that data sending terminal sends after the conversion, and the start bit of block and the resource element number between the stop bit are count values after the conversion;
Data receiver begins counting when receiving after the conversion start bit of block, stops counting after receiving the stop bit of block after the conversion, obtains count value;
By count value and clock rate, data receiver obtains changing rear block, carries out inverse conversion to changing rear block, obtains block.
A kind of communication system that improves power system capacity, this system comprises:
Data sending terminal, be used for arranging an above clock rate, be block with Data Division to be sent, the conversion block, obtain count value according to block and clock rate after the conversion, start bit and the stop bit of block after the conversion are placed respectively the resource element that sends, and the start bit of block and the resource element number between the stop bit are count values after the conversion;
Data receiver, be used for receiving start bit and the stop bit of the rear block of conversion, begin counting when receiving the start bit of changing rear block, stop counting after receiving the stop bit of changing rear block, obtain count value, and by count value and clock rate, obtain changing rear block, carry out inverse conversion to changing rear block, obtain block.
A kind of communication transmitting terminal device that improves power system capacity, this device comprises:
Module is set, is used for arranging an above clock rate;
Data module, being used for Data Division to be sent is block, the conversion block obtains count value according to block and clock rate after the conversion;
Send counting module, start bit and the stop bit of block place respectively the resource element of transmission after being used for change, and the start bit of the rear block of conversion and the resource element number between the stop bit are count values.
A kind of communications reception end device that improves power system capacity, this device comprises:
The count pick up module, be used for reception and place the start bit of the rear block of resource element conversion and the stop bit of the rear block of conversion, begin counting when receiving after the conversion start bit of block, stop counting after receiving the stop bit of block after the conversion, obtain count value;
Processing module is used for calculating and obtains changing rear block by count value and clock rate, carries out inverse conversion to changing rear block, obtains block.
From technique scheme, can find out, in embodiments of the present invention, by data to be transmitted being divided into suitable block, the data to be transmitted of binary sequence is converted into a decimal data, according to the decimal numeral size of data of the actual representative of this binary sequence, start bit and the stop bit of the rear block of conversion is set in resource element.Transmitting terminal only need transmit start bit and the stop bit of the rear block of conversion, receiving terminal is according to start bit and position and the clock rate of stop bit in resource element of the rear block of conversion, can obtain decimal data, receiving terminal is converted into binary data with decimal data.Thereby reduced actual transfer size, Effective Raise the via node downlink capacity, avoid the bottleneck effect of repeated link.In addition, the embodiment of the invention realizes simple, owing to reduce actual transmissions data amount, the transinformation of air interface greatly reduces, thereby has alleviated system interference.
Description of drawings
Fig. 1 is a kind of communication means flow chart that improves power system capacity provided by the invention
Fig. 2 is provided by the invention at MR-BS a kind of communication means flow chart that improves power system capacity to the down link of RS;
Fig. 3 is provided by the invention at MR-BS a kind of MR-BS process chart that improves the communication means of power system capacity to the down link of RS;
Fig. 4 is provided by the invention at MR-BS a kind of RS process chart that improves the communication means of power system capacity to the down link of RS;
Fig. 5 is provided by the invention at RS a kind of flow chart that improves the communication means of power system capacity to the down link of MS-R;
Fig. 6 is provided by the invention at RS a kind of RS process chart that improves the communication means of power system capacity to the down link of MS-R;
Fig. 7 is provided by the invention at RS a kind of MS-R process chart that improves the communication means of power system capacity to the down link of MS-R;
Fig. 8 is a kind of communication sending end structure schematic diagram that improves power system capacity provided by the invention;
Fig. 9 is a kind of communication receiver structural representation that improves power system capacity provided by the invention;
Figure 10 is transmission provided by the invention and multiplexing schematic diagram.
Embodiment
For making the purpose, technical solutions and advantages of the present invention express clearlyer, the present invention is further described in more detail below in conjunction with drawings and the specific embodiments.
Continue in the prior art in the node down link, the data in the repeated link subframe transfer to antenna port successively with binary sequence, are sent to receiving terminal.Receiving terminal carries out the respective handling such as demodulation to the binary sequence that receives again.Because the sub-frame data that repeated link can be assigned to is limited, each via node will take certain resource and send binary data in subframe.Binary data increase the bottleneck effect that has caused in the via node down link.
The present invention proposes a kind of communication means that improves power system capacity, is applicable to the via node down link.
Fig. 1 is a kind of communication means flow chart that improves power system capacity, specifically may further comprise the steps:
At data sending terminal and data receiver an above clock rate is set, comprises the clock rate that is provided with an above different length value, length value resource element counting in corresponding clock rate is equal to counting length value in the decimal system for 1 time.
Clock rate comprises coarse adjustment clock rate and fine setting clock rate.The coarse adjustment clock rate is 10, and namely the resource element counting is equal to for 1 time and counts 10 in the decimal system in coarse adjustment counting, and the fine setting clock rate is 1, and namely the resource element counting is equal to for 1 time and counts 1 in the decimal system in the fine setting counting.
Clock rate comprises coarse adjustment clock rate 1, coarse adjustment clock rate 2 and fine setting clock rate, and coarse adjustment clock rate 1 is 100, and namely the resource element counting is equal to for 1 time and counts 100 in the decimal system in coarse adjustment counting 1; Coarse adjustment clock rate 2 is 10, and namely the resource element counting is equal to for 1 time and counts 10 in the decimal system in coarse adjustment counting 2; The fine setting clock rate is 1, and namely the resource element counting is equal to for 1 time and counts 1 in the decimal system in fine setting counting.
Obtaining count value according to block and clock rate after the conversion may further comprise the steps:
A, will have the clock rate of maximum length value as present clock speed;
Block is divided by present clock speed, if obtain integer, then with the count value of this integer as corresponding present clock speed, execution in step C after B, the usefulness conversion; If do not obtain integer, inferior length value clock rate as present clock speed, is returned step B and continued to carry out;
C, with the clock rate of inferior length value as present clock speed,,,, change step C over to and continue to carry out then with the count value of this integer as present clock speed if obtain integer divided by present clock speed with remainder; If do not obtain integer, return step C and continue to carry out, until remainder is 0.
Clock rate comprises coarse adjustment clock rate and fine setting clock rate.The coarse adjustment clock rate is 10, and the fine setting clock rate is 1 o'clock, and binary data to be sent is split as the block that size is 7 bit to 9 bits.Should be converted to decimal data by binary block.
Count value comprises coarse adjustment count value corresponding to coarse adjustment clock rate and fine setting count value corresponding to fine setting clock rate,
With the coarse adjustment clock rate as present clock speed;
With changing rear block divided by the coarse adjustment clock rate, if obtain integer, then this integer is as coarse adjustment count value corresponding to coarse adjustment clock rate, to finely tune clock rate as present clock speed, with remainder divided by the fine setting clock rate, obtain integer, then with this integer as fine setting fine setting count value corresponding to clock rate.If with changing rear block divided by the coarse adjustment clock rate.Do not obtain integer, will finely tune clock rate as present clock speed, divided by the fine setting clock rate, obtain integer with block after the conversion, then with this integer as fine setting fine setting count value corresponding to clock rate.
When clock rate comprises coarse adjustment clock rate 1, coarse adjustment clock rate 2 and fine setting clock rate.Coarse adjustment clock rate 1 is 100, and the coarse adjustment clock rate is 10, and the fine setting clock rate is 1 o'clock, and binary data to be sent is split as the block that size is 10 bit to 12 bits.Should be converted to decimal data by binary block.
Count value comprises the coarse adjustment count value 1 of coarse adjustment clock rate 1 correspondence, coarse adjustment count value 2 and the fine setting count value corresponding to fine setting clock rate of coarse adjustment clock rate 2 correspondences,
To have the coarse adjustment clock rate 1 of maximum length value as present clock speed;
With the conversion after block divided by coarse adjustment clock rate 1, if obtain integer, then with this integer as coarse adjustment count value 1; With coarse adjustment clock rate 2 as present clock speed, with remainder divided by coarse adjustment clock rate 2, if obtain integer, then with this integer as coarse adjustment count value 2; To finely tune clock rate as present clock speed, with remainder divided by the fine setting clock rate, if obtain integer, then with this integer as the fine setting count value;
With the conversion after block divided by coarse adjustment clock rate 1, if do not obtain integer, with coarse adjustment clock rate 2 as present clock speed, with the conversion after block divided by coarse adjustment clock rate 2, if obtain integer, then with this integer as coarse adjustment count value 2; To finely tune clock rate as present clock speed, with remainder divided by the fine setting clock rate, if obtain integer, then with this integer as the fine setting count value;
With changing rear block divided by coarse adjustment clock rate 1, if do not obtain integer, with changing rear block divided by coarse adjustment clock rate 2, if do not obtain integer, to finely tune clock rate as present clock speed, with the conversion after block divided by the fine setting clock rate, if obtain integer, then with this integer as the fine setting count value.
In each subframe, control signal (being contained in down control channel (among the PDCCH)) is in the front portion of subframe, and the data message that transmits is positioned at the rear portion of subframe.The data message that transmits in each subframe will obtain indication in the control signal of this subframe.
Be the block of 7 to 9 bits for size, before data send, in the control channel in the subframe, set extra control signal bit, require two bits for control signal.Wherein, 00 expression coarse adjustment counting start bit, 01 expression coarse adjustment counting stop bit and fine setting counting start bit, 10 expression fine setting counting stop bits.By control channel, can indicate at which resource element to send coarse adjustment counting start bit coarse adjustment counting stop bit and fine setting counting start bit, and fine setting counting stop bit.Thereby can obtain relevant position to count accurately at this resource element exactly so that receive.For example, the 7 bit-binary data 1111111 that need to transmit, being converted into decimal data is 128, and when coarse adjustment speed is 10, fine setting speed is 1, and then data 128 need coarse adjustment counting 12 times, fine setting counting 8 times, amounting to needs 20 resource elements.00 expression coarse adjustment counting start bit, this start bit are in the 1st resource element, and 01 coarse adjustment counting stop bit and fine setting counting start bit are in the 13rd resource element, and 10 fine setting counting stop bits are in the 21st resource element.Thereby need 7 Bit datas of transmission finally to be reduced to three Bit datas, i.e. coarse adjustment counting start bit, coarse adjustment counting stop bit and fine setting counting start bit and fine setting counting stop bit, wherein Bit data of each bit stealing, totally three Bit datas.Receiving terminal is according to there being what coarse adjustment counting, and what fine setting countings just can obtain metric data.
When having a plurality of blocks to transmit, the coarse adjustment of each block counting start bit, coarse adjustment counting stop bit and fine setting counting start bit, fine setting counting stop bit is in corresponding resource element; Only need to satisfy coarse adjustment counting start bit, the resource element prime number between coarse adjustment counting stop bit and the fine setting counting start bit equals the coarse adjustment counting; Coarse adjustment counting stop bit and fine setting counting start bit, it is just passable that the resource element prime number between the fine setting counting stop bit equals the fine setting counting.Coarse adjustment counting start bit is arranged in corresponding resource element, coarse adjustment counting stop bit and fine setting counting start bit, fine setting counting stop bit just can further obtain metric data.When some resource element is controlled that signaling takies or other data when taking, MR-BS will dispatch its start bit and stop bit successively to backward shift, arrange its relevant position so that receive the data that can correctly recover transmission.
Be the block of 10 to 12 bits for size, before data send, in the control channel in the subframe, set extra control signal bit, require two bits for control signal.Wherein, 1 start bit is counted in 00 expression coarse adjustment, and 1 stop bit is counted in 01 expression coarse adjustment and 2 start bits are counted in coarse adjustment, and 2 stop bits and fine setting counting start bit are counted in 10 expression coarse adjustment, 11 expression fine setting counting stop bits.
By control channel, can indicate in which resource element transmission coarse adjustment and count 1 start bit, 1 stop bit is counted in coarse adjustment and 2 start bits are counted in coarse adjustment, and 2 stop bits and fine setting counting start bit are counted in coarse adjustment, and finely tune the counting stop bit.Thereby can obtain relevant position to count accurately at resource element exactly so that receive.For example, the 10 bit-binary data 1111111111 that need transmission, being converted into decimal data is 512, when coarse adjustment speed 1 is 100, coarse adjustment speed 2 is 10, and fine setting speed is 1, then data 512 need coarse adjustment counting 1 counting 5 times, coarse adjustment counting 2 countings 1 time, fine setting counting 2 times, amounting to needs 8 resource elements.00 expression coarse adjustment counting start bit, coarse adjustment is counted in the 1st resource element of 1 start bit, 1 stop bit is counted in 01 coarse adjustment and coarse adjustment is counted 2 start bits in the 6th resource element, 2 stop bits are counted in 10 expression coarse adjustment and fine setting is counted start bit in the 7th resource element, and 11 expression fine setting counting stop bits are in the 9th resource element.Thereby need 10 Bit datas of transmission finally to be reduced to 4 Bit datas, i.e. 1 start bit is counted in coarse adjustment, 1 stop bit is counted in coarse adjustment and 2 start bits are counted in coarse adjustment, 2 stop bits and fine setting counting start bit and fine setting counting stop bit are counted in coarse adjustment.Receiving terminal according to coarse adjustment counting 1 have what, coarse adjustment counting 2 have what, the fine setting counting have what, just can obtain metric data.
When having a plurality of blocks to transmit, 1 start bit is counted in the coarse adjustment of each block, and 1 stop bit is counted in coarse adjustment and 2 start bits are counted in coarse adjustment, 2 stop bits and fine setting counting start bit are counted in coarse adjustment, and fine setting counting stop bit is in corresponding resource element.Only need to satisfy coarse adjustment and count 1 start bit, coarse adjustment is counted 1 stop bit and coarse adjustment and is counted resource element prime number between 2 start bits and equal coarse adjustment and count 1 count value; 1 stop bit is counted in coarse adjustment and 2 start bits are counted in coarse adjustment, and 2 stop bits and fine setting counting start bit are counted in coarse adjustment, between the resource element prime number equal coarse adjustment and count 2 count values; 2 stop bits and fine setting counting start bit are counted in coarse adjustment, and it is just passable that the resource element prime number between the fine setting counting stop bit equals to finely tune count value.Have coarse adjustment to count 1 start bit in corresponding resource element, 1 stop bit is counted in coarse adjustment and 2 start bits are counted in coarse adjustment, and 2 stop bits and fine setting counting start bit are counted in coarse adjustment, and fine setting counting stop bit just can obtain metric data.When some resource element is controlled that signaling takies or other data when taking, MR-BS will dispatch its start bit and stop bit successively to backward shift, arrange its relevant position so that receive the data that can correctly recover transmission.
After data receiver receives and sends the start bit control signal of block after the conversion by data sending terminal, begin counting when receiving again the start bit of block after the conversion; After data receiver receives and sends the stop bit control signal of block after the conversion by data sending terminal, stop counting when receiving again the stop bit of block after the conversion.
After receiving terminal obtains corresponding count value, block after the conversion=count value * clock rate.For the data that coarse adjustment count value and fine setting count value are arranged, block after the conversion=coarse adjustment count value * coarse adjustment speed+fine setting count value * finely tunes counting; For the data that coarse adjustment count value 1, coarse adjustment count value 2 and fine setting count value are arranged, block after the conversion=coarse adjustment count value 1* coarse adjustment speed 1+ coarse adjustment count value 2* coarse adjustment speed 2+ fine setting count value * fine setting counting.
The block decimal data is converted to binary sequence after will changing, and receiving terminal obtains block.
Fig. 2 is at MR-BS a kind of flow chart that improves the communication means of power system capacity to the down link of RS, specifically may further comprise the steps:
Block needed the coarse adjustment counting after step 202, MR-BS judged conversion, and then execution in step 203; Block did not need the coarse adjustment counting after MR-BS judged conversion, and then execution in step 204.
Clock rate comprises coarse adjustment clock rate and fine setting clock rate.The coarse adjustment clock rate can be a plurality of, and arranges before transfer of data according to the bit number of transmission binary data.It is 10 that the coarse adjustment clock rate is set, and namely 1 resource element counting is equal to for 1 time and counts 10 in the decimal system in coarse adjustment counting; The fine setting clock rate is set to 1, and namely 1 resource element counting is equal to for 1 time and counts 1 in the decimal system in fine setting counting.The bit number that coarse adjustment clock rate and fine setting clock rate are applicable to block is a certain numerical value in 7～9.It is 100 that coarse adjustment clock rate 1 is set, namely 1 resource element counting is equal to for 1 time and counts 100 in the decimal system in coarse adjustment counting 1, coarse adjustment clock rate 2 is 10, namely 1 resource element counting is equal to for 1 time and counts 10 in the decimal system in coarse adjustment counting 2, the fine setting clock rate is 1, and namely 1 resource element counting is equal to for 1 time and counts 1 in the decimal system in fine setting counting.The bit number that coarse adjustment clock rate 1, coarse adjustment clock rate 2 and fine setting clock rate are applicable to block is a certain numerical value in 10～12.
Whether block was greater than the coarse adjustment clock rate after MR-BS judged conversion, if block is greater than the coarse adjustment clock rate after the conversion, then block needs the coarse adjustment counting after the conversion; If block is less than the coarse adjustment clock rate after the conversion, then block does not need the coarse adjustment counting after the conversion.
The start bit control signal was counted in the block coarse adjustment after step 203, via node (RS) received and send conversion in the control channel of MR-BS in subframe.MR-BS sends the rear block coarse adjustment counting of conversion start bit to RS in resource element, and begins to count up to next data to be sent; RS receives the coarse adjustment counting start bit of the rear block of conversion, beginning coarse adjustment counting.
Block need to be finely tuned counting after step 204, MR-BS judged conversion, and then execution in step 205; Block did not need the fine setting counting after MR-BS judged conversion, and then execution in step 206.
MR-BS according to conversion after block whether be 0 more than or equal to block after coarse adjustment clock rate and the conversion divided by the remainder of coarse adjustment clock rate whether, need to judge whether the fine setting counting.Be that MR-BS judges that block after block is more than or equal to coarse adjustment clock rate and conversion after the conversion is 0 divided by the remainder of coarse adjustment clock rate, then block does not need the fine setting counting after the conversion; Otherwise block need to be finely tuned counting after the conversion.
When step 205, MR-BS count down to fine setting counting start bit, send block coarse adjustment counting stop bit and fine setting counting start bit control signal after the conversion to RS in the control channel in giving frame, and in corresponding resource element, send coarse adjustment counting stop bit and fine setting counting start bit.RS stops the coarse adjustment counting after receiving coarse adjustment counting stop bit that MR-BS sends and fine setting counting start bit, and the coarse adjustment data that send for MR-BS of storage coarse adjustment counting, and RS begins fine setting to be counted.
Block coarse adjustment count value and fine setting count value multiply by corresponding count rate with count value after the conversion of RS record, can obtain corresponding decimal data.For example, coarse adjustment counting 12, coarse adjustment speed is 10, fine setting counting 8, fine setting speed is 1, then corresponding decimal data is 12*10+8*1=128.Again decimal data is converted to binary data 1111111.RS obtains corresponding binary data.
Fig. 3 is at MR-BS a kind of MR-BS process chart that improves the communication means of power system capacity to the down link of RS, specifically may further comprise the steps:
Whether greater than the coarse adjustment clock rate, if block is greater than the coarse adjustment clock rate after the conversion, then block needs coarse adjustment to count to MR-BS after the conversion according to the rear block of conversion; If block is less than the coarse adjustment clock rate after the conversion, then block does not need the coarse adjustment counting after the conversion.
Send the coarse adjustment counting start bit control signal of block in step 303, the MR-BS control channel in subframe to RS.
Block need to be finely tuned counting after step 305, MR-BS judged conversion, and then execution in step 306; Block did not need the fine setting counting after MR-BS judged conversion, and then execution in step 308.
MR-BS according to conversion after block whether be 0 more than or equal to block after coarse adjustment clock rate and the conversion divided by the remainder of coarse adjustment clock rate whether, need to judge whether the fine setting counting.Be that MR-BS judges that block after block is more than or equal to coarse adjustment clock rate and conversion after the conversion is 0 divided by the remainder of coarse adjustment clock rate, then block does not need the fine setting counting after the conversion; Otherwise block is not the integral multiple of coarse adjustment clock rate after the conversion, and then block need to be finely tuned counting after the conversion.
When step 306, MR-BS count down to fine setting data to be sent, send the rear block coarse adjustment counting stop bit of conversion and fine setting counting start bit control signal to RS in the control channel in subframe.
Fig. 4 is at MR-BS a kind of RS process chart that improves the communication means of power system capacity to the down link of RS, specifically may further comprise the steps:
Step 401, RS receive the coarse adjustment counting start bit control signal that MR-BS sends the rear block of conversion, execution in step 402; RS does not receive that MR-BS sends the coarse adjustment counting start bit control signal of the rear block of conversion, execution in step 403.
Step 402, RS receive block coarse adjustment counting start bit after the conversion that MR-BS sends, beginning coarse adjustment counting in corresponding resource element.
Step 403, RS receive block coarse adjustment counting stop bit and fine setting counting start bit control signal after the conversion that MR-BS sends, and then execution in step 404; Stop bit and fine setting counting start bit control signal were not counted in the block coarse adjustment after RS received conversion, and then execution in step 405.
Block coarse adjustment counting stop bit and fine setting counting start bit after step 404, the RS conversion that reception MR-BS sends in corresponding resource element, stop coarse adjustment counting and poke coarse adjustment enumeration data and sent the coarse adjustment enumeration data by MR-BS, begin simultaneously the fine setting counting.
Step 405, RS receive block fine setting counting stop bit control signal after the conversion that MR-BS sends, and then execution in step 406; RS does not receive block fine setting counting stop bit control signal after the conversion that MR-BS sends, and then execution in step 407.
Block fine setting counting stop bit stops fine setting and counts after step 406, the RS conversion that reception MR-BS sends in corresponding resource element, and storage fine setting enumeration data is sent the fine setting enumeration data by MR-BS.
Block coarse adjustment count value and fine setting count value after step 407, the conversion of RS record multiply by corresponding count rate with count value, obtain corresponding decimal data.For example, the coarse adjustment count value is 12, and coarse adjustment speed is 10, and the fine setting count value is 8, and fine setting speed is 1, and then corresponding decimal data is 12*10+8*1=128.Again decimal data is converted to binary data 1111111.RS obtains corresponding binary data.
Fig. 5 a kind of flow chart that improves the communication means of power system capacity that is RS to the down link of MS-R specifically may further comprise the steps:
Step 501, RS are to doing Data Division at via node downlink antenna port binary data waiting for transmission.Again binary data is converted to decimal data.Data Division is that binary data waiting for transmission is divided into a plurality of blocks, and the bit number of each block determines by empirical value, for example a numerical value in 7 bit to 12 bits.But for the binary data less than 7 bits, need not carry out Data Division in the present invention.For example, the binary data of 1 28 bit is divided into 4 blocks, and each block is 7 bits.The binary data block of 17 bit, the decimal numeral numerical value change scope of actual representative is 0～128 (2
7=128), namely be 1 in clock rate when (each resource element counting 1 time), can to regard as be 128 countings on the resource element to 128 countings at the most.Resource element is the least unit that resource is distributed in LTE advanced system.
Block needed the coarse adjustment counting after step 502, RS judged conversion, and then execution in step 503; Block did not need the coarse adjustment counting after RS judged conversion, and then execution in step 504.
Clock rate comprises coarse adjustment clock rate and fine setting clock rate.The coarse adjustment clock rate can be a plurality of, and arranges before transfer of data according to the bit number of transmission binary data.It is 10 that the coarse adjustment clock rate is set, and namely 1 resource element counting is equal to for 1 time and counts 10 in the decimal system in coarse adjustment counting; The fine setting clock rate is set to 1, and namely 1 resource element counting is equal to for 1 time and counts 1 in the decimal system in fine setting counting.The bit number that coarse adjustment clock rate and fine setting clock rate are applicable to block is a certain numerical value in 7～9.It is 100 that coarse adjustment clock rate 1 is set, namely 1 resource element counting is equal to for 1 time and counts 100 in the decimal system in coarse adjustment counting 1, coarse adjustment clock rate 2 is 10, namely 1 resource element counting is equal to for 1 time and counts 10 in the decimal system in coarse adjustment counting 2, the fine setting clock rate is 1, and namely 1 resource element counting is equal to for 1 time and counts 1 in the decimal system in fine setting counting.The bit number that coarse adjustment clock rate 1, coarse adjustment clock rate 2 and fine setting clock rate are applicable to block is a certain numerical value in 10～12.
Whether greater than the coarse adjustment clock rate, if block is greater than the coarse adjustment clock rate after the conversion, then block needs coarse adjustment to count to RS after the conversion according to the rear block of conversion; If block is less than the coarse adjustment clock rate after the conversion, then block does not need the coarse adjustment counting after the conversion.
Step 503, by the user of relay node services (MS-R) receive in the control channel of RS in subframe institute sends conversion afterwards the block coarse adjustment count the start bit dispatching command.RS sends the rear block coarse adjustment counting of conversion start bit to MS-R in resource element, and begins to count up to next data to be sent; MS-R receives the coarse adjustment counting start bit of the rear block of conversion, beginning coarse adjustment counting.
Block need to be finely tuned counting after step 504, RS judged conversion, and then execution in step 505; Block did not need the fine setting counting after RS judged conversion, and then execution in step 506.
RS according to conversion after block whether be 0 more than or equal to block after coarse adjustment clock rate and the conversion divided by the remainder of coarse adjustment clock rate whether, whether judge need to need the fine setting counting.Be that RS judges that block after block is more than or equal to coarse adjustment clock rate and conversion after the conversion is 0 divided by the remainder of coarse adjustment clock rate, then block does not need the fine setting counting after the conversion; Otherwise block need to be finely tuned counting after the conversion.
When step 505, RS count down to fine setting enumeration data to be sent, send block coarse adjustment counting stop bit and fine setting counting start bit dispatching command after the conversion to MS-R in the control channel in subframe, and in corresponding resource element, send coarse adjustment counting stop bit and fine setting counting start bit.MS-R stops the coarse adjustment counting after receiving coarse adjustment counting stop bit that RS sends and fine setting counting start bit, and storage coarse adjustment counting is the coarse adjustment enumeration data that RS sends, and begins fine setting and counts.
Step 506, RS count down to next data to be sent, send the rear block fine setting of conversion counting stop bit control signal to MS-R in the control channel in subframe, stop counting, and block fine setting counting stop bit after in corresponding resource element, sending conversion.Block fine setting counting stop bit stops the fine setting counting MS-R receives conversion in corresponding resource element after, and storage fine setting enumeration data is the fine setting data that RS sends.
Block coarse adjustment count value and fine setting count value multiply by corresponding count rate with count value after the conversion of MS-R record, obtain corresponding decimal data.For example, the coarse adjustment count value is 12, and coarse adjustment speed is 10, and the fine setting count value is 8, and fine setting speed is 1, and then corresponding decimal data is 12*10+8*1=128.Again decimal data is converted to binary data 1111111.MS-R obtains corresponding binary data.
Fig. 6 is at RS a kind of RS process chart that improves the communication means of power system capacity to the down link of MS-R, specifically may further comprise the steps:
Block needed the coarse adjustment counting after step 602, RS judged conversion, and then execution in step 603; As change rear block and do not need coarse adjustment counting, then execution in step 605.
Whether block was greater than the coarse adjustment clock rate after RS judged conversion, if block is greater than the coarse adjustment clock rate after the conversion, then block needs the coarse adjustment counting after the conversion; If block is less than the coarse adjustment clock rate after the conversion, then block does not need the coarse adjustment counting after the conversion.
Send the coarse adjustment counting start bit control signal of the rear block of conversion in step 603, the RS control channel in subframe to MS-B.
Block need to be finely tuned counting after step 605, RS judged conversion, and then execution in step 606; Block did not need the fine setting counting after RS judged conversion, and then execution in step 608.
RS according to conversion after block whether more than or equal to being that whether block is 0 divided by the remainder of coarse adjustment clock rate after coarse adjustment clock rate and the conversion, need to judge whether the fine setting counting.Be that RS judges that block after block is more than or equal to coarse adjustment clock rate and conversion after the conversion is 0 divided by the remainder of coarse adjustment clock rate, then block does not need the fine setting counting after the conversion; Otherwise block need to be finely tuned counting after the conversion.
When step 606, RS count down to fine setting data to be sent, send the rear block coarse adjustment counting stop bit of conversion and fine setting counting start bit control signal to MS-B in the control channel in subframe.
Fig. 7 is at RS a kind of MS-R process chart that improves the communication means of power system capacity to the down link of MS-R, specifically may further comprise the steps:
Block coarse adjustment counting stop bit and fine setting counting start bit after step 704, the MS-R conversion that reception MR-BS sends in corresponding resource element, stop coarse adjustment counting and poke coarse adjustment enumeration data and sent the coarse adjustment enumeration data by RS, begin simultaneously the fine setting counting.
The present invention also provides a kind of communication system that improves power system capacity, this system comprises: data sending terminal, be used for arranging an above clock rate, be block with Data Division to be sent, the conversion block, obtain count value according to block and clock rate after the conversion, start bit and the stop bit of block after the conversion that obtains to transmit according to count value, place respectively the resource element of transmission to send the start bit and the stop bit that obtain, the resource element number between start bit and the stop bit is count value; Data receiver, start bit and the stop bit of block after being used for that an above clock rate is set and receiving conversion, begin counting when receiving the start bit that the rear block of conversion is arranged in the resource element, stop counting after receiving the stop bit that the rear block of conversion is arranged in the resource element, obtain count value, obtain changing rear block according to count value and clock rate, carry out inverse conversion to changing rear block, obtain block.
Such as Fig. 8, data sending terminal comprises, module 801 is set, and is used for arranging an above clock rate; Data module 802, data module, being used for Data Division to be sent is block, the conversion block obtains count value according to block and clock rate after the conversion; Send counting module 803, send counting module, start bit and the stop bit of block place respectively the resource element of transmission to send start bit and the stop bit that obtains after the conversion that is used for obtaining transmitting according to count value, and the resource element number between start bit and the stop bit is count value.Further comprise computing module 804, be used for calculating an above count value of the rear block of conversion.
Such as Fig. 9, data receiver comprises, module 901 is set, and is used for arranging an above clock rate; Count pick up module 902, the count pick up module, be used for reception and place the start bit of the rear block of resource element conversion and the stop bit of the rear block of conversion, begin counting when receiving the start bit that the rear block of conversion is arranged in the resource element, receive resource element and have after the conversion and stop counting behind the stop bit of block, obtain count value; Processing module 903 is used for calculating the rear block of conversion according to count value and clock rate, carries out inverse conversion to changing rear block, obtains block.
By communication means of the present invention, the block that need to transmit 7 Bit datas finally is reduced to needs to transmit 3 Bit datas, coarse adjustment counting start bit, and stop bit and fine setting counting start bit are counted in coarse adjustment, and stop bit is counted in fine setting.D1 among Fig. 9 represents the transmission status of this block, and the time delay that causes is the duration of 20 resource elements.D1 is comprised of three Bit datas, coarse adjustment counting start bit, coarse adjustment counting stop bit and fine setting counting start bit, fine setting counting stop bit.Wherein 20 resource elements are respectively 12 resource elements and 88 resource elements compositions that the fine setting counting needs that 12 coarse adjustment need to be counted.In Fig. 9, according to the control signal in the control channel, the block that to observe 8 length be 7 bits (is that D1 is to D8, each block is enumerated according to 128 times under worst case countings) can transmit according to Fig. 9 D1=D2=D3=D4=D5=D6=D7=D8=1111111 (binary system)=128 (decimal system).Namely in 28 resource elements, transmit 8 blocks, and also have 4 resource elements vacant, can be used for the remainder data transmission.In traditional transmission plan, 28 resource elements are only to transmit the data of 28 bits, i.e. 4 blocks.More existing transmission plan, communication means of the present invention can be many for existing methodical twice with throughput hoisting.
In addition, by communication means of the present invention, the transinformation of air interface greatly reduces, thereby reduces system interference.Simultaneously, take owing to reduce running time-frequency resource, have more running time-frequency resource can be used for interference coordination, thereby reduce the signal reception mistake that external disturbance causes.
Communication means of the present invention is converted to corresponding decimal data with antenna port binary data waiting for transmission, and after then decimal data being processed accordingly, receiving terminal will receive that decimal data is converted to binary data.Communication means of the present invention is to illustrate by the BPSK modulation system.This method is equally applicable to other modulation system, and for example QPSK modulation can be done corresponding the adjustment to count rate.This paper is repeated description no longer.
The above is preferred embodiment of the present invention only, is not for limiting protection scope of the present invention.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. a communication means that improves power system capacity is characterized in that, at data sending terminal and data receiver an above clock rate is set, and the method comprises:
Data sending terminal is block with Data Division to be sent, and the conversion block obtains count value according to block and clock rate after the conversion; Described conversion block is that the block with different systems is converted to decimal data;
Data sending terminal obtains transmitting start bit and the stop bit of the rear block of conversion according to count value, place respectively the resource element of data sending terminal transmission to send the start bit and the stop bit that obtain, the resource element number between start bit and the stop bit is count value;
Data receiver begins counting when receiving the start bit that the rear block of conversion is arranged in the resource element, receives to stop counting after resource element have the stop bit of changing rear block, obtains count value;
Data receiver obtains changing rear block according to count value and clock rate, carries out inverse conversion to changing rear block, obtains block; It is described that to carry out inverse conversion be that block after the decimal system conversion is converted to different system data to changing rear block,
A clock rate that above clock rate is an above different length value of described setting, described length value resource element counting in corresponding clock rate is equal to counting length value in the decimal system for 1 time;
Describedly obtain count value according to block and clock rate after the conversion and comprise:
A, will have the clock rate of maximum length value as present clock speed;
Block is divided by present clock speed, if obtain integer, then with the count value of this integer as corresponding present clock speed, execution in step C after B, the usefulness conversion; If do not obtain integer, inferior length value clock rate as present clock speed, is returned step B and continued to carry out;
C, with the clock rate of inferior length value as present clock speed,,,, change step C over to and continue to carry out then with the count value of this integer as present clock speed if obtain integer divided by present clock speed with remainder; If do not obtain integer, return step C and continue to carry out, until remainder is 0.
2. method according to claim 1, it is characterized in that, described when an above clock rate being set being three above clock rates, described count value has more than three, and the corresponding start bit of different count values and stop bit are arranged in the resource element of data sending terminal.
3. described method according to claim 2 is characterized in that, described clock rate comprises coarse adjustment clock rate and fine setting clock rate, and the coarse adjustment clock rate is 10, and the fine setting clock rate is 1;
Described is that block comprises that be the block of 7 to 9 bits with Data Division to be sent for size with Data Division to be sent.
4. described method according to claim 2 is characterized in that, described clock rate comprises coarse adjustment clock rate 1, coarse adjustment clock rate 2 and fine setting clock rate, and coarse adjustment clock rate 1 is 100, and coarse adjustment clock rate 2 is 10, and the fine setting clock rate is 1;
Described is that block comprises that be the block of 10 to 12 bits with Data Division to be sent for size with Data Division to be sent.
5. according to claim 3 or 4 described methods, it is characterized in that described data receiver begins before the counting when receiving the start bit of block after the conversion, further comprise receiving the start bit control signal that is sent block after the conversion by data sending terminal.
6. described method according to claim 5 is characterized in that, described data receiver stops before the counting after receiving the stop bit of block after the conversion, further comprises receiving the stop bit control signal that is sent block after the conversion by data sending terminal.
7. described method according to claim 6 is characterized in that described data receiver obtains changing rear block according to count value and clock rate:
The count value that obtains be multiply by corresponding clock rate obtains end value, with each end value addition of obtaining as the conversion that obtains after block.
8. described method according to claim 1 is characterized in that described data sending terminal is multi-hop base station MR-BS, and described data receiver is RS;
Or described data sending terminal is via node RS, and described data receiver is by the user MS-R of relay node services.
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| CN1182669C (en) * | 1997-01-30 | 2004-12-29 | 阿尔卡塔尔公司 | Method for transmitting service channel in frame plesiochronous to said service channel and related transmission system |
| CN101150546A (en) * | 2001-11-21 | 2008-03-26 | 美商内数位科技公司 | Method employed by a base station for transferring data |
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| CN1182669C (en) * | 1997-01-30 | 2004-12-29 | 阿尔卡塔尔公司 | Method for transmitting service channel in frame plesiochronous to said service channel and related transmission system |
| CN101150546A (en) * | 2001-11-21 | 2008-03-26 | 美商内数位科技公司 | Method employed by a base station for transferring data |
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