CN101577537B

CN101577537B - Relaxation oscillator

Info

Publication number: CN101577537B
Application number: CN2009100528651A
Authority: CN
Inventors: 许刚
Original assignee: Howay International Holdings Ltd
Current assignee: Howay International Holdings Ltd.
Priority date: 2009-06-10
Filing date: 2009-06-10
Publication date: 2011-01-26
Anticipated expiration: 2029-06-10
Also published as: CN101577537A

Abstract

The invention discloses a relaxation oscillator comprising a first capacitance, a plurality of controlled switches, a second capacitance which is connected with a plurality of controlled switches to form a parallel circuit between the first capacitance and the second capacitance through the on-off of a plurality of controlled switches, a current supply which is connected with the parallel circuitto provide charging current, a comparator which is connected with one end of the parallel circuit to compare the voltage of the parallel circuit with a preset reference voltage so as to generate an impulse signal from the comparison result and output the impulse signal, and a trigger module which is connected with the output end of the comparator to generate control signals of a plurality of controlled switches according to the impulse signal so as to control the on-off of a plurality of controlled switches. The invention has the beneficial effects of largely reducing parts of the relaxation oscillator, reducing noise and power consumption and ensuring sufficient capacitance discharge time.

Description

A kind of relaxation oscillator

Technical field

The present invention relates to a kind of relaxation oscillator, particularly a kind of double-capacitance spread oscillator.

Background technology

The oscillator letter can be described as a frequency source, and one does not need the external signal excitation, self just direct current energy can be converted into the device of AC energy.Generally be divided into two kinds of positive feedback and negative resistance type.So-called " vibration ", its connotation is just inferred interchange, and oscillator has comprised a process and a function that never oscillates to vibration.Can finish from direct current energy to the alternating current transformation of energy, such device just can be called " oscillator ".

Low-power consumption low noise relaxation oscillator is vital for the stand-by power consumption of a portable equipment.Low-power consumption will effectively prolong the service time of battery on the one hand; On the other hand, it is more accurate that low noise will make the work of equipment.In system-on-a-chip, as biology sensor, microprocessor, particularly important in the high-speed interface circuit.A kind of especially integrated circuit engineering of cmos circuit that is easy to of relaxation oscillator, particularly RC oscillator (RC oscillator) has bright development prospect.

The technology of existing RC oscillator is based on that principle that electric charge discharges and recharges finishes more.See also Fig. 1, current source 2 optionally discharges and recharges electric capacity 1 by selector switch 4 with current source 3, and feedback circuit (FEEDBACK CIRCUIT) plays regulating action to whole oscillator.In U.S. Pat-4,742, the function that a kind of method with capacitor charge and discharge realizes relaxation oscillator has been proposed in 315.In U.S. Pat-4,871, bipolar devices is realized low noise oscillator in 985 employings.In U.S. Pat-0241832 A1, propose to reduce because the noise that discharge process causes with the method for twice charging.AsadA.Abidi and Robert G.Meyer, Noise in Relaxation Oscillators, IEEE Journal of Solid-State Circuits, vol.SC018, pp 794-802, Dec, 1983, describe in detail with charging and discharging the origin cause of formation that circuit is realized the noise of relaxation oscillator.Yet the subject matter of above-mentioned these prior aries is that circuit is too complicated, and in these complicated circuit are realized, has introduced new noise source again.In addition, Fu Za circuit too, the device that needs is also many more, and power consumption increases thereupon, is unfavorable for the requirement of integrated circuit low-power consumption.

Therefore, how to provide a kind of circuit simple, the low noise relaxation oscillator of low-power consumption has become those skilled in the art's urgent problem.

Summary of the invention

Technical scheme to be solved of the present invention provides a kind of relaxation oscillator, to solve the deficiencies in the prior art.

For solving technique scheme, the invention provides a kind of relaxation oscillator, comprising: first electric capacity with first end and second end; Several controlled switchs; Second electric capacity with the 3rd end and the 4th end, be connected with described several controlled switchs, switching by described several controlled switchs, described the 3rd end alternately is connected and described the 4th end alternately is connected with first end with described second end with second end with described first end, to form the parallel circuits of described first electric capacity and second electric capacity; Current source is connected so that charging current to be provided with described parallel circuits; Comparator is connected with an end of described parallel circuits, with the voltage of described parallel circuits and a preset reference voltage ratio, and comparative result is generated pulse signal output; Igniter module connects the output of described comparator, is used for generating according to described pulse signal the control signal of described several controlled switchs of control, to control the switching of described several controlled switchs.

Preferably, described several controlled switchs comprise first series circuit that first switch and second switch form, and second series circuit that forms of the 3rd switch and the 4th switch, wherein, described first series circuit and second series circuit respectively with described first electric capacity mutually and connect the formation parallel circuits, the common tie point of described first switch and second switch is connected with described the 3rd end, and the common tie point of described the 3rd switch and the 4th switch is connected with described the 4th end.

Preferably, described igniter module is the T trigger, its clock signal input terminal is connected with the output of described comparator, and the one output is connected with the controlled end of described first switch and the 3rd switch, and its another output is connected with the controlled end of described second switch and the 4th switch.

Preferably, the capacitance of described first electric capacity and second electric capacity equates.

Preferably, described igniter module comprises the trigger that generates first control signal and is used for the anti-phase inverter of described first control signal.

Preferably, the output of described trigger is connected with the controlled end of described first switch and described the 3rd switch, and the output of described inverter is connected with the controlled end of described second switch and described the 4th switch.

Preferably, described trigger and described inverter integrate.

Beneficial effect of the present invention is: the device that relaxation oscillator adopts significantly reduces, and noise and power consumption also reduce thereupon, the capacitor discharge time abundance.

Description of drawings

Fig. 1 is the relaxation oscillator circuit diagram of prior art.

Fig. 2 is a relaxation oscillator circuit diagram provided by the invention.

Fig. 3 is signal Vc, c, φ ₁Sequential chart.

Fig. 4 is the first control signal φ ₁=1 o'clock relaxation oscillator schematic equivalent circuit.

Fig. 5 is the first control signal φ ₁=0 o'clock relaxation oscillator schematic equivalent circuit.

Embodiment

Describe the preferred embodiments of the present invention in detail below in conjunction with accompanying drawing.

See also Fig. 2, relaxation oscillator provided by the invention comprises current source IREF, and first capacitor C, 1, the second capacitor C 2 constitutes first K switch 1, second switch K2, the 3rd K switch 3, and the 4th K switch 4 of several controlled switchs, comparator and trigger D.First K switch 1, second switch K2, the 3rd K switch 3, and the 4th K switch 4 be controlled switch.Trigger D is a d type flip flop.In the present embodiment, the capacitance of first capacitor C 1 and second capacitor C 2 can equate, for describe clear for the purpose of, the two ends that define first capacitor C 1 are first end and second end, the two ends of second capacitor C 2 are the 3rd end and the 4th end.

Wherein, first end of first capacitor C 1 connects current source IREF, its second end ground connection.First K switch 1 forms first series circuit with second switch K2, the 3rd K switch 3 and the 4th K switch 4 form second series circuit, and first series circuit and second series circuit are connected in parallel on the two ends of first capacitor C 1 respectively, and first K switch 1 is connected with the 3rd end of second capacitor C 2 with the common tie point of second switch K2, and the 3rd K switch 3 is connected with the 4th end of second capacitor C 2 with the common tie point of the 4th K switch 4 again.Two inputs of comparator are imported the voltage Vc and a default reference voltage VREF of first capacitor C, 1 first end respectively, its output connects the input end of clock of trigger D, that is to say that the pulse signal c of the output of comparator is as the clock signal of trigger D.Another input of trigger D is connected with its reversed-phase output, in fact, make trigger D become an integrated T trigger of inverter, promptly constituted an igniter module, clock pulse of every mistake, its output signal generation once inside out, trigger D exports two anti-phase signals: the first control signal φ ₁And second control signal

The first control signal φ ₁Control first K switch 1 and the 3rd K switch 3, the second control signals

Control second switch K2 and the 4th K switch 4, so, first

K switch

1 and 3 conducting simultaneously or the shutoffs of the 3rd K switch, second switch K4 and conducting simultaneously of the 4th K switch 4 or shutoffs, and first K switch 1 and the 3rd K switch 3, with the conducting simultaneously or turn-off simultaneously of second switch K2 and the 4th K switch 4.

See also Fig. 3, Fig. 4 and Fig. 5, along with first capacitor C 1 and second capacitor C 2 are constantly charged, Vc raises gradually, when the magnitude of voltage of Vc surpasses the magnitude of voltage of reference voltage VREF, and pulse of comparator output, the output signal φ of trigger D ₁Anti-phase, the 3rd end of second capacitor C 2 and the annexation of the 4th end are exchanged.As the first control signal φ ₁=1, second control signal

The time, first end of first capacitor C 1 is connected with the 3rd end of second capacitor C 2, current source IREF is to

first capacitor C

1 and 2 chargings of second capacitor C, Vc raises gradually, surpass VREF until Vc, comparator output signal transfers high level to by low level, forms a rising edge, trigger D upset, the then first control signal φ ₁=0, second control signal Then first K switch 1 and the 3rd K switch 3 are turn-offed, second switch K2 and 4 conductings of the 4th K switch, and then second capacitor C 2 the 3rd end is connected with second end of first capacitor C 1, second capacitor C 2 the 4th end is connected with first end of first capacitor C 1, the voltage of first end of first capacitor C 1 is higher than the voltage of second capacitor C 2 the 4th end this moment, immediate current flows to second capacitor C 2 the 4th end by first end of the current source IREF and first capacitor C 1, cause Vc sharply to descend, the output signal of comparator transfers low level to by high level, because Vc reduces rapidly after surpassing reference voltage VREF at short notice, the output of comparator just forms pulse signal c, when the 4th end of first end of first capacitor C 1 and second capacitor C 2 no longer includes voltage difference, current source IREF is to the charging of first capacitor C 1 and second capacitor C 2, and Vc raises again gradually until trigger D upset next time.In first capacitor C, 1 discharge process, current source IREF is still to 2 chargings of second capacitor C, yet the velocity of discharge is much larger than charging rate.

Because the process of capacitor discharge is finished in the charging process of following one-period, thereby simplified the design of circuit, circuit discharges and recharges only needs a comparator to finish, device significantly reduces, produce the also minimizing thereupon of noise and power consumption in the circuit, capacitor discharge in the circuit is finished by charging neutrality, and has the sufficient time to finish discharge, thereby avoids introducing noise owing to not exclusively discharge.

Above embodiment is the unrestricted technical scheme of the present invention in order to explanation only.Technical essential of the present invention is to have adopted two electric capacity, utilize charging neutrality to realize capacitor discharge, the any modification or partial replacement that does not break away from spirit and scope of the invention, such as, adopt the connected mode of other switches set to realize the exchange of second capacitor C, 2 two ends annexations, pulse signal c adopts low level effective, adopting other devices to constitute can be under the output signal control of comparator, export the igniter module of a clock signal upset of two anti-phase every mistakes control signal once, or simply change the output signal of trigger and the control relation of switches set etc., all should be encompassed in the middle of the claim scope of the present invention.

Claims

1. a relaxation oscillator is characterized in that, comprising:

First electric capacity with first end and second end; Several controlled switchs; Described several controlled switchs comprise first series circuit that first switch and second switch form, and second series circuit that forms of the 3rd switch and the 4th switch, wherein, described first series circuit and second series circuit respectively with described first electric capacity mutually and connect the formation parallel circuits;

Second electric capacity with the 3rd end and the 4th end is connected with described several controlled switchs, by the switching of described several controlled switchs, described the 3rd end alternately is connected with second end with described first end; The common tie point of described first switch and second switch is connected with described the 3rd end, and the common tie point of described the 3rd switch and the 4th switch is connected with described the 4th end;

Current source is connected so that charging current to be provided with described parallel circuits;

Comparator is connected with an end of described parallel circuits, with the voltage of described parallel circuits and a preset reference voltage ratio, and comparative result is generated pulse signal output;

Igniter module connects the output of described comparator, is used for generating according to described pulse signal the control signal of described several controlled switchs of control, to control the switching of described several controlled switchs.

2. relaxation oscillator as claimed in claim 1, it is characterized in that: described igniter module is the T trigger, its clock signal input terminal is connected with the output of described comparator, the one output is connected with the controlled end of described first switch and the 3rd switch, and its another output is connected with the controlled end of described second switch and the 4th switch.

3. relaxation oscillator as claimed in claim 1 is characterized in that: the capacitance of described first electric capacity and second electric capacity equates.

4. relaxation oscillator as claimed in claim 1 is characterized in that: described igniter module comprises the trigger that generates first control signal and is used for the anti-phase inverter of described first control signal.

5. relaxation oscillator as claimed in claim 4, it is characterized in that: the output of described trigger is connected with the controlled end of described first switch and described the 3rd switch, and the output of described inverter is connected with the controlled end of described second switch and described the 4th switch.

6. as claim 4 or 5 described relaxation oscillators, it is characterized in that: described trigger and described inverter integrate.