CN101510510A - Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus - Google Patents
Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus Download PDFInfo
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- CN101510510A CN101510510A CNA2009100069557A CN200910006955A CN101510510A CN 101510510 A CN101510510 A CN 101510510A CN A2009100069557 A CNA2009100069557 A CN A2009100069557A CN 200910006955 A CN200910006955 A CN 200910006955A CN 101510510 A CN101510510 A CN 101510510A
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Abstract
Provided is a pattern forming method for forming a pattern serving as a mask, which includes: a process for forming a first pattern 105 made of a photoresist; a process for forming a boundary layer 106 at sidewall portions and top portions of the first pattern 105; a process for forming a second mask material layer 107 to cover a surface of the boundary layer 106; a process for removing a part of the second mask material layer 107 to expose top portions of the boundary layer 106; a process for forming a second pattern made of the second mask material layer 107 by etching and removing the boundary layer 106; and a trimming process for reducing a width of the first pattern 105 and a width of the second pattern to predetermined widths.
Description
Technical field
Pattern formation method, the manufacture method of semiconductor device and the manufacturing installation of semiconductor device of employed mask when the present invention relates to be used to form on substrates such as semiconductor crystal wafer etch processes such as implementing plasma etching.
Background technology
In the past, in the manufacturing process of semiconductor device etc., on substrates such as semiconductor crystal wafer, implemented etch processes such as plasma etching and formed fine circuit pattern etc.In such etch processes operation, form mask by the photo-mask process that uses photoresist.
In such photo-mask process,, various technology have been developed in order to tackle the miniaturization phase of formed pattern.As one of them, so-called secondary image exposure method is arranged.This secondary image exposure method forms by the pattern that carries out following two these 2 stages of operation: apply photoresist, expose, develop, form the 1st photo-mask process of the 1st pattern; Behind the 1st photo-mask process, apply photoresist, exposure, development once more, form the 2nd photo-mask process of the 2nd pattern, can form than mask (for example, with reference to patent documentation 1) with the finer interval of the occasion of a pattern formation.
Patent documentation 1: No. 7064078 specification of United States Patent (USP)
As mentioned above, in the secondary image exposure technology, has the double exposure operation in the Twi-lithography operation.Therefore, there are the following problems: operation becomes complicated, and the manufacturing cost of semiconductor device increases, and is difficult to position accurately with respect to the 1st exposure process in the 2nd exposure process, is difficult to realize that pattern with high precision forms.
Summary of the invention
The present invention makes for tackling above-mentioned existing situation, purpose is to provide the manufacture method of a kind of pattern formation method, semiconductor device and the manufacturing installation of semiconductor device, can not need the 2nd exposure process just can form fine pattern accurately, compared with prior art simplify operation and the manufacturing cost that has reduced semiconductor device.
The invention of technical scheme 1 is the pattern formation method that becomes the pattern of the regulation shape of mask, this mask is used for the etched layer on the substrate is carried out etching, it is characterized in that, comprise following operation: the 1st mask material layer that is made of photoresist is carried out the 1st pattern that pattern forms the 1st pattern form operation; The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation; The 2nd mask material layer that forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer outwardly that covers above-mentioned boundary layer forms operation; The 2nd mask material that makes the top in above-mentioned boundary layer remove the part of above-mentioned the 2nd mask material layer is removed operation with exposing; Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer; Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
The invention of technical scheme 2 is technical scheme 1 described pattern formation methods, it is characterized in that, remove between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material, comprise following operation: the 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation; The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation; With above-mentioned the 3rd mask material layer as mask and above-mentioned the 2nd boundary layer is etched to the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure of above-mentioned the 2nd mask material layer of etching as mask.
The invention of technical scheme 3 is the pattern formation methods that become the pattern of the regulation shape of mask, this mask is used for the etched layer on the substrate is carried out etching, it is characterized in that, comprise following operation: the 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms operation; The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation; The 2nd mask material layer that the state that exposes with the top in above-mentioned boundary layer forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer forms operation; Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer; Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
The invention of technical scheme 4 is technical scheme 3 described pattern formation methods, it is characterized in that, form between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material layer, comprise following operation: the 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation; The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation; With above-mentioned the 3rd mask material layer as mask and above-mentioned the 2nd boundary layer is etched to the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure of above-mentioned the 2nd mask material layer of etching as mask.
The invention of technical scheme 5 is each the described pattern formation methods in the technical scheme 1～4, it is characterized in that, above-mentioned the 2nd mask material layer is made of photoresist.
The invention of technical scheme 6 is technical scheme 1 or 3 described pattern formation methods, it is characterized in that, forms above-mentioned boundary layer by the CVD film forming.
The invention of technical scheme 7 is technical scheme 1 or 3 described pattern formation methods, it is characterized in that, goes bad and form above-mentioned boundary layer in side wall portion by making above-mentioned the 1st pattern and top.
The invention of technical scheme 8 is technical scheme 1 or 3 described pattern formation methods, it is characterized in that, form in the operation at above-mentioned the 1st pattern, form with predetermined distance and be formed with the repeat patterns portion of a plurality of identical patterns and be formed on the peripheral circuit drafting department of the periphery of above-mentioned repeat patterns portion.
The invention of technical scheme 9 is to have the manufacture method of the etched layer on the substrate being carried out the semiconductor device of etched operation across mask, it is characterized in that, utilize to comprise that the pattern formation method of following operation forms above-mentioned mask: the 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms operation; The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation; The 2nd mask material layer that forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer outwardly that covers above-mentioned boundary layer forms operation; Remove the 2nd mask material of the part of above-mentioned the 2nd mask material layer for the top that makes above-mentioned boundary layer is exposed and remove operation; Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer; Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
The invention of technical scheme 10 is manufacture methods of technical scheme 9 described semiconductor devices, it is characterized in that, remove between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material, comprise following operation: the 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation; The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation; Above-mentioned the 3rd mask material layer is etched to above-mentioned the 2nd boundary layer the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure that does not need part of above-mentioned the 2nd mask material layer of etching as mask as mask.
The invention of technical scheme 11 is to have the manufacture method of the etched layer on the substrate being carried out the semiconductor device of etched operation across mask, it is characterized in that, with comprising that the pattern formation method of following operation forms above-mentioned mask: the 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms operation; The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation; The 2nd mask material layer that the state that exposes with the top in above-mentioned boundary layer forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer forms operation; Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer; Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
The invention of technical scheme 12 is manufacture methods of technical scheme 11 described semiconductor devices, it is characterized in that, form between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material layer, comprise following operation: the 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation; The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation; Above-mentioned the 3rd mask material layer is etched to above-mentioned the 2nd boundary layer the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure that does not need part of above-mentioned the 2nd mask material layer of etching as mask as mask.
The invention of technical scheme 13 is manufacture methods of technical scheme 9 or 11 described semiconductor devices, it is characterized in that, above-mentioned the 2nd mask material layer is made of photoresist.
The invention of technical scheme 14 is manufacture methods of technical scheme 9 or 11 described semiconductor devices, it is characterized in that, forms above-mentioned boundary layer by the CVD film forming.
The invention of technical scheme 15 is manufacture methods of technical scheme 9 or 11 described semiconductor devices, it is characterized in that, goes bad and form above-mentioned boundary layer in side wall portion by making above-mentioned the 1st pattern and top.
The invention of technical scheme 16 is manufacture methods of technical scheme 9 or 11 described semiconductor devices, it is characterized in that, form in the operation at above-mentioned the 1st pattern, form with predetermined distance and be formed with the repeat patterns portion of a plurality of identical patterns and be formed on the peripheral circuit drafting department of the periphery of above-mentioned repeat patterns portion.
The invention of technical scheme 17 is the manufacturing installations that are formed for the etched layer on the substrate is carried out the semiconductor device of etched mask, it is characterized in that, comprise: the 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms parts with lower member; The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms parts; The 2nd mask material layer that forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer outwardly that covers above-mentioned boundary layer forms parts; Remove the 2nd mask material of the part of above-mentioned the 2nd mask material layer for the top that makes above-mentioned boundary layer is exposed and remove parts; Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching part of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer; Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing member of Rack.
The invention of technical scheme 18 is the manufacturing installations that are formed for the etched layer on the substrate is carried out the semiconductor device of etched mask, it is characterized in that, comprise: the 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms parts with lower member; The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms parts; The 2nd mask material layer that the state that exposes with the top in above-mentioned boundary layer forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer forms parts; Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching part of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer; Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing member of Rack.
According to the present invention, the manufacture method of a kind of pattern formation method, semiconductor device and the manufacturing installation of semiconductor device can be provided, do not need exposure process the 2nd time, just can form fine pattern accurately, compared with prior art, operation and the manufacturing cost that has reduced semiconductor device have been simplified.
Description of drawings
Fig. 1 is the figure that is used to illustrate the manufacture method of the pattern formation method of one embodiment of the present invention and semiconductor device.
Fig. 2 is the flow chart of operation of the method for presentation graphs 1.
Fig. 3 is the block diagram of formation of manufacturing installation of the semiconductor device of expression one embodiment of the present invention.
Fig. 4 is the figure that is used to illustrate the manufacture method of the pattern formation method of the 2nd execution mode of the present invention and semiconductor device.
Fig. 5 is the flow chart of operation of the method for presentation graphs 4.
Fig. 6 is the block diagram of formation of manufacturing installation of the semiconductor device of expression the 2nd execution mode of the present invention.
Fig. 7 is the figure that is used to illustrate the manufacture method of the pattern formation method of the 3rd execution mode of the present invention and semiconductor device.
Fig. 8 is the figure that is used to illustrate the manufacture method of the pattern formation method of the 4th execution mode of the present invention and semiconductor device.
Fig. 9 is used to illustrate that the pattern of side wall spacers transfer graphic technology (sidewalltransfer) forms the figure of operation.
Embodiment
Followingly embodiments of the present invention are described with reference to accompanying drawing.
Fig. 1 is the part of schematically amplifying the substrate of expression embodiments of the present invention, the figure that represents the operation of present embodiment, and Fig. 2 is the flow chart of the operation of expression present embodiment.As shown in Figure 1, on substrate 101, be formed with a plurality of layers such as the 1st layer 102, the 2nd layers 103, the 3rd layers 104 of forming by different materials.At least 1 (the 3rd layer 104) in these layers is etched layer.
At first, shown in Fig. 1 (a), carry out the 1st pattern and form operation (step 201 of Fig. 2), that is, on the 3rd layer 104,, form the 1st pattern 105 that constitutes by the photoresist that is patterned into predetermined pattern by coating, exposure, developing procedure.As the photoresist that is used to form the 1st pattern 105 (the 1st mask material), in order to form finer pattern, preferably use the ArF resist, for example can use the chemical amplification type anti-corrosion agent of eurymeric etc.
Then, shown in Fig. 1 (b), carry out the boundary layer and form operation (step 202 of Fig. 2), that is, form boundary layer 106 at the side wall portion and the top of the 1st pattern 105.This boundary layer 106 both can form by film forming, and the side wall portion that also can be by making the 1st pattern 105 and the envenomation at top form the (occasion that Fig. 1 (b) expression film forming forms.)。This boundary layer 106 need be made of above-mentioned photoresist that constitutes the 1st pattern 105 and the material that can optionally remove.As the material under the situation that forms boundary layer 106 by film forming, for example, be fit to use SiO2.Forming by SiO2 under the situation in boundary layer 106, need be under the temperature of the heat resisting temperature that is lower than the 1st pattern 105 film forming, for example, with low temperature CVD (Chemical Vapor Depo sition), ALD (Atomic Layer Deposition) film forming.The thickness in this boundary layer 106 for example is about 5～20nm.On the other hand, in the envenomation at side wall portion that makes the 1st pattern 105 and top and form under the situation in boundary layer 106, can use with HMDS and wait the method for carrying out silylation or acid supplied to method of carrying out oxidation on the photoresist etc.
Then, shown in Fig. 1 (c), carry out the 2nd mask material layer and form operation (step 203 of Fig. 2), that is, cover the 2nd mask material layer 107 of formation outwardly in boundary layer 106.The 2nd mask material layer 107 need be made of the material that can optionally remove boundary layer 106, for example, can use photoresist or organic membrane etc.Under the situation of using photoresist, both can use the photoresist identical with the photoresist that is used to form above-mentioned the 1st pattern 105, also can use different types of with it photoresist (for example, be under the situation of ArF resist, use the KrF resist) at the 1st pattern 105.In this case, the 2nd mask material layer 107 can be by forming with coating such as spin coating device or with formation such as CVD device film forming.
Then, shown in Fig. 1 (d), carry out the 2nd mask material and remove operation (step 204 of Fig. 2), that is, remove the part (top layer) of the 2nd mask material layer 107 that in above-mentioned operation, forms, until the top of exposing boundary layer 106.The 2nd mask material removes method that operation can use the method for being removed by chemical medicinal liquid dissolving, remove with dry ecthing, utilize the CMP chemistry and the method for physically removing etc.
Then, shown in Fig. 1 (e), carry out boundary layer etching work procedure (step 205 of Fig. 2), promptly, to the 1st pattern 105 and the 2nd mask material layer 107 etching boundary layer 106 and boundary layer 106 removed optionally, form the 2nd pattern that constitutes by the 2nd mask material layer 107.In this case, because boundary layer 106 is for example to make SiO
2Or the rotten boundary layer that forms of photoresist etc., so, for the 1st pattern 105 of photoresist and the 2nd mask material layer 107 of photoresist or organic membrane etc., can be easy to optionally etching boundary layer 106.This boundary layer etching work procedure can be undertaken by having used for example wet etching or the dry ecthing of rare fluoric acid etc.
Then, shown in Fig. 1 (f), carry out finishing process (step 206 of Fig. 2), that is, reduce the width of the 2nd pattern that constitutes by the 1st pattern 105 with by the 2nd mask material layer 107 and form Rack.This finishing process can carry out in order to following method etc.: for example, be immersed in the method in the developer solution of high temperature or high concentration for a long time; The method of after applying acid material or being exposed in the acid steam ambient, developing; Carrying out pre-treatment-after being immersed in high temperature or high concentration or being immersed in the developer solution for a long time, coating acid material, the method for developing after perhaps in being exposed to acid steam ambient; At the coating acid material or after being exposed in the acid steam ambient, after antacid amine based material is coated in the pattern top or is exposed in the steam ambient, the method for developing.
Finished the pattern that becomes etching mask by operation as described above.Then, this pattern as mask, shown in Fig. 1 (g), is carried out the etching of the 3rd layer of 104 grade of lower floor.
As mentioned above, in the pattern formation method of present embodiment, only be used to form 1 exposure process of the 1st pattern 105, do not need exposure process the 2nd time, just can form and the same fine pattern of existing twice pattern exposure technology.Therefore,, when this position alignment, can not produce dislocation owing to do not need the position alignment in the exposure process the 2nd time, so, can form pattern accurately, and compared with prior art, can simplify working process, can realize reducing the manufacturing cost of semiconductor device.
Fig. 3 is the figure of formation of the manufacturing installation of the expression semiconductor device that is used to carry out above-mentioned pattern formation method.As shown in the drawing, the manufacturing installation 300 of semiconductor device comprises: the 1st pattern formation portion 301; Boundary layer formation portion 302; The 2nd mask material layer formation portion 303; The 2nd mask material is removed portion 304; Boundary layer etched part 305; Finishing portion 306.In addition, above-mentioned each one is by being used to carry the substrate transport path 310 of substrates such as semiconductor crystal wafer to connect.
The 1st pattern formation portion 301 is used to form above-mentioned the 1st pattern 105, comprises applying device, exposure device and developing apparatus etc.Boundary layer formation portion 302 is used to form above-mentioned boundary layer 106, comprises film formation devices such as CVD device, perhaps makes the surface modification device of the envenomation at the side wall portion of the 1st pattern 105 and top.The 2nd mask material layer formation portion 303 is used to form above-mentioned the 2nd mask material layer 107, comprises the applying device of coating photoresist etc. or forms the film formation device of organic membrane etc.The 2nd mask material remove portion 304 be used to remove above-mentioned the 2nd mask material layer 107 a part, remove operation until the 2nd mask material at the top of exposing boundary layer 106, comprise wet etching or device for dry etching, perhaps the CMP device.Boundary layer etched part 305 is used to carry out the boundary layer etching work procedure, and above-mentioned the 1st pattern 105 and the 2nd mask material layer 107 are carried out optionally etching boundary layer 106 and boundary layer 106 is removed, and comprises wet etching or device for dry etching.Finishing portion 306 is used to carry out above-mentioned finishing process, comprises being used for semiconductor crystal wafer etc. is immersed in chemical medicinal liquids such as developer solution or is exposed to device in the steam ambient etc.Utilize the manufacturing installation 300 of the semiconductor device that constitutes like this, can carry out a series of operation in the above-mentioned execution mode.
Below, describe with reference to Fig. 4～6 pair the 2nd execution mode.Fig. 4 is the part of schematically amplifying the related substrate of expression the 2nd execution mode, the figure that represents the operation of the 2nd execution mode, and Fig. 5 is the flow chart of the operation of expression the 2nd execution mode.At the 2nd execution mode, shown in Fig. 4 (c), form in the operation (step 403 of Fig. 5) at the 2nd mask material layer, the state that exposes with the top in boundary layer 106 forms the 2nd mask material layer 107.Therefore, do not comprise that or not 2nd mask material that is equivalent in the above-mentioned execution mode removes the operation of operation (step 204 of Fig. 2).So, for the state that exposes with the top in boundary layer 106 forms the 2nd mask material layer 107, can be by selecting their material (for example different material of polarity), make boundary layer 106 relative the 2nd mask materials be stained with lubricant nature lower, the 2nd aqueous mask material be coated in boundary layer 106 first-class methods realize.
In addition, for other operation, since identical with above-mentioned execution mode, so omit the explanation of its repetition.The 2nd execution mode can play the effect same with above-mentioned execution mode, and, as mentioned above, remove operation owing to can omit the 2nd mask material, so can also simplify working process.
Fig. 6 is the figure of manufacturing installation structure of the semiconductor device of the expression pattern formation method that is used to carry out the 2nd execution mode.As shown in the drawing, the manufacturing installation 300a of semiconductor device comprises: the 1st pattern formation portion 301; Boundary layer formation portion 302; The 2nd mask material layer formation portion 303; Boundary layer etched part 305; Finishing portion 306.In addition, above-mentioned each one is by being used to carry the substrate transport path 310 of substrates such as wafer to connect.That is, the manufacturing installation 300a of this semiconductor device compares with the manufacturing installation 300 of semiconductor device shown in Figure 3, and it is different only not comprise that the 2nd mask material is removed portion's 304 these points.Utilize the manufacturing installation 300a of the semiconductor device that constitutes like this, can carry out a succession of operation in above-mentioned the 2nd execution mode.
The repeat patterns of the thin space of Xing Chenging for example, can be used on semiconductor devices such as NAND type flash memories as described above.As the method for the repeat patterns that forms thin space as described above, former people are known for example to be the method for so-called side wall spacers transfer graphicization.
As shown in Figure 9, this side wall spacers transfer graphic technology is to go up the film 602 that becomes mask at the side wall portion (sidewall) of the 1st pattern 601 that forms with the photo-mask process that has used photoresist, remove the 1st pattern 601 of initial formation, form 2 patterns by 1 pattern thus and form the pattern of thin space.
In this occasion, shown in Fig. 9 (a), go up the pattern that forms at the side wall portion (sidewall) of the 1st pattern 601, forming ring-type on full week around the side wall portion.Therefore, shown in Fig. 9 (b), for remove ring do not need the part (end ring), carry out photo-mask process the 2nd time.And, from the state shown in Fig. 9 (c), remove the 1st pattern 601 afterwards, the pattern of side wall portion is used as mask.Therefore,, carry out photo-mask process the 3rd time, form patterns such as peripheral circuit when when forming pattern such as peripheral circuit around the repeat patterns as described above.
This reason is under the situation that forms the local patterns such as peripheral circuit that are connected with repeat patterns, repeat patterns is to go up the pattern that forms at the side wall portion (sidewall) of the 1st pattern 601 like that as mentioned above, so can not form the patterns such as peripheral circuit that are connected with repeat patterns at initial photo-mask process, and, the 2nd time photo-mask process is used to remove end ring, if not via this operation, then can not form the pattern that is connected with repeat patterns.
Relatively therewith, at above-mentioned execution mode, remain as the part of repeat patterns at last by a part that forms the 1st pattern 105 that photoresist that operation forms constitutes at the 1st pattern, so in the photo-mask process in the 1st pattern formation operation, can form the local patterns such as peripheral circuit that are connected with repeat patterns.
Fig. 7 (a)～(k) is the figure of the operation of expression the 3rd execution mode, represent that for example NAND type flash memories is such, be formed with the situation of the memory cell portion of repeat patterns of thin space and the peripheral circuit that is electrically connected with this memory cell portion etc., schematically show cross section structure on top, schematically show planar structure in the bottom.
In the 3rd execution mode, shown in Fig. 7 (a), in being equivalent to the operation that the 1st pattern shown in Fig. 1 (a) forms operation, form following each one: with predetermined distance be formed with a plurality of identical patterns repeat patterns portion 501, be formed on the peripheral circuit drafting department 502 of the periphery of repeat patterns portion 501.The part of peripheral circuit drafting department 502 also can be connected with repeat patterns portion 501.
Then, shown in Fig. 7 (b)～(d), carry out following operation: the boundary layer shown in Figure 1 that forms boundary layer 106 forms operation (b); The 2nd mask material layer that forms the 2nd mask material layer 107 outwardly that covers boundary layer 106 forms operation (c); Remove the 2nd mask material layer 107 a part (top layer), remove operation (d) until the 2nd mask material at the top of exposing boundary layer 106.
Then, carry out the 2nd boundary layer and form operation (e), that is, on the 2nd mask material layer 107 and boundary layer 106, form by photoresist and the material that can optionally remove (SiO for example
2Deng) the 2nd boundary layer 120 that constitutes.
Then, carry out the 3rd mask material layer and form operation (f), that is, on the 2nd boundary layer 120, form the 3rd mask material layer 121 that the photoresist by predetermined pattern constitutes.The 3rd mask material layer 121 is for removing the pattern that does not need part of the 2nd mask material layer 107.
Then, carry out etching work procedure, that is, with the 3rd mask material layer 121 as mask, the 2nd boundary layer 120 that the 2nd boundary layer 120 is etched into the pattern (g) of regulation, the pattern that will stipulate is as mask, the unwanted part (h) of etching the 2nd mask material layer 107.
Then, carry out operation (i) etching boundary layer 106, that be equivalent to the boundary layer etching work procedure shown in Fig. 1 (e), then, be equivalent to width shown in Fig. 1 (f), that reduce the 2nd pattern that constitutes by the 1st pattern 105 and by the 2nd mask material layer 107 and form the operation (i) of the finishing process of Rack.Finish thus to becoming the pattern of etching mask.Then, this pattern as mask, is carried out the operation (k) the 3rd layer of 104 grade, that be equivalent to the etching work procedure shown in Fig. 1 (g) of etching lower floor.
As previously discussed, in the 3rd execution mode, utilize the Twi-lithography operation, can form patterns such as repeat patterns and peripheral circuit.
Followingly the 4th execution mode is described with reference to Fig. 8 (a)～(j), the 4th execution mode utilization is equivalent to the operation of above-mentioned the 2nd execution mode, forms the memory cell portion of the repeat patterns that disposes thin space and the peripheral circuit that is electrically connected with this memory cell portion etc. as NAND type flash memories.In addition, in Fig. 8, schematically show cross section structure, schematically show planar structure in the bottom on top.
At the 4th execution mode, shown in Fig. 8 (a), in being equivalent to the operation that the 1st pattern shown in Fig. 4 (a) forms operation, form following each one: with predetermined distance be formed with a plurality of identical patterns repeat patterns 501, be formed on the peripheral circuit drafting department 502 of the periphery of repeat patterns portion 501.The part of peripheral circuit drafting department 502 also can be connected with repeat patterns portion 501.
Then, the 2nd mask material layer that the state that shown in Fig. 8 (b), (c), the boundary layer shown in Figure 4 that forms boundary layer 106 forms operation (b), expose with the top in boundary layer 106 forms the 2nd mask material layer 107 forms operation (c).
Then, carry out the 2nd boundary layer and form operation (d), that is, on the 2nd mask material layer 107 and boundary layer 106, form by photoresist and the material that can optionally remove (SiO for example
2Deng) the 2nd boundary layer 120 that constitutes.
Then, carry out the 3rd mask material layer and form operation (e), that is, on the 2nd boundary layer 120, form the 3rd mask material layer 121 that the photoresist by predetermined pattern constitutes.The 3rd mask material layer 121 is for removing the pattern that does not need part of the 2nd mask material layer 107.
Then, carry out etching work procedure, the 3rd mask material layer 121 as mask, be etched into the pattern (f) of regulation with the 2nd boundary layer 120, with the 2nd boundary layer 120 of this predetermined pattern as mask, etching the 2nd mask material layer 107 do not need part (g).
Then, carry out operation (h) etching boundary layer 106, that be equivalent to the boundary layer etching work procedure shown in Fig. 4 (d), then, be equivalent to width shown in Fig. 4 (e), that reduce the 2nd pattern that constitutes by the 1st pattern 105 and the 2nd mask material layer 107 and form the operation (i) of the finishing process of Rack.Finish the pattern that becomes etching mask thus.Then, this pattern as mask, is carried out the operation (j) the 3rd layer of 104 grade, that be equivalent to the etching work procedure shown in Fig. 4 (f) of etching lower floor.
As mentioned above, in the 4th execution mode, utilize the Twi-lithography operation, can form patterns such as repeat patterns and peripheral circuit.
More than, though one embodiment of the present invention is illustrated, the present invention is not limited to these execution modes, can carry out various distortion certainly.
Claims (18)
1. pattern formation method, it is the pattern formation method of pattern that becomes the regulation shape of mask, this mask is used for the etched layer on the substrate is carried out etching, it is characterized in that, comprises following operation:
The 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms operation;
The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation;
The 2nd mask material layer that forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer outwardly that covers above-mentioned boundary layer forms operation;
Remove the 2nd mask material of the part of above-mentioned the 2nd mask material layer for the top that makes above-mentioned boundary layer is exposed and remove operation;
Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer;
And be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
2. pattern formation method according to claim 1 is characterized in that,
Remove between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material, comprise following operation:
The 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation;
The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation;
With above-mentioned the 3rd mask material layer as mask and above-mentioned the 2nd boundary layer is etched to the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure of above-mentioned the 2nd mask material layer of etching as mask.
3. pattern formation method, it is the pattern formation method of pattern that becomes the regulation shape of mask, this mask is used for the etched layer on the substrate is carried out etching, it is characterized in that, comprises following operation:
The 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms operation;
The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation;
The 2nd mask material layer that the state that exposes with the top in above-mentioned boundary layer forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer forms operation;
Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer;
And be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
4. pattern formation method according to claim 3 is characterized in that,
Form between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material layer, comprise following operation:
The 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation;
The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation;
With above-mentioned the 3rd mask material layer as mask and above-mentioned the 2nd boundary layer is etched to the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure of above-mentioned the 2nd mask material layer of etching as mask.
5. according to each the described pattern formation method in the claim 1～4, it is characterized in that above-mentioned the 2nd mask material layer is made of photoresist.
6. according to claim 1 or 3 described pattern formation methods, it is characterized in that, form above-mentioned boundary layer by the CVD film forming.
7. according to claim 1 or 3 described pattern formation methods, it is characterized in that,
Go bad and form above-mentioned boundary layer in side wall portion by making above-mentioned the 1st pattern and top.
8. according to claim 1 or 3 described pattern formation methods, it is characterized in that,
Form in the operation at above-mentioned the 1st pattern, form with predetermined distance and be formed with the repeat patterns portion of a plurality of identical patterns and be formed on the peripheral circuit drafting department of the periphery of above-mentioned repeat patterns portion.
9. the manufacture method of a semiconductor device, it is to have across mask the etched layer on the substrate is carried out the manufacture method of the semiconductor device of etched operation, it is characterized in that,
Form above-mentioned mask with the pattern formation method that comprises following operation:
The 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms operation;
The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation;
The 2nd mask material layer that forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer outwardly that covers above-mentioned boundary layer forms operation;
Remove the 2nd mask material of the part of above-mentioned the 2nd mask material layer for the top that makes above-mentioned boundary layer is exposed and remove operation;
Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer;
Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
10. the manufacture method of semiconductor device according to claim 9 is characterized in that,
Remove between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material, comprise following operation:
The 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation;
The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation;
Above-mentioned the 3rd mask material layer is etched to above-mentioned the 2nd boundary layer the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure that does not need part of above-mentioned the 2nd mask material layer of etching as mask as mask.
11. the manufacture method of a semiconductor device, it is to have across mask the etched layer on the substrate is carried out the manufacture method of the semiconductor device of etched operation, it is characterized in that,
Form above-mentioned mask with the pattern formation method that comprises following operation:
The 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms operation;
The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms operation;
The 2nd mask material layer that the state that exposes with the top in above-mentioned boundary layer forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer forms operation;
Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching work procedure of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer;
Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing process of Rack.
12. the manufacture method of semiconductor device according to claim 11 is characterized in that,
Form between operation and the above-mentioned boundary layer etching work procedure at above-mentioned the 2nd mask material layer, comprise following operation:
The 2nd boundary layer that forms the 2nd boundary layer that is made of above-mentioned photoresist and the material that can optionally remove on above-mentioned the 2nd mask material layer and above-mentioned boundary layer forms operation;
The 3rd mask material layer that forms the 3rd mask material layer that the photoresist by predetermined pattern constitutes on above-mentioned the 2nd boundary layer forms operation;
With above-mentioned the 3rd mask material layer as mask and above-mentioned the 2nd boundary layer is etched to the pattern of regulation, above-mentioned the 2nd boundary layer of this predetermined pattern is come the etching work procedure of above-mentioned the 2nd mask material layer of etching as mask.
13. the manufacture method according to claim 9 or 11 described semiconductor devices is characterized in that, above-mentioned the 2nd mask material layer is made of photoresist.
14. the manufacture method according to claim 9 or 11 described semiconductor devices is characterized in that, forms above-mentioned boundary layer by the CVD film forming.
15. the manufacture method of claim 9 or 11 described semiconductor devices is characterized in that,
Go bad and form above-mentioned boundary layer in side wall portion by making above-mentioned the 1st pattern and top.
16. the manufacture method of claim 9 or 11 described semiconductor devices is characterized in that,
Form in the operation at above-mentioned the 1st pattern, form with predetermined distance and be formed with the repeat patterns portion of a plurality of identical patterns and be formed on the peripheral circuit drafting department of the periphery of above-mentioned repeat patterns portion.
17. the manufacturing installation of a semiconductor device, it is the manufacturing installation that is formed for the etched layer on the substrate is carried out the semiconductor device of etched mask, it is characterized in that, comprises with lower member:
The 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms parts;
The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms parts;
The 2nd mask material layer that forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer outwardly that covers above-mentioned boundary layer forms parts;
Remove the 2nd mask material of the part of above-mentioned the 2nd mask material layer for the top that makes above-mentioned boundary layer is exposed and remove parts;
Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching part of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer;
Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing member of Rack.
18. the manufacturing installation of a semiconductor device, it is the manufacturing installation that is formed for the etched layer on the substrate is carried out the semiconductor device of etched mask, it is characterized in that, comprises with lower member:
The 1st mask material layer that is made of photoresist is carried out that pattern forms and the 1st pattern that forms the 1st pattern forms parts;
The boundary layer that forms the boundary layer that is made of above-mentioned photoresist and the material that can optionally remove at the side wall portion and the top of above-mentioned the 1st pattern forms parts;
The 2nd mask material layer that the state that exposes with the top in above-mentioned boundary layer forms the 2nd mask material layer that is made of the material that can optionally remove above-mentioned boundary layer forms parts;
Also remove above-mentioned boundary layer in the above-mentioned boundary layer of etching, forms the space and form the boundary layer etching part of the 2nd pattern that is made of above-mentioned the 2nd mask material layer between the side wall portion of above-mentioned the 1st pattern and above-mentioned the 2nd mask material layer;
Be used to reduce the width of above-mentioned the 1st pattern and the 2nd pattern and make the width of the 1st pattern and the 2nd pattern form the finishing member of Rack.
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| JP2008034230 | 2008-02-15 | ||
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102376561A (en) * | 2010-08-18 | 2012-03-14 | 中芯国际集成电路制造(上海)有限公司 | Etching method |
| CN105556645A (en) * | 2013-09-17 | 2016-05-04 | 德卡技术股份有限公司 | Two step method of rapid curing a semiconductor polymer layer |
| CN106707686A (en) * | 2015-11-13 | 2017-05-24 | 佳能株式会社 | Method of reverse tone patterning |
| CN113035696A (en) * | 2021-02-25 | 2021-06-25 | 长鑫存储技术有限公司 | Preparation method of semiconductor structure and semiconductor structure |
-
2009
- 2009-02-13 CN CNA2009100069557A patent/CN101510510A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102376561A (en) * | 2010-08-18 | 2012-03-14 | 中芯国际集成电路制造(上海)有限公司 | Etching method |
| CN105556645A (en) * | 2013-09-17 | 2016-05-04 | 德卡技术股份有限公司 | Two step method of rapid curing a semiconductor polymer layer |
| CN105556645B (en) * | 2013-09-17 | 2019-01-08 | 德卡技术股份有限公司 | The two-step method of rapid curing semiconducting polymer layer |
| CN106707686A (en) * | 2015-11-13 | 2017-05-24 | 佳能株式会社 | Method of reverse tone patterning |
| CN113035696A (en) * | 2021-02-25 | 2021-06-25 | 长鑫存储技术有限公司 | Preparation method of semiconductor structure and semiconductor structure |
| CN113035696B (en) * | 2021-02-25 | 2022-05-27 | 长鑫存储技术有限公司 | Preparation method of semiconductor structure and semiconductor structure |
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