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CN101330284A - Time constant correction device and related method thereof - Google Patents

Time constant correction device and related method thereof Download PDF

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CN101330284A
CN101330284A CN 200710112013 CN200710112013A CN101330284A CN 101330284 A CN101330284 A CN 101330284A CN 200710112013 CN200710112013 CN 200710112013 CN 200710112013 A CN200710112013 A CN 200710112013A CN 101330284 A CN101330284 A CN 101330284A
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voltage
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capacitive element
current
capacitance
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CN101330284B (en
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韩松融
余明士
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Faraday Technology Corp
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Faraday Technology Corp
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Abstract

The invention discloses a time constant correction device, which comprises: a first voltage generating circuit for generating a first voltage by using a first current flowing through a capacitor element; a second voltage generating circuit for generating a second voltage by passing a second current through an impedance element; and a comparison circuit for comparing the first voltage with the second voltage to generate a comparison signal, wherein the first voltage generation circuit is provided with an analog adjustment element for adjusting the first voltage according to the comparison signal until the first voltage is equal to the second voltage so that a time constant corresponding to an equivalent capacitance value corresponding to the first current flowing through the capacitance element and an equivalent impedance value corresponding to the second current flowing through the impedance element reaches a predetermined value.

Description

时间常数校正装置及其相关方法 Time constant correction device and related method

技术领域 technical field

本发明涉及一种时间常数校准电路,特别涉及一种应用模拟调整机制来调整电容或电流源的时间常数校准电路及其相关方法。The invention relates to a time constant calibration circuit, in particular to a time constant calibration circuit and a related method which uses an analog adjustment mechanism to adjust a capacitance or a current source.

背景技术 Background technique

在许多的通信传输应用电路中都需要使用滤波器,其中,电阻电容滤波器(R.C.filter)因其变异性比主动滤波器(gmC filter)小,所以在设计上较易控制,因此广受各方青睐,然而,电阻电容元件在工艺上往往存在着变异,使得电阻电容时间常数(RC time constant)的实际值与设计值有所出入,进而影响电路的效能及频率响应的准确度。在不经校正的情况之下,电阻电容时间常数的实际值与设计值之间的差距甚至可高达±30%50%(视所用的电容与电阻种类);相对地,该电路的频率响应也将有如此惊人幅度的偏移,这将非常不利于需要准确的频率响应的电路。Filters are required in many communication transmission application circuits. Among them, the resistance capacitor filter (R.C. filter) is easier to control in design because of its variability than the active filter (gmC filter), so it is widely used in various fields. However, there are often variations in the process of resistor-capacitor components, which makes the actual value of the resistor-capacitor time constant (RC time constant) different from the design value, which in turn affects the performance of the circuit and the accuracy of the frequency response. Without correction, the difference between the actual value of the resistor-capacitor time constant and the design value can even be as high as ±30% to 50% (depending on the type of capacitor and resistor used); relatively, the frequency response of the circuit is also There will be an excursion of such a surprising magnitude that it will be very detrimental to circuits that require accurate frequency response.

针对此一因工艺变异所造成的电阻电容时间常数误差,发展出了许多自动频率调校的电路与方法。请参照图1,图1为现有时间常数校正装置100的电路结构图。如图1所示,时间常数校正装置100包含有一第一电压产生电路110、一第二电压产生电路120以及一比较电路130。第一电压产生电路110包含有一时钟信号产生器112、一固定电流源114(用来提供一定电流Ic)以及一切换式电容电路140。切换式电容电路140包含有一第一电容元件C1(其是可变电容元件)、第一开关元件142、第二开关元件143、第二电容元件Cs1以及第三开关元件145。时钟信号产生器112会分别产生一第一时钟信号ψ1以及一第二时钟信号ψ2,其中,第一时钟信号ψ1以第二时钟信号ψ2不互相重迭(non-overlapped)的时钟,用来驱动切换式电容电路140以产生第一电压Vc。第二电压产生电路120包含一差动电路122、一固定电流源123(用来提供一定电流Ic)、一晶体管124以及另一固定电流源125(用来提供一定电流K*Ic流经一阻抗元件R1以产生一第二电压Vr。比较电路130包含有一比较器132以及一数字逻辑134,其中,比较器132会比较第二电压Vr以及能带隙参考电压Vref以产生一比较信号并送到数字逻辑134以产生一数字句柄来打开或关闭每一单位电容,进而调整电容C1的最后电容值大小。请注意,现有技术必须有一能带隙参考电压电路(bandgap referencevoltage circuit)来产生所需的能带隙参考电压Vref,然而,由于该能带隙参考电压电路已广泛地应用于各类应用范围,以便在一温度范围内提供一稳定的参考电压,其运作与功能是熟知此项技艺者所知,故在此不另赘述。Aiming at the time constant error of resistors and capacitors caused by process variation, many circuits and methods for automatic frequency adjustment have been developed. Please refer to FIG. 1 , which is a circuit structure diagram of a conventional time constant correction device 100 . As shown in FIG. 1 , the time constant calibration device 100 includes a first voltage generating circuit 110 , a second voltage generating circuit 120 and a comparing circuit 130 . The first voltage generating circuit 110 includes a clock signal generator 112 , a fixed current source 114 (used to provide a certain current I c ), and a switched capacitor circuit 140 . The switched capacitor circuit 140 includes a first capacitive element C1 (which is a variable capacitive element), a first switch element 142 , a second switch element 143 , a second capacitive element Cs1 and a third switch element 145 . The clock signal generator 112 generates a first clock signal ψ 1 and a second clock signal ψ 2 respectively, wherein the first clock signal ψ 1 and the second clock signal ψ 2 are non-overlapped clocks , used to drive the switched capacitor circuit 140 to generate the first voltage Vc. The second voltage generating circuit 120 includes a differential circuit 122, a fixed current source 123 (used to provide a certain current Ic), a transistor 124 and another fixed current source 125 (used to provide a certain current K*Ic flowing through an impedance Element R1 is used to generate a second voltage Vr. The comparison circuit 130 includes a comparator 132 and a digital logic 134, wherein the comparator 132 compares the second voltage Vr and the bandgap reference voltage Vref to generate a comparison signal and send it to The digital logic 134 turns on or off each unit capacitance to generate a digital handle, and then adjusts the final capacitance value of the capacitor C1. Please note that the prior art must have a bandgap reference voltage circuit (bandgap reference voltage circuit) to generate the required However, since the bandgap reference voltage circuit has been widely used in various applications to provide a stable reference voltage in a temperature range, its operation and function are well known in the art are well known, so I will not repeat them here.

请注意,现有时间常数校正装置100的目的在于藉由调整可变电容C1来维持固定的时间常数R1×C1,简单来说,在此电路中使用两个数学恒等式,首先,从第二电压电路120的观点来看,参考电压Vr是:Vr=K×Ic×R1,将参考电压Vr与能带隙参考电压Vref比较,在稳态时可得Vref=K×Ic×R1,接着,从第一电压电路110的观点来看,时钟信号产生器112会产生第一时钟信号ψ1以及第二时钟信号ψ2,而第一时钟信号ψ1以及第二时钟信号ψ2是不互相重迭的时钟(其周期为T),用来驱动切换式电容电路140以产生第一电压Vc,因此当电流Ic在一个周期内对电容C1充电时,电容C1上会产生第一电压Vc是:Vc=Ic×T/(2×C1),当时钟对电容C1放电时,电容Cs1会维持电压Vc,而当Vc=Vref时,R1×C1=T/2K,由于T以及K均为已知的常数,因此时间常数为定值,此电路的控制方式为使用比较器132来产生数字句柄以打开或关闭每一单位电容进而调整最后电容值的大小,然而,此种利用数字句柄来调整电容值的电路,如果分辨率要好,就必须设计相当多加上开关的单位电容分支,因此不适合于应用电容放大技术。Please note that the purpose of the existing time constant correction device 100 is to maintain a fixed time constant R1×C1 by adjusting the variable capacitor C1. In simple terms, two mathematical identities are used in this circuit. First, from the second voltage From the point of view of the circuit 120, the reference voltage Vr is: Vr=K×Ic×R1, comparing the reference voltage Vr with the bandgap reference voltage Vref, Vref=K×Ic×R1 can be obtained in a steady state, then, From the point of view of the first voltage circuit 110, the clock signal generator 112 generates the first clock signal ψ 1 and the second clock signal ψ 2 , and the first clock signal ψ 1 and the second clock signal ψ 2 do not overlap with each other. The repeated clock (its cycle is T) is used to drive the switched capacitor circuit 140 to generate the first voltage Vc, so when the current Ic charges the capacitor C1 within one cycle, the first voltage Vc generated on the capacitor C1 is: Vc=Ic×T/(2×C1), when the clock discharges the capacitor C1, the capacitor Cs1 will maintain the voltage Vc, and when Vc=Vref, R1×C1=T/2K, since T and K are known constant, so the time constant is a fixed value, the control method of this circuit is to use the comparator 132 to generate a digital handle to turn on or off each unit of capacitance and then adjust the size of the final capacitance value, however, this method uses a digital handle to adjust the capacitance Value circuit, if the resolution is good, it is necessary to design quite a lot of unit capacitance branches with switches, so it is not suitable for the application of capacitance amplification technology.

可是,系统单芯片(SoC)目前已成为集成电路设计的主流,而锁相环或是以锁相环为基础的应用对系统单芯片而言是不可或缺的。熟知此项技艺者应可轻易地了解,当互补式金属氧化物半导体工艺进步时,晶体管的面积也会随着缩小,但并不包括芯片内的被动元件。低通滤波器是锁相环的其中一部份,它是由电阻跟电容所组成,在过去几年,低通滤波器总是设计在芯片外来降低芯片面积和节省生产成本,在今天,将低通滤波器整合至芯片内则是较符合系统单芯片的潮流,然而,这些被动元件却仍需占用大部份的芯片面积,所以如何降低这些被动元件的面积,已经成为电路设计上一个很重要的课题。However, system-on-chip (SoC) has become the mainstream of integrated circuit design, and PLL or PLL-based applications are indispensable for SoC. Those skilled in the art should be able to easily understand that when the CMOS process advances, the area of the transistor will also shrink, but the passive components in the chip are not included. The low-pass filter is a part of the phase-locked loop. It is composed of resistors and capacitors. In the past few years, the low-pass filter was always designed outside the chip to reduce the chip area and save production costs. Today, the low-pass filter will be The integration of low-pass filters into the chip is more in line with the trend of SoC. However, these passive components still occupy most of the chip area, so how to reduce the area of these passive components has become a very important problem in circuit design. important subject.

发明内容Contents of the invention

本发明的主要一目的在于提供一种时间常数校正装置及其相关方法以解决上述的问题。在本发明一实施例中揭露一种时间常数校正装置,其包含有:一第一电压产生电路,其使用一第一电流流经一电容元件以产生一第一电压;一第二电压产生电路,其使用一第二电流流经一阻抗元件以产生一第二电压;以及一比较电路,用来比较该第一电压以及该第二电压以产生一比较信号,其中,该第一电压产生电路设置有一模拟调整元件,用来依据该比较信号调整该第一电压,直到该第一电压等于该第二电压而使该第一电流流过该电容元件所对应的一等效电容值与该第二电流流过该阻抗元件所对应的一等效阻抗值所对应的一时间常数达到一预定值为止。A main objective of the present invention is to provide a time constant calibration device and related method to solve the above problems. In one embodiment of the present invention, a time constant correction device is disclosed, which includes: a first voltage generating circuit, which uses a first current to flow through a capacitive element to generate a first voltage; a second voltage generating circuit , which uses a second current to flow through an impedance element to generate a second voltage; and a comparison circuit for comparing the first voltage and the second voltage to generate a comparison signal, wherein the first voltage generation circuit An analog adjustment element is provided for adjusting the first voltage according to the comparison signal until the first voltage is equal to the second voltage so that the first current flows through the capacitance element corresponding to an equivalent capacitance value corresponding to the first voltage A time constant corresponding to an equivalent impedance value corresponding to the two currents flowing through the impedance element reaches a predetermined value.

本发明另揭露一种时间常数校正方法,其包含有:提供一第一电流以及一电容元件;利用该第一电流流经该电容元件以产生一第一电压;提供一第二电流以及一组抗元件;利用该第二电流流经该阻抗元件以产生一第二电压;以及比较该第一电压以及该第二电压以产生一比较信号,并依据该比较信号而经由一模拟调整方式来调整该第一电压,直到该第一电压等于该第二电压而使该第一电流流经该电容元件所对应的一等效电容值与该第二电流流经该阻抗元件所对应的一等效阻抗值所对应的一时间常数达到一预定值为止。The present invention also discloses a time constant correction method, which includes: providing a first current and a capacitive element; using the first current to flow through the capacitive element to generate a first voltage; providing a second current and a set of an impedance element; use the second current to flow through the impedance element to generate a second voltage; and compare the first voltage and the second voltage to generate a comparison signal, and adjust through an analog adjustment method according to the comparison signal The first voltage, until the first voltage is equal to the second voltage so that an equivalent capacitance value corresponding to the first current flowing through the capacitive element and an equivalent capacitance value corresponding to the second current flowing through the impedance element A time constant corresponding to the impedance value reaches a predetermined value.

附图说明 Description of drawings

图1为现有时间常数校正装置的电路结构图。Fig. 1 is a circuit structure diagram of a conventional time constant correction device.

图2为本发明时间常数校正装置的简单功能方块图。Fig. 2 is a simple functional block diagram of the time constant correction device of the present invention.

图3为本发明第一实施例的时间常数校正装置的电路结构图。FIG. 3 is a circuit structure diagram of the time constant correction device according to the first embodiment of the present invention.

图4为本发明第二实施例的时间常数校正装置的电路结构图。FIG. 4 is a circuit structure diagram of a time constant correction device according to a second embodiment of the present invention.

图5为本发明时间常数校正方法的一广义流程图。FIG. 5 is a generalized flowchart of the time constant correction method of the present invention.

附图符号说明Description of reference symbols

  100、200、300、400 100, 200, 300, 400   时间常数校正装置 Time constant correction device   110、210、310、410 110, 210, 310, 410   第一电压产生电路 The first voltage generating circuit   212 212   模拟调整元件 ANALOG ADJUSTMENT COMPONENTS   120、220、320、420 120, 220, 320, 420   第二电压产生电路 The second voltage generation circuit   130、230、330、430 130, 230, 330, 430   比较电路 comparison circuit   112、312、412 112, 312, 412   时钟信号产生器 clock signal generator   114、125、314 114, 125, 314   固定电流源 Fixed current source

  142、342、442 142, 342, 442   第一开关元件 The first switching element   143、343、443 143, 343, 443   第二开关元件 The second switching element   145、345、445 145, 345, 445   第三开关元件 The third switching element   122 122   差动电路 Differential circuit   124 124   晶体管 Transistor   132 132   比较器 Comparators   134 134   数字逻辑 mathematical logic   140、340、440 140, 340, 440   切换式电容电路 Switched Capacitor Circuit   341、441 341, 441   第一电容元件 The first capacitive element   344、444 344, 444   第二电容元件 Second capacitive element   414 414   压控电流源 Voltage controlled current source

具体实施方式 Detailed ways

在说明书及后续的申请专利范围当中使用了某些词汇来指称特定的元件。所属领域中具有通常知识者应可理解,制造商可能会用不同的名词来称呼同一个元件。本说明书及后续的申请专利范围并不以名称的差异来作为区分元件的方式,而是以元件在功能上的差异来作为区分的准则。在通篇说明书及后续的请求项当中所提及的「包含」是一开放式的用语,故应解释成「包含但不限定于」。以外,「耦接」一词在此包含任何直接及间接的电气连接手段。因此,若文中描述一第一装置耦接于一第二装置,则代表该第一装置可直接电气连接于该第二装置,或通过其它装置或连接手段间接地电气连接至该第二装置。Certain terms are used in the specification and subsequent claims to refer to particular elements. Those of ordinary skill in the art will appreciate that manufacturers may refer to the same element by different terms. This description and subsequent patent applications do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. The "comprising" mentioned throughout the specification and subsequent claims is an open-ended term, so it should be interpreted as "including but not limited to". Otherwise, the term "coupled" includes any direct and indirect means of electrical connection. Therefore, if it is described that a first device is coupled to a second device, it means that the first device may be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.

请参照图2,图2为本发明时间常数校正装置200的简单功能方块图。如图2所示,时间常数校正装置200包含有一第一电压产生电路210、一第二电压产生电路220以及一比较电路230。第一电压产生电路210利用一第一电流I1流经一电容元件以产生一第一电压V1,而第二电压产生电路220则利用一第二电流I2(例如,I2=K×I1)流经一阻抗元件以产生一第二电压V2,此外,比较电路230电连接于第一电压产生电路210以及第二电压产生电路220,用来比较第一电压V1以及第二电压V2以产生一比较信号Vadj,其中,第一电压产生电路210中设置有一模拟调整元件212,用来依据比较信号Vadj调整第一电压V1,直到第一电压V1等于第二电压V2而使第一电流I1流经该电容元件所对应的一等效电容值(例如C1)与第二电流I2流经该阻抗元件所对应的一等效阻抗值(例如R1)所对应的一时间常数达到一预定值(例如,R1×C1=T/2K)为止。Please refer to FIG. 2 , which is a simple functional block diagram of a time constant correction device 200 of the present invention. As shown in FIG. 2 , the time constant calibration device 200 includes a first voltage generating circuit 210 , a second voltage generating circuit 220 and a comparing circuit 230 . The first voltage generating circuit 210 uses a first current I 1 to flow through a capacitive element to generate a first voltage V 1 , and the second voltage generating circuit 220 uses a second current I 2 (for example, I 2 =K× I 1 ) flows through an impedance element to generate a second voltage V 2 , in addition, the comparison circuit 230 is electrically connected to the first voltage generation circuit 210 and the second voltage generation circuit 220, and is used to compare the first voltage V 1 and the second voltage generation circuit. voltage V 2 to generate a comparison signal V adj , wherein the first voltage generating circuit 210 is provided with an analog adjustment element 212 for adjusting the first voltage V 1 according to the comparison signal V adj until the first voltage V 1 is equal to the second The voltage V 2 causes the first current I 1 to flow through the capacitive element corresponding to an equivalent capacitance value (such as C1) and the second current I 2 to flow through the impedance element corresponding to an equivalent impedance value (such as R1) A corresponding time constant reaches a predetermined value (for example, R1×C1=T/2K).

请参照图3,图3为本发明第一实施例的时间常数校正装置300的电路结构图。如图3所示,时间常数校正装置300包含有一第一电压产生电路310、一第二电压产生电路320以及一比较电路330。第二电压产生电路320利用一固定电流源322提供一第二电流I2(在本实施例中,I2=K×I1))流经一阻抗元件R1(例如一电阻)以产生一第二电压Vr,此外,第一电压产生电路310包含有时钟信号产生器312、固定电流源314以及切换式电容电路340。时钟信号产生器312是用来产生一第一时钟信号ψ1以及一第二时钟信号ψ2,其中,第一时钟信号ψ1以及第二时钟信号ψ2不互相重迭,且两者的周期为T;固定电流源314的一端耦接于一第一电压电平(Vdd);切换式电容电路340包含有第一电容元件341、第一开关元件342、第二开关元件343、第二电容元件344以及第三开关元件345,其中,第一电容元件341的第一端耦接于电流源314,而第二端则耦接于一第二电压电平(接地端),用来依据电流源314所提供的第一电流I1进行充电以产生第一电压V1,其中,第一电容元件341是一模拟式可变电容器而作为前述的模拟调整元件,如图3所示,第一电容元件341(模拟式可变电容器)耦接于比较电路330,用来依据一比较信号Vadj调整其电容值;第一开关元件342,其第一端耦接于该第二电压电平,其第二端耦接于第一电容元件341的第一端,用来依据第二时钟信号ψ2而选择性地将第一开关元件342的第二端耦接于第一电容元件341的第一端,以使第一电容元件341进行放电;第二开关元件343,其一第一端耦接于第一电容元件341的第一端,用来依据第一时钟信号ψ1而选择性地让第二开关元件343的第一端耦接于第一电容元件341的第一端;第二电容元件344,其一第一端耦接于第二开关元件343的第二端,以及其一第二端耦接于该第二电压电平;以及第三开关元件345,其第一端耦接于第二电容元件344的第一端,而其第二端耦接于比较电路330,用来依据第二时钟信号ψ2而选择性地让第三开关元件345的第二端耦接于第二电容元件344的第一端;比较电路330电连接于第一电压产生电路310以及第二电压产生电路320,用来比较第一电压V1以及第二电压V2以产生上述的比较信号Vadj。时间常数校正装置300依据比较信号Vadj调整第一电容元件341的电容值(亦即,由于第一电压V1=Ic×T/(2×N×Ca),因此可藉由调整N而达到调整第一电压的目的),直到第一电压V1等于第二电压V2而使第一电流I1流经第一电容元件341所对应的等效电容值与第二电流I2流经阻抗元件R1所对应的等效阻抗值所对应的一时间常数达到一预定值(R1×C1=T/2K)为止。Please refer to FIG. 3 . FIG. 3 is a circuit structure diagram of a time constant correction device 300 according to a first embodiment of the present invention. As shown in FIG. 3 , the time constant calibration device 300 includes a first voltage generation circuit 310 , a second voltage generation circuit 320 and a comparison circuit 330 . The second voltage generation circuit 320 utilizes a fixed current source 322 to provide a second current I 2 (in this embodiment, I 2 =K×I 1 )) to flow through an impedance element R 1 (such as a resistor) to generate a The second voltage V r , in addition, the first voltage generating circuit 310 includes a clock signal generator 312 , a fixed current source 314 and a switched capacitor circuit 340 . The clock signal generator 312 is used to generate a first clock signal ψ1 and a second clock signal ψ2, wherein the first clock signal ψ1 and the second clock signal ψ2 do not overlap with each other, and the period of the two is T; fixed One end of the current source 314 is coupled to a first voltage level (V dd ); the switched capacitor circuit 340 includes a first capacitor element 341 , a first switch element 342 , a second switch element 343 , a second capacitor element 344 and The third switching element 345, wherein, the first end of the first capacitive element 341 is coupled to the current source 314, and the second end is coupled to a second voltage level (ground end), which is used for according to the current source 314 The provided first current I 1 is charged to generate a first voltage V 1 , wherein the first capacitive element 341 is an analog variable capacitor as the aforementioned analog adjustment element, as shown in FIG. 3 , the first capacitive element 341 (analog variable capacitor) is coupled to the comparison circuit 330, and is used to adjust its capacitance value according to a comparison signal V adj ; the first switch element 342, its first end is coupled to the second voltage level, and its second terminal is coupled to the first end of the first capacitive element 341, and is used for selectively coupling the second end of the first switching element 342 to the first end of the first capacitive element 341 according to the second clock signal ψ 2 , so that the first capacitive element 341 is discharged; the second switch element 343, a first end of which is coupled to the first end of the first capacitive element 341 , is used to selectively allow the second The first end of the switch element 343 is coupled to the first end of the first capacitive element 341; the second capacitive element 344 has a first end coupled to the second end of the second switch element 343, and a second end of the second capacitive element 344 coupled to the second voltage level; and a third switching element 345, the first end of which is coupled to the first end of the second capacitive element 344, and the second end thereof is coupled to the comparison circuit 330 for use according to the first Two clock signals ψ2 selectively allow the second end of the third switching element 345 to be coupled to the first end of the second capacitive element 344; the comparison circuit 330 is electrically connected to the first voltage generation circuit 310 and the second voltage generation circuit 320 , used to compare the first voltage V 1 and the second voltage V 2 to generate the above comparison signal V adj . The time constant correction device 300 adjusts the capacitance value of the first capacitive element 341 according to the comparison signal V adj (that is, since the first voltage V 1 =I c ×T/(2×N×C a ), it can be adjusted by adjusting N to achieve the purpose of adjusting the first voltage), until the first voltage V1 is equal to the second voltage V2 so that the first current I1 flows through the equivalent capacitance value corresponding to the first capacitive element 341 and the second current I2 flows A time constant corresponding to the equivalent impedance value corresponding to the impedance element R 1 reaches a predetermined value (R 1 ×C 1 =T/2K).

请注意,模拟式可变电容器(亦即第一电容元件341)包含具有一第一电容值Ca的一预定电容,并应用一电容放大技术来使该模拟式可变电容器的电容值对应大于第一电容值Ca的一第二电容值N×Ca(N大于1),在本实施例中,使用一电容放大技术来调整第一电容元件341,该电容放大技术可将小电容所具有的电容值Ca放大N倍来得到第一电容元件341所要的电容值,在相同的电容值C1之下,随着N值越大,电容面积就越小(亦即所需的第一电容值Ca便越小),举例来说,如果N可以设计为10,因此电容面积便可以缩减10倍,请注意,由于第一电容元件341的电容值必须适当地调整来补偿阻抗元件R1以及本身的工艺变异,所以N值的可变化范围必须涵盖阻抗元件R1以及第一电容元件341工艺的变异量。Please note that the analog variable capacitor (i.e. the first capacitive element 341) includes a predetermined capacitance with a first capacitance C a , and a capacitance amplification technique is applied to make the capacitance of the analog variable capacitor correspondingly greater than A second capacitance value N×C a (N is greater than 1) of the first capacitance value C a . In this embodiment, a capacitance amplification technique is used to adjust the first capacitance element 341. This capacitance amplification technique can reduce the small capacitance The capacitance value Ca that has is amplified by N times to obtain the desired capacitance value of the first capacitance element 341, under the same capacitance value C1 , as the N value is larger, the capacitance area is smaller (that is, the required first The smaller the capacitance value C a ), for example, if N can be designed to be 10, so the capacitance area can be reduced by 10 times, please note that since the capacitance value of the first capacitance element 341 must be properly adjusted to compensate the impedance element R 1 and its own process variation, so the variable range of the N value must cover the process variation of the impedance element R 1 and the first capacitive element 341 .

请参照图4,图4为本发明第二实施例的时间常数校正装置400的电路结构图。如图4所示,时间常数校正装置400包含有一第一电压产生电路410、一第二电压产生电路420以及一比较电路430。第二电压产生电路420利用一第二电流I2(I2=K×Ic)流经一阻抗元件R1以产生一第二电压Vr;而第一电压产生电路410包含有一时钟信号产生器412、压控电流源414以及切换式电容电路440。时钟信号产生器412用来产生一第一时钟信号ψ1以及一第二时钟信号ψ2,其中,第一时钟信号ψ1以及第二时钟信号ψ2不互相重迭,且两者的周期为T;压控电流源414,其一端耦接于一第一电压电平(Vdd),其中,压控电流源414是作为上述的模拟调整元件并耦接于比较电路430,用来依据比较信号Vadj调整压控电流源414所输出的第一电流I1(I1=Ic/N);切换式电容电路440包含有第一电容元件441(其电容值为上述的Ca,亦即第一电容元件441是以一小电容来加以实作)、第一开关元件442、第二开关元件443、第二电容元件444以及第三开关元件445。第一电容元件441,其第一端耦接于压控电流源414,而其第二端则耦接于一第二电压电平(接地端),用来依据压控电流源414所输出的第一电流I1进行充电以产生第一电压V1;第一开关元件442,其第一端耦接于该第二电压电平,而其第二端耦接于第一电容元件441的第一端,用来依据第二时钟信号ψ2而选择性地将第一开关元件442的第二端耦接于第一电容元件441的第一端以使第一电容元件441进行放电;第二开关元件443,其第一端耦接于第一电容元件441的第一端,用来依据第一时钟信号ψ1而选择性地让第二开关元件443的第一端耦接于第一电容元件441的第一端;第二电容元件444,其第一端耦接于第二开关元件443的第二端,而其第二端则耦接于该第二电压电平;以及第三开关元件445,其第一端耦接于第二电容元件444的第一端,而其第二端耦接于比较电路430,用来依据第二时钟信号ψ2而选择性地让第三开关元件445的第二端耦接于第二电容元件444的第一端;比较电路430电连接于第一电压产生电路410以及第二电压产生电路420,用来比较第一电压V1以及第二电压Vr以产生比较信号Vaj,并依据比较信号Vadj调整压控电流源414所输出的第一电流I1(亦即,由于第一电压V1=(Ic/N)×T/(2×Ca),因此可藉由调整N而达到调整第一电压V1的目的),直到第一电压V1等于第二电压V2而使第一电流I1流经第一电容元件441所对应的等效电容值与第二电流I2流经阻抗元件R1所对应的等效阻抗值所等效的一时间常数达到一预定值(R1×C1=T/2K)为止。Please refer to FIG. 4 , which is a circuit structure diagram of a time constant correction device 400 according to a second embodiment of the present invention. As shown in FIG. 4 , the time constant calibration device 400 includes a first voltage generation circuit 410 , a second voltage generation circuit 420 and a comparison circuit 430 . The second voltage generating circuit 420 uses a second current I 2 (I 2 =K×I c ) to flow through an impedance element R 1 to generate a second voltage V r ; and the first voltage generating circuit 410 includes a clock signal generating device 412 , voltage-controlled current source 414 and switched capacitor circuit 440 . The clock signal generator 412 is used to generate a first clock signal ψ 1 and a second clock signal ψ 2 , wherein the first clock signal ψ 1 and the second clock signal ψ 2 do not overlap with each other, and the periods of the two are T; a voltage-controlled current source 414, one end of which is coupled to a first voltage level (V dd ), wherein the voltage-controlled current source 414 is used as the above-mentioned analog adjustment element and is coupled to the comparison circuit 430 for comparison based on The signal V adj adjusts the first current I 1 output by the voltage-controlled current source 414 (I 1 =I c /N); the switched capacitor circuit 440 includes a first capacitor element 441 (the capacitance value of which is the above-mentioned C a , also That is, the first capacitive element 441 is implemented with a small capacitor), the first switch element 442 , the second switch element 443 , the second capacitive element 444 and the third switch element 445 . The first capacitive element 441, its first end is coupled to the voltage-controlled current source 414, and its second end is then coupled to a second voltage level (ground end), used for according to the output of the voltage-controlled current source 414 The first current I 1 is charged to generate the first voltage V 1 ; the first switch element 442 has a first end coupled to the second voltage level, and a second end coupled to the first capacitive element 441 . One end is used to selectively couple the second end of the first switching element 442 to the first end of the first capacitive element 441 according to the second clock signal ψ 2 to discharge the first capacitive element 441; The switch element 443, the first end of which is coupled to the first end of the first capacitive element 441 is used for selectively coupling the first end of the second switch element 443 to the first capacitive element according to the first clock signal ψ1 The first end of 441; The second capacitive element 444, its first end is coupled to the second end of the second switching element 443, and its second end is then coupled to the second voltage level; and the third switching element 445, the first end of which is coupled to the first end of the second capacitive element 444, and the second end thereof is coupled to the comparison circuit 430, for selectively making the third switching element 445 according to the second clock signal ψ 2 The second end of the second end is coupled to the first end of the second capacitive element 444; the comparison circuit 430 is electrically connected to the first voltage generation circuit 410 and the second voltage generation circuit 420, and is used to compare the first voltage V1 and the second voltage V r to generate a comparison signal V aj , and adjust the first current I 1 output by the voltage-controlled current source 414 according to the comparison signal V adj (that is, because the first voltage V 1 =(I c /N)×T/(2 ×C a ), so the purpose of adjusting the first voltage V 1 can be achieved by adjusting N), until the first voltage V 1 is equal to the second voltage V 2 and the first current I 1 flows through the first capacitive element 441 A time constant corresponding to the equivalent capacitance value and the equivalent impedance value corresponding to the second current I 2 flowing through the impedance element R 1 reaches a predetermined value (R 1 ×C 1 =T/2K).

综上所述,本发明的第一实施例是固定一电流源所提供的电流并利用一电容放大技术以模拟方式通过比较信号Vadj来调整可变电容器的电容值以校准时间常数,然而,在某些特定应用电路上并不适合直接调整电容值,所以本发明的第二实施例是固定一电容器的电容值而以比较信号Vadj来调整压控电流源的输出电流以同样地达到校准时间常数的功效。请注意,若同时结合上述两实施例的技术特征(亦即一并使用压控电流源与可变电容器),亦可经由适当的控制来达到校正时间常数的目的,亦属本发明的范畴。In summary, the first embodiment of the present invention is to fix the current provided by a current source and use a capacitance amplification technique to adjust the capacitance value of the variable capacitor by comparing the signal V adj in an analog manner to calibrate the time constant. However, It is not suitable to directly adjust the capacitance value on some specific application circuits, so the second embodiment of the present invention is to fix the capacitance value of a capacitor and use the comparison signal V adj to adjust the output current of the voltage-controlled current source to achieve the same calibration The effect of the time constant. Please note that if the technical features of the above two embodiments are combined (that is, the voltage-controlled current source and the variable capacitor are used together), the purpose of correcting the time constant can also be achieved through appropriate control, which also belongs to the scope of the present invention.

请参照图5,图5为本发明时间常数校正方法的一广义(generalized)流程图。请注意,假设可大致上获得相同的结果,图5所示的流程并不一定要遵循图标的步骤执行顺序。依据上述实施例,本发明时间常数校正方法的运作可简单地归纳如下:Please refer to FIG. 5 , which is a generalized flowchart of the time constant calibration method of the present invention. Note that the flow shown in Figure 5 does not necessarily follow the order in which the steps are performed as shown, assuming that roughly the same results can be achieved. According to the above-mentioned embodiment, the operation of the time constant correction method of the present invention can be simply summarized as follows:

步骤500:校正流程开始。Step 500: The calibration procedure starts.

步骤502:提供一第一电流以及一电容元件。Step 502: Provide a first current and a capacitive element.

步骤504:提供一第二电流以及一组抗元件。Step 504: Provide a second current and a set of resistive elements.

步骤506:利用该第一电流流经该电容元件以产生一第一电压。Step 506 : Use the first current to flow through the capacitive element to generate a first voltage.

步骤508:利用该第二电流流经该阻抗元件以产生一第二电压。Step 508 : Use the second current to flow through the impedance element to generate a second voltage.

步骤510:比较该第一电压以及该第二电压以产生一比较信号。Step 510: Compare the first voltage and the second voltage to generate a comparison signal.

步骤512:该比较信号是否指示该第一电压等于该第二电压?若是,执行步骤516;否则,执行步骤514。Step 512: Does the comparison signal indicate that the first voltage is equal to the second voltage? If yes, go to step 516; otherwise, go to step 514.

步骤514:依据该比较信号而经由一模拟调整机制(例如调整由可变电容器所实作的该电容元件或者调整用来提供该第一电流的压控电流源)来调整该第一电压。接着,回到步骤510。Step 514 : Adjust the first voltage according to the comparison signal through an analog adjustment mechanism (for example, adjust the capacitive element implemented by a variable capacitor or adjust a voltage-controlled current source for providing the first current). Next, return to step 510 .

步骤516:校正流程结束(该第一电流流经该电容元件所对应的一等效电容值与该第二电流流经该阻抗元件所对应的一等效阻抗值所对应的一时间常数达到一预定值)。Step 516: The calibration process ends (a time constant corresponding to an equivalent capacitance value corresponding to the first current flowing through the capacitive element and an equivalent impedance value corresponding to the second current flowing through the impedance element reaches a predetermined value).

相较于现有技术,本发明不但可以节省电路面积以及功率消耗,而且不需能带隙参考电压电路来产生能带隙参考电压Vref,也因为不需要能带隙参考电压电路,所以在电路设计上可以更简化以及更有弹性,此外,本发明利用模拟的电压控制信号配合模拟控制的可变电容器,并结合电容放大技术,因而可大幅度节省电容所占用的芯片面积。Compared with the prior art, the present invention not only saves circuit area and power consumption, but also does not require a bandgap reference voltage circuit to generate a bandgap reference voltage V ref , and because a bandgap reference voltage circuit is not required, the The circuit design can be simplified and more flexible. In addition, the present invention uses an analog voltage control signal to cooperate with an analog-controlled variable capacitor, combined with capacitance amplification technology, thereby greatly saving the chip area occupied by the capacitor.

以上所述仅为本发明的较佳实施例,凡依本发明申请专利范围所做的均等变化与修饰,皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

Claims (7)

1.一种时间常数校正装置,其包含有:1. A time constant correction device comprising: 一第一电压产生电路,其使用一第一电流流经一第一电容元件以产生一第一电压;a first voltage generating circuit, which uses a first current to flow through a first capacitive element to generate a first voltage; 一第二电压产生电路,其使用一第二电流流经一阻抗元件以产生一第二电压;以及a second voltage generation circuit, which uses a second current to flow through an impedance element to generate a second voltage; and 一比较电路,电连接于该第一电压产生电路以及该第二电压产生电路,用来比较该第一电压以及该第二电压以产生一比较信号,其中,该第一电压产生电路设置有一模拟调整元件,用来依据该比较信号调整该第一电压,直到该第一电压等于该第二电压而使该第一电流流经该第一电容元件所对应的一等效阻抗值与该第二电流流经该阻抗元件所对应的一等效阻抗值所对应的一时间常数达到一预定值为止。A comparison circuit, electrically connected to the first voltage generation circuit and the second voltage generation circuit, used to compare the first voltage and the second voltage to generate a comparison signal, wherein the first voltage generation circuit is provided with an analog an adjustment element, used to adjust the first voltage according to the comparison signal until the first voltage is equal to the second voltage so that the first current flows through an equivalent impedance value corresponding to the first capacitive element and the second A time constant corresponding to an equivalent impedance value corresponding to the current flowing through the impedance element reaches a predetermined value. 2.如权利要求1所述的装置,其中,该第一电压产生电路包含有:2. The device according to claim 1, wherein the first voltage generating circuit comprises: 一时钟信号产生器,用来产生一第一时钟信号以及一第二时钟信号,该第一时钟信号以及该第二时钟信号不互相重迭;A clock signal generator, used to generate a first clock signal and a second clock signal, the first clock signal and the second clock signal do not overlap each other; 一固定电流源,其一端耦接于一第一电压电平,用来提供该第一电流;a fixed current source, one end of which is coupled to a first voltage level for providing the first current; 该第一电容元件,其一第一端耦接于该电流源,其一第二端耦接于一第二电压电平,用来依据该第一电流进行充电以产生该第一电压,其中,该第一电容元件是一模拟式可变电容器而作为该模拟调整元件,该模拟式可变电容器耦接于该比较电路,用来依据该比较信号调整该模拟式可变电容器的电容值;The first capacitive element has a first terminal coupled to the current source and a second terminal coupled to a second voltage level for charging according to the first current to generate the first voltage, wherein , the first capacitive element is an analog variable capacitor as the analog adjustment element, the analog variable capacitor is coupled to the comparison circuit, and is used to adjust the capacitance value of the analog variable capacitor according to the comparison signal; 一第一开关元件,其一第一端耦接于该第二电压电平,其一第二端耦接于该第一电容元件的该第一端,用来依据该第二时钟信号而选择性地将该第一开关元件的该第一端耦接于该第一电容元件的该第一端以使该第一电容元件进行放电;A first switching element, a first end of which is coupled to the second voltage level, and a second end of which is coupled to the first end of the first capacitive element, for selecting according to the second clock signal selectively coupling the first end of the first switch element to the first end of the first capacitive element to discharge the first capacitive element; 一第二开关元件,其一第一端耦接于该第一电容元件的该第一端,用来依据该第一时钟信号而选择性地让该第二开关元件的一第二端耦接于该第一电容元件的该第一端;a second switch element, a first end of which is coupled to the first end of the first capacitive element, and is used for selectively coupling a second end of the second switch element according to the first clock signal at the first end of the first capacitive element; 一第二电容元件,其一第一端耦接于该第二开关元件的该第二端,其一第二端耦接于该第二电压电平;以及a second capacitive element, a first end of which is coupled to the second end of the second switching element, and a second end of which is coupled to the second voltage level; and 一第三开关元件,其一第一端耦接于该第二电容元件的该第一端,其一第二端耦接于该比较电路,用来依据该第二时钟信号而选择性地让该第三开关元件的该第二端耦接于该第二电容元件的该第一端。A third switching element, one of its first terminals is coupled to the first terminal of the second capacitive element, and its second terminal is coupled to the comparison circuit for selectively allowing The second end of the third switch element is coupled to the first end of the second capacitive element. 3.如权利要求2所述的装置,其中,该模拟式可变电容器包含具有一第一电容值的一预定电容,并应用一电容放大技术来使该模拟式可变电容器的电容值对应大于该第一电容值的一第二电容值。3. The device as claimed in claim 2, wherein the analog variable capacitor comprises a predetermined capacitance with a first capacitance value, and a capacitance amplification technique is applied to make the capacitance value of the analog variable capacitor correspondingly greater than A second capacitance value of the first capacitance value. 4.如权利要求1所述的装置,其中,该第一电压产生电路包含有:4. The device as claimed in claim 1, wherein the first voltage generating circuit comprises: 一时钟信号产生器,用来产生一第一时钟信号以及一第二时钟信号,该第一时钟信号以及该第二时钟信号不互相重迭;A clock signal generator, used to generate a first clock signal and a second clock signal, the first clock signal and the second clock signal do not overlap each other; 一压控电流源,其一端耦接于一第一电压电平,用来提供该第一电流,其中,该压控电流源是作为该模拟调整元件并耦接于该比较电路,用来依据该比较信号调整该第一电流;A voltage-controlled current source, one end of which is coupled to a first voltage level, is used to provide the first current, wherein, the voltage-controlled current source is used as the analog adjustment element and is coupled to the comparison circuit, and is used according to the comparison signal adjusts the first current; 该第一电容元件,其一第一端耦接于该压控电流源,其一第二端耦接于一第二电压电平,用来依据该电流源进行充电以产生该第一电压;The first capacitive element has a first terminal coupled to the voltage-controlled current source, and a second terminal coupled to a second voltage level for charging according to the current source to generate the first voltage; 一第一开关元件,其一第一端耦接于该第二电压电平,其一第二端耦接于该第一电容元件的该第一端,用来依据该第二时钟信号而选择性地将该第一开关元件的该第一端耦接于该第一电容元件的该第一端以使该第一电容元件进行放电;A first switching element, a first end of which is coupled to the second voltage level, and a second end of which is coupled to the first end of the first capacitive element, for selecting according to the second clock signal selectively coupling the first end of the first switch element to the first end of the first capacitive element to discharge the first capacitive element; 一第二开关元件,其一第一端耦接于该第一电容元件的该第一端,用来依据该第一时钟信号而选择性地让该第二开关元件的一第二端耦接于该第一电容元件的该第一端;a second switch element, a first end of which is coupled to the first end of the first capacitive element, and is used for selectively coupling a second end of the second switch element according to the first clock signal at the first end of the first capacitive element; 一第二电容元件,其一第一端耦接于该第二开关元件的该第二端,其一第二端耦接于该第二电压电平;以及a second capacitive element, a first end of which is coupled to the second end of the second switching element, and a second end of which is coupled to the second voltage level; and 一第三开关元件,其一第一端耦接于该第二电容元件的该第一端,其一第二端耦接于该比较电路,用来依据该第二时钟信号而选择性地让该第三开关元件的该第二端耦接于该第二电容元件的该第一端。A third switching element, one of its first terminals is coupled to the first terminal of the second capacitive element, and its second terminal is coupled to the comparison circuit for selectively allowing The second end of the third switch element is coupled to the first end of the second capacitive element. 5.一种时间常数校正方法,其包含有:5. A time constant correction method comprising: 提供一第一电流以及一电容元件;providing a first current and a capacitive element; 利用该第一电流流经该电容元件以产生一第一电压;using the first current to flow through the capacitive element to generate a first voltage; 提供一第二电流以及一组抗元件;providing a second current and a set of resistive elements; 利用该第二电流流经该阻抗元件以产生一第二电压;以及using the second current to flow through the impedance element to generate a second voltage; and 比较该第一电压以及该第二电压以产生一比较信号,并依据该比较信号而经由一模拟调整方式来调整该第一电压,直到该第一电压等于该第二电压而使该第一电流流经该电容元件所对应的一等效电容值与该第二电流流经该阻抗元件所对应的一等效阻抗值所对应的一时间常数达到一预定值为止。Comparing the first voltage and the second voltage to generate a comparison signal, and adjusting the first voltage through an analog adjustment method according to the comparison signal until the first voltage is equal to the second voltage so that the first current Until a time constant corresponding to an equivalent capacitance corresponding to the capacitance element flowing through the capacitance element and an equivalent impedance value corresponding to the second current flowing through the impedance element reaches a predetermined value. 6.如权利要求5所述的方法,其中,该电容元件是一模拟式可变电容器,其包含具有一第一电容值的一预定电容,并应用一电容放大技术来使该模拟式可变电容器的电容值对应大于该第一电容值的一第二电容值,以及该模拟调整方式依据该比较信号来调整该模拟式可变电容器所对应的该第二电容值以调整该第一电压。6. The method of claim 5, wherein the capacitive element is an analog variable capacitor comprising a predetermined capacitance having a first capacitance value, and a capacitance amplification technique is applied to make the analog variable capacitor The capacitance of the capacitor corresponds to a second capacitance greater than the first capacitance, and the analog adjustment method adjusts the second capacitance corresponding to the analog variable capacitor according to the comparison signal to adjust the first voltage. 7.如权利要求5所述的方法,其中,该模拟调整方式依据该比较信号来调整一压控电流源所提供的该第一电流以调整该第一电压。7. The method as claimed in claim 5, wherein the analog adjustment method adjusts the first current provided by a voltage-controlled current source according to the comparison signal to adjust the first voltage.
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