CN101321290B - Block-removing filtering method based on digital signal processor - Google Patents
Block-removing filtering method based on digital signal processor Download PDFInfo
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Abstract
The invention provides a filtering method for removing blocks based on the DSP, comprising: step one, calculating a first filter intensity of the vertical boundary and a second filter intensity of a horizontal boundary; step two, respectively judging whether it processes the enforced filter for the vertical boundary and enforced filter for the horizontal boundary according to the first filter intensity and the second filter intensity; and step three, using the collateral instruction to filter the plurality of boundaries at two sides of the vertical boundary and using the e collateral instruction to filter the plurality of boundaries at two sides of the horizontal boundary. The invention uses the collateral processing unit to filter the plurality of boundaries by the DSP.
Description
Technical field
The present invention relates to image processing field, relate in particular to a kind of block-removal filtering method based on DSP (Digitalsignal processor, digital signal processor).
Background technology
H.264 be one of the most advanced at present video encoding standard, propose jointly, be widely used in wireless video monitoring, network flow-medium etc. to the field by ITU and ISO two big international organizations.In order to remove because quantification and motion compensation and the image block effect that after inverse transformation, causes, H.264 standard has been introduced block elimination effect filter (De-Block Filter), with 4 * 4 is that unit carries out filtering to the border of piece, and it can improve video image quality effectively and improve the compression efficiency of encoder.
In the H.264 codec design based on DSP, de-blocking filter is one of key modules, its operand can account for easily the total operand of decoder 1/3rd or the total operand of encoder sixth and more than.Block elimination filtering carries out based on 4 * 4, need the lot of data read-write operation, filter block computing more complicated has a lot of judgements and skip operation concurrently, and program can't effectively be set up degree of depth circular pipeline in the general implementation method, has had influence on giving full play to of DSP operational performance greatly.
Briefly introduce below H.264 go piece filter block process:
Block elimination filtering on the basis of macro block to wherein each 4 * 4 carry out filtering, as shown in phantom in Figure 2, by vertical back level earlier, order under after earlier in the left back right side, the elder generation, the filter vertical boundary is from a to d earlier in the luminance block, and the flat border of drainage is from e to h again, and chrominance block is carried out from i to l successively.
De-blocking filter calculates according to the filtering that described filter sequence is finished each border successively, can influence three pixels of boundaries on either side at most, Fig. 3 has shown four pixels of horizontal or vertical boundaries on either side, and wherein O0 participates in filtering to O7, and O1 might be affected to O6.Go out an intensity level (BS) according to calculation of parameter such as the quantizing factor of both sides, every border macro block, coding modes during filtering, between 0 to 4, filter is according to the program of different intensity level control deblocking effects, and wherein 0 expression does not need filtering, the strongest filter patterns of 4 expressions.The intensity level of chrominance block does not need independent calculating, and is identical with corresponding luminance block intensity.
The gradient of filtering strength and boundaries on either side pixel value influences common filtering, has only below that two conditions satisfy back O1, O2, O3 and O4, O5, O6 just can be filtered.
BS＞0. (formula 1)
| O3-O4|＜α and|O4-O5|＜β and|O2-O3|＜β (formula 2)
α and β value define in standard and depend on the boundaries on either side quantization step, increase along with the increase of quantization step, α and β represent the thresholding in interblock and the piece respectively, are used for judging that the image real border still is the border that blocking effect causes, and Filtering Processing is not carried out on real border.
Because block elimination filtering carries out based on 4 * 4, need the lot of data read-write operation, filter block computing more complicated has a lot of judgements and skip operation concurrently, and program can't effectively be set up degree of depth circular pipeline in the general implementation method, has had influence on giving full play to of DSP operational performance greatly.
Summary of the invention
One or more problems in view of the above the present invention proposes a kind of block-removal filtering method based on DSP, can save running time.
According to the present invention, proposed a kind of block-removal filtering method based on digital signal processor, wherein, digital signal processor comprises parallel instruction, this method may further comprise the steps: step 1, second filtering strength of first filtering strength of vertical boundary and horizontal boundary in the computing macro block; Step 2 judges whether respectively that according to first filtering strength and second filtering strength needs carry out strong filtering to vertical boundary and whether needs carry out strong filtering to horizontal boundary; And step 3, according to the judged result of step 2, utilize parallel instruction to carry out filtering and utilize parallel instruction to carry out filtering to a plurality of borders of horizontal boundary both sides are parallel to a plurality of borders of vertical boundary both sides are parallel.
Wherein, step 2 comprises: equal at first filtering strength under the situation of first predetermined value, determine and need carry out strong filtering to vertical boundary; Under the situation of first filtering strength less than first predetermined value, determining does not need vertical boundary is carried out strong filtering; Equal at second filtering strength under the situation of second predetermined value, determine and to carry out strong filtering to horizontal boundary; And under the situation of second filtering strength less than second predetermined value, determining does not need horizontal boundary is carried out strong filtering.
Wherein, first predetermined value can be 4.Second predetermined value can be 4.
Wherein, vertical boundary comprises vertical luminance border and vertical chrominance border, and horizontal boundary comprises level brightness border and horizontal colourity border.
Wherein, step 3 comprises: utilize parallel instruction concurrently filtering to be carried out on vertical luminance border and vertical chrominance border that needs carry out the vertical boundary both sides of strong filtering; Utilize parallel instruction concurrently filtering to be carried out on the vertical luminance border and the vertical chrominance border of the vertical boundary both sides that do not need to carry out strong filtering; Utilize parallel instruction concurrently filtering to be carried out on level brightness border and horizontal colourity border that needs carry out the horizontal boundary both sides of strong filtering; And utilize parallel instruction concurrently filtering to be carried out on the level brightness border and the horizontal colourity border of the horizontal boundary both sides that do not need to carry out strong filtering.
Wherein, digital signal processor comprises the register of 32 bits.
Wherein, the step that filtering is carried out on the vertical luminance border that utilizes parallel instruction concurrently needs to be carried out the vertical boundary both sides of strong filtering further comprises: read two row that the vertical luminance boundaries on either side is symmetrically distributed first brightness datas of totally 16 luminance pixels, wherein, macro block comprises 16 luminance pixels * 16 luminance pixels; First brightness data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; First brightness data is carried out parallel computation to obtain filtered second brightness data; And utilize second brightness data to replace first brightness data.
The step that filtering is carried out on the vertical chrominance border that utilizes parallel instruction concurrently needs to be carried out the vertical boundary both sides of strong filtering further comprises: read two row that the vertical chrominance boundaries on either side is symmetrically distributed first chroma datas of totally 8 chroma pixels, wherein, macro block comprises 8 chroma pixels * 8 chroma pixels; First chroma data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; First chroma data is carried out parallel computation to obtain filtered second chroma data; And utilize second chroma data to replace first chroma data.
The step that filtering is carried out on the level brightness border that utilizes parallel instruction concurrently needs to be carried out the horizontal boundary both sides of strong filtering further comprises: two row that read level brightness boundaries on either side is symmetrically distributed are the 3rd brightness data of totally 16 luminance pixels; The 3rd brightness data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; The 3rd brightness data is carried out parallel computation to obtain filtered the 4th brightness data; And utilize the 4th brightness data to replace the 3rd brightness data.
The step that filtering is carried out on the horizontal colourity border that utilizes parallel instruction concurrently needs to be carried out the horizontal boundary both sides of strong filtering further comprises: two row that read level colourity boundaries on either side is symmetrically distributed are the 3rd chroma data of totally 8 chroma pixels; The 3rd chroma data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; The 3rd chroma data is carried out parallel computation to obtain filtered the 4th chroma data; And utilize the 4th chroma data to replace the 3rd chroma data.
In the present invention, carry out filtering to many borders are parallel simultaneously, saved running time by the parallel processing element that utilizes DSP.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 is the flow chart based on the block-removal filtering method of DSP according to the embodiment of the invention;
Fig. 2 is filtering boundary and order schematic diagram;
Fig. 3 is a boundaries on either side pixel schematic diagram;
When being the filtering vertical boundary, Fig. 4 reads and makes up schematic diagram;
When being the filtering horizontal boundary, Fig. 5 reads and makes up schematic diagram;
The flow chart of Fig. 6 block elimination filtering resume module macro block; And
The process chart of Fig. 7 boundary filtering, wherein A is a vertical boundary, B is a horizontal boundary.
Embodiment
Below with reference to accompanying drawing, describe the specific embodiment of the present invention in detail.
Fig. 1 is the flow chart based on the block-removal filtering method of DSP according to the embodiment of the invention.As shown in Figure 1, the block-removal filtering method based on digital signal processor according to the embodiment of the invention may further comprise the steps:
Step S102, second filtering strength of first filtering strength of vertical boundary and horizontal boundary in the computing macro block;
Step S104 judges whether respectively that according to first filtering strength and second filtering strength needs carry out strong filtering to vertical boundary and whether needs carry out strong filtering to horizontal boundary; And
Step S106 according to the judged result of step S104, utilizes parallel instruction to carry out filtering and utilize parallel instruction to carry out filtering to a plurality of borders of horizontal boundary both sides are parallel a plurality of borders of vertical boundary both sides are parallel.
Wherein, digital signal processor comprises parallel instruction.
Wherein, step S104 comprises: equal at first filtering strength under the situation of first predetermined value, determine and need carry out strong filtering to vertical boundary; Under the situation of first filtering strength less than first predetermined value, determining does not need vertical boundary is carried out strong filtering; Equal at second filtering strength under the situation of second predetermined value, determine and to carry out strong filtering to horizontal boundary; And under the situation of second filtering strength less than second predetermined value, determining does not need horizontal boundary is carried out strong filtering.
Wherein, first predetermined value can be 4.Second predetermined value can be 4.
Wherein, vertical boundary comprises vertical luminance border and vertical chrominance border, and horizontal boundary comprises level brightness border and horizontal colourity border.
Wherein, step 3 comprises: utilize parallel instruction concurrently filtering to be carried out on vertical luminance border and vertical chrominance border that needs carry out the vertical boundary both sides of strong filtering; Utilize parallel instruction concurrently filtering to be carried out on the vertical luminance border and the vertical chrominance border of the vertical boundary both sides that do not need to carry out strong filtering; Utilize parallel instruction concurrently filtering to be carried out on level brightness border and horizontal colourity border that needs carry out the horizontal boundary both sides of strong filtering; And utilize parallel instruction concurrently filtering to be carried out on the level brightness border and the horizontal colourity border of the horizontal boundary both sides that do not need to carry out strong filtering.
Wherein, digital signal processor comprises the register of 32 bits.
Wherein, the step that filtering is carried out on the vertical luminance border that utilizes parallel instruction concurrently needs to be carried out the vertical boundary both sides of strong filtering further comprises: read two row that the vertical luminance boundaries on either side is symmetrically distributed first brightness datas of totally 16 luminance pixels, wherein, macro block comprises 16 luminance pixels * 16 luminance pixels; First brightness data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; First brightness data is carried out parallel computation to obtain filtered second brightness data; And utilize second brightness data to replace first brightness data.
The step that filtering is carried out on the vertical chrominance border that utilizes parallel instruction concurrently needs to be carried out the vertical boundary both sides of strong filtering further comprises: read two row that the vertical chrominance boundaries on either side is symmetrically distributed first chroma datas of totally 8 chroma pixels, wherein, macro block comprises 8 chroma pixels * 8 chroma pixels; First chroma data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; First chroma data is carried out parallel computation to obtain filtered second chroma data; And utilize second chroma data to replace first chroma data.
The step that filtering is carried out on the level brightness border that utilizes parallel instruction concurrently needs to be carried out the horizontal boundary both sides of strong filtering further comprises: two row that read level brightness boundaries on either side is symmetrically distributed are the 3rd brightness data of totally 16 luminance pixels; The 3rd brightness data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; The 3rd brightness data is carried out parallel computation to obtain filtered the 4th brightness data; And utilize the 4th brightness data to replace the 3rd brightness data.
The step that filtering is carried out on the horizontal colourity border that utilizes parallel instruction concurrently needs to be carried out the horizontal boundary both sides of strong filtering further comprises: two row that read level colourity boundaries on either side is symmetrically distributed are the 3rd chroma data of totally 8 chroma pixels; The 3rd chroma data is placed on high 16 bits of register respectively and hangs down 16 bits to carry out parallel computation; The 3rd chroma data is carried out parallel computation to obtain filtered the 4th chroma data; And utilize the 4th chroma data to replace the 3rd chroma data.
Method of operation according to the de-blocking filter of an example of the present invention comprises following steps:
A. the filtering strength on every limit in the computing macro block;
If B. the left vertical boundary BS=4 of macro block handles this vertical luminance and colourity border earlier.For the disposable double-word data that reads each 4 byte of boundaries on either side of luminance block, read adjacent 2 row continuously, two double-word datas correspondence bytes are placed height 16 bits of 8 32 bit variable respectively, be convenient to parallel computation, as shown in Figure 4.Rule of judgment when using every the boundary filtering of data parallel calculating after packing, these conditions indicate this border whether to carry out filtering, filtering method when pixel that filtering has influence on and filtering, calculate corresponding one the 32 bit permutation indicator variable of each Rule of judgment, height 16 bits in the displacement variable indicate this Rule of judgment in the true and false on two borders up and down respectively; Then, each of the pixel that may change in the computation cycles is revaluate more, buffer memory result of calculation; Use the displacement variable to replace at last, if in filtering, change, then use up-to-date result of calculation, otherwise use former pixel, the result of processing is assembled into double-word data when reading, one-time write internal memory according to the change situation of pixel.The then disposable individual character data that read each 2 byte of boundaries on either side of chrominance block, afterwards processing procedure and luminance block are similar.
Only handle remaining piece inner boundary during C. left vertical boundary BS=4, the left vertical boundary BS of macro block ≠ 4 o'clock left side vertical boundary and piece inner boundary are handled together.Similar to the method for operation among the step B, the disposable double-word data that reads, but p0, q0 and p7, q7 (Fig. 4) are not processed, in time, still write back by double word in the relevant position.
If D. the last horizontal boundary BS=4 of macro block handles this level brightness and colourity border earlier.For the disposable individual character that reads 4 bytes of luminance block, read border adjacent 8 line data up and down continuously, Rule of judgment when using every the boundary filtering of data parallel calculating after packing, these conditions indicate this border whether to carry out filtering, filtering method when pixel that filtering has influence on and filtering, calculate corresponding one the 32 bit permutation indicator variable of each Rule of judgment, each byte of displacement variable is indicated the true and false of this condition on four edges circle of the left and right sides respectively.Then data are split into 16 32 bit variable, height 16 bits are placed two byte datas respectively, as shown in Figure 5.Each of the pixel that may change in the computation cycles is revaluate more, buffer memory result of calculation.The more revaluate packing group of same pixel dress, use the displacement variable that result of calculation or original pixel value are carried out logical process, if in filtering, change, then use new result of calculation, otherwise use former pixel, one-time write internal memory after finishing.Chrominance block then reads border adjacent 4 row up and down continuously, and afterwards processing procedure and luminance block are similar.
E. go up horizontal boundary BS=4 and only handle remaining piece inner boundary, the last horizontal boundary BS of macro block ≠ 4 o'clock goes up horizontal boundary and the piece inner boundary is handled together.Similar to the method for operation among the step D, still disposablely read the individual character data, but neighbouring 6 row in read level border continuously only.
Half-word in the described de-blocking filter method of operation is 2 bytes, 16 bit lengths, and individual character is 4 bytes, 32 bit lengths, and described double word is 8 bytes, 64 bit lengths.Describedly go the Filtering Processing in the piece filter block device method of operation to be undertaken by two half-word instructions are parallel.Wherein, described macro block is 16 * 16 pixel units.
By block-removal filtering method according to the embodiment of the invention, parallel computation degree in the time of can improving DSP greatly and do the piece filter block and handle, shortened the running time of block elimination filtering module near half, and with the fluctuation of code check change seldom, strengthened the real-time of system.The technical program is applicable to the various H.264 codecs of realizing at DSP.
In an embodiment of the present invention, make full use of the width and the DSP computation capability of internal storage data bus, reduce the internal storage access number of times, the parallel filtering of carrying out two or four edges circle is simultaneously calculated, and use the mode of displacement to substitute the skip operation that causes because of judgement, increase the pipeline depth of circulation time, finally shortened the processing time of block elimination filtering module largely, improved executing efficiency.
In one embodiment of the invention, the DSP of employing is the DM642 of TI, and dominant frequency 600MHz comprises code stream input and video-out port.Use linear compilation to realize a real-time H.264 decoder on this hardware platform, the block elimination filtering module is processing unit with the macro block, by from top to bottom, from left to right the order block elimination filtering of finishing whole two field picture successively handles.Fig. 6 be a macro block remove piece filter block process chart, as shown in Figure 6, handling process comprises following steps:
Step S602, calculate the filtering strength on each border of macro block, if a current macro or an adjacent left side/upward macro block is intraframe coding (intra) piece, strong filtering sign is put on corresponding macro block vertical/horizontal border, continue to calculate all the other boundary intensities (if current macro is an Intra-coded blocks, this macroblocks blocks inner boundary intensity all is 3) according to parameters such as coding mode, motion vectors then.
Step S604, handling needs strong filtered macroblock left side vertical boundary.As shown in Figure 7, use LDNDW to read in the double-word data S702 of adjacent two row; Use instructions such as UNPKHU4, PAKC2, PACKH2 can reach as shown in Figure 4 combined effect, combination afterwards same variable is placed in height 16 bits of one 32 bit variable at the pixel point value of different boundary, so that parallel processing S704; Judge whether two borders satisfy filtering condition (formula 1 in the literary composition and formula 2) simultaneously, condition because of two neighbouring borders of parallel computation, also only when not satisfying filter threshold, just jump out this time Filtering Processing, do like this and may do a useless boundary filtering processing more, but find that when actual measurement this mode is still than judging two high S706 of the efficient whether border satisfies filter threshold up and down respectively; Rule of judgment in the computation cycles uses instruction parallel computations such as CMPLT2, ABS2 to go out the result, uses the XPND2 instruction to obtain replacing indicator variable S708; Calculate in this filtering circulation and wait to revise all possible modification values of pixel, record is S710 as a result; The pixel that may influence according to each Rule of judgment, use logical orders such as AND, OR and ANDN that original pixels and change result are carried out logical operation, unmodified pixel is replaced into original pixel value, and repeatedly the pixel of Xiu Gaiing is replaced into final more revaluate S712; Packing group is synthesized the form when reading in, and uses STNDW instruction write memory S714.It is similar that chrominance block is handled, and it is different with computational methods just to read in the data number.
Step S606 handles the macro block and the interior vertical boundary of piece that do not need strong filter block.Handle to step S604 in similar, but use different filtering methods, the pixel that has influence on is also less.
Step S608 handles the macroblock level border that needs strong filtering.As shown in Figure 7, use LDW to read in the individual character data S722 of adjacent two row; Can directly carry out parallel computation because of the data of reading in, use ABS4, instructions such as CMPLTU4 judge whether four edges circle satisfies filtering condition simultaneously earlier, have only when not satisfying filtering condition (civilian Chinese style 1 and formula 2), just carry out the treatment S 724 of next piece; Rule of judgment in the computation cycles uses instruction parallel computations such as CMPLTU4, SUBABS4 to go out the result, uses the XPND4 instruction to obtain replacing indicator variable S726; Use UNPKHU4 and UNPKLU4 instruction promptly can reach as shown in Figure 5 combined effect, the same variable in combination back is placed in height 16 bits of one 32 bit variable at the pixel value of adjacent two edges circle, so that parallel processing S728; Calculate in this filtering circulation and wait to revise all modification values of pixel, the form packing of each modification value when reading in, record is S730 as a result; Each modification value of pixel packing is reassembled as form S732 when reading in; The pixel that may influence according to each Rule of judgment, use logical orders such as AND, OR and ANDN that original pixels and change result are carried out logic, unmodified pixel is replaced into original pixel value, repeatedly the pixel of Xiu Gaiing is replaced into final more revaluate, packing group is synthesized the form when reading in, and uses STDW instruction write memory S734.It is similar that chrominance block is handled, and it is different with computational methods just to read in the data number.
Step S610 handles the macro block and the interior horizontal boundary of piece that do not need strong filter block.Handle to step S608 in similar, but use different filtering methods, the pixel that has influence on is also less.
By the present invention, a kind of block-removal filtering method based on DSP has been proposed, the parallel processing element that utilizes DSP carries out filtering to many borders are parallel simultaneously, increases numeral read-write bit wide, reduces the data write number of times, reduces the access frequency to internal memory; Eliminate the skip operation that causes because of judgement with less cost in addition, can make program set up the deep stream waterline, given full play to the concurrent operation performance of DSP.Use the de-blocking filter of the method design that proposes among the present invention, can reduce about 40% operation time.
After using the technical scheme that proposes among the present invention, under decoding D1 resolution H.264 in real time during code stream, the processing time of average every frame of de-blocking filter was reduced to 6.7 seconds by 14.4 seconds, the range of decrease is 53.4%.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (11)
1. the block-removal filtering method based on digital signal processor is characterized in that, may further comprise the steps:
Step 1, second filtering strength of first filtering strength of vertical boundary and horizontal boundary in the computing macro block;
Step 2 judges whether respectively that according to described first filtering strength and described second filtering strength needs carry out strong filtering to described vertical boundary and whether needs carry out strong filtering to described horizontal boundary;
Step 3 according to the judged result of described step 2, utilizes parallel instruction to carry out filtering and utilize described parallel instruction to carry out filtering to a plurality of borders of described horizontal boundary both sides are parallel a plurality of borders of described vertical boundary both sides are parallel;
Wherein, in step 3, the parallel filtering that carries out filtering in a plurality of borders of vertical boundary both sides is comprised:
Rule of judgment during the described vertical boundary of parallel computation both sides a plurality of vertical boundary filtering and the corresponding displacement indicator variable of each described Rule of judgment that will calculate, each of the pixel that may change in the computation cycles is revaluate more, buffer memory result of calculation; Use described displacement variable to replace at last according to the change situation of pixel,
Wherein, in step 3, the parallel filtering that carries out filtering in a plurality of borders of horizontal boundary both sides is comprised:
Rule of judgment during the described parallel boundary of parallel computation both sides a plurality of parallel boundary filtering and the corresponding displacement indicator variable of each described Rule of judgment that will calculate, each of the pixel that may change in the computation cycles is revaluate more, buffer memory result of calculation; Use described displacement variable to replace at last according to the change situation of pixel.
2. method according to claim 1 is characterized in that, described step 2 comprises:
Equal under the situation of first predetermined value at described first filtering strength, determine and to carry out strong filtering to described vertical boundary;
Under the situation of described first filtering strength less than described first predetermined value, determining does not need described vertical boundary is carried out strong filtering;
Equal under the situation of second predetermined value at described second filtering strength, determine and to carry out strong filtering to described horizontal boundary; And
Under the situation of described second filtering strength less than described second predetermined value, determining does not need described horizontal boundary is carried out strong filtering.
3. method according to claim 2 is characterized in that, described first predetermined value is 4.
4. method according to claim 2 is characterized in that, described second predetermined value is 4.
5. method according to claim 1 is characterized in that, described vertical boundary comprises vertical luminance border and vertical chrominance border, and described horizontal boundary comprises level brightness border and horizontal colourity border.
6. method according to claim 5 is characterized in that, described step 3 comprises:
Utilize described parallel instruction concurrently filtering to be carried out on described vertical luminance border and described vertical chrominance border that needs carry out the described vertical boundary both sides of strong filtering;
Utilize described parallel instruction concurrently filtering to be carried out on the described vertical luminance border and the described vertical chrominance border of the described vertical boundary both sides that do not need to carry out strong filtering;
Utilize described parallel instruction concurrently filtering to be carried out on described level brightness border and described horizontal colourity border that needs carry out the described horizontal boundary both sides of strong filtering;
And
Utilize described parallel instruction concurrently filtering to be carried out on the described level brightness border and the described horizontal colourity border of the described horizontal boundary both sides that do not need to carry out strong filtering.
7. method according to claim 6 is characterized in that described digital signal processor comprises the register of 32 bits.
8. method according to claim 7 is characterized in that, the step that filtering is carried out on the described vertical luminance border that utilizes described parallel instruction concurrently needs to be carried out the described vertical boundary both sides of strong filtering further comprises:
Read two capable first brightness datas of totally 16 luminance pixels that described vertical luminance boundaries on either side is symmetrically distributed, wherein, described macro block comprises 16 luminance pixels * 16 luminance pixels;
Described first brightness data is placed on high 16 bits of described register respectively and hangs down 16 bits to carry out parallel computation;
Described first brightness data is carried out parallel computation to obtain filtered second brightness data; And
Utilize described second brightness data to replace described first brightness data.
9. method according to claim 8 is characterized in that, the step that filtering is carried out on the described vertical chrominance border that utilizes described parallel instruction concurrently needs to be carried out the described vertical boundary both sides of strong filtering further comprises:
Read two capable first chroma datas of totally 8 chroma pixels that described vertical chrominance boundaries on either side is symmetrically distributed, wherein, described macro block comprises 8 chroma pixels * 8 chroma pixels;
Described first chroma data is placed on high 16 bits of described register respectively and hangs down 16 bits to carry out parallel computation;
Described first chroma data is carried out parallel computation to obtain filtered second chroma data; And
Utilize described second chroma data to replace described first chroma data.
10. method according to claim 9 is characterized in that, the step that filtering is carried out on the described level brightness border that utilizes the capable ground of described parallel instruction that needs are carried out the described horizontal boundary both sides of strong filtering further comprises:
Read two of described level brightness boundaries on either side symmetrical distribution and be listed as the 3rd brightness data of totally 16 luminance pixels;
Described the 3rd brightness data is placed on high 16 bits of described register respectively and hangs down 16 bits to carry out parallel computation;
Described the 3rd brightness data is carried out parallel computation to obtain filtered the 4th brightness data; And
Utilize described the 4th brightness data to replace described the 3rd brightness data.
11. method according to claim 10 is characterized in that, the step that filtering is carried out on the described horizontal colourity border that utilizes described parallel instruction concurrently needs to be carried out the described horizontal boundary both sides of strong filtering further comprises:
Read two of described horizontal colourity boundaries on either side symmetrical distribution and be listed as the 3rd chroma data of totally 8 chroma pixels;
Described the 3rd chroma data is placed on high 16 bits of described register respectively and hangs down 16 bits to carry out parallel computation;
Described the 3rd chroma data is carried out parallel computation to obtain filtered the 4th chroma data; And
Utilize described the 4th chroma data to replace described the 3rd chroma data.
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| CN104253998B (en) * | 2014-09-25 | 2017-05-10 | 复旦大学 | Hardware on-chip storage method of deblocking effect filter applying to HEVC (High Efficiency Video Coding) standard |
| US11153607B2 (en) * | 2018-01-29 | 2021-10-19 | Mediatek Inc. | Length-adaptive deblocking filtering in video coding |
| CN111800643A (en) * | 2020-07-03 | 2020-10-20 | 北京博雅慧视智能技术研究院有限公司 | Deblocking filter for video coding and filtering method thereof |
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