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CN101192647B - Nonvolatile memory device including amorphous alloy metal oxide layer - Google Patents

Nonvolatile memory device including amorphous alloy metal oxide layer Download PDF

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Publication number
CN101192647B
CN101192647B CN2006101636363A CN200610163636A CN101192647B CN 101192647 B CN101192647 B CN 101192647B CN 2006101636363 A CN2006101636363 A CN 2006101636363A CN 200610163636 A CN200610163636 A CN 200610163636A CN 101192647 B CN101192647 B CN 101192647B
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nonvolatile memory
coating
amorphous alloy
memory devices
metal oxide
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CN101192647A (en
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赵重来
赵成逸
柳寅儆
李殷洪
文昌郁
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Samsung Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31691Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47Schottky barrier electrodes
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    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
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    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • H10N70/8833Binary metal oxides, e.g. TaOx

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Abstract

Nonvolatile memory device including amorphous alloy metal oxide layer and method of manufacturing the same are provided. A nonvolatile memory device may include a lower electrode, an oxide layer including an amorphous alloy metal oxide disposed on the lower electrode, and a diode structure disposed on the oxide layer.

Description

The Nonvolatile memory devices that comprises amorphous alloy metal oxide layer
Technical field
The present invention relates to Nonvolatile memory devices; More particularly; Relate to the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer, have the material of different crystal structure and form amorphous thin film through combination, it can and have the high speed of service by the low-power driving.
Background technology
In recent years, for the number of memory cells (being integration density (integrationdensity)) that increases unit are, improve the speed of service and can have been carried out big quantity research by the semiconductor storage that low-power drives.
Normally, semiconductor storage comprises a plurality of memory cell that connect through circuit.In representing the dynamic random access memory of semiconductor storage (DRAM), unit storage unit typically comprises a switch and a capacitor.This DRAM has the advantage of the high density of integration and the high speed of service.Yet when cutting off the electricity supply, DRAM has lost all storage data.
Even Nonvolatile memory devices such as flash memory device also can keep the data of being stored when power supply interrupts suddenly.Flash memory device has permanent characteristics, but has the lower integration density and the slower speed of service than volatile memory device.
Now, further investigate over against Nonvolatile memory devices such as magnetic random access storage (MRAM) device, ferroelectric random access memory (FRAM) device, phase-change random access storage (PRAM) device and resistance random storage (RRAM) device.
The characteristic (variable resistance characteristics) that the RRAM device uses the resistance of transition metal oxide (TMO) to change according to voltage.
Figure 1A example use the structure of the RRAM device of resistance variation material (resistence variationmaterial) with conventional structure.With reference to Figure 1A, but said RRAM device comprises substrate 10, hearth electrode 12, oxide skin(coating) 14 and the top electrode 16 of sequential cascade.Said hearth electrode 12 is formed by conventional electric conducting material with top electrode 16.Said oxide skin(coating) 14 is formed by the TMO with resistance variations (variable resistor) characteristic.Particularly, said oxide skin(coating) 14 can be by ZnO, TiO 2, Nb 2O 5, ZrO 2Or NiO forms.
Perovskite-RRAM device uses perovskite oxide as switching material group (switchingmaterial group), use PCMO (PrCaMnO 3) or Cr-STO (SrTiO 3) as oxide skin(coating), and use Schottky potential barrier strain (barrier deformation) principle, realized according to the storage characteristics that is applied to the polarity on the memory node (memory node).
The said RRAM device of use TMO has makes its switching characteristic as storage device.Yet, use the crystal film storage device of TMO to be confined to little-node (micro-node).
Fig. 2 A is to use the crystallization of the ZnO that X-ray diffraction (XRD) example forms (it is TMO) in the Si substrate.Referring to Fig. 2 A, Si (100) peak, ZnO (0002) peak and ZnO (10-12) peak have shown the crystallization process of ZnO.
Fig. 2 B is scanning electron microscopy (SEM) photo on ZnO surface, in Fig. 2 A instance its crystallization diagram.Referring to Fig. 2 B, when oxide skin(coating) 14 crystallizations of RRAM device, because particle is very big, so be difficult to realize having the storage device of uniform properties.
Summary of the invention
The invention provides the Nonvolatile memory devices that comprises as the amorphous alloy metal oxide layer of transition metal oxide (TMO) layer, thereby when using crystal film, overcome the limitation of little-node as resistive memory devices.
According to an aspect of the present invention, the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer is provided, it comprises: hearth electrode; Be arranged in the oxide skin(coating) that comprises the amorphous alloy metal oxide on the said hearth electrode; With the diode structure body that is arranged on the said oxide skin(coating).
Said oxide skin(coating) can comprise first transition metal and second metal that has with the said first transition metal crystals with different characteristic.
Said first transition metal can be and is selected from a kind of among Ni, Ti, Hf, Zr, Zn, W, Co and the Nb.
Said second metal can be a kind of among Al and the In.
In said hearth electrode and the top electrode at least one can form Schottky-with said oxide skin(coating) be connected (Schottky-junction).
When said oxide skin(coating) was formed by n-type oxide, in hearth electrode and the top electrode one can be by being selected from Pt, Ir, Ru, and a kind of formation in the oxide of Pt, Ir and Ru.
When said oxide skin(coating) was formed by p-type oxide, one in said hearth electrode and the top electrode can be by a kind of formation the among Ti and the Ag.
Description of drawings
With reference to accompanying drawing, through describing its illustrative embodiments in detail, above-mentioned and other characteristics of the present invention and advantage will be more obvious, wherein:
Figure 1A diagram use the structure of resistance random storage (RRAM) device of variable-resistance material with conventional structure.
Fig. 2 A is to use the crystallization diagram of the ZnO that X-ray diffraction (XRD) forms (it is transition metal oxide (TMO)) on silicon base;
Fig. 2 B is scanning electron microscopy (SEM) photo on ZnO surface, and its crystallization chart has been described in Fig. 2 A;
Fig. 3 example according to the structure of the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of embodiment of the present invention;
Fig. 4 A is the oxide skin(coating) sample that forms for by InZnOx (0.5<x<1.5), the In that uses XRD to characterize 2O 3The crystallization diagram of-ZnO (IZO) film;
Fig. 4 B is the cross section of said IZO film and the SEM photo on surface, in Fig. 4 A example its crystallization diagram;
Fig. 5 illustrates the switching characteristic according to the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of embodiment of the present invention;
Fig. 6 A illustrates the wear properties according to the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of embodiment of the present invention; With
Fig. 6 B illustrates the retention characteristic according to the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of embodiment of the present invention.
Embodiment
Be described in greater detail with reference to the attached drawings the Nonvolatile memory devices that comprises according to amorphous alloy metal oxide layer of the present invention below, wherein shown illustrative embodiments of the present invention.In the accompanying drawings, for clarity, amplified the thickness of layer with the zone.
Fig. 3 diagram comprise structure according to the Nonvolatile memory devices of the amorphous alloy metal oxide layer of embodiment of the present invention.
Referring to Fig. 3, oxide skin(coating) 34 and top electrode 36 that said storage device comprises the substrate 30, hearth electrode 32 of sequential cascade, formed by amorphous substance.
For the said substrate 30 of optional component can be formed unrestrictedly by the material of the substrate that is used for common semiconductor device.Substrate 30 can be by Si, SiO 2, formation such as SiC.
Said amorphous oxide layer 34 can be formed by variable-resistance material, and is formed by the alloying metal oxide that comprises at least two kinds of metals with different crystal characteristic basically.At least a transition metal that can be in said two kinds of metals.Said transition metal is Ni, Ti, Hf, Zr, Zn, W, Co or Nb, and said transition metal oxide is NiO, TiO 2, HfO, ZrO, ZnO, WO 3, CoO or Nb 2O 5Other metals are the Al (Al that have the different crystal characteristic with said transition metal 2O 3) or In (In 2O 3).
Said hearth electrode and top electrode 32 and 36 are formed by electric conducting material.In said hearth electrode and the top electrode 32 and 36 at least one can form Schottky-with said oxide skin(coating) 34 and be connected.For example, when said oxide skin(coating) 34 is when being formed by n-type oxide such as InZnOx etc., at least one in said hearth electrode and top electrode 32 and 36 can be by a kind of formation the in the oxide that is selected from Pt, Ir, Ru and Pt, Ir and Ru.When said oxide skin(coating) 34 is when being formed by p-type oxide such as NiO etc., at least a can the formation in said hearth electrode and top electrode 32 and 36 by the material with low work content such as Ti or Ag.
As stated, the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of current execution mode comprises the said oxide skin(coating) 34 that is formed by the amorphous alloy metal oxide.
Fig. 4 A is the sample about the oxide skin(coating) 34 that is formed by InZnOx (0.5<x<1.5), the In that uses X-ray diffraction (XRD) to characterize 2O 3The crystallization diagram of-ZnO (IZO) film.Fig. 4 B is the cross section of said IZO film and the SEM photo on surface, in Fig. 4 A example its crystallization diagram.
Referring to Fig. 4 A, said IZO film is not complete crystallization, and it shows that the IZO film as said oxide skin(coating) 34 depositions is unbodied fully.Referring to the said SEM photo of Fig. 4 B, the cross section of said IZO film shows not to be to be completed into crystal grain with the material characteristics on surface, because said IZO film is unbodied.
Known IZO film does not have amorphous character in the ratio of whole compositions of In and Zn, but in the scope that consists of about 45at%-80at% of In, has amorphous character.Therefore, the IZO film can be used as the amorphous transition metal oxide that in the scope that consists of about 45at%-80at% of In, has amorphous character.
Fig. 5 illustrates the graph according to the switching characteristic of the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of embodiment of the present invention.Referring to Fig. 5; In test; The sample of the top electrode 36 that forms through the oxide skin(coating) 34 that forms to the hearth electrode 32 that forms by IrOx, by InZnOx with by IrOx; Little by little apply from-3V to+3V and turn back to-voltage of 3V ten times from+3V once more, the unit of measuring said oxide skin(coating) 34 is the current value of mA.
When sample is applied cumulatively-3V is during to the voltage of 0V, the unit of said oxide skin(coating) 34 is that the current value of mA increases, like first curve.When sample being applied cumulatively 0V to the voltage of+3V, the unit of said oxide skin(coating) 34 is that the current value of mA increases, like second curve.When sample is applied decreasingly+3V is during to the voltage of 0V, the unit of said oxide skin(coating) 34 is that the current value of mA reduces, like the 3rd curve.When sample being applied decreasingly 0V to the voltage of-3V, the unit of said oxide skin(coating) 34 is that the current value of mA reduces, like the 4th curve.
-2V is in the voltage range of 0V, and said oxide skin(coating) 34 has the different electric flow valuve in the first and the 4th curve.In the voltage range of 1V, said oxide skin(coating) 34 has the different electric flow valuve in the second and the 3rd curve at 0V.For example, when sample is applied-during 1V voltage, said oxide skin(coating) 34 has according to the resistance states of first curve or the 4th curve (resistance state).Said first and second curves are in low resistance state (LRS), and said third and fourth curve is in high resistance state (HRS).
Through repeating this test ten times, obtained consistent results, be satisfied therefore through the switching characteristic of using storage device.
Fig. 6 A illustrates the wear properties according to the Nonvolatile memory devices that comprises the amorphous alloy layer of embodiment of the present invention.The sample of the hearth electrode 32 that use is formed by IrOx, the oxide skin(coating) 34 that is formed by InZnOx and the top electrode 36 that formed by IrOx is tested.Referring to Fig. 6 A, when said oxide skin(coating) 34 is in LRS and HRS,, measure the resistance value of each sample through sample being applied pact-3V to+3V with turn back to-scanning method of the voltage of 3V 100 times from+3V once more.
Although this chart shows repeated scanning method, the resistance value of each sample under LRS and HRS is consistent.Use said amorphous transition metal oxide, the Nonvolatile memory devices of current execution mode has excellent reproducibility.
Fig. 6 B illustrates the retention characteristic that comprises according to the Nonvolatile memory devices of the amorphous alloy metal oxide layer of embodiment of the present invention.The sample of the hearth electrode 32 that use is formed by IrOx, the oxide skin(coating) 34 that is formed by InZnOx and the top electrode 36 that formed by IrOx is used for like Fig. 5 and the graphic test of 6A.Referring to Fig. 6 B,, reach 10 hours in about 100 ℃ of sample resistance values of measuring under LRS and HRS down in order to detect the retention characteristic of the Nonvolatile memory devices that comprises said amorphous alloy metal oxide layer.As a result, the resistance value of sample is consistent under LRS.The resistance value of sample has slight change under HRS, therefore is different from the resistance value of the sample under LRS.Therefore, the retention characteristic maintenance that comprises the Nonvolatile memory devices of said amorphous alloy metal oxide layer is stablized.
The oxide skin(coating) 34 that the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of current execution mode comprises hearth electrode 32, formed by amorphous alloy metal; With top electrode 36, and for using metal-insulator-metal type (MIM) storage device comprise as the oxide skin(coating) 34 of the transition metal of memory node.In said hearth electrode and the top electrode 32 and 36 at least one can form Schottky-with oxide skin(coating) 34 and be connected.
Said storage organization can be 1T (transistor)-1R (resistance) structure in the source electrode (source) that is connected to transistor arrangement or the drain electrode (drain), is connected to 1D (the diode)-1R structure on the diode structure or is the array structure of crosspoint form.
Use conventional DRAM preparation method can easily form the Nonvolatile memory devices that comprises amorphous alloy metal oxide layer of current execution mode.
The present invention has following advantage.
At first, because Nonvolatile memory devices has simple structure, so when Nonvolatile memory devices has array structure, use semiconductor fabrication method (like conventional DRAM preparation method) can easily form said Nonvolatile memory devices.
Secondly; Said memory node is formed by amorphous transition metal oxide; Owing to said memory node size reduce have high density, and have steady change (resistance variations) aspect the current value with respect to applying voltage, therefore can realize that said memory node is as reliable storage device.
Although reference example property execution mode shows especially and described the present invention, those skilled in the art are appreciated that the spirit and scope of the present invention that can make multiple change in form and details and not break away from claims and limited.

Claims (6)

1. comprise the Nonvolatile memory devices of amorphous alloy metal oxide layer, it comprises:
Hearth electrode;
Be arranged in the oxide skin(coating) that forms by the amorphous alloy metal oxide on the said hearth electrode; With
Be arranged in the diode structure body on the said oxide skin(coating),
Second metal that wherein said oxide skin(coating) comprises first transition metal and has the different crystal characteristic with said first transition metal.
2. the Nonvolatile memory devices of claim 1, wherein said first transition metal are to be selected from a kind of among Ni, Ti, Hf, Zr, Zn, W, Co and the Nb.
3. the Nonvolatile memory devices of claim 1, wherein said second metal are a kind of among Al and the In.
4. the Nonvolatile memory devices of claim 1, wherein at least one in hearth electrode and the top electrode forms Schottky-with said oxide skin(coating) and is connected.
5. the Nonvolatile memory devices of claim 4, wherein when said oxide skin(coating) is formed by n-type oxide, in hearth electrode and the top electrode one by being selected from Pt, Ir, Ru, and a kind of formation in the oxide of Pt, Ir and Ru.
6. claim 4 Nonvolatile memory devices, wherein when said oxide skin(coating) was formed by p-type oxide, one in said hearth electrode and the top electrode by a kind of formation the among Ti and the Ag.
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