CN101188095A - LCD and residual shadow attenuation method - Google Patents
LCD and residual shadow attenuation method Download PDFInfo
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- CN101188095A CN101188095A CNA2007101600031A CN200710160003A CN101188095A CN 101188095 A CN101188095 A CN 101188095A CN A2007101600031 A CNA2007101600031 A CN A2007101600031A CN 200710160003 A CN200710160003 A CN 200710160003A CN 101188095 A CN101188095 A CN 101188095A
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Abstract
The invention relates to a liquid crystal display and a method for attenuating the photogene of the liquid crystal display. When a liquid crystal display is shut down, a corresponding grid signal of each grid line of the liquid crystal display can be arranged by a reset signal of a habilitation. According to each set grid signal, each data switch of the liquid crystal display is turned on to execute the fast discharging program of each memory unit of the liquid crystal display, thereby achieving the goal to attenuate the photogene rapidly. According to the reset signal, a reset circuit can be used for setting all grid signals into high-level signals; or according to the reset signal, a charging and discharging module can also be used for feeding high-level voltage to all grid signals.
Description
Technical field
The present invention refers to a kind of liquid crystal indicator and the method for its ghost of can decaying especially relevant for a kind of liquid crystal indicator and correlation technique.
Background technology
Liquid crystal indicator has that external form is frivolous, power consumption is few and characteristic such as radiationless pollution, therefore has been widely used on the electronic products such as computer screen, mobile phone, PDA(Personal Digital Assistant), flat-surface television.Liquid crystal indicator has the liquid crystal material layer that is folded between two plate bases usually, by changing the potential difference (PD) at liquid crystal material layer two ends, can change the anglec of rotation of liquid crystal molecule in the liquid crystal material layer, make the light transmission of liquid crystal material layer change and demonstrate different images.
Please refer to Fig. 1, Fig. 1 is existing thin film transistor (TFT) (Thin Film Transistor, TFT) synoptic diagram of liquid crystal indicator.Liquid crystal indicator 10 comprises display panels (LCD Panel) 100, power circuit 150, source electrode drive circuit 104, gate driver circuit 106 and voltage generator 108.As previously mentioned, display panels 100 is made of two plate bases basically, is filled with liquid crystal material layer (Liquid Crystal Layer) between two plate bases.For example, a plate base is provided with a plurality of data lines (Data Line) 110, a plurality of gate lines perpendicular to data line 110 (Gate Line, or title sweep trace, Scan Line) 112 and plurality of films transistor 114; Another plate base is provided with common electrode (Common Electrode), is used for receiving the common voltage Vcom that is provided by voltage generator 108.For ease of explanation, only show four thin film transistor (TFT)s 114 among Fig. 1; In fact, each data line 110 all is connected with thin film transistor (TFT) 114 with the junction of gate line 112 in the display panels 100, that is thin film transistor (TFT) 114 is distributed on the display panels 100 in the mode of matrix, each data line 110 is corresponding to the delegation of thin-film transistor LCD device 10, each gate line 112 is corresponding to row of thin-film transistor LCD device 10, and each thin film transistor (TFT) 114 is then corresponding to the pixel (Pixel) of thin-film transistor LCD device 10.In addition, the circuit characteristic that two plate bases of display panels 100 are constituted can be considered a plurality of equivalent capacitys 116, each equivalent capacity 116 comprises at least one liquid crystal capacitance and at least one storage capacitors, and each equivalent capacity 116 just becomes a storage element.
Power circuit 150 comprises a plurality of level shifters (Level Shifter) 151,152 and 153, be converted to respectively and vertically open beginning signal ST, the first pulse wave signal CLK1 and the second pulse wave signal CLK2 in order to will vertically open beginning logical signal STV, the first pulse wave logical signal CLK1L and the second pulse wave logical signal CLK2L, be supplied to gate driver circuit 106, can transmit a low level signal reference voltage Vgl to gate driver circuit 106 in addition.
The drive principle of existing thin-film transistor LCD device 10 is summarized as follows, when receiving, power circuit 150 vertically opens beginning logical signal STV, when the first pulse wave logical signal CLK1L and the second pulse wave logical signal CLK2L, power circuit 150 can be converted to high/low accurate position signal reference voltage with the accurate position of the high/low logic of signal and produce the corresponding beginning signal ST that vertically opens, the first pulse wave signal CLK1 and the second pulse wave signal CLK2, input to gate driver circuit 106, gate driver circuit 106 and source electrode drive circuit 104 can produce corresponding signal and data-signal to different gate line 112 and data line 110 then, thereby the potential difference (PD) at the conducting state of control TFT 114 and equivalent capacity 116 two ends, and change the anglec of rotation and the corresponding light penetration amount of liquid crystal molecule further, with data presentation to display on panel.For instance, gate driver circuit 106 can be to signal of gate line 112 inputs, make corresponding thin film transistor (TFT) 114 conductings, at this moment, the data-signal that is input to data line 110 by source electrode drive circuit 104 can input to corresponding equivalent capacity 116 via corresponding thin film transistor (TFT) 114, with GTG (Gray Level) state of controlling corresponding pixel.
When thin-film transistor LCD device 10 shutdown, the electric charge that is stored in equivalent capacity 116 can't rapid discharge, can only discharge gradually via the electric leakage of thin film transistor (TFT) 114, so image can not disappear immediately when shutdown, and residual a period of time of meeting, this is power-off ghost shadow phenomenon (Residual Image), and this phenomenon may cause the uncomfortable visual experience of user.
Summary of the invention
According to embodiments of the invention, it discloses a kind of liquid crystal indicator, in order to when liquid crystal indicator shuts down, and the ghost phenomena of the liquid crystal indicator of decaying fast.This liquid crystal indicator comprises one source pole driving circuit, a gate driver circuit, a plurality of data lines that be arranged in parallel (Data Line), a plurality of gate lines that be arranged in parallel (Gate Line), a plurality of storage element, plurality of data switch, a reset circuit, reaches a power circuit.
Source electrode drive circuit is used for producing the plurality of data signal corresponding to image to be shown.Gate driver circuit is used for producing a plurality of signals.A plurality of data lines that be arranged in parallel are coupled to source electrode drive circuit, and each data line receives a corresponding data-signal.A plurality of gate lines that be arranged in parallel are coupled to this gate driver circuit, and are orthogonal with these a plurality of data lines, and each gate line receives a corresponding signal.Each storage element comprises first end and second end, and wherein first end is coupled to corresponding data switch, and second end is in order to receive common voltage.Each data switch comprises first end, second end, reaches control end, and wherein first end is coupled to corresponding storage element, and second end is coupled to corresponding data line, and control end then is coupled to corresponding gate line.Reset circuit comprises first input end, second input end, the 3rd input end, first output terminal, second output terminal, and the 3rd output terminal, wherein first input end is in order to receive the first pulse wave logical signal, second input end is in order to receive the second pulse wave logical signal, the 3rd input end is in order to receive reset signal, first output terminal, second output terminal, and the 3rd output terminal is when being used to reset signal and being a high levle logical signal, first output terminal is exported the first pulse wave logical signal, second output terminal is exported the second pulse wave logical signal, the 3rd output terminal output low level logical signal, or when being used to reset signal and being a low level logical signal, first output terminal, second output terminal, and the 3rd output terminal all is set to the high levle logical signal.Power circuit comprises first input end, second input end, the 3rd input end, four-input terminal, first output terminal, second output terminal, the 3rd output terminal, and the 4th output terminal, wherein first input end vertically opens the beginning logical signal in order to receive, second input end is coupled to first output terminal of reset circuit, the 3rd input end is coupled to second output terminal of reset circuit, four-input terminal is coupled to the 3rd output terminal of reset circuit, first output terminal is coupled to gate driver circuit, vertically open the beginning signal in order to export, second output terminal is coupled to gate driver circuit, export first pulse wave signal or high levle signal reference voltage in order to the logical signal of exporting according to first output terminal of reset circuit, the 3rd output terminal is coupled to gate driver circuit, export second pulse wave signal or high levle signal reference voltage in order to the logical signal of exporting according to second output terminal of reset circuit, the 4th output terminal is coupled to gate driver circuit, in order to the logical signal output signal reference voltage of exporting according to the 3rd output terminal of reset circuit.
According to embodiments of the invention, it discloses a kind of liquid crystal indicator in addition, in order to when liquid crystal indicator shuts down, and the ghost phenomena of the liquid crystal indicator of decaying fast.This liquid crystal indicator comprises one source pole driving circuit, a gate driver circuit, a plurality of data lines that be arranged in parallel, a plurality of gate lines that be arranged in parallel, a plurality of storage element, plurality of data switch, a power circuit, reaches a charge-discharge modules.
Source electrode drive circuit is used for producing the plurality of data signal corresponding to image to be shown.Gate driver circuit is used for producing a plurality of signals, and gate driver circuit comprises an input end, is used for receiving low level signal reference voltage.A plurality of data lines that be arranged in parallel are coupled to source electrode drive circuit, and each data line receives corresponding data-signal.A plurality of gate lines that be arranged in parallel are coupled to this gate driver circuit, and orthogonal with these a plurality of data lines, each gate line receives corresponding signal.Each storage element comprises first end and second end, and wherein first end is coupled to corresponding data switch, and second end is in order to receive common voltage.Each data switch comprises first end, second end, reaches control end, and wherein first end is coupled to corresponding storage element, and second end is coupled to corresponding data line, and control end is coupled to corresponding gate line.Power circuit comprises first input end, second input end, the 3rd input end, first output terminal, second output terminal, and the 3rd output terminal, wherein first input end vertically opens the beginning logical signal in order to receive, second input end is in order to receive the first pulse wave logical signal, the 3rd input end is in order to receive the second pulse wave logical signal, first output terminal is coupled to gate driver circuit, vertically open the beginning signal in order to export, second output terminal is coupled to gate driver circuit, in order to export first pulse wave signal, the 3rd output terminal is coupled to gate driver circuit, in order to export second pulse wave signal.Charge-discharge modules is coupled to this a plurality of gate lines, is used for receiving high levle signal reference voltage and receives reset signal, and with when reset signal is enabled, output high levle signal reference voltage is to a plurality of gate lines.
According to embodiments of the invention, it discloses a kind of method of ghost of the liquid crystal indicator of decaying in addition, in order to when liquid crystal indicator shuts down, and the ghost phenomena of the liquid crystal indicator of decaying fast.The method comprises when liquid crystal indicator shuts down, activation one reset signal, according to the reset signal that is enabled, one signal of each bar gate line of a plurality of gate lines of liquid crystal indicator is set, each data switch according to the plurality of data switch of described these signal conducting liquid crystal indicators that are set up, and according to described these data switches that are switched on, the discharge procedures of each storage element of a plurality of storage elements of execution liquid crystal indicator.
Description of drawings
Fig. 1 is the synoptic diagram of existing thin-film transistor LCD device.
Fig. 2 is can decay the fast synoptic diagram of liquid crystal indicator first embodiment of ghost of the present invention.
Fig. 3 is that liquid crystal indicator shown in Figure 2 is carried out the coherent signal sequential chart of decay ghost fast.
Fig. 4 is can decay the fast synoptic diagram of liquid crystal indicator second embodiment of ghost of the present invention.
Fig. 5 is the circuit diagram of an embodiment of controllable switch shown in Figure 4.
Fig. 6 is the circuit diagram of another embodiment of controllable switch shown in Figure 4.
Fig. 7 is can decay the fast method flow diagram of ghost of liquid crystal indicator of the present invention.
Drawing reference numeral:
10,20,40 liquid crystal indicators
100,200,400 display panels
104,204,404 source electrode drive circuits
106,206,406 gate driver circuits
108,208,408 voltage generators
110,210,410 data lines
112,212,412 gate lines
114,214,414 thin film transistor (TFT)s
116,216,416 equivalent capacitys
150,250,450 power circuits
151-153,251-254, level shifter
451-453、495
260 reset circuits
261 first logic sum gates
262 second logic sum gates
263 impact dampers
480 charge-discharge modules
490 controllable switch
491 power leads
492 control signal wires
590,690,691 transistors
CLK1 first pulse wave signal
The CLK1L first pulse wave logical signal
CLK2 second pulse wave signal
The CLK2L second pulse wave logical signal
The S710-S740 step
ST vertically opens the beginning signal
STV vertically opens the beginning logical signal
The Vcom common voltage
Vgh high levle signal reference voltage
Vgl low level signal reference voltage
SGn-1, SGn, SGn+1 signal
Vss signal reference voltage
The XON reset signal
Embodiment
For making the present invention more apparent and understandable, hereinafter comply with the method for liquid crystal indicator of the present invention and its ghost of can decaying, cooperate appended graphic elaborating especially exemplified by embodiment, but the scope that the embodiment that is provided is not contained in order to restriction the present invention, carry out precedence and the method flow number of steps is also non-in order to limit it, any execution flow process that is reconfigured by method step, the method with impartial effect that produces is all the scope that the present invention is contained.
Please refer to Fig. 2, Fig. 2 is can decay the fast synoptic diagram of liquid crystal indicator first embodiment of ghost of the present invention.Liquid crystal indicator 20 comprises display panels 200, power circuit 250, source electrode drive circuit 204, gate driver circuit 206, reset circuit 260 and voltage generator 208.Source electrode drive circuit 204 is in order to producing the plurality of data signal corresponding to image to be shown, and 206 of gate driver circuits are in order to produce a plurality of signals.
For ease of explanation, Fig. 2 still only shows four thin film transistor (TFT)s 214, and in fact, each data line 210 all is connected with thin film transistor (TFT) 214 with the junction of gate line 212 in the display panels 200, that is thin film transistor (TFT) 214 is distributed on the display panels 200 in the mode of matrix, that is to say, each data line 210 is corresponding to the delegation of thin-film transistor LCD device 20, each gate line 212 is corresponding to row of thin-film transistor LCD device 20, and each thin film transistor (TFT) 214 is then corresponding to a pixel of thin-film transistor LCD device 20.In addition, the circuit characteristic that two substrates constituted of display panels 200 can be considered a plurality of equivalent capacitys 216, each equivalent capacity 216 comprises a liquid crystal capacitance and a storage capacitors in parallel, and each equivalent capacity 216 is just in order to be used as a storage element, it has first end and second end, first end is coupled to a corresponding thin film transistor (TFT), and second end is in order to receive common voltage Vcom.Each thin film transistor (TFT) 214 comprises first end, second end and control end, and first end is coupled to corresponding equivalent capacity 216, the second ends and is coupled to corresponding data line 210, and control end then is coupled to a corresponding gate line 212.Each thin film transistor (TFT) 214 is in order to be used as a data switch, can receive the signal that corresponding gate line 212 is transmitted according to control end, the signal of controlling between second end and first end links, and whether the data-signal of just controlling corresponding data line 210 can be sent to corresponding equivalent capacity 216.
In preferred embodiment, reset circuit 260 comprises impact damper (Buffer) 263, first logic sum gate 261 and second logic sum gate 262.Impact damper 263 comprises input end and output terminal, and wherein input end is coupled to the 3rd input end of reset circuit 260, and in order to receive reset signal XON, output terminal then is coupled to the 3rd output terminal of reset circuit 260, in order to the inversion signal of output reset signal XON.In the embodiment of Fig. 2, reset signal XON is the signal of a low level activation, so impact damper 263 is an inverter buffer; In another embodiment, if reset signal XON is the signal of a high levle activation, then impact damper 263 is a non-inverting buffer.First logic sum gate 261 comprises first input end, second input end and output terminal, wherein first input end is coupled to the first input end of reset circuit 260, in order to receive the first pulse wave logical signal CLK1L, second input end is coupled to the output terminal of impact damper 263, and output terminal then is coupled to first output terminal of reset circuit 260.Second logic sum gate 262 comprises first input end, second input end and output terminal, wherein first input end is coupled to second input end of reset circuit 260, in order to receive the second pulse wave logical signal CLK2L, second input end is coupled to the output terminal of impact damper 263, and output terminal then is coupled to second output terminal of reset circuit 260.
Power circuit 250 comprises a plurality of input ends and corresponding a plurality of output terminal, be converted to a low level signal reference voltage Vgl in order to low level logic voltage, and the high levle logic voltage of each input signal is converted to a high levle signal reference voltage Vgh each input signal.In preferred embodiment, power circuit 250 comprises a plurality of level shifter 251-254 in position.Level shifter 251 comprises input end, output terminal, noble potential input end and electronegative potential input end, wherein input end vertically opens beginning logical signal STV in order to receive, output terminal vertically opens beginning signal ST to gate driver circuit 206 in order to export, the noble potential input end is in order to receive high levle signal reference voltage Vgh, and the electronegative potential input end is then in order to receive low level signal reference voltage Vgl.Level shifter 252 comprises an input end, output terminal, noble potential input end and electronegative potential input end, wherein input end is coupled to first output terminal of reset circuit 260, output terminal is coupled to gate driver circuit 206, in order to export the first pulse wave signal CLK1 or high levle signal reference voltage Vgh, the noble potential input end is in order to receive high levle signal reference voltage Vgh, and the electronegative potential input end is then in order to receive low level signal reference voltage Vgl.
Please refer to Fig. 3, the work coherent signal sequential chart of the liquid crystal indicator 20 of Fig. 3 displayed map 2, transverse axis is a time shaft.In Fig. 3, basipetal signal is respectively reset signal XON, the first pulse wave signal CLK1, the second pulse wave signal CLK2, signal reference voltage Vss and signal SGn.The principle of work of the ghost function that can decay fast of liquid crystal indicator 20 cooperates coherent signal sequential chart shown in Figure 3 to be described as follows.When the start operate as normal, reset signal XON is a high levle logical signal, make impact damper 263 outputs one low level logical signal, first logic sum gate 261 and second logic sum gate 262 are because of the input of this low level logical signal, make the first pulse wave logical signal CLK1L and the second pulse wave logical signal CLK2L all can be sent to power circuit 250, through the signal level conversion process of power circuit 250 and produce the first pulse wave signal CLK1 and the second pulse wave signal CLK2 via reset circuit 260., signal is joined voltage Vss be made as low level signal reference voltage Vgl then through the anti-phase processing of impact damper 263 and the signal level conversion process of level shifter 254 as for reset signal XON.In addition, vertically opening beginning logical signal STV then produces through the signal level conversion process of level shifter 251 and vertically opens beginning signal ST, so, gate driver circuit 206 just can produce a plurality of signal SGn-1, SGn, SGn+1 etc. according to vertically opening beginning signal ST, the first pulse wave signal CLK1, the second pulse wave signal CLK2 and signal ginseng voltage Vss, export corresponding gate line 212 respectively to, export image to display in order to carry out the normal gate scan operation.
When liquid crystal indicator 20 shuts down moment in time T off, reset signal XON is converted to the low level logical signal by the high levle logical signal, make impact damper 263 output high levle logical signals, first logic sum gate 261 and second logic sum gate 262 are because of the input of this high levle signal, make the output of first logic sum gate 261 and second logic sum gate 262 all switch to the high levle logical signal, promptly the first pulse wave logical signal CLK1L and the second pulse wave logical signal CLK2L all can't be sent to power circuit 250 via reset circuit 260, so the first pulse wave signal CLK1 and the second pulse wave signal CLK2 just are switched to the high levle signal, signal reference voltage Vss also is switched to high levle voltage simultaneously, therefore, the signal of all gate lines 212 all is switched to the high levle signal, make the 214 equal conductings of all thin film transistor (TFT)s, so store charge that just can all equivalent capacitys 216 of snap-out release.Please note, because of the shutdown cause, this high levle voltage of signals also can't reach high levle signal reference voltage Vgh, and can successively decrease in time, but utilize the shutdown dump power promptly to be enough to all thin film transistor (TFT)s of conducting 214, the ghost of decaying fast with the store charge of all equivalent capacitys 216 of snap-out release.
Please refer to Fig. 4, Fig. 4 is can decay the fast synoptic diagram of liquid crystal indicator second embodiment of ghost of the present invention.Liquid crystal indicator 40 comprises display panels 400, power circuit 450, source electrode drive circuit 404, gate driver circuit 406, charge-discharge modules 480 and voltage generator 408.Source electrode drive circuit 404 is in order to producing the plurality of data signal corresponding to image to be shown, and 406 of gate driver circuits are in order to produce a plurality of signals.Display panels 400 is made of two substrates, be provided with a plurality of data lines 410, a plurality of gate line 412 and plurality of films transistors 414 in a substrate, be used for receiving a voltage Vcom who is provided by voltage generator 408 with electrode and be provided with altogether in another substrate perpendicular to data line 410.
For ease of explanation, Fig. 4 still only shows four thin film transistor (TFT)s 414, and in fact, and each data line 410 all is connected with a thin film transistor (TFT) 414 with the junction of gate line 412 in the display panels 400, in order to corresponding to a pixel.In addition, the circuit characteristic that two substrates constituted of display panels 400 can be considered a plurality of equivalent capacitys 416, each equivalent capacity 416 comprises a liquid crystal capacitance and a storage capacitors in parallel, and each equivalent capacity 416 is coupled between corresponding thin film transistor (TFT) 414 and the voltage generator 408 just in order to be used as a storage element.
Charge-discharge modules 480 comprises antiphase shifter 495, a plurality of controllable switch 490, power lead 491 and control signal wire 492.Antiphase shifter 495 comprises an input end, an output terminal, a noble potential input end, reaches an electronegative potential input end, wherein input end is in order to receive a reset signal XON, output terminal is coupled to control signal wire 492, the noble potential input end is in order to receive high levle signal reference voltage Vgh, and the electronegative potential input end is in order to receive low level signal reference voltage Vgl.Antiphase shifter 495 is anti-phase with reset signal XON, and high/low accurate position logic voltage is converted to high/low accurate position signal reference voltage, is sent to described these controllable switch 490 in order to export a control signal through control signal wire 492.Note that in the embodiment of Fig. 4 reset signal XON is the signal of a low level activation, in another embodiment, if reset signal XON is the signal of a high levle activation, then antiphase shifter 495 should be replaced into a noninverting level shifter.Each controllable switch 490 all comprises an output terminal, an input end, reaches a control end, wherein output terminal is coupled to corresponding gate line 412, input end is coupled to power lead 491, and in order to receive high levle signal reference voltage Vgh, control end is coupled to control signal wire 492.
Please refer to Fig. 5, Fig. 5 is the circuit diagram of an embodiment of controllable switch 490 shown in Figure 4.Controllable switch 490 comprises transistor 590, and transistor 590 comprises first end, second end, reaches control end, and wherein first end is coupled to corresponding gate line 412, the second ends and is coupled to power lead 491, and control end is coupled to control signal wire 492.Transistor 590 can be thin film transistor (TFT) (Thin Film Transistor), metal oxide semiconductcor field effect transistor (MOSFET) or two-carrier transistor (Bipolar JunctionTransistor).
Please refer to Fig. 6, Fig. 6 is the circuit diagram of another embodiment of controllable switch 490 shown in Figure 4.Controllable switch 490 comprises the first transistor 690 and transistor seconds 691.The first transistor 690 comprises first end, second end, reaches control end, wherein first end is coupled to corresponding gate line 412, second end is coupled to power lead 491, and the first transistor 690 can be thin film transistor (TFT), two-carrier transistor or metal oxide semiconductcor field effect transistor.Transistor seconds 691 comprises first end, second end, reaches control end, wherein first end is coupled to the control end of the first transistor 690, control end is coupled to second end and the control signal wire 492 of transistor seconds 691, and transistor seconds 691 can be thin film transistor (TFT), two-carrier transistor or metal oxide semiconductcor field effect transistor.If the first transistor 690 and transistor seconds 691 are metal oxide semiconductcor field effect transistor, then when transistor seconds 691 and during conducting the first transistor 690 according to the control signal of 492 feed-ins of control signal wire, can be by the voltage bootlace effect of the grid capacitance of the first transistor 690, and make transistor seconds 691 enter cut-off state, therefore can keep the grid source driving voltage of the first transistor 690 conductings, in order to keep high discharging efficiency.
The principle of work of the ghost function that can decay fast of liquid crystal indicator 40 is described as follows.When the start operate as normal, reset signal XON is a high levle logical signal, make antiphase shifter 495 outputs one low level signal reference voltage Vgl, the control end of described these controllable switch 490, because of receiving the signal binding that this low level signal reference voltage Vgl completely cuts off power lead 491 and described these gate lines 412, so the high levle signal reference voltage Vgh of power lead 491 just can't be fed to described these gate lines 412, in other words, described these gate lines 412 receive only the signal SGn-1 that gate driver circuit 406 is exported, SGn, SGn+1 etc. export image to display in order to carry out normal scan operation.
In the moment of liquid crystal indicator 40 shutdown, reset signal XON is converted to a low level logical signal by the high levle logical signal, make antiphase shifter 495 outputs one high levle signal reference voltage Vgh, the control end of described these controllable switch 490, because of the signal that receives this high levle signal reference voltage Vgh turn-on power line 491 and described these gate lines 412 links, so the high levle signal reference voltage Vgh of power lead 491 just is fed to described these gate lines 412.In other words, the signal of all gate lines 412 all is switched to high levle signal reference voltage Vgh, thereby all thin film transistor (TFT)s 414 of conducting, the ghost of decaying fast in order to the store charge of all equivalent capacitys 416 of snap-out release.
Please refer to Fig. 7, Fig. 7 is can decay the fast method flow diagram of ghost of liquid crystal indicator of the present invention.The method flow process comprises the following step:
Step S710: when liquid crystal indicator shuts down, activation one reset signal;
Step S720:, the signal of each bar gate line of a plurality of gate lines of liquid crystal indicator is set according to the reset signal that is enabled;
Step S730: according to each data switch of the plurality of data switch of described these signal conducting liquid crystal indicators that are set up; And
Step S740: according to described these data switches that are switched on, the discharge procedures of each storage element of a plurality of storage elements of execution liquid crystal indicator.
In the method flow of the ghost of the above-mentioned liquid crystal indicator of can decaying fast, step S710 is described when liquid crystal indicator shuts down, the activation reset signal, and for when liquid crystal indicator shuts down, reset signal switches to a low level logical signal.The reset signal that the described basis of step S720 is enabled, the signal of each bar gate line of described these gate lines of liquid crystal indicator is set, comprise according to the reset signal that is enabled, the signal of each bar gate line of described these gate lines of liquid crystal indicator is set to a high levle signal.In addition, step S720 can comprise the signal connection relationship of isolated described these gate lines and at least one input pulse wave signal in addition.
The reset signal that is enabled as for the basis of step S720 is provided with the method for signal, can comprise and utilize a charge-discharge modules that is coupled to described these gate lines, according to the reset signal that is enabled, one high levle signal reference voltage directly is fed to each bar gate line of described these gate lines of liquid crystal indicator, perhaps, also can comprise and utilize a reset circuit that is coupled to a gate driver circuit, according to the reset signal that is enabled, the signal that is coupled to each bar gate line of gate driver circuit is set to high levle signal reference voltage.Each data switch of described these data switches of described these signal conducting liquid crystal indicators that the described basis of step S730 is set up comprises transistorized each thin film transistor (TFT) of plurality of films according to described these signal conducting liquid crystal indicators that are set up.Described these data switches that the described basis of step S740 is switched on, the discharge procedures of each storage element of described these storage elements of execution liquid crystal indicator, comprise according to described these data switches of being switched on, carry out the liquid crystal capacitance of each storage element of all described these storage elements that are coupled to described these data switches and the discharge procedures of storage capacitors.
From the above, liquid crystal indicator and method according to the ghost of can decaying fast of the present invention, can be when a liquid crystal indicator shuts down, by activation one reset signal, and a corresponding signal of each bar gate line of liquid crystal indicator is set, and according to each signal that is set up, each data switch of conducting liquid crystal indicator, in order to the rapid discharge program of each storage element of carrying out liquid crystal indicator, and reach the purpose of quick decay ghost.
Though the present invention discloses as above with embodiment; right its is not in order to limit the present invention; any have a technical field of the invention know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing various changes and retouching, so protection scope of the present invention is as the criterion when looking the claim scope person of defining.
Claims (20)
1. a liquid crystal indicator is characterized in that, described liquid crystal indicator comprises:
The one source pole driving circuit is used for producing the plurality of data signal corresponding to image to be shown;
One gate driver circuit is used for producing a plurality of signals;
The data line that a plurality of be arranged in parallel is coupled to described source electrode drive circuit, and each data line receives a corresponding data-signal of described plurality of data signal;
The gate line that a plurality of be arranged in parallel is coupled to described gate driver circuit, and is orthogonal with described a plurality of data lines, and each gate line receives a corresponding signal of described a plurality of signals;
A plurality of storage elements, each storage element comprises:
One first end is coupled to a corresponding data line of described a plurality of data lines; And
One second end is used voltage altogether in order to receive;
The plurality of data switch, each data switch comprises:
One first end is coupled to a corresponding storage element of described a plurality of storage elements;
One second end is coupled to a corresponding data line of described a plurality of data lines; And
One control end is coupled to a corresponding gate line of described a plurality of gate lines;
One reset circuit, comprise a first input end, one second input end, the 3rd input end, one first output terminal, one second output terminal, and one the 3rd output terminal, wherein said first input end is in order to receive one first pulse wave logical signal, described second input end is in order to receive one second pulse wave logical signal, described the 3rd input end is in order to receive a reset signal, described first output terminal, described second output terminal, and described the 3rd output terminal is when being used to described reset signal and being one first logical signal, described first output terminal is exported the described first pulse wave logical signal, described second output terminal is exported the described second pulse wave logical signal, described the 3rd output terminal is exported a low level logical signal, or when described reset signal is one second logical signal, described first output terminal, described second output terminal, and described the 3rd output terminal all is reset and exports described high levle logical signal; And
One power circuit, comprise a first input end, one second input end, one the 3rd input end, one four-input terminal, one first output terminal, one second output terminal, one the 3rd output terminal, and one the 4th output terminal, wherein said first input end vertically opens the beginning logical signal in order to receive one, described second input end is coupled to described first output terminal of described reset circuit, described the 3rd input end is coupled to described second output terminal of described reset circuit, described four-input terminal is coupled to described the 3rd output terminal of described reset circuit, described first output terminal is coupled to described gate driver circuit, vertically open the beginning signal in order to export one, described second output terminal is coupled to described gate driver circuit, export one first pulse wave signal or a high levle signal reference voltage in order to the logical signal of exporting according to first output terminal of described reset circuit, described the 3rd output terminal is coupled to described gate driver circuit, export one second pulse wave signal or described high levle signal reference voltage in order to the logical signal of exporting according to second output terminal of described reset circuit, described the 4th output terminal is coupled to described gate driver circuit, exports a signal reference voltage in order to the logical signal of exporting according to the 3rd output terminal of described reset circuit.
2. liquid crystal indicator as claimed in claim 1 is characterized in that, described reset circuit comprises:
One impact damper, comprise an input end and an output terminal, wherein said input end is coupled to described the 3rd input end of described reset circuit, and in order to receive described reset signal, described output terminal is coupled to described the 3rd output terminal of described reset circuit;
One first logic sum gate, comprise a first input end, one second input end, reach an output terminal, wherein said first input end is coupled to the described first input end of described reset circuit, in order to receive the described first pulse wave logical signal, described second input end is coupled to the described output terminal of described impact damper, and described output terminal is coupled to described first output terminal of described reset circuit; And
One second logic sum gate, comprise a first input end, one second input end, reach an output terminal, wherein said first input end is coupled to described second input end of described reset circuit, in order to receive the described second pulse wave logical signal, described second input end is coupled to the described output terminal of described impact damper, and described output terminal is coupled to described second output terminal of described reset circuit.
3. liquid crystal indicator as claimed in claim 2 is characterized in that, described data switch is a thin film transistor (TFT), and described impact damper is an inverter buffer or a non-inverting buffer.
4. liquid crystal indicator as claimed in claim 1 is characterized in that described storage element comprises a liquid crystal capacitance.
5. liquid crystal indicator as claimed in claim 1 is characterized in that described liquid crystal indicator comprises a voltage generator in addition, is coupled to described a plurality of storage element, in order to described common voltage to be provided.
6. liquid crystal indicator as claimed in claim 1 is characterized in that, described power circuit comprises:
One first level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is coupled to the described first input end of described power circuit, described output terminal is coupled to described first output terminal of described power circuit, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive a low level signal reference voltage;
One second level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is coupled to described second input end of described power circuit, described output terminal is coupled to described second output terminal of described power circuit, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive described low level signal reference voltage;
One the 3rd level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is coupled to described the 3rd input end of described power circuit, described output terminal is coupled to described the 3rd output terminal of described power circuit, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive described low level signal reference voltage; And
One the 4th level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is coupled to the described four-input terminal of described power circuit, described output terminal is coupled to described the 4th output terminal of described power circuit, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive described low level signal reference voltage.
7. a liquid crystal indicator is characterized in that, described liquid crystal indicator comprises:
The one source pole driving circuit is used for producing the plurality of data signal corresponding to image to be shown;
One gate driver circuit is used for producing a plurality of signals, and described gate driver circuit comprises an input end, is used for receiving a low level signal reference voltage;
The data line that a plurality of be arranged in parallel is coupled to described source electrode drive circuit, and each data line receives a corresponding data-signal of described plurality of data signal;
The gate line that a plurality of be arranged in parallel is coupled to described gate driver circuit, and is orthogonal with described a plurality of data lines, and each gate line receives a corresponding signal of described a plurality of signals;
A plurality of storage elements, each storage element comprises:
One first end is coupled to a corresponding data line of described a plurality of data lines; And
One second end is used voltage altogether in order to receive;
The plurality of data switch, each data switch comprises:
One first end is coupled to a corresponding storage element of described a plurality of storage elements;
One second end is coupled to a corresponding data line of described a plurality of data lines; And
One control end is coupled to a corresponding gate line of described a plurality of gate lines;
One power circuit, comprise a first input end, one second input end, one the 3rd input end, one first output terminal, one second output terminal, and one the 3rd output terminal, wherein said first input end vertically opens the beginning logical signal in order to receive one, described second input end is in order to receive one first pulse wave logical signal, described the 3rd input end is in order to receive one second pulse wave logical signal, described first output terminal is coupled to described gate driver circuit, vertically open the beginning signal in order to export one, described second output terminal is coupled to described gate driver circuit, in order to export one first pulse wave signal, described the 3rd output terminal is coupled to described gate driver circuit, in order to export one second pulse wave signal; And
One charge-discharge modules, be coupled to described a plurality of gate lines, be used for receiving a high levle signal reference voltage and receive a reset signal,, export described high levle signal reference voltage to described a plurality of gate lines with when described reset signal is enabled.
8. liquid crystal indicator as claimed in claim 7 is characterized in that, described charge-discharge modules comprises:
One level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is in order to receive a reset signal, described output terminal is in order to export a control signal, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive described low level signal reference voltage; And
A plurality of controllable switch, each controllable switch comprises:
One first end is coupled to a corresponding gate line of described a plurality of gate lines;
One second end is in order to receive described high levle signal reference voltage; And
One control end, be coupled to the described output terminal of described level shifter, in order to receive described control signal, described controllable switch is controlled the signal binding between described first end and described second end in order to according to the described control signal that described control end received.
9. liquid crystal indicator as claimed in claim 8 is characterized in that, described level shifter is an antiphase shifter or a noninverting level shifter.
10. liquid crystal indicator as claimed in claim 8 is characterized in that described controllable switch comprises a transistor, and described transistor comprises:
One first end is coupled to a corresponding gate line of described a plurality of gate lines;
One second end is in order to receive described high levle signal reference voltage; And
One control end, be coupled to the described output terminal of described level shifter, in order to receive described control signal, described transistor is controlled the signal binding between described first end and described second end in order to according to the described control signal that described control end received.
11. liquid crystal indicator as claimed in claim 10 is characterized in that, described transistor is a thin film transistor (TFT), a metal oxide semiconductcor field effect transistor or a two-carrier transistor.
12. liquid crystal indicator as claimed in claim 8 is characterized in that, described controllable switch comprises:
One the first transistor, described the first transistor comprises:
One first end is coupled to a corresponding gate line of described a plurality of gate lines;
One second end is in order to receive described high levle signal reference voltage; And
One control end; And
One transistor seconds, described transistor seconds comprises:
One first end is coupled to the described control end of described the first transistor;
One second end; And
One control end, be coupled to described second end of described transistor seconds and the described output terminal of described level shifter, in order to receive described control signal, described controllable switch is in order to the described control signal that described control end received according to described transistor seconds, and described first end and the signal between described second end of controlling described the first transistor link.
13. liquid crystal indicator as claimed in claim 7 is characterized in that, described data switch is a thin film transistor (TFT).
14. liquid crystal indicator as claimed in claim 7 is characterized in that, described storage element comprises a liquid crystal capacitance.
15. liquid crystal indicator as claimed in claim 7 is characterized in that, described liquid crystal indicator comprises a voltage generator in addition, is coupled to described a plurality of storage element, in order to described common voltage to be provided.
16. liquid crystal indicator as claimed in claim 7 is characterized in that, described power circuit comprises:
One first level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is coupled to the described first input end of described power circuit, described output terminal is coupled to described first output terminal of described power circuit, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive described low level signal reference voltage;
One second level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is coupled to described second input end of described power circuit, described output terminal is coupled to described second output terminal of described power circuit, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive described low level signal reference voltage; And
One the 3rd level shifter, comprise an input end, an output terminal, a noble potential input end, reach an electronegative potential input end, wherein said input end is coupled to described the 3rd input end of described power circuit, described output terminal is coupled to described the 3rd output terminal of described power circuit, described noble potential input end is in order to receive described high levle signal reference voltage, and described electronegative potential input end is in order to receive described low level signal reference voltage.
17. the method for the ghost of the liquid crystal indicator of can decaying, described method comprises:
When described liquid crystal indicator shuts down, activation one reset signal;
According to the described reset signal that is enabled, the signal of each bar gate line of a plurality of gate lines of described liquid crystal indicator is set;
Each data switch according to the plurality of data switch of the described liquid crystal indicator of described these signal conductings that is set up; And
According to described these data switches that are switched on, carry out the discharge procedures of each storage element of a plurality of storage elements of described liquid crystal indicator.
18. method as claimed in claim 17, wherein when described liquid crystal indicator shuts down, the described reset signal of activation comprises when described liquid crystal indicator shuts down, and described reset signal is switched to a low level logical signal or a high levle logical signal.
19. method as claimed in claim 17, wherein according to the described reset signal that is enabled, the described signal of each bar gate line of described these gate lines of described liquid crystal indicator is set, comprise according to the described reset signal that is enabled, the described signal of each bar gate line of described these gate lines of described liquid crystal indicator is set to a high levle signal reference voltage.
20. method as claimed in claim 17, wherein according to the described reset signal that is enabled, the described signal of each bar gate line of described these gate lines of described liquid crystal indicator is set, comprise and utilize a charge-discharge modules that is coupled to described these gate lines, according to the described reset signal that is enabled, a high levle signal reference voltage is fed to described these gate lines of described liquid crystal indicator.
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