CN100587504C - Digital synchronous sampling method - Google Patents

Abstract

The invention relates to a digital synchronous sampling method, which belongs to the field of D/A mixed signal processing. The method comprises the following steps of: setting a sampling frequency fsto M*N*f0, sampling an input signal with a frequency fi according to the sampling frequency fs, wherein f0 is the frequency theoretical value of the input signal; measuring the frequency of the inputsignal; and subjecting the sampled signal to lower decimation filtering at a decimation position p and a decimation rate M' by a cascade comb decimation filter manner according to the frequency measurement result to an input signal with a sampling frequency and a frequency of fi after decimation satisfying the synchronous sampling relationship. The invention has the advantages of less calculationamount, easy implementation, accuracy synchronization and good practicality.

Description

A kind of digital synchronous sampling method

Technical field

The invention belongs to the digital-to-analogue mixed signal process field, particularly digital synchronous sampling method.

Background technology

Synchronized sampling is exactly complete cycle, uniform sampling uniformly-spaced, requires sample frequency f _sWith the measured signal frequency f _iRatio be the integral multiple of sampling number N in the week.According to sampled signal mode difference is provided, synchronized sampling is divided into synchronous sampling by software and hardware synchronization is sampled two kinds.

The hardware synchronization sampling is to produce the sampling pulse that is synchronized with measured signal by special hardware circuit.Traditional way is to utilize the frequency of phase locking following principle to realize synchronous equal interval sampling, and its circuit as shown in Figure 1.The interior Fractional-N frequency device that adds of phaselocked loop (hereinafter to be referred as PLL) that this circuit is made of phase comparator (hereinafter to be referred as PD), low-pass filter (hereinafter to be referred as LP), voltage controlled oscillator (hereinafter to be referred as VCO), input f _iBe the frequency of measured signal, as the reference frequency of phaselocked loop, output f _sBe sample frequency.f _sBehind Fractional-N frequency with f _iCompare; According to the phase-locked loop operation principle, f during locking _s=N * f _iBecause the real-time follow-up of PLL is when the measured signal frequency f _iDuring variation, circuit can be followed the tracks of and lock automatically fast, satisfies the integral multiple that sample frequency is the measured signal frequency all the time, thereby realizes equal interval sampling N point in the week.This hard-wired synchronous sampling method needs mimic channel to realize, the design more complicated, and take bigger hardware area; When divider ratio N is big, the sample frequency f of output _sThere is shake, equal interval sampling in the week that can not realize ideal.

The synchronous sampling method that adopts software to realize has two kinds: method one is dynamically to adjust sampling time interval in sampling process, i.e. sample frequency f is adjusted in equivalence _s, make actual samples approach desirable evenly synchronized sampling constantly to greatest extent constantly; Method two be after sampling with linear interpolation method correction sampled value, make the actual samples sequence approach ideal uniform synchronized sampling sequence.But synchronous sampling by software needs the participation of microprocessor, for improving real-time, must adopt high performance microprocessor just can finish the needed computing of algorithm, so cost of development is also very high.

The synchronous sampling by software method need detect the measured signal fundamental frequency.2003 by Zhang Shiping, Zhao Yongping, Zhang Shaoqing, Li Desheng etc. are published in " electrical engineering journal " " a kind of grid frequency measurement new method based on adaptive notch filter ", it adopts the two poles of the earth adaptive notch filter structure: first order trapper filtering harmonic wave and the first-harmonic composition that is strengthened, widen the first-harmonic frequency spectrum thick through down-sampled processing again; Estimate fundamental frequency by second level trapper.It is little that this algorithm has calculated amount, and the fireballing advantage of frequency detecting is fit to business development and uses.

Summary of the invention

The objective of the invention is to have proposed a kind of digital synchronous sampling method for overcoming the weak point of prior art, have calculated amount little, be easy to realize, synchronously accurately, advantage that practicality is good.

A kind of digital synchronous sampling method that the present invention proposes is characterized in that, may further comprise the steps:

1) establishes sample frequency f _sBe M * N * f ₀, use f _sTo frequency is f _iInput signal sampling, f wherein ₀Be the theoretical value of frequency input signal, M, N are positive integer, (are f _sTo behind the signal sampling with analog signal digital, in the Digital Discrete territory to f ₀Sampling be synchronous);

2) use based on the grid frequency measurement method of adaptive notch filter input signal is carried out frequency measurement;

3) according to the result of frequency measurement, it is that p, extraction yield are the following filtering extraction of M ' that the resulting sampled signal of step 1) is extracted the position with cascade comb filtering (hereinafter to be referred as CIC) extraction mode; Sample frequency after obtaining extracting and frequency are f _iInput signal satisfy synchronized sampling relation.

The cascade comb filtering extraction mode of described step 3) adopts the cascade comb filter to realize that the transport function of this wave filter is:

$H\left(z\right)={\left(\frac{1-z^{-M^{\′}}}{1-z^{-1}}\right)}^r...\left(1\right)$

In the formula: r represents cascade exponent number, z ^-1Representation unit postpones, and M ' with the relation of M is

(characteristics of this wave filter are that all filter factors are 1, do not need multiplier when therefore realizing).A kind of implementation of the wave filter that the present invention adopts is to be constituted integral unit and connected r by d type flip flop and totalizer, doing after the individual integral operation of every M ' once differentiates realizes extracting down, differentiation element is made of d type flip flop, subtracter and connects r, thus the transport function of realization formula (1);

(for incoming frequency be f _iSignal keep the relation of synchronized sampling) extract the post-sampling frequency f down _SdNeed to satisfy:

$f_{\mathrm{sd}}=\frac{f_s}{M^{\′}}=N\×f_i...\left(2\right)$

Promptly descend extraction yield M ' to be:

$M^{\′}=\frac{f_s}{N\×f_i}=M\×\frac{f_0}{f_i}...\left(3\right)$

If M ' fractional value is realized under the mark that extraction can utilize to extract the change of position in the CIC extraction process and realize; That is: be located at f _sUnder the sampling rate k constantly the extraction position of CIC be p (k), and establish that next to extract constantly be k+x, extracting the position so can be expressed as:

p(k+x)＝p(k)+x…………………………………(4)

Wherein x is the nonnegative integer that satisfies formula (5):

f _i×(k+x)-round(f _i×k)≥M×f ₀…………………(5)

Wherein round represents the rounding operation that rounds up; f _iIt is the frequency of input signal; f ₀It is the theoretical value of frequency input signal; M is following extraction yield.

(all multiplyings in the formula (5) can by add up and mode realize, do not take hardware multiplier.) can be used for similar fast fourier transform (hereinafter to be referred as FFT) like this to the very sensitive computing of synchronized sampling through the signal after the above-mentioned processing digital synchronous sampling, and then obtain the required various data of practical application.

Characteristics of the present invention and effect:

The inventive method is at sample frequency f _sUnder the constant condition, according to the measuring-signal frequency f _iThe result dynamically adjust the extraction position of filtering extraction in the digital signal processing, make sample frequency f after extracting _SdAlways follow frequency input signal f _iVariation and change, therefore the actual sampled value that obtains is approached desirable uniform sampling value to greatest extent, has reached the purpose of synchronized sampling.Entire method can both be finished with digital circuit, and hardwareization need not the participation of software fully.

The present invention compares existing method, and to have calculated amount little, be easy to realize, synchronously accurately, the advantage that practicality is good.

Description of drawings

Fig. 1 is the structural representation of existing a kind of hard-wired synchronized sampling.

Fig. 2 is the theory diagram of the inventive method.

Fig. 3 is the embodiment block diagram of the inventive method.

Fig. 4 is the CIC structural representation that extracts position-controllable in the inventive method.

Fig. 5 is the signal FFT frequency spectrum of the inventive method embodiment after extracting.

Embodiment

Introduce its embodiment in detail below in conjunction with the application of the inventive method in the harmonic electric energy metering.

In the harmonic electric energy metering, need obtain first-harmonic and definite amplitude and the phase place of harmonic wave in the electrical network exactly, method commonly used is exactly fast fourier transform (hereinafter to be referred as FFT).And FFT calculating can cause serious frequency to leak and then make first-harmonic and harmonic wave electric energy metrical precision to reduce under the condition of non-synchronous sampling, so synchronized sampling is the key of harmonic wave metering.

The present invention be applied to harmonic wave metering synchronous sampling method embodiment structural drawing as shown in Figure 3, wherein, the theoretical value f of mains frequency ₀Be 50Hz, suppose sample frequency f _sBe 50 * 131072Hz=6.5536MHz, the actual frequency f of electrical network _iBe 52Hz, this method may further comprise the steps:

1) to the simulating signal of the input analog to digital converter (hereinafter to be referred as ADC) that is 50 * 128 * 1024Hz=6.5536MHz through a sample frequency, it to signal sampling after with analog signal digital;

2) use the frequency f of measuring input signal based on the grid frequency measurement method of adaptive notch filter _i=52Hz;

3) signal of ADC output is M=128 through a theoretical down-sampling rate, the CIC filtering extraction process of cascade exponent number r=3, its inner structure as shown in Figure 4, it constitutes integral unit (shown in left side among Fig. 4) by 3 d type flip flops and 3 totalizers; And push over formula (5) according to k extraction position constantly and realize that mark extracts down

Constitute differentiation element (shown in right side among Fig. 4) by 3 d type flip flops and 3 subtracters, system's extraction yield is reduced to the most at last

If the k=0 extraction position of CIC constantly is p (0)=0, by recursion formula p (k+x)=p (k)+x and 52 * (k+x)-round (52 * k) 〉=128 * 50, can obtain each time successively and extract corresponding extraction position, for example the 1st, 2,3 time extraction position is respectively: 123,118,113.

Signal after CIC extracts the Digital Discrete territory and down-sampled after sample frequency satisfy the relation of synchronized sampling, promptly a signal cycle has 1024 point sampling values.

In the middle of practical application, in order to reduce the complexity that FFT calculates, present embodiment can be M=16 by a down-sampling rate with signal, and the cic filter of cascade exponent number r=3 drops to 3.328KHz with system frequency, and promptly a signal cycle has 64 point sampling values.

Above-mentioned synchronous sampling signal is done the FFT spectrum analysis, its spectral line as shown in Figure 5, wherein transverse axis is represented frequency (unit be hertz), the longitudinal axis is represented amplitude (unit is a decibel); The phenomenon of the spectrum leakage when as can be seen from Figure 5, there has not been non-synchronous sampling in frequency spectrum.The result of FFT is processed the relevant information that just can obtain measuring needed first-harmonic and harmonic wave, and wherein the active power error of first-harmonic is less than 0.0001%.

Claims (1)

1, a kind of digital synchronous sampling method is characterized in that, may further comprise the steps:

1) establishes sample frequency f _sBe M * N * f ₀, use f _sTo frequency is f _iInput signal sampling, f wherein ₀Be the frequency theory value of input signal, M, N are positive integer;

2) input signal is carried out frequency measurement;

3) according to step 2) frequency measurement that obtains, it is that p, extraction yield are the following filtering extraction of M ' that the sampled signal of step 1) is extracted the position with cascade comb filtering extraction mode; Sample frequency after obtaining extracting and frequency are f _iInput signal satisfy synchronized sampling relation;

The cascade comb filtering extraction mode of described step 3) adopts the cascade comb filter to realize that the transport function of this wave filter is:

$H\left(z\right)={\left(\frac{1-z^{-M^{\′}}}{1-z^{-1}}\right)}^r\·\·\·\left(1\right)$

In the formula: r represents cascade exponent number, z ^-1Representation unit postpones, and M ' with the relation of M is $M=2^{\mathrm{round}\left({\log }_2\left(M^{\′}\right)\right)};$

If described M ' is a fractional value, then be located at f _sUnder the sampling rate k constantly the extraction position of cascade comb filtering be p (k), and establish and nextly extract constantly to be k+x, to extract the position so and try to achieve with following derivation formula:

p(k+x)＝p(k)+x…………………………………(2)

Wherein x is the nonnegative integer that satisfies formula (3):

f _i×(k+x)-round(f _i×k)≥M×f ₀…………………(3)

Wherein round represents the rounding operation that rounds up; f _iIt is the frequency of input signal; f ₀It is the theoretical value of frequency input signal; M is theoretical extraction yield down.

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