CN100561746C - Light-emitting device - Google Patents
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- CN100561746C CN100561746C CNB2004800102724A CN200480010272A CN100561746C CN 100561746 C CN100561746 C CN 100561746C CN B2004800102724 A CNB2004800102724 A CN B2004800102724A CN 200480010272 A CN200480010272 A CN 200480010272A CN 100561746 C CN100561746 C CN 100561746C
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Abstract
The invention discloses light-emitting device and related elements thereof, system and method.
Description
Technical Field
The present invention relates to a light emitting device and related components, systems and methods.
Background
Light emitting diodes can generally provide higher performance light than incandescent and/or fluorescent sources. Due to the relatively high power efficiency associated with LEDs, LEDs are used in many lighting fixtures in place of conventional light sources. For example, in some applications, LEDs are used as traffic lights to illuminate cellular phone keypads and displays.
In general, LEDs are formed from a multi-layer structure, wherein at least some of the layers in the multi-layer structure are formed from different materials. In general, the materials and thicknesses selected for the various layers determine the wavelength of light emitted by the LED. In addition, the chemical composition of the layers may be selected in an attempt to prevent injected electrical carriers from entering particular regions (commonly referred to as quantum wells) and thereby converting them into optical energy relatively efficiently. Typically, the layers on one side of the junction where the quantum well is created are doped with donor atoms, resulting in a high electron concentration (such layers are often referred to as n-type layers), while the layers on the opposite side are doped with acceptor atoms, resulting in a relatively high hole concentration (such layers are often referred to as p-type layers).
The implanted contacts will be described below for a general method of making an LED. A plurality of material layers are produced in the form of a wafer. Generally, the layers are formed using an epitaxial deposition technique, such as Metal Organic Chemical Vapor Deposition (MOCVD), with the layer that begins to deposit being formed on the growth substrate. Various etching and metallization techniques are then applied to the multiple layers to form contacts for current injection, and the wafer is then diced into individual LED chips (LED chips). Typically, the LED die is packaged.
In use, electrical energy is typically injected into the LED and then converted into electromagnetic radiation (light), a portion of which is emitted from the LED.
Disclosure of Invention
The present invention relates to a light emitting device and related components, systems and methods.
In one embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The first layer includes a surface through which light generated by the light-generating region can be emitted from the light-emitting device. The surface has a dielectric function that varies spatially according to a pattern (pattern) having a desired lattice constant and a detuning parameter greater than zero.
In another embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The first layer includes a surface through which light generated by the light-generating region can be emitted from the light-emitting device. The surface has a dielectric function that varies spatially according to a non-periodic pattern.
In yet another embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The first layer includes a surface through which light generated by the light-generating region can be emitted from the light-emitting device. The surface has a dielectric function that varies spatially according to a complex periodic pattern.
In one embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a layer of n-doped material, a layer of p-doped material, and a light-generating region. The light-emitting device further includes a reflective material layer capable of reflecting at least 50% of light rays generated by the light-generating region and impinging on the reflective material layer. The surface of the layer of n-doped material is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface having the layer of n-doped material. The surface of the layer of n-doped material has a dielectric function that varies spatially according to a pattern. The distance between the layer of p-doped material and the layer of n-doped material is smaller than the distance between the layer of n-doped material and the layer of reflective material.
In another embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The first layer includes a surface through which light generated by the light-generating region can be emitted from the light-emitting device. The surface of the first layer has a dielectric function that varies spatially according to a pattern. The light-emitting device further includes a reflective material layer capable of reflecting at least 50% of light rays generated by the light-generating region and impinging on the reflective material layer. The light-generating region is located between the layer of reflective material and the first layer, and the pattern does not extend beyond the first layer.
In yet another embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The surface of the first layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The light-generating region also includes a material in contact with a surface of the first layer, the material having a refractive index of less than 1.5. And packaging the generating device.
In one embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The surface of the first layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The surface of the first layer has a dielectric function that varies spatially according to a pattern. The light emitting device also includes a phosphor material supported by a surface of the first layer. The sides of the light emitting device are substantially free of phosphor material.
In another embodiment, the invention features a method of making a wafer. The method includes depositing a phosphor material on a surface of a wafer. The wafer includes a plurality of light emitting devices. Each light emitting device includes a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The surface of the first layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The surface of the first layer has a dielectric function that varies spatially according to a pattern.
In yet another embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The surface of the first layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The surface of the first layer has a dielectric function that varies spatially according to a pattern. The light-emitting device further includes a phosphor material such that light generated by the light-emitting device that is emitted from the surface of the first layer contacts the phosphor material such that the light emitted from the phosphor layer is substantially white light. The ratio of the height of the light emitting device to its area is small enough to extend the white light in any direction.
In one embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The surface of the first layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The light-emitting device further includes a first sheet formed of a material substantially transparent to light emitted from a surface of the first layer, and a second sheet including a phosphor material. The second sheet is adjacent to the first sheet. The light emitting device is encapsulated and the first sheet and the second sheet form part of the encapsulation of the light emitting device.
In another embodiment, the light emitting device of the present invention is characterized by comprising a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The surface of the first layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The surface of the first layer has a dielectric function that varies spatially according to a pattern. The pattern is configured such that light rays generated by the light-generating region and emitted from the light-emitting device via the surface of the first layer have a better parallelism than a laplacian distribution of light rays.
In yet another embodiment, the invention features a wafer that includes a plurality of light emitting devices. At least some of the light emitting devices include a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region. The surface of the first layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The surface of the first layer has a dielectric function that varies spatially according to a pattern. The pattern is configured such that light rays generated by the light-generating region and emitted from the light-emitting device through the surface of the first layer have better parallelism than a laplacian distribution of the light rays. The wafer has at least about 5 (e.g., at least about 25, at least about 50) light emitting devices per square centimeter.
In one embodiment, the invention features a light-emitting device that includes a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region such that, during use of the light-emitting device, light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The surface of the first layer has a dielectric function that varies spatially according to a pattern. At least about 45% (e.g., at least about 50%, at least about 60%, at least about 70%) of the total amount of light generated by the light-generating region that is emitted from the light-emitting device is emitted through the surface of the light-emitting device.
In one embodiment, the invention features a light-emitting device that includes a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region such that, in use of the light-emitting device, light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The light-emitting device has an edge that is at least about 1 millimeter (e.g., at least about 1.5 millimeters, at least about 2 millimeters, at least about 2.5 millimeters) long. The light-emitting device is designed such that its extraction efficiency (extraction efficiency) is substantially independent of the length of the edge.
In yet another embodiment, the invention features a light-emitting device that includes a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region such that, in use of the light-emitting device, light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The light-emitting device has an edge that is at least about 1 millimeter (e.g., at least about 1.5 millimeters, at least about 2 millimeters, at least about 2.5 millimeters) long. The light-emitting device is designed such that its quantum efficiency (quantun efficiency) is substantially independent of the length of the edge.
In one embodiment, the invention features a light-emitting device that includes a multi-layer stack of materials. The multi-layer stack of materials includes a light-generating region and a first layer supported by the light-generating region such that, in use of the light-emitting device, light generated by the light-generating region can be emitted from the light-emitting device via the surface of the first layer. The light-emitting device has an edge that is at least about 1 millimeter (e.g., at least about 1.5 millimeters, at least about 2 millimeters, at least about 2.5 millimeters) long. The light emitting device is designed such that its photoelectric conversion efficiency (wall plug efficiency) is substantially independent of the length of the edge.
In another embodiment, the invention features a method of making a light emitting device. The method includes combining a layer of reflective material with a layer of p-doped material. The light emitting device includes a multi-layer stack of materials including a layer of p-doped material, a light-generating region, and a first layer. The first layer includes a surface having a dielectric function that varies spatially according to a pattern. The reflective material is capable of reflecting at least 50% of light rays generated by the light-generating region and impinging on the layer of reflective material.
In yet another embodiment, the invention features a method of making a light emitting device. The method peels the substrate bonded to the first layer. The first layer forms a portion of a multi-layer stack of materials that includes a light-generating region. The method forms a light emitting device having a surface of a first layer with a dielectric function that varies spatially according to a pattern.
One or more advantages of the present invention are described below.
The multi-layer stack of materials may be formed from a multi-layer stack of semiconductor materials. The first layer may be a layer of n-doped semiconductor material and the multi-layer stack of materials may further include a layer of p-doped semiconductor material. The light-generating region may be between the layer of n-doped semiconductor material and the layer of p-doped semiconductor material.
The light emitting device may further comprise a support supporting the multi-layer stack of materials.
The light-emitting device further comprises a layer of reflective material capable of reflecting at least 50% of the light generated by the light-generating region and impinging on the layer of reflective material. A layer of reflective material may be located between the support and the multi-layer stack of materials. The distance between the layer of P-doped semiconductor material and the layer of reflective material may be less than the distance between the layer of n-doped semiconductor material and the layer of reflective material. The light emitting device may further include a p-type ohmic contact between the p-doped material layer and the reflective material layer.
The light emitting device may further include a current-spreading layer between the first layer and the light-generating region.
The multi-material stack layer may be formed of a semiconductor material, such as a III-V semiconductor material, an organic semiconductor material, and/or silicon.
In some embodiments, the pattern does not extend into the light-generating region.
In some embodiments, the graphics do not necessarily extend onto the first layer.
In some embodiments, the graphic extends beyond the first layer.
The light emitting device further includes a plurality of electrical contacts for injecting current into the light emitting device. The electrical contacts may be used to vertically inject current into the light emitting device.
The pattern may be formed in part from one selected from, for example, holes in a surface of the first layer, pillars in the first layer, continuous texture in the first layer, non-continuous texture in the first layer, and combinations thereof.
In some embodiments, the pattern may be selected from a triangular pattern, a square pattern, and a grid pattern.
In some embodiments, the pattern may be selected from a non-periodic pattern, a quasicrystal pattern (quasicrystal patterns), a Robinson pattern (Robinson patterns), and an Amman pattern (Amman patterns). In some embodiments, the pattern is a Penrose pattern (Penrose pattern).
In some embodiments, the pattern may be selected from a honeycomb pattern, an archimedes pattern. In some embodiments, the pattern (e.g., honeycomb pattern) may have holes of different diameters.
In some embodiments, the pattern is formed in part by holes on the surface of the first layer.
For example, the detuning parameter may be at least 1% of the ideal lattice constant or at most 25% of the ideal lattice constant. In some embodiments, the pattern may correspond to an ideal pattern that is substantially arbitrarily detuned.
The pattern may be configured such that light emitted by the surface of the first layer has a spectrum of a radiation mode, and the spectrum of the radiation mode is substantially the same as the characteristic emission spectrum of the light-generating region.
The light emitting device may be, for example, a light emitting diode, a laser, or an optical amplifier. Examples of the light emitting device include an Organic Light Emitting Device (OLED), a planar light emitting LED, and a High Brightness Light Emitting Diode (HBLED).
In some embodiments, the surface of the first layer has features with a size less than λ/5, where λ is the wavelength of light that the first layer can emit.
In some embodiments, the light emitting device is packaged (e.g., in the form of a packaged die). In some embodiments, the encapsulated light emitting device may not employ an encapsulant.
In some embodiments, the material in contact with the surface of the first layer is a gas (e.g., air), and the pressure of this gas is less than about 100 Torr (Torr).
In some embodiments, the material in contact with the surface of the first layer has a refractive index of at least about 1.
In some embodiments, the packaged LED includes a cover plate (cover). The cover plate may include a phosphor material. The cover sheet is configured such that light generated by the light-generating region that is emitted through the surface of the first layer can interact with the phosphor material such that light that is emitted through the surface of the first layer and interacts with the phosphor material is emitted from the cover as substantially white light.
In some embodiments, the light emitting device further comprises a first sheet and a second sheet. The first sheet has a material substantially transparent to light emitted from the light-emitting device, and the second sheet includes a phosphor material. The second sheet may be adjacent to the first sheet and there may be a material having an index of refraction of less than about 1.5 between the first sheet and the surface of the first layer. The first and second sheets are configured such that light generated by the light-generating region that is emitted through the surface of the first layer can interact with the phosphor material such that light that is emitted through the surface of the first layer and that interacts with the phosphor material is emitted from the second sheet as substantially white light.
A phosphor material may be disposed on a surface of the first layer.
A method of manufacturing a wafer includes placing a phosphor material to form a layer having a thickness that varies by less than about 20%. The method may include planarizing the phosphorus material layer such that a thickness of the phosphorus material layer varies by less than about 20%. The method also includes planarizing the phosphorus material after placing the phosphorus material on the surface of the first layer. The phosphor material may be, for example, spin coated on the surface of the wafer. The method includes forming a plurality of light emitting devices from a wafer and separating at least a portion of the light emitting devices from one another.
In some embodiments, when light generated by the light-generating region is emitted from the light-emitting device via the surface of the first layer, at least about 40% of the light emitted from the surface of the first layer is emitted at an angle of at most about 30 degrees from a normal to the surface of the first layer.
In certain embodiments, the fill factor of the light emitting device is at least about 10% and/or at most about 75%.
The method of fabricating a light emitting device further includes bonding the first layer to the substrate prior to bonding the layer of reflective material and the layer of p-doped material, the multi-layer stack of materials being positioned between the substrate and the layer of reflective material. The method also includes forming a bonding layer between the first layer and the substrate. The method also includes removing the substrate. The method further includes grinding and polishing steps after removing the substrate. After bonding the layer of reflective material and the first layer, the substrate is removed. Removing the substrate includes heating a bonding layer between the first layer and the substrate. Heating the bond coat may decompose at least a portion of the bond coat. Heating the bonding layer may include exposing the bonding layer to radiation emitted by a laser. Removing the substrate may include exposing the substrate with a laser lift-off process. Removing the substrate causes the surface of the first layer to become substantially planar. The method further includes planarizing the surface of the first layer after the first substrate is removed prior to forming the pattern in the surface of the first layer. Planarizing the surface of the first layer includes chemical mechanical polishing the surface of the first layer. Planarizing the surface of the first layer can reduce the roughness of the surface of the first layer to greater than about λ/5, where λ is the wavelength of light that can be emitted by the first layer. Forming the pattern may include using nano lithography. The method can also include placing a substrate on the layer of reflective material. The method may further comprise positioning a current-distributing layer between the first layer and the light-generating region.
The various embodiments reflect the following advantages of the invention.
In certain embodiments, LEDs and/or relatively large LED chips may emit relatively high light extraction.
In some embodiments, the LEDs and/or relatively large LED dies may emit relatively high planar brightness, relatively high average surface brightness, relatively low heat dissipation requirements or relatively high heat dissipation rates, relatively low etendue (etendue), and/or relatively high power efficiency.
In some embodiments, the LEDs and/or relatively large LED die are designed such that a relatively small amount of light emitted by the LED/LED die is absorbed by the package.
In some embodiments, encapsulated LEDs (e.g., relatively large encapsulated LEDs) may be fabricated without the use of an encapsulant material. This may allow the packaged LED to avoid problems associated with the use of certain packaging materials (e.g., reduced performance and/or inconsistent performance as a function of time), thereby providing relatively good and/or reliable performance over a relatively long period of time.
In some embodiments, an LED (e.g., a packaged LED, which may be a relatively large packaged LED) may include a relatively uniform spin-on phosphor material.
In some embodiments, an LED (e.g., a packaged LED, which may be a relatively large packaged LED) may be designed to provide a desired light output over a particular range of angles (e.g., over a particular range of angles relative to the normal of the LED surface).
In some embodiments, the LEDs and/or relatively large LED wafers may be fabricated in a relatively inexpensive process.
In certain embodiments, LEDs and/or relatively large LEDs can be fabricated via an industrial scale manner without increasing cost and without rendering them economically unfeasible.
The advantages of the present invention are described in the specification, drawings and claims.
Drawings
Fig. 1 is a side view of an LED with a patterned surface.
Fig. 2 is a top view of a patterned surface of the LED according to fig. 1.
Fig. 3 is a graph of extraction efficiency for an LED with a patterned surface as a function of a detuning parameter.
FIG. 4 is a schematic diagram of Fourier transform of a patterned surface of an LED.
Fig. 5 is the extraction efficiency of an LED with a patterned surface as a function of nearest distance.
Fig. 6 is the extraction efficiency of an LED with a patterned surface as a function of fill factor.
Fig. 7 is a top view of a patterned surface of an LED.
Fig. 8 is a graph of the extraction efficiency of LEDs with different surface patterns.
Fig. 9 is a graph of the extraction efficiency of LEDs with different surface patterns.
Fig. 10 is a graph of the extraction efficiency of LEDs with different surface patterns.
Fig. 11 is a graph of the extraction efficiency of LEDs with different surface patterns.
Fig. 12 is a schematic of the fourier transform of two LEDs with different patterned surfaces compared to the radiation spectrum of the LEDs.
Fig. 13 is a graph of the extraction efficiency of LEDs having different surface patterns as a function of angle.
Fig. 14 is a side view of an LED having a patterned surface and a phosphor material on the patterned surface.
Fig. 15 is a side view of an epitaxial layer precursor (precursor) of an LED with a patterned surface.
Fig. 16 is a side view of a epitaxial layer precursor to an LED with a patterned surface.
Fig. 17 is a side view of a epitaxial layer precursor to an LED with a patterned surface.
Fig. 18 is a side view of a epitaxial layer precursor to an LED with a patterned surface.
Fig. 19 is a side view of a epitaxial layer precursor to an LED with a patterned surface.
Like reference symbols in the various drawings indicate like elements.
Detailed Description
Fig. 1 shows a side view of an LED in the form of a packaged die. LED100 includes a multi-layer stack of materials 122 disposed on a submount. The multi-layer stack 122 of materials includes a 320 nm thick layer 134 of silicon-doped (n-doped) GaN, with a plurality of openings 150 patterned in the upper surface 110 of the layer 134 of silicon-doped (n-doped) GaN. Multi-layer stack 122 also includes bonding layer 124, 100 nm thick silver layer 126, 40nm thick magnesium doped (p-doped) GaN layer 128, 120 nm thick light generating region 130 formed by multiple InGaN/GaN quantum wells, and AlGaN layer 132. An N-side contact pad is disposed on layer 134 and a p-side contact layer 138 is disposed on layer 126. Encapsulation material (epoxy with a refractive index of 1.5) is located between layer 134 and cover slip (cover slip)140 and support 142. Layer 144 does not extend into opening 150.
The LED generates light as follows. The P-side contact pad 138 is at a positive potential relative to the n-side contact pad 136, resulting in current injection into the LED 100. When current passes through light-generating region 130, electrons from n-doped layer 134 combine with holes from p-doped layer 128 at region 130, causing light to be generated by light-generating region 130. The light-generating region 130 includes a plurality of even-pole radiation sources that emit light rays (e.g., isotropically) at the light-generating region having a spectral characteristic of a wavelength of the material forming the light-generating region 130. The spectrum of the wavelength of the light generated by region 130 may have a peak wavelength of about 445 nanometers and a Full Width Half Maximum (FWHM) of about 30 nanometers under the action of InGaN/GaN quantum wells.
Note that the charge carriers in p-doped layer 126 have relatively low mobility compared to the charge carriers in n-doped semiconductor layer 134. Thus, placing silver layer 126 (which is conductive) along the surface of p-doped layer 128 may improve the uniformity of charge injection from contact pad 138 into p-doped layer 128 and light-generating region 130. This may also reduce the resistance of the device 100 and/or increase the injection efficiency of the device 100. Due to the relatively high charge mobility of n-doped layer 134, electrons may diffuse relatively quickly from n-side contact pad 136 through layers 132 and 134, such that the current concentration in light-generating region 130 is substantially uniform through region 130. Note also that silver layer 126 has a relatively high thermal conductivity, allowing layer 126 to act as a heat source for LED100 (transferring heat vertically from multi-material stack 122 to submount 120).
At least a portion of the light generated by region 130 may be directed to silver layer 126. This light may be reflected by layer 126 and emitted from LED100 via surface 110, or may be reflected by layer 126 and then absorbed in the semiconductor material of LED100, thereby forming electron-hole pairs that may combine in region 130 to cause region 130 to generate light. Similarly, at least a portion of the light generated by region 130 is directed to pad 136. The underside of pad 136 is formed of a material (e.g., a Ti/Al/Ni/Au alloy) that can reflect at least a portion of the light generated by light-generating region 130. Thus, light directed to pad 136 can be reflected by pad 136 and then emitted from LED100 via surface 110 (e.g., reflected from silver layer 126), or the light directed to pad 136 can be reflected by pad 136 and then absorbed in the semiconductor material of LED100, thereby generating electron-hole pairs that can combine in region 130 to cause region 130 to generate light (e.g., reflected or not by silver layer 126).
As shown in fig. 1 and 2, the surface 110 of the LED100 is not flat, but is formed by a modified triangular pattern of openings 150. In general, different values may be selected for the depth of openings 150, and the diameter of openings 150 and the closest distance between nearest neighbor openings 150 may vary. Unless otherwise noted, numerical calculations are used to illustrate the various figures: openings 150 have a depth 146 equal to about 280 nanometers, a non-zero diameter of about 160 nanometers, a distance between nearest neighbor openings of about 220 nanometers, and an index of refraction equal to 1.0. The triangular pattern is detuned such that nearest neighbors in pattern 150 have a center distance between the values (a- Δ a) and (a + Δ a), where "a" is the lattice constant of the ideal triangular pattern and "Δ a" is a detuning parameter with a length scale that can occur in any direction. To increase the extraction of light from the LED100 (see description below), the detuning parameter Δ a is typically at least about 1% (e.g., at least about 2%, at least about 3%, at least about 4%, at least about 5%) and at most about 25% (e.g., at most about 20%, at most about 15%, at most about 10%) of the ideal lattice constant a. In some embodiments, the nearest neighbor spacing is any value between (a- Δ a) to (a + Δ a), such that pattern 150 may be detuned substantially arbitrarily.
For a modified triangular pattern with openings 150, it has been found that non-zero detuning parameters improve the extraction efficiency of the LED 100. For the above-described LED100, as the detuning parameter Δ a increases from zero to about 0.15a, a mathematical model (described below) of the electromagnetic field in the LED100 shows that the extraction efficiency of the device increases from about 0.60 to about 0.70, as shown in fig. 3.
The extraction efficiency in fig. 3 is calculated by using a three-dimensional Finite Difference Time Domain (FDTD) method to estimate The solution of The makeshift equation for light inside or outside The LED100, see, for example, k.s. kunz and r.j. luebbers, The finish-Difference Time-domain algorithms (CRC, Boca Raton, FL, 1993), a.teflon, computational electrical dynamics: the finish-Difference Time-Domain Method (Artech House, London, 1995), which is incorporated herein by reference. To present the optical properties of the LED100 with a particular pattern 150, the input parameters in the FDTD calculation include the center frequency and bandwidth of the light emitted by the dipole point radiation source in the light-generating region 130, the dimensions and dielectric properties of the layers in the multiple stacked material layers 122, and the diameter, depth, and Nearest Neighbor Distance (NND) between the openings in the pattern 150.
In certain embodiments, the extraction efficiency data for the LED100 is calculated as follows using the FDTD method. FDTD was used to solve the omni-vector time-based makeshift equation:
wherein it is polarized
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Captures the frequency-dependent response of the quantum wells of light-generating region 130, p-contact layer 126, and other layers in LED 100.The term is an empirically derived value that contributes differently to the overall polarization of the material (e.g., polarization response of bound electron oscillations, polarization response of free electron oscillations). In particular, it is possible to use, for example,
wherein the polarization corresponds to a dielectric constant
For convenience of numerical calculations, only encapsulant 144, silver layer 126, and layers between encapsulant 144 and silver layer 126 are considered. This approximation is based on the assumption that the encapsulant 144 and layer 126 are thick enough so that the surrounding layers do not affect the optical performance of the LED 100. The relevant structures in LED100 that are assumed to have a frequency dependent dielectric constant are silver layer 126 and light generating region 130. It is assumed that other relevant layers in the LED100 have no frequency dependent dielectric constant. Note that in embodiments where LED100 includes additional metal layers between encapsulant 144 and silver layer 126, each additional metal layer will have a frequency dependent dielectric constant. It is also noted that the silver layer (and any other layers in the LED 100) has a frequency dependent term for bound electrons and free electrons, while the light-generating region has a frequency dependent term for bound electrons but no frequency dependent term for free electrons. In certain embodiments, other terms may be included when modeling the frequency dependence of the dielectric constant. For example, such terms may include electroacoustic ion interactions, atomic polarization, ionic polarization, and/or molecular polarization.
Light emitted by the quantum wells of light-generating region 130 is modeled by incorporating a constant current dipole source arbitrarily placed in light-generating region 130, each emitting a short gaussian pulse of spectral width equal to the gaussian pulse of the actual quantum well, each with an arbitrary initial phase, start time.
To process the pattern of the openings 150 in the surface 110 of the LED100, larger supercells in the lateral direction and periodic boundary conditions are used. This may help simulate larger (e.g., greater than 0.01 mm on edge) device sizes. The full evolution equation is solved in real time after all dipole sources have emitted their energy until there is no energy in the system. In this simulation, the total energy emitted, the energy flow through the upper surface 110, and the energy absorbed by the quantum wells and the n-doped layer are monitored. Frequency and angle analysis data of the extracted stream are obtained by fourier transform in the time domain and space, and therefore, frequency analysis extraction efficiency can be calculated. By matching the total energy emitted to the experimentally known luminescence of light-generating region 130, an absolute angle-resolved extraction per wafer area for a given input per unit brightness is obtained.
It is believed that varying detuning pattern 150 may improve the efficiency of light generated in light-generating region 130 that is emitted from LED100 via surface 110, as opening 150 establishes a dielectric function that varies spatially in layer 134 according to pattern 150, which is not equivalent to a theoretical result. It is also believed that the above results change the concentration of radiative modes (e.g., light modes that emit light from surface 110) and guided modes (e.g., light modes confined to multiple stacked layers 122) in LED 100. And this change in the concentration of the radiation modes and the guided modes of LED100 results in some light being scattered (e.g., bragg scattered) into the modes that may leak into the radiation modes, which are emitted into the guided modes without pattern 150. In some embodiments, it is believed that the graphic 150 (e.g., the graphic described above, or one of the graphics described above) may eliminate all of the guided modes in the LED 100.
It is believed that by considering bragg scattering from a crystal with point scattering sites, the detuning effect of the lattice can be understood. For a perfect lattice in lattice planes spaced apart from each other by a distance d, monochromatic light of wavelength λ is scattered with an angle θ according to the bragg condition n λ 2dsin θ, where n is an integer representing the order of scattering. However, for a source having a spectral bandwidth Δ λ/λ and impinging at a solid angle Δ Θ, the Bragg condition can be relaxed by a detuning parameter Δ a by detuning the spacing between the lattice sites. Detuning the lattice improves the scattering effectiveness and acceptance angle of the pattern over the spectral bandwidth and spatial emission profile of the source.
While modified triangular patterns 150 with non-zero detuning parameters Δ a have been described to increase the light extraction from the LED100, other patterns may be used to increase the light extraction from the LED 100. When determining whether a given pattern increases the light extraction amount from the LED100 and/or what aperture pattern can be used to increase the light extraction amount from the LED100, a physical image (physical insight) is first used to approximate a basic pattern that can increase the light extraction amount before numerical calculation.
The extraction efficiency of the LED100 can be further understood (e.g., in weak scattering conditions) by considering the fourier transform of the dielectric constant that varies spatially according to the pattern 150. Fig. 4 illustrates the fourier transform for an ideal triangular lattice. The extraction of light entering along a particular direction of in-plane wave vector k and the emission source S entering all radiation modes along in-plane wave vector k' (i.e., parallel to pattern 150)k’In a related aspect, the in-plane wave vector k can be obtained by adding or subtracting the inverted lattice vector G from the in-plane wave vector k ', i.e. k ═ k' ± G. The extraction efficiency is proportional to the dielectric function epsilonGRespective Fourier component (F)k) Is given by
The propagation of light in a material generally satisfies equation k2(in-plane) + k2Normal ═ epsilon (omega/c)2The maximum G considered is fixed by the frequency (ω) emitted by the light-generating region and the dielectric constant of the light-generating region. As shown in fig. 4, a ring of inverted lattice space, commonly referred to as a light line, is defined. The optical energy level is a ring-like structure due to the limited bandwidth of the light-generating region 130, but for ease of explanation, the optical energy level of a monochromatic light source is described herein. Similarly, light propagation within the encapsulant is also limited by the optical energy level (inner ring in fig. 4). Thus, by increasing Fk in all directions k in the optical energy level of the encapsulant and increasing the scattering intensity ε at the G-point on the optical energy level of the encapsulantGThe extraction efficiency can be improved, wherein the optical energy level in the encapsulating material layer is equal to the incremental sum of the G dots in the encapsulating material layer. The physical image may be used when selecting a graphic that may improve the extraction efficiency.
For example, fig. 5 illustrates the effect of increasing the lattice constant of an ideal triangular pattern. The data in fig. 5 were calculated using the parameters given for LED100 shown in fig. 1, but excluding the emitted light having a peak wavelength of 450 nm, the depth of the opening, the diameter of the opening, and the thickness of n-doped layer 134 at distances "a" from the nearest neighbor of 1.27a, 0.72a, 1.27a +40nm, respectively. Increasing the lattice constant increases the concentration of G-sites that create the optical energy level of the encapsulant. A clear trend with the extraction efficiency of NND was observed. It is believed that the maximum extraction efficiency for NND is approximately equal to the wavelength of light in vacuum. The reason for obtaining the maximum extraction efficiency is that: as the NND becomes larger than the wavelength of light, the scattering effect is reduced as the material becomes more uniform.
For example, fig. 6 illustrates the effect of increasing the pore size or fill factor. The fill factor of the triangle pattern is represented by (2 pi/√ 3) × (r/a)2Where r is the radius of the hole. The data in fig. 6 are calculated using the parameters given for the LED100 of fig. 1, excluding the diameter of the opening as a function of a given fill factor on the x-axis. When the scattering intensity (. epsilon.)G) When increased, extraction efficiency increases with fill factor. When the fill factor is-48%, then this particular system has a maximum. In certain embodiments, the LED100 has a fill factor of at least about 10% (e.g., at least about 15%, at least about 20%) and/or at most about 90% (e.g., at most about 80%, at most about 70%, at most about 60%).
Although the modified triangular pattern described above has a detuning parameter associated with the positioning of the pattern openings at the locations of the ideal triangular lattice, a modified (detuned) triangular pattern may also be obtained by modifying the holes in the ideal triangular pattern while maintaining the center of the locations of the ideal triangular pattern. One embodiment of such a pattern is shown in fig. 7. The method for performing the corresponding numerical calculation and the physical explanation of the increased light extraction amount for the light emitting device having the graph shown in fig. 7 is the same as the above-described method. In some embodiments, the modified (detuned) pattern may have openings placed at a distance from the ideal location and openings at the ideal location but with different diameters.
In other embodiments, increased light extraction from the light-emitting device may be achieved by using different patterns, including, for example, complex periodic patterns and non-periodic patterns. Here, the complex periodic pattern is a pattern having more than one feature per unit cell (unit cell) that is repeated in a periodic manner. For example, complex periodic patterns include honeycomb patterns, honeycomb substrate patterns, (2x2) substrate patterns, annular patterns, and archimedes patterns. As described below, in some embodiments, the complex periodic pattern may have some openings with one diameter and other openings with a smaller diameter. Here, the non-periodic pattern is a pattern having no translational symmetry on a unit cell having a length at least 50 times the peak wavelength of the light generated by the region 130. Examples of the non-periodic pattern include a non-periodic pattern, a quasicrystal pattern, a robinson pattern, and an ann pattern.
Fig. 8 shows numerical calculations for two different complex periodic patterns for LED100, where some openings in the pattern have a particular diameter and other openings in the pattern have a smaller diameter. The numerical calculations shown in fig. 8 show the performance of extraction efficiency (larger pores with a diameter of 80 nanometers) with a diameter of smaller pores (dR) varying from 0 to 95 nanometers. The data shown in fig. 6 is calculated using the given parameters for the LED100 of fig. 1, excluding the diameter of the opening as a function of a given fill factor value on the X-axis of the graph. Without being bound by theory, the various pore sizes allow scattering from multiple periodicities in the pattern, thereby increasing the acceptance angle and spectral efficiency of the pattern. The improvement of the light extraction amount, the method for performing the corresponding numerical calculation, and the physical explanation of the improved extraction efficiency for the light emitting device having the graph of fig. 8 are the same as those described above.
Fig. 9 shows numerical calculations for LEDs 100 having different annular patterns (complex periodic patterns). The number of openings in the first ring surrounding the central hole is different for different ring patterns (6, 8 or 10). The data shown in fig. 9 were calculated using the parameters given for the LED100 in fig. 1, excluding emitted light having a peak wavelength of 450 nm. The numerical calculations in fig. 9 indicate the extraction efficiency of the LED100 for a number of patterns per unit cell from 2 to 4, where the circular pattern passes through the unit cells in a repeating fashion. The physical explanation of the increase in the light extraction amount, the method for performing the corresponding numerical calculation, and the increased light extraction rate of the light emitting device having the graph shown in fig. 9 is the same as that described above.
Fig. 10 shows numerical calculations for an LED100 having an archimedes pattern. Archimedes pattern a7 is formed of hexagonal unit cells 230 having 7 equally spaced holes, with the nearest neighbor distance a between each other. In the unit cell 230, 6 holes are arranged in a regular hexagonal shape, and the seventh opening is located at the center of the hexagon. The hexagonal unit cells 230 then center the holes at a distance And together constitute the entire surface of the LED along the edge. This is said to be a7 filled because 7 holes make up a single unit. Similarly, archimedes a19 consists of 19 equally spaced holes with the nearest neighbor distance a. The holes are arranged in the form of an inner hexagon with 7 holes, an outer hexagon with 12 holes, and a central hole in the center of the inner hexagon. Then, the holes were centered at a distance of And together constitute the entire surface of the LED along the edge. Increase of light extraction amount for performing corresponding numerical calculationThe method of (a) and the physical explanation for the increased light extraction of the light emitting device having the pattern shown in fig. 10 are the same as described above. As shown in fig. 10, the extraction efficiency of a7 and a19 is about 77%. The data shown in fig. 10 were calculated using the parameters given for the LED100 shown in fig. 1, but excluding the emitted light having a peak wavelength of 450 nm and the NND defined as the distance between the openings within each cell.
Fig. 11 shows numerical calculations for an LED100 having a quasicrystalline pattern. Quasicrystalline patterns are described, for example, in m.senechal, quicksolids and Geometry (Cambridge university press, Cambridge, England 1996), which is incorporated herein by reference. This numerical calculation illustrates the performance of extraction efficiency when varying based on an 8-fold quasi-periodic structure. It is believed that quasicrystalline patterns exhibit high extraction efficiency due to the high in-plane axial symmetry allowed by the quasicrystalline structure. The physical explanation of the increase in the light extraction amount, the method for performing the corresponding numerical calculation, and the increased light extraction rate of the light emitting device having the graph shown in fig. 11 is the same as that described above. The results of the FDTD calculation of fig. 11 indicate that the extraction efficiency of the quasicrystalline pattern reaches about 82%. The data shown in fig. 11 were calculated using the parameters given for the LED100 shown in fig. 1, but excluding the emitted light having a peak wavelength of 450 nm and the NND defined as the distance between the openings within each cell.
Although some examples of patterns are described herein, it should be understood that other patterns may also improve the extraction efficiency of the LED100 if they meet the basic principles described above. For example, it is believed that increasing detuning of alignment crystals or complex periodic structures can increase extraction efficiency.
In some embodiments, at least about 45% (e.g., at least about 50%, at least about 55%, at least about 60%, at least about 70%, at least about 80%, at least about 90%, at least about 95%) of the total amount of light emitted by LED100 and generated by light-generating region 130 is emitted through surface 110.
In some embodiments, the cross-sectional area of the LED100 may be relatively large, yet still exhibit the effective light extraction efficiency of the LED 100. For example, one or more edges of LED100 can be at least about 1 millimeter (e.g., at least about 1.5 millimeters, at least about 2 millimeters, at least about 2.5 millimeters, at least about 3 millimeters), and a total amount of light emitted by LED100 and generated by light-generating region 130 is at least about 45% (e.g., at least about 50%, at least about 55%, at least about 60%, at least about 70%, at least about 80%, at least about 90%, at least about 95%) emitted through surface 110. This allows the LED to have a relatively large cross-sectional area (e.g., at least about 1 millimeter x at least about 1 millimeter) while exhibiting good power conversion efficiency.
In some embodiments, the extraction efficiency of an LED with the LED100 design is substantially independent of the length of the LED edge. For example, the extraction efficiency of a design with LED100 and one or more edges having a length of about 0.25 millimeters may differ by less than about 10% (e.g., less than about 8%, less than about 5, less than about 3%) from the extraction efficiency of a design with LED100 and one or more edges having a length of 1 millimeter. Here, the extraction efficiency of an LED is the ratio of the light emitted by the LED to the total amount of light emitted by the device (which can be measured in terms of the energy of the photons). This allows the LED to have a relatively large cross-section (e.g., at least about 1 millimeter x at least about 1 millimeter) while still exhibiting good performance.
In some embodiments, the quantum efficiency of an LED with the LED100 design is substantially independent of the length of the LED edge. For example, the quantum efficiency of the design with LED100 and one or more edges having a length of about 0.25 millimeters may differ by less than about 10% (e.g., less than about 8%, less than about 5, less than about 3%) from the quantum efficiency of the design with LED100 and one or more edges having a length of 1 millimeter. Here, the quantum efficiency of an LED is the ratio of the number of photons generated by the LED to the number of electron-hole recombinations that occur in the LED. This allows the LED to have a relatively large cross-section (e.g., at least about 1 millimeter x at least about 1 millimeter) while still exhibiting good performance.
In some embodiments, the electrical-to-optical conversion efficiency (wall plug efficiency) of an LED with the design of LED100 is substantially independent of the edge of the LED. For example, the photoelectric conversion efficiency of the design with LED100 and one or more edges having a length of about 0.25 millimeters may differ by less than about 10% (e.g., less than about 8%, less than about 5, less than about 3%) from the photoelectric conversion efficiency of the design with LED100 and one or more edges having a length of 1 millimeter. Here, the photoelectric conversion efficiency of the LED is: the product of the injection efficiency of an LED (the ratio of the number of carriers injected into the device to the number of carriers recombined in the light-generating region of the light-emitting device), the radiative efficiency of an LED (the ratio of electron-hole recombination resulting in radiation to the total number of electron-hole recombinations), and the extraction efficiency of an LED (the ratio of the number of photons from an LED to the total number of photons generated). This allows the LED to have a relatively large cross-section (e.g., at least about 1 millimeter x at least about 1 millimeter) while still exhibiting good performance.
In some embodiments, it may be desirable to manipulate the angular distribution of light emitted by the LED100 through the surface 110. To increase extraction efficiency into a given solid angle (e.g., into a solid angle around the normal to surface 110), the fourier transform of the dielectric function that is spatially varied according to pattern 150 (as described above) is examined. Fig. 12 shows a fourier transform structure of two ideal triangular lattices with different lattice constants. To improve extraction efficiency, we sought to increase the number of G-dots in the optical energy level of the encapsulation material and the scattering intensity (. epsilon.) of the G-dots in the optical energy level of the materialG). This means that the NND is increased to obtain the effect described in figure 5. However, the concern here is the extraction efficiency into a solid angle centered on the normal direction. Thus, by reducing the radius of the optical energy level of the encapsulant, the introduction of higher order G points is limited such that the amplitude of G is greater than (ω (n)e) C) is used. It follows that by reducing the refractive index of the encapsulating material (the minimum requirement is to remove all encapsulating material)Larger NNDs can be allowed, thus increasing the number of G points in the material optical energy level that can contribute to normal direction (F)k0) while avoiding diffraction into higher orders (tilt angles) in the encapsulation material. Fig. 13 illustrates the above description, which shows the extraction efficiency into the solid angle (given by the collection half angle in the figure). The data in fig. 13 is calculated using the parameters given for LED100 of fig. 1, excluding: the emitted light with a peak wavelength of 530 nm and a bandwidth of 34 nm, the refractive index of the encapsulation material of 1.0, the thickness of the p-doped layer of 160 nm, the light generation layer of 30 nm thickness, nnd (a) of the three curves shown in fig. 13, and the depth, hole diameter and n-doped layer thickness at a, 1.27a, 0.72a, 1.27a +40nm, respectively. As the lattice constant increases, the extraction efficiency at narrow angles and the extraction efficiency into all angles also increases. However, for larger lattice constants, even though the overall extraction efficiency into all angles increases, diffraction into higher order modes in the package material limits the extraction efficiency at narrow angles. For a lattice constant of 460 nm, the extraction efficiency into the half angle of the collection was calculated to be greater than 25%. That is, only about half of the extracted light in the upper hemisphere at a solid angle of about 13.4% is collected, exhibiting a collimation effect (collimation effect) of a pattern. It is believed that any pattern of G points that can increase the number of G points in the material optical energy level while limiting the number of G points in the encapsulation material optical energy level to k 0 can improve extraction efficiency into a solid angle centered on the normal direction.
The above method is particularly useful for reducing the ratio of n to n2Where n represents the refractive index of the surrounding material (e.g., the encapsulation material). Thus, it is believed that lowering the index of refraction of the encapsulant layer of LED100 may result in more parallel emission, less source range, and higher surface brightness (defined herein as the overall brightness introduced into the source range). In some embodiments, the use of an air encapsulant may reduce the source range while increasing extraction efficiency into a given collection angle centered about the normal direction.
In some embodiments, the distribution of light generated by region 130 is more parallel than the laplace distribution as the light exits LED100 through surface 110. For example, in some embodiments, when light generated by region 130 is emitted from LED100 via surface 110, at least about 40% (e.g., at least about 50%, at least about 70%, at least about 90%) of the light emitted via the surface of the dielectric layer is emitted at an angle of at most about 30 degrees (e.g., at most about 25 degrees, at most about 20 degrees, at most about 15 degrees) from normal to surface 110.
The ability to extract a relatively high proportion of light at a desired angle, or a relatively high light extraction, may allow for the fabrication of relatively high densities of LEDs on a given wafer. For example, in some embodiments, there are at least about 5 LEDs per square centimeter of wafer (e.g., at least about 25 LEDs, at least about 50 LEDs).
In some embodiments, it is desirable to modify the wavelength of light emitted from packaged LED100 relative to the wavelength of light generated by light-generating region 130. For example, as shown in fig. 14, LED300 has a layer 180 comprising a phosphor material that can be placed on surface 110. The phosphor material may interact with light of the wavelength generated by region 130 to provide light of a desired wavelength. In some embodiments, it is desirable that the light emitted from the LED100 be substantially white light. In these embodiments, the phosphorous material in layer 180 may be comprised of, for example, (Y, Gd) (Al, Ga) G: Ce3+ or yttrium aluminum garnet ("YAG"). When excited by blue light emitted by light-generating region 130, the phosphor material in layer 180 may be activated and emit light having a broad spectrum (e.g., isotropic) centered around the yellow light wavelength. An observer of the total spectrum emitted by LED100 can see the yellow phosphor material broad emission spectrum, the blue InGaN narrow emission spectrum, and typically mix the two spectra to see white light.
In some embodiments, layer 180 may be substantially uniformly placed on surface 110. For example, the distance between top 151 of pattern 150 and top 181 of layer 180 varies by less than about 20% (e.g., less than about 10%, less than about 5%, less than about 2%) across surface 110.
In summary, the thickness of layer 180 is small relative to the cross-sectional dimension of surface 130 of LED100, which is typically about 1 millimeter x1 millimeters. Since layer 180 is uniformly deposited on surface 110, the phosphor material in layer 180 is substantially pumped (pumped) by the light emitted through surface 110. The phosphor layer 180 is relatively thin compared to the dimensions of the surface 110 of the LED100 such that light emitted by the light-generating region 130 is converted to lower wavelength light in the phosphor layer 180 approximately uniformly over the entire surface 110 of the LED 100. Thus, the relatively thin, uniform phosphor layer 180 produces a uniform spectrum of white light emitted from the LED100 as a function of the position of the surface 110.
In any case, the LED100 can be fabricated as desired. In general, the fabrication of the LED100 involves various deposition, laser processing, lithography, and etching steps.
Referring to fig. 15, an LED wafer 500 comprising a stack of LED materials deposited on a sapphire substrate 502 is already available and can be purchased from a supplier. On the sapphire substrate 502, a buffer layer 504, an n-doped Si: GaN layer 506, an AlGaN/GaN heterojunction or superlattice provided with a current diffusion layer 180, an InGan/GaN multiple quantum well light generation region 510, and a p-doped Mg: GaN layer 512 are sequentially disposed. Commercially available LED wafers are about 2-3 inches in diameter, and after processing the wafer, the wafer can be cut to obtain a plurality of LED dies to form individual devices. Multiple wafer batch processing steps are used to position the p-doped layer 128 on the same side of the light-generating region 130 as the image layer 126 prior to cutting the wafer.
Referring to fig. 16, a relatively thin nickel layer 520 is deposited (e.g., using electron beam evaporation) on p-doped layer 512 to form a p-type ohmic contact. A silver layer 522 is deposited (e.g., using electron beam evaporation) on the nickel layer 520. A relatively thick layer of nickel 524 is deposited on silver layer 522 (e.g., using electron beam evaporation). Layer 524 may act as a diffusion barrier to reduce diffusion of impurities into silver layer 522. A layer 526 of gold is deposited on the nickel layer 524 (e.g., using resistive evaporation). The LED wafer 500 is then annealed at 400 ℃ -.
Referring to fig. 17, a carrier wafer 600 is fabricated by successively depositing (e.g., using e-beam evaporation) an aluminum contact layer 604 on a p-doped silicon wafer 602. A gold layer 608 is deposited (e.g., using thermal evaporation) on layer 604 and an AuSn bonding layer 610 is deposited (e.g., using thermal evaporation) on layer 608. The LED wafer 500 is annealed at 350-.
The wafers 500 and 600 are bonded (e.g., using a thermo-mechanical press) together by contacting the layer 526 with the layer 610 of the carrier wafer 600 using a pressure of 0 to 0.5Mpa and a temperature of 200-400 degrees celsius. Layer 510 and layer 610 form an eutectic bond (eutectic bond). The combined wafer sandwich is then cooled and the bonded sandwich is removed from the press.
After bonding, the substrate 502 is removed from the bonded structure by a laser lift-off process. Laser lift-off processes are described, for example, in U.S. patents 6,420,242, 6,071,795, which are incorporated herein by reference. In some embodiments, a 248 nm laser beam is irradiated from the substrate 502 through the substrate to locally heat the n-doped Si: GaN layer 506 near contact with the sapphire substrate 502, decomposing sub-layers of the n-doped layer 506. The wafer sandwich is then heated to above the melting point of gallium, at which point it is removed from the sandwich by a lateral force (e.g., using a cotton swab) applied to the sapphire substrate 502. The exposed GaN surface is then cleaned (e.g., using a hydrochloric acid bath) to remove liquid gallium from the surface. Typically, when the sapphire substrate 502 is removed from the GaN epitaxial stack layers, the stress in the stack (due to the lattice mismatch between the substrate 502 and the stack) is removed from the stack. This allows the stack of layers to form a warped or curved shape when bonded to substrate 502 and a relatively flat shape on the exposed surface of n-doped layer 506. The coefficient of thermal expansion needs to be considered when carrier 120 is selected to prevent cracking during the laser lift-off process. Further, by substantially performing the field overlap and repetition process in the step, cracks in the laser lift-off process can be reduced.
Referring to fig. 18, the exposed surface of the n-doped Si: GaN layer 506 is etched (e.g., using a reactive ion etching process) to obtain the desired thickness of the layer that will be used in the final device (fig. 19). After etching, the surface of the etched GaN layer 506 has a rough surface texture 700 due to the etching. The rough surface 700 may be planarized, thinned (e.g., using a chemical-mechanical process) to obtain a final thickness for the layer 506 and a surface smoothness of less than about 5 nanometers root mean square. Alternatively, the roughened surface 700 can be maintained to help increase the extraction efficiency of the device by introducing a localized non-planar contact to the device 100. With a fine smooth surface, a rough surface increases the probability that when a light ray strikes surface 700 multiple times, it will eventually strike surface 700 and pass through surface 700 at less than the critical angle of Snell's Law.
After etching, a dielectric function pattern in n-doped layer 506 is fabricated: a planar layer 702 of a material (e.g., a polymer) is first placed (e.g., using spin-coating) on the n-doped GaN layer 506, and a barrier layer 704 is placed (e.g., spin-coated) on the planar layer 702. A pattern that forms the photonic lattice in the LED is then created in n-doped layer 506 by a nanoimprint printing and etching process. First, a mold defining the desired pattern is imprinted in the barrier layer 704 and formed in a portion-by-portion fashion on all surfaces of the wafer to print the features of the pattern 150 and leave areas for the deposition of n-contacts in subsequent processes. Preferably, the surface of n-doped layer 506 is substantially planar during this process. For example, X-ray printing or deep ultraviolet printing may also be used to create the pattern in the barrier layer 704. As an alternative to depositing a barrier layer on the wafer and creating a pattern on the barrier layer of the wafer, an etch mask may be pre-deposited on the surface of layer 506.
The patterned layer 704 is used as a mask to transfer a pattern to the planar layer 702 (e.g., using a reactive-ion etching process). The planarization layer is essentially used as a mask to transfer the pattern to n-doped layer 506. After etching the GaN layer 506, the planarization layer is removed (e.g., using oxygen-based reactive ion etching).
After transferring the pattern to n-doped layer 506, a layer of phosphorous material may optionally be placed (e.g., spin coated) onto the patterned surface of n-doped layer 506. In some embodiments, the phosphor can be conformally coated on the patterned surface (along the bottom and sides of the openings in the patterned surface, with substantially no voids). Alternatively, a layer of encapsulation material may be placed on the surface of patterned n-doped layer 506 (e.g., by CVD, sputtering, suspension with a liquid binder formed by subsequent evaporation). In some embodiments, the encapsulation material may include one or more phosphor materials. In some embodiments, the phosphorus material may be compressed to achieve a thickness uniformity of less than about 20%, about 15%, about 10%, about 5%, or about 2% of the average thickness of the phosphorus material. In some embodiments, the encapsulation material comprising phosphorus may be uniformly applied over the patterned surface.
After creating the dielectric function pattern in n-doped layer 506, individual LED dies can be cut from the wafer. Once the wafer handling and wafer testing is complete, individual LEDs are separated and fabricated for packaging and testing. A side passivation step and/or a pre-separation deep bevel etch step may be used to reduce potential damage to the electrical and/or optical characteristics of the patterned LED that occurs during wafer dicing. The size of the individual LEDs can be any size up to the size of the wafer itself, but the individual LEDs are typically square or rectangular with side edges between about 0.5 mm and 5 mm. To create the die, standard photo-printing techniques are used to define the locations of contact pads on the wafer for energizing the device, and ohmic contacts are evaporated (e.g., using electron beam evaporation) onto the desired locations.
If an LED die is packaged, the package generally facilitates light collection while also providing mechanical and environmental protection of the die. For example, a transparent cover plate may be encapsulated over the LED die to protect the patterned surface of 506 when no encapsulation material is used. Glass frit (glass frit) melted in a furnace is used to adhere the cover slip 140 to the support 142. The opposite ends of the support are connected using a top weld or epoxy, for example. The support is typically nickel plated to facilitate soldering to the gold plated surface of the package. It is believed that the absence of a layer of encapsulant material allows for a higher allowable electrical load per unit area in the patterned surface LED 100. Degradation of the encapsulant is typically a common failure mechanism for standard LEDs and may be avoided without the use of a layer of encapsulant material.
Since the LEDs are cut from a large area flat wafer, their light output per unit area does not decrease with area. Also, since the cross-section of each LED cut from the wafer is only slightly larger than the light emitting surface area of the LED, a large number of individually addressable LEDs can be tightly packed in an array. If one LED does not work (due to a large defect), the performance of the array is not significantly affected since the individual devices are tightly packed.
While some embodiments have been described, other embodiments are possible.
For example, while certain thicknesses and associated layers of the light emitting device are described above, other thicknesses are possible. In general, the light emitting device can have any desired thickness, and the various layers in the light emitting device can have any desired thickness. In general, the thicknesses of the layers in multi-layer stack 122 are selected to increase the spatial overlap of the optical modes in light-generating region 130 to increase the output of light generated in region 130. Example thicknesses of certain layers in the light emitting device include the following. In some embodiments, layer 134 has a thickness of at least about 100 nanometers (e.g., at least about 200 nanometers, at least about 300 nanometers, at least about 400 nanometers, at least about 500 nanometers) and/or at most about 10 micrometers (e.g., at most about 5 micrometers, at most about 3 micrometers, at most about 1 micrometer). In some embodiments, layer 128 has a thickness of at least about 10 nanometers (e.g., at least about 25 nanometers, at least about 40 nanometers) and/or at most about 1 micrometer (e.g., at most about 500 nanometers, at most about 100 nanometers). In some embodiments, layer 126 has a thickness of at least about 10 nanometers (e.g., at least about 50 nanometers, at least about 100 nanometers) and/or at most about 1 micrometer (e.g., at most about 500 nanometers, at most about 250 nanometers). In certain embodiments, the light-generating region 130 has a thickness of at least about 10 nanometers (e.g., at least about 25 nanometers, at least about 50 nanometers, at least about 100 nanometers) and/or at most about 500 nanometers (e.g., at most about 250 nanometers, at most about 10 nanometers).
By way of example, while light emitting diodes are described, other light emitting devices having the above-described features (e.g., patterns, processes) may be used. Such light emitting devices include lasers and optical amplifiers.
As another example, while the current spreading layer 132 has been described as a separate layer from the n-doped layer 134, in some embodiments the current spreading layer may be integral with (e.g., part of) the layer 134. In such embodiments, the current spreading layer may be a relatively highly n-doped portion of layer 134 or a homogeneous interface (e.g., AlGaN/GaN) to form a 2-dimensional electron gas.
In another example, although some semiconductor materials are described, other semiconductor materials may be used. In general, any semiconductor material that can be used (e.g., III-V semiconductor material, organic semiconductor material, silicon) can be used in the light emitting device. Examples of other light emitting materials include InGaAsP, AlInGaN, AlGaAs, InGaAlP. Organic light emitting materials include, for example, aluminum tris-8 hydroxyquinate (Alq)3) Such as poly [ 2-methoxy-5- (2-ethylhexyloxy) -1, 4-p-phenylenediethylene]Or a conjugated polymer of p-phenylene vinylene (MEH-PPV).
In yet another example, although larger area LEDs have been described, the LEDs may also be small area LEDs (e.g., LEDs with edges smaller than about 300 microns on the standard).
In another example, although a dielectric function spatially varying according to a pattern has been described in which the pattern is formed of holes, the pattern may be formed in other ways. For example, in suitable layers, the pattern may be formed in the form of continuous veins or discontinuous veins. Furthermore, patterns with varying dielectric functions can be obtained without the use of holes or veins. For example, materials having different dielectric functions may be patterned on the appropriate layers. Combinations of these graphics may also be used.
In yet another example, although layer 126 has been described as being formed of silver, other materials may be used. In some embodiments, layer 126 is formed of a material that can reflect at least about 50% of light rays generated by the light-generating region that impinge on a layer of reflective material located between the support and the multi-layer stack of materials. Examples of such materials include distributed bragg mirror stacks and various metals and alloys such as aluminum, and aluminum-containing alloys.
In yet another example, the support 120 may be formed of various materials. Examples of materials from which support 120 is formed include copper, copper tungsten, aluminum nitride, silicon carbide, beryllium oxide, diamond, TEC, and aluminum.
In another example, although layer 126 has been described as being formed of a heat sink material, in some embodiments, the light emitting device may include a separate layer (e.g., disposed between layer 126 and submount 120) that acts as a heat sink. In such embodiments, the layer 126 may or may not be formed of a material that may act as a heat sink.
In yet another example, although it has been described that the variable pattern in the dielectric function only enters the n-doped layer 134 (which may substantially reduce the likelihood of surface recombination carrier losses) in addition to utilizing the entire light-generating region, in some embodiments, the variable pattern in the dielectric function may extend beyond the n-doped layer (e.g., into the current spreading layer 132, the light-generating region 130, and/or the p-doped layer 128).
In another example, although embodiments have been described in which air may be placed between the surface 110 and the cover plate slips 140, in some embodiments, other materials than air may be placed between the surface 110 and the cover plate slips. Typically, such materials have a refractive index of at least about 1 and less than about 1.5 (e.g., less than about 1.4, less than about 1.3, less than about 1.2, less than about 1.1). Examples of such materials include nitrogen, air, or a gas of higher thermal conductivity. In these embodiments, surface 110 may or may not be patterned. For example, the surface 110 may not be patterned, but rather rough (i.e., features having an arbitrary distribution, various sizes and profiles less than λ/5).
In some embodiments, the light emitting device may include a layer of phosphor material coated on the surface 110, the cover slip 140, and the support 142.
In some embodiments, the light emitting device includes a cover plate layer 140 having a phosphor material therein. In these embodiments, the surface 110 may or may not be patterned.
In an alternative implementation, the light emitted by light-generating region 130 is UV (or violet, blue), and phosphor layer 180 includes a red phosphor material (e.g., L)2O2S:Eu3+) Green phosphor material (for example: cu, Al, Mn), blue phosphor material (e.g.: (Sr, Ca, Ba, Mg)10(PO4)6Cl:Eu2+) A mixture of (a).
Claims (46)
1. A light emitting device comprising:
a multi-layer stack of materials comprising a layer of n-doped material, a layer of p-doped material, and a light-generating region; and
a reflective material layer capable of reflecting at least 50% of light rays generated by the light-generating region that impinge on the reflective material layer,
wherein,
a surface of the n-doped material layer is configured such that light generated by the light-generating region can be emitted from the light-emitting device through the surface of the n-doped material layer;
the surface of the layer of n-doped material has a dielectric function that varies spatially according to a non-periodic pattern,
the non-periodic pattern has an ideal lattice constant and a detuning parameter with a value greater than zero; and
the distance between the p-doped material layer and the reflective material layer is less than the distance between the n-doped material layer and the reflective material layer.
2. The light-emitting device of claim 1, wherein the multi-layer stack of materials comprises a multi-layer stack of semiconductor materials.
3. The light emitting device of claim 1, wherein the n-doped material comprises an n-doped semiconductor material and the p-doped material comprises a p-doped semiconductor material.
4. The light-emitting device of claim 1, wherein the light-generating region is located between the layer of n-doped material and the layer of p-doped material.
5. The light-emitting device of claim 1, further comprising a support that supports the multi-layer stack of materials.
6. The light-emitting device of claim 1, further comprising a p-ohmic contact layer between the layer of p-doped material and the layer of reflective material.
7. The light-emitting device of claim 1, further comprising a current spreading layer between the layer of n-doped material and the light-generating region.
8. The light-emitting device of claim 1, wherein the multi-layer stack of materials comprises a semiconductor material.
9. The light-emitting device of claim 8, wherein the semiconductor material is selected from the group consisting of III-V semiconductor materials, organic semiconductor materials, and silicon.
10. The light-emitting device of claim 1, wherein the pattern does not extend into the light-generating region.
11. The light-emitting device of claim 1, wherein the pattern does not extend beyond the layer of n-doped material.
12. The light-emitting device of claim 1, wherein the pattern extends beyond the layer of n-doped material.
13. The light-emitting device of claim 1, further comprising an electrical contact configured to inject an electrical current into the light-emitting device.
14. The light-emitting device of claim 13, wherein the electrical contacts are configured to vertically inject current into the light-emitting device.
15. The light emitting device of claim 1, wherein the pattern is formed in part by elements selected from the group consisting of openings in a surface of the layer of n-doped material, pillars in the layer of n-doped material, continuous veins in the layer of n-doped material, non-continuous veins in the layer of n-doped material, and combinations thereof.
16. The light-emitting device of claim 1, wherein the pattern is formed in part by holes in the layer of n-doped material.
17. The light-emitting device of claim 1, wherein the pattern is configured such that light emitted from the surface of the layer of n-doped material has a spectrum of radiation modes that is substantially the same as a characteristic emission spectrum of the light-generating region.
18. The light emitting device of claim 1, wherein the light emitting device is selected from the group consisting of a light emitting diode, a laser, an optical amplifier, and combinations thereof.
19. The light-emitting device of claim 1, wherein the light-emitting device comprises a light-emitting diode.
20. The light emitting device of claim 1, wherein the light emitting device is selected from the group consisting of an OLED, a flat surface emitting LED, a HBLED, and combinations thereof.
21. The light-emitting device of claim 1, wherein a surface of the layer of n-doped material has features with a size less than λ/5, where λ is a wavelength of light that can be generated by the light-generating region and that can emerge from the light-emitting device via the surface of the layer of n-doped material.
22. The light-emitting device of claim 1, wherein the non-periodic pattern comprises a non-periodic pattern selected from the group consisting of a quasicrystal pattern, a robinson pattern, and an ann pattern.
23. A light emitting device comprising:
a multi-layer stack of materials comprising a light-generating region and a first layer supported by the light-generating region, a surface of the first layer being configured such that light generated by the light-generating region can be emitted from the light-emitting device through the surface of the first layer, and the surface of the first layer having a dielectric function that varies spatially according to a non-periodic pattern, wherein the non-periodic pattern has an ideal lattice constant and a detuning parameter with a value greater than zero; and
a reflective material layer capable of reflecting at least 50% of light rays generated by the light-generating region that impinge on the reflective material layer;
wherein the light-generating region is located between the layer of reflective material and the first layer, and the pattern does not extend beyond the first layer.
24. The light-emitting device of claim 23, wherein the multi-layer stack of materials comprises a multi-layer stack of semiconductor materials.
25. The light-emitting device of claim 24, wherein the first layer comprises a layer of n-doped semiconductor material, the multi-layer stack of materials further comprising a layer of p-doped semiconductor material.
26. The light-emitting device of claim 25, wherein the light-generating region is located between the layer of n-doped semiconductor material and the layer of p-doped semiconductor material.
27. The light-emitting device of claim 26, further comprising a support that supports the multi-layer stack of materials.
28. The light-emitting device of claim 27, wherein the distance between the layer of p-doped semiconductor material and the layer of reflective material is less than the distance between the layer of n-doped semiconductor material and the layer of reflective material.
29. The light-emitting device of claim 28, further comprising a p-ohmic contact layer between the layer of p-doped material and the layer of reflective material.
30. The light-emitting device of claim 23, further comprising a current spreading layer between the first layer and the light-generating region.
31. The light-emitting device of claim 23, wherein the multi-layer stack of materials comprises a semiconductor material.
32. The light-emitting device of claim 31, wherein the semiconductor material is selected from the group consisting of III-V semiconductor materials, organic semiconductor materials, and silicon.
33. The light-emitting device of claim 23, wherein the pattern does not extend into the light-generating region.
34. The light-emitting device of claim 23, further comprising electrical contacts for injecting current into the light-emitting device.
35. The light-emitting device of claim 34, wherein the electrical contacts are for vertically injecting current into the light-emitting device.
36. The light-emitting device of claim 23, wherein the pattern is formed in part from a member selected from the group consisting of openings in the surface of the first layer, posts in the first layer, continuous veins in the first layer, non-continuous veins in the first layer, and combinations thereof.
37. The light-emitting device of claim 23, wherein the pattern is formed in part by holes in the first layer.
38. The light-emitting device of claim 23, wherein the pattern has a detuning parameter of at most 25% of an ideal lattice constant of the pattern.
39. The light-emitting device of claim 23, wherein the pattern has a detuning parameter that is at least 1% of an ideal lattice parameter of the pattern.
40. The light-emitting device of claim 25, wherein the pattern of dielectric function variations corresponds to an ideal pattern that is substantially randomly detuned.
41. The light-emitting device of claim 23, wherein the pattern is configured such that light emitted from the surface of the first layer has a spectrum of radiation patterns that is substantially the same as a characteristic emission spectrum of the light-generating region.
42. The light-emitting device of claim 23, wherein the light-emitting device is selected from the group consisting of a light-emitting diode, a laser, an optical amplifier, and combinations thereof.
43. The light-emitting device of claim 23, wherein the light-emitting device comprises a light-emitting diode.
44. The light-emitting device of claim 23, wherein the light-emitting device is selected from the group consisting of an OLED, a flat surface emitting LED, a HBLED, and combinations thereof.
45. The light-emitting device of claim 23, wherein the surface of the first layer has features with a size less than λ/5, where λ is a wavelength of light that can be generated by the light-generating region and that can emerge from the light-emitting device via the surface of the first layer.
46. The light-emitting device of claim 43, wherein the non-periodic pattern comprises a non-periodic pattern selected from the group consisting of a quasicrystal pattern, a Robinson pattern, and an Anman pattern.
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JP2000068554A (en) * | 1998-08-21 | 2000-03-03 | Sharp Corp | Semiconductor light emitting element |
TW437104B (en) * | 1999-05-25 | 2001-05-28 | Wang Tien Yang | Semiconductor light-emitting device and method for manufacturing the same |
JP4643794B2 (en) * | 2000-04-21 | 2011-03-02 | 富士通株式会社 | Semiconductor light emitting device |
JP3963068B2 (en) * | 2000-07-19 | 2007-08-22 | 豊田合成株式会社 | Method for producing group III nitride compound semiconductor device |
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-
2004
- 2004-04-06 CN CN2008101661400A patent/CN101459214B/en not_active Expired - Fee Related
- 2004-04-06 CN CNA2004800102071A patent/CN1833468A/en active Pending
- 2004-04-06 CN CN2004800102495A patent/CN1774811B/en not_active Expired - Lifetime
- 2004-04-06 CN CN2004800102387A patent/CN101268553B/en not_active Expired - Lifetime
- 2004-04-06 CN CNB2004800103695A patent/CN100435346C/en not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
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CN101459214A (en) | 2009-06-17 |
CN100435346C (en) | 2008-11-19 |
CN1774813A (en) | 2006-05-17 |
CN101459214B (en) | 2011-12-28 |
CN101268553B (en) | 2010-09-08 |
CN1774811A (en) | 2006-05-17 |
CN101268553A (en) | 2008-09-17 |
CN1833468A (en) | 2006-09-13 |
CN1774811B (en) | 2010-09-01 |
CN1774812A (en) | 2006-05-17 |
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