Nothing Special   »   [go: up one dir, main page]

CN100566111C - A kind of six switch five-power level voltage source type inverters and control method thereof - Google Patents

A kind of six switch five-power level voltage source type inverters and control method thereof Download PDF

Info

Publication number
CN100566111C
CN100566111C CNB2007101445233A CN200710144523A CN100566111C CN 100566111 C CN100566111 C CN 100566111C CN B2007101445233 A CNB2007101445233 A CN B2007101445233A CN 200710144523 A CN200710144523 A CN 200710144523A CN 100566111 C CN100566111 C CN 100566111C
Authority
CN
China
Prior art keywords
igbt
igbt1
circuit
igbt3
igbt6
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2007101445233A
Other languages
Chinese (zh)
Other versions
CN101174801A (en
Inventor
曾繁鹏
孙鹏飞
谭有广
陈天凯
刘佳鲁
陈永昌
赵倬
李晓玉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HEILONGJIANG BUSINESS VOCATIONAL TECHNOLOGY COLLEGE
Original Assignee
HEILONGJIANG BUSINESS VOCATIONAL TECHNOLOGY COLLEGE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HEILONGJIANG BUSINESS VOCATIONAL TECHNOLOGY COLLEGE filed Critical HEILONGJIANG BUSINESS VOCATIONAL TECHNOLOGY COLLEGE
Priority to CNB2007101445233A priority Critical patent/CN100566111C/en
Publication of CN101174801A publication Critical patent/CN101174801A/en
Application granted granted Critical
Publication of CN100566111C publication Critical patent/CN100566111C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Inverter Devices (AREA)

Abstract

A kind of six switch five-power level voltage source type inverters and control method thereof, it relates to the technical field of a kind of voltage with multiple levels source type inversion.It is comparatively complicated in order to solve the topological structure and the control method that have many level power translation circuit now, and has suppressed the problem that multi-electrical level inverter is promoted the use of in practice.Be connected across on two outputs of rectification full-bridge B after its C1～C2 series connection, the voltage control assembly that the output of rectification full-bridge B is connected into by IGBT1～2 connects an input of the H bridge type assembly that is connected into by IGBT3～6, another output of another input termination rectification full-bridge B of H bridge.Its method step is: establish t 0～t 18, t 1'～t 18' be the moment that sinusoidal wave positive half wave, negative half-wave and triangular wave intersect; DSP circuit (1) is pressed t by driving/photoelectric isolating circuit (2) control IGBT1～6 0～t 18, t 1'～t 18' corresponding conducting constantly with close.The employed component number of circuit structure of the present invention is few, and its control method is simple, reaction speed is fast, and can large-scale popularization use.

Description

A kind of six switch five-power level voltage source type inverters and control method thereof
Technical field
The present invention relates to the technical field of a kind of voltage with multiple levels source type inversion.
Background technology
In recent years, along with the development in an all-round way of power electronics and control technology, power electronic equipment is widely used.People are more and more stronger to the requirement of the high pressure of power electronic equipment, high-power, high frequencyization, low harmonic disturbance.Multi-electrical level inverter has characteristics such as power capacity is big, switching frequency is low, output harmonic wave is little, response speed is fast, Electro Magnetic Compatibility is good.And can make the lower all-controlling power electronics device of withstand voltage reliably be applied to the high-power field, and effectively reduce PWM and control the high order harmonic component that produces, but, the topological structure of many level power translation circuit and control method be comparatively complicated, suppressed multi-electrical level inverter promoting the use of in practice.
Summary of the invention
The topological structure and the control method that the objective of the invention is in order to solve existing many level power translation circuit are comparatively complicated, and have suppressed the problem that multi-electrical level inverter is promoted the use of in practice.And then provide a kind of six switch five-power level voltage source type inverters and control method thereof.
The inventive system comprises rectification full-bridge, first electrochemical capacitor, second electrochemical capacitor, an IGBT, the 2nd IGBT, the 3rd IGBT, the 4th IGBT, the 5th IGBT, the 6th IGBT, inductance, DSP circuit, driving/photoelectric isolating circuit;
Two ac input ends of rectification full-bridge connect ac power output, the cathode output end of rectification full-bridge, the positive terminal of first electrochemical capacitor connects the collector electrode of an IGBT, the negative pole end of first electrochemical capacitor, the emitter of the 2nd IGBT connects the positive terminal of second electrochemical capacitor, the collector electrode of the 2nd IGBT, the emitter of the one IGBT, the collector electrode of the 3rd IGBT connects the collector electrode of the 5th IGBT, the emitter of the 3rd IGBT, the collector electrode of the 4th IGBT connects an end of inductance, the other end of inductance is first output of described inverter, the emitter of the 5th IGBT connects the collector electrode of the 6th IGBT and is second output of described inverter, the emitter of the 4th IGBT, the emitter of the 6th IGBT, the negative pole end of second electrochemical capacitor connects the cathode output end of rectification full-bridge, the grid of the one IGBT, the grid of the 2nd IGBT, the grid of the 3rd IGBT, the grid of the 4th IGBT, the grid of the 5th IGBT, the grid of the 6th IGBT connects six drive control signal outputs of driving/photoelectric isolating circuit respectively, and the control signal input bus end of driving/photoelectric isolating circuit connects the control signal output bus end of DSP circuit.
A kind of six switch five-power level voltage source type inversion controlling method steps based on above-mentioned described device are:
Step 1, whole device power up startup, establish t 0For sine wave has same frequency f with four c, identical peak-to-peak value A mThe initial time of triangular wave, t 1～t 18Be positive half wave and described four moment that triangular wave intersects of sine wave, t ' 1～t ' 18Be negative half-wave and described four moment that triangular wave intersects of sine wave;
Described t 1～t 18, t ' 1～t ' 18Selection rule be: adopt four and have same frequency f cWith identical peak-to-peak value A mFirst triangular wave, second triangular wave, the 3rd triangular wave, the 4th triangular wave and a frequency be f m, amplitude is A cSine wave compare; The instantaneous value of first triangular wave is more than or equal to zero, and the instantaneous value of second triangular wave is greater than zero, and the instantaneous value minimum value of second triangular wave equals the instantaneous value maximum of first triangular wave, and from t 0Constantly first triangular wave and second triangular wave begin forward by separately mean point simultaneously increases; The instantaneous value of the 3rd triangular wave is smaller or equal to zero, and the instantaneous value of the 4th triangular wave is less than zero, and the instantaneous value maximum of the 4th triangular wave equals the instantaneous value minimum value of the 3rd triangular wave, and from t 0Constantly the 3rd triangular wave and the 4th triangular wave begin negative sense by separately mean point simultaneously and increase t 0Sinusoidal wave constantly instantaneous value is zero, in the sinusoidal wave moment that intersects with described first to fourth triangular wave, is t 1～t 18, t ' 1～t ' 18
Step 2, at moment t 0The time, the DSP circuit is controlled the 4th IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, and an IGBT, the 2nd IGBT, the 3rd IGBT and the 5th IGBT end, and remain to t constantly 1The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 2The time DSP circuit control the 4th IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 2nd IGBT, the 3rd IGBT and the 5th IGBT end, and remain to t constantly 3The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 4The time DSP circuit 1 control an IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 5The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 6The time DSP circuit control an IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 7The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 8The time DSP circuit control an IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 9The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and reach the maximum of sinusoidal wave positive half wave;
Step 3, remain to t constantly 10The time DSP circuit control an IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 11The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 12The time DSP circuit control an IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 13The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 14The time DSP circuit control an IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 15The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 16The time DSP circuit control the 4th IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 2nd IGBT, the 3rd IGBT and the 5th IGBT end, and remain to t constantly 17The time DSP circuit control the 2nd IGBT, the 3rd IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 4th IGBT and the 5th IGBT end, and remain to t constantly 18The time DSP circuit control the 4th IGBT and the 6th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 2nd IGBT, the 3rd IGBT and the 5th IGBT end, and reach the sinusoidal wave positive half wave zero crossing to negative half-wave;
Step 4, remain to t ' constantly 1The time, the DSP circuit is controlled the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, and an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 2The time DSP circuit control the 3rd IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 2nd IGBT, the 4th IGBT and the 6th IGBT end, and remain to t ' constantly 3The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 4The time DSP circuit control an IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 5The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 6The time DSP circuit control an IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 7The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 8The time DSP circuit control an IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 9The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and reach the maximum of sinusoidal wave negative half-wave;
Step 5, remain to t ' constantly 10The time DSP circuit control an IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 11The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 12The time DSP circuit control an IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 13The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 14The time DSP circuit control an IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, the 2nd IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 15The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 16The time DSP circuit control the 3rd IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 2nd IGBT, the 4th IGBT and the 6th IGBT end, and remain to t ' constantly 17The time DSP circuit control the 2nd IGBT, the 4th IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 3rd IGBT and the 6th IGBT end, and remain to t ' constantly 18The time DSP circuit control the 3rd IGBT and the 5th IGBT conducting by driving/photoelectric isolating circuit, an IGBT, the 2nd IGBT, the 4th IGBT and the 6th IGBT end, and reach the sinusoidal wave negative half-wave zero crossing to positive half wave;
Step 6, return operating procedure two.
The employed component number of circuit structure of the present invention is few, and its control method is simple, response speed is fast, and has realized long, the advantage of Maintenance and Repair easily of cheap for manufacturing cost, life-span, and then can large-scale popularization use.Main feature of the present invention is:
1, the desired power switching device is few.This invention is to increase by two power switchs on the basis of traditional H bridge voltage source inventer.Like this, by these six power switchs, just can be implemented in five kinds of different level of AC side output.
2, need not clamp diode and clamp capacitor.The circuit topological structure that the present invention proposes does not need clamp diode and clamp capacitor.Reduce the usage quantity of device, simplified circuit structure.
3, control is simple.Because switching device is few, do not have characteristics such as clamp diode and clamp capacitor, and this circuit topological structure can be divided into two parts: the first that forms by an IGBT and the 2nd IGBT; Traditional H bridge type inverter of forming by the 3rd IGBT, the 4th IGBT, the 5th IGBT and the 6th IGBT.The effect difference of these two parts, wherein first is responsible for control inverter ac output end voltage for ± E or be ± 2E; And concrete output polarity (promptly+,-number choose) be responsible for control by second portion.So the control to this circuit is fairly simple, according to different needs, control respectively.
Description of drawings
Fig. 1 is the integrated circuit structural representation of apparatus of the present invention, and Fig. 2 is t in the control method of the present invention 1～t 18, t ' 1～t ' 18The selection rule schematic diagram of moment point, Fig. 3 are the output voltage waveforms of instantiation (inverter), and Fig. 4 is the voltage oscillogram at the load resistance two ends of instantiation (inverter).
Embodiment
Embodiment one: 1 present embodiment is described in conjunction with the accompanying drawings, present embodiment is made up of rectification full-bridge B, electrochemical capacitor C1, electrochemical capacitor C2, IGBT1 (igbt), IGBT2, IGBT3, IGBT4, IGBT5, IGBT6, inductance L, DSP circuit 1, driving/photoelectric isolating circuit 2;
Two ac input ends of rectification full-bridge B connect ac power output, the cathode output end of rectification full-bridge B, the positive terminal of electrochemical capacitor C1 connects the collector electrode of IGBT1, the negative pole end of electrochemical capacitor C1, the emitter of IGBT2 connects the positive terminal of electrochemical capacitor C2, the collector electrode of IGBT2, the emitter of IGBT1, the collector electrode of IGBT3 connects the collector electrode of IGBT5, the emitter of IGBT3, the collector electrode of IGBT4 connects an end of inductance L, the other end of inductance L is first output of described inverter, the emitter of IGBT5 connects the collector electrode of IGBT6 and is second output of described inverter, the emitter of IGBT4, the emitter of IGBT6, the negative pole end of electrochemical capacitor C2 connects the cathode output end of rectification full-bridge B, the grid of IGBT1, the grid of IGBT2, the grid of IGBT3, the grid of IGBT4, the grid of IGBT5, the grid of IGBT6 connects six drive control signal outputs of driving/photoelectric isolating circuit 2 respectively, and the control signal input bus end of driving/photoelectric isolating circuit 2 connects the control signal output bus end of DSP circuit 1.
Its six switch five-power level voltage source type inversion controlling method steps are:
Step 1, whole device power up startup, establish t 0For sine wave has same frequency f with four c, identical peak-to-peak value A mThe initial time of triangular wave, t 1～t 18Be positive half wave and described four moment that triangular wave intersects of sine wave, t ' 1～t ' 18Be negative half-wave and described four moment that triangular wave intersects of sine wave;
t 1～t 18, t ' 1～t ' 18Selection rule be (in conjunction with the accompanying drawings 2 explanation): adopt four and have same frequency f cTriangular wave (a with identical peak-to-peak value 1, a 2, b 1, b 2) with a frequency be f m, amplitude is A mSine wave compare; Triangular wave a 1Instantaneous value more than or equal to zero, a 2Instantaneous value greater than zero, a 2Minimum value equal a 1Maximum, and from t 0Moment a 1And a 2Simultaneously beginning forward by separately mean point increases; Triangular wave b 1Instantaneous value smaller or equal to zero, b 2Instantaneous value less than zero, b 2Maximum equal b 1Minimum value, and from t 0Moment b 1And b 2Simultaneously beginning negative sense by separately mean point increases, and in the sinusoidal wave moment that intersects with carrier wave, is t 1～t 18, t ' 1～t ' 18
Step 2, at moment t 0The time, DSP circuit 1 is by 2 control IGBT4 and the IGBT6 conductings of driving/photoelectric isolating circuit, and IGBT1, IGBT2, IGBT3 and IGBT5 end, and remain to t constantly 1The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 2The time DSP circuit 1 by 2 control IGBT4 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT2, IGBT3 and IGBT5 end, and remain to moment t 3The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 4The time DSP circuit 1 by 2 control IGBT1, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT4 and IGBT5 end, and remain to moment t 5The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 6The time DSP circuit 1 by 2 control IGBT1, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT4 and IGBT5 end, and remain to moment t 7The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 8The time DSP circuit 1 by 2 control IGBT1, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT4 and IGBT5 end, and remain to moment t 9The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and reach the maximum of the positive half wave of sine wave;
Step 3, remain to t constantly 10The time DSP circuit 1 by 2 control IGBT1, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT4 and IGBT5 end, and remain to moment t 11The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 12The time DSP circuit 1 by 2 control IGBT1, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT4 and IGBT5 end, and remain to moment t 13The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 14The time DSP circuit 1 by 2 control IGBT1, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT4 and IGBT5 end, and remain to moment t 15The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 16The time DSP circuit 1 by 2 control IGBT4 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT2, IGBT3 and IGBT5 end, and remain to moment t 17The time DSP circuit 1 by 2 control IGBT2, IGBT3 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT4 and IGBT5 end, and remain to moment t 18The time DSP circuit 1 by 2 control IGBT4 and the IGBT6 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT2, IGBT3 and IGBT5 end, and reach sinusoidal wave positive half wave to the zero crossing (simulating the positive half wave of complete sine wave) of bearing half-wave;
Step 4, remain to t ' constantly 1The time, DSP circuit 1 is by 2 control IGBT2, IGBT4 and the IGBT5 conductings of driving/photoelectric isolating circuit, and IGBT1, IGBT3 and IGBT6 end, and remain to t ' constantly 2The time DSP circuit 1 by 2 control IGBT3 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT2, IGBT4 and IGBT6 end, and remain to moment t ' 3The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and remain to moment t ' 4The time DSP circuit 1 by 2 control IGBT1, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT3 and IGBT6 end, and remain to moment t ' 5The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and remain to moment t ' 6The time DSP circuit 1 by 2 control IGBT1, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT3 and IGBT6 end, and remain to moment t ' 7The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and remain to moment t ' 8The time DSP circuit 1 by 2 control IGBT1, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT3 and IGBT6 end, and remain to moment t ' 9The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and reach the maximum of the negative half-wave of sine wave;
Step 5, remain to t ' constantly 10The time DSP circuit 1 by 2 control IGBT1, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT3 and IGBT6 end, and remain to moment t ' 11The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and remain to moment t ' 12The time DSP circuit 1 by 2 control IGBT1, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT3 and IGBT6 end, and remain to moment t ' 13The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and remain to moment t ' 14The time DSP circuit 1 by 2 control IGBT1, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT2, IGBT3 and IGBT6 end, and remain to moment t ' 15The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and remain to moment t ' 16The time DSP circuit 1 by 2 control IGBT3 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT2, IGBT4 and IGBT6 end, and remain to moment t ' 17The time DSP circuit 1 by 2 control IGBT2, IGBT4 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT3 and IGBT6 end, and remain to moment t ' 18The time DSP circuit 1 by 2 control IGBT3 and the IGBT5 conductings of drivings/photoelectric isolating circuit, IGBT1, IGBT2, IGBT4 and IGBT6 end, and reach the zero crossing (simulate the positive half wave of complete sine wave) of the negative half-wave of sine wave to positive half wave;
Step 6, return operating procedure two.
Embodiment two: 1 present embodiment is described in conjunction with the accompanying drawings, present embodiment increases on the basis of embodiment one current transformer L1, current transformer L2, current overload protection circuit 3;
Current transformer L1 is arranged on the cathode output end of rectification full-bridge B; current transformer L2 is arranged on second output of inverter; the signal output part of the signal output part of current transformer L1, current transformer L2 connects two signal input parts of current overload protection circuit 3 respectively, and the control signal output ends of current overload protection circuit 3 connects the overcurrent protection signal input end of DSP circuit 1.
Present embodiment can realize the current overload of IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, IGBT6, the protection of rush of current; when the output load short circuits, close IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, IGBT6, burn and protect it not to be damaged.
The model that described IGBT1, IGBT2, IGBT3, IGBT4, IGBT5, IGBT6 select for use all is the insulated gate bipolar transistor IGBT module 2MBI25L-120 of Fuji, the model that DSP circuit 1 is selected for use is TMS320F2812, and the model that driving/photoelectric isolating circuit 2 is selected for use is the M57962 of Mitsubishi.
Instantiation: IGBT1～6 modules of choosing Fuji for power switch pipe are 2MBI25L-120, and maximum pressure-bearing is 1200 volts, and maximum overcurrent is 25 peaces.Driving/photoelectric isolating circuit 2 main the M57962 that adopt Mitsubishi, and make up driving and protective circuit thereof on this basis.The filter inductance L of inverter is 10mH, and the dc voltage of rectification full-bridge B is E Dc1=E Dc2=150V, switching frequency are 1075Hz.DSP circuit 1 control unit core is made of TMS320F2812.In conjunction with Fig. 3, Fig. 4 explanation, have five kinds of level outputs of not expecting (0, ± 150V, ± 300V).And it is done spectrum analysis, and calculate 19 subharmonic, through calculating its THD=9.50%, its harmonic wave mainly concentrates on 15 times and 17 times.Relatively approached sine through the load resistance voltage behind the filter inductance as seen from Figure 4.Voltage waveform shown in Figure 4 is done spectrum analysis, and higher harmonics analyzes 19 subharmonic, through calculating its THD=4.06%.

Claims (3)

1, a kind of six switch five-power level voltage source type inverters, it comprises rectification full-bridge (B), first electrochemical capacitor (C1), second electrochemical capacitor (C2), an IGBT (IGBT1), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3), the 4th IGBT (IGBT4), the 5th IGBT (IGBT5), the 6th IGBT (IGBT6), inductance (L), DSP circuit (1), driving/photoelectric isolating circuit (2);
Two ac input ends that it is characterized in that rectification full-bridge (B) connect ac power output, the cathode output end of rectification full-bridge (B), the positive terminal of first electrochemical capacitor (C1) connects the collector electrode of an IGBT (IGBT1), the negative pole end of first electrochemical capacitor (C1), the emitter of the 2nd IGBT (IGBT2) connects the positive terminal of second electrochemical capacitor (C2), the collector electrode of the 2nd IGBT (IGBT2), the emitter of the one IGBT (IGBT1), the collector electrode of the 3rd IGBT (IGBT3) connects the collector electrode of the 5th IGBT (IGBT5), the emitter of the 3rd IGBT (IGBT3), the collector electrode of the 4th IGBT (IGBT4) connects an end of inductance (L), the other end of inductance (L) is first output of described inverter, the emitter of the 5th IGBT (IGBT5) connects the collector electrode of the 6th IGBT (IGBT6) and is second output of described inverter, the emitter of the 4th IGBT (IGBT4), the emitter of the 6th IGBT (IGBT6), the negative pole end of second electrochemical capacitor (C2) connects the cathode output end of rectification full-bridge (B), the grid of the one IGBT (IGBT1), the grid of the 2nd IGBT (IGBT2), the grid of the 3rd IGBT (IGBT3), the grid of the 4th IGBT (IGBT4), the grid of the 5th IGBT (IGBT5), the grid of the 6th IGBT (IGBT6) connects six drive control signal outputs of driving/photoelectric isolating circuit (2) respectively, and the control signal input bus end of driving/photoelectric isolating circuit (2) connects the control signal output bus end of DSP circuit (1).
2, a kind of six switch five-power level voltage source type inverters according to claim 1 is characterized in that its increase has first current transformer (L1), second current transformer (L2), current overload protection circuit (3);
First current transformer (L1) is arranged on the cathode output end of rectification full-bridge (B); second current transformer (L2) is arranged on second output of inverter; the signal output part of the signal output part of first current transformer (L1), second current transformer (L2) connects two signal input parts of current overload protection circuit (3) respectively, and the control signal output ends of current overload protection circuit (3) connects the overcurrent protection signal input end of DSP circuit (1).
3,, it is characterized in that its method step is based on the control method of described a kind of six switch five-power level voltage source type inverters of claim 1:
Step 1, whole device power up startup, establish t 0For sine wave has same frequency f with four c, identical peak-to-peak value A mThe initial time of triangular wave, t 1～t 18Be positive half wave and described four moment that triangular wave intersects of sine wave, t ' 1～t ' 18Be negative half-wave and described four moment that triangular wave intersects of sine wave,
Described t 1～t 18, t ' 1～t ' 18Selection rule be: adopt four and have same frequency f cWith identical peak-to-peak value A mThe first triangular wave (a 1), the second triangular wave (a 2), the 3rd triangular wave (b 1), the 4th triangular wave (b 2) with a frequency be f m, amplitude is A cSine wave compare; First triangular wave (a 1) instantaneous value more than or equal to zero, the second triangular wave (a 2) instantaneous value greater than zero, the second triangular wave (a 2) the instantaneous value minimum value equal the first triangular wave (a 1) the instantaneous value maximum, and from t 0The moment first triangular wave (a 1) and the second triangular wave (a 2) simultaneously begin forward by separately mean point and increase; The 3rd triangular wave (b 1) instantaneous value smaller or equal to zero, the 4th triangular wave (b 2) instantaneous value less than zero, the 4th triangular wave (b 2) the instantaneous value maximum equal the 3rd triangular wave (b 1) the instantaneous value minimum value, and from t 0The moment the 3rd triangular wave (b 1) and the 4th triangular wave (b 2) simultaneously begin negative sense by separately mean point and increase t 0Sinusoidal wave constantly instantaneous value is zero, in the sinusoidal wave moment that intersects with described first to fourth triangular wave, is t 1～t 18, t ' 1～t ' 18
Step 2, at moment t 0The time, DSP circuit (1) is by driving/photoelectric isolating circuit (2) control the 4th IGBT (IGBT4) and the 6th IGBT (IGBT6) conducting, the one IGBT (IGBT1), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 5th IGBT (IGBT5) end, and remain to t constantly 1The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 2The time DSP circuit (1) control the 4th IGBT (IGBT4) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 5th IGBT (IGBT5) end, and remain to t constantly 3The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 4The time DSP circuit (1) control an IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 5The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 6The time DSP circuit (1) control an IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 7The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 8The time DSP circuit (1) control an IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 9The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and reach the maximum of the positive half wave of sine wave;
Step 3, remain to t constantly 10The time DSP circuit (1) control an IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 11The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 12The time DSP circuit (1) control an IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 13The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 14The time DSP circuit (1) control an IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 15The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 16The time DSP circuit (1) control the 4th IGBT (IGBT4) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 5th IGBT (IGBT5) end, and remain to t constantly 17The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) end, and remain to t constantly 18The time DSP circuit (1) control the 4th IGBT (IGBT4) and the 6th IGBT (IGBT6) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 5th IGBT (IGBT5) end, and reach the zero crossing of the positive half wave of sine wave to negative half-wave;
Step 4, remain to t ' constantly 1The time, DSP circuit (1) is by driving/photoelectric isolating circuit (2) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting, the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 2The time DSP circuit (1) control the 3rd IGBT (IGBT3) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 3The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 4The time DSP circuit (1) control an IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 5The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 6The time DSP circuit (1) control an IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th 1GBT (IGBT6) end, and remain to t ' constantly 7The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 8The time DSP circuit (1) control an IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 9The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and reach the maximum of the negative half-wave of sine wave;
Step 5, remain to t ' constantly 10The time DSP circuit (1) control an IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 11The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 12The time DSP circuit (1) control an IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 13The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 14The time DSP circuit (1) control an IGBT (IGBT1), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the 2nd IGBT (IGBT2), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 15The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 16The time DSP circuit (1) control the 3rd IGBT (IGBT3) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 17The time DSP circuit (1) control the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 3rd IGBT (IGBT3) and the 6th IGBT (IGBT6) end, and remain to t ' constantly 18The time DSP circuit (1) control the 3rd IGBT (IGBT3) and the 5th IGBT (IGBT5) conducting by drivings/photoelectric isolating circuit (2), the one IGBT (IGBT1), the 2nd IGBT (IGBT2), the 4th IGBT (IGBT4) and the 6th IGBT (IGBT6) end, and reach the zero crossing of the negative half-wave of sine wave to positive half wave;
Step 6, return operating procedure two.
CNB2007101445233A 2007-10-30 2007-10-30 A kind of six switch five-power level voltage source type inverters and control method thereof Expired - Fee Related CN100566111C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2007101445233A CN100566111C (en) 2007-10-30 2007-10-30 A kind of six switch five-power level voltage source type inverters and control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2007101445233A CN100566111C (en) 2007-10-30 2007-10-30 A kind of six switch five-power level voltage source type inverters and control method thereof

Publications (2)

Publication Number Publication Date
CN101174801A CN101174801A (en) 2008-05-07
CN100566111C true CN100566111C (en) 2009-12-02

Family

ID=39423119

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2007101445233A Expired - Fee Related CN100566111C (en) 2007-10-30 2007-10-30 A kind of six switch five-power level voltage source type inverters and control method thereof

Country Status (1)

Country Link
CN (1) CN100566111C (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5494095B2 (en) * 2010-03-25 2014-05-14 パナソニック株式会社 Inverter device and vacuum cleaner using the same as a fan motor drive device
CN102522913A (en) * 2011-12-04 2012-06-27 中国科学院电工研究所 Hybrid multi-level current transformation topology based on H full-bridge subunit and control method of hybrid multi-level current transformation topology
CN102624267B (en) * 2012-03-27 2014-07-16 阳光电源股份有限公司 Inverter and application circuit in three-phase system
CN103633868A (en) * 2013-10-17 2014-03-12 宁波绿凯节能科技有限公司 Five-level single phase photovoltaic gird-connected inverter
CN104506063A (en) * 2013-12-27 2015-04-08 宁波绿凯节能科技有限公司 Few-switch five-level inverter and modulation method thereof
JP2016093073A (en) * 2014-11-11 2016-05-23 ニチコン株式会社 Multilevel inverter device
DE102015205267A1 (en) * 2015-03-24 2016-09-29 Siemens Aktiengesellschaft Converter module for a multi-level energy converter
CN106559004B (en) 2015-09-29 2019-04-12 华为技术有限公司 Multi-electrical level inverter
WO2018003827A1 (en) * 2016-07-01 2018-01-04 ローム株式会社 Semiconductor device

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
二极管钳位式多电平逆变器的拓扑结构分析. 吴志红，陶生桂，崔俊国，毛明平.同济大学学报，第31卷第10期. 2003
二极管钳位式多电平逆变器的拓扑结构分析. 吴志红，陶生桂，崔俊国，毛明平.同济大学学报，第31卷第10期. 2003 *

Also Published As

Publication number Publication date
CN101174801A (en) 2008-05-07

Similar Documents

Publication Publication Date Title
CN100566111C (en) A kind of six switch five-power level voltage source type inverters and control method thereof
CN101667789B (en) Inverter circuit used for solar energy photovoltaic grid connection and device thereof
WO2014156003A1 (en) Inverter device
CN101944839B (en) Single-phase five-level power inverter
CN102545582A (en) Bridgeless power factor correction circuit and control method thereof
CN106489233A (en) Multi-electrical level inverter
CN103595281A (en) Five-level voltage source type conversion device
CN103490656A (en) Four-level inverter topological structure based on H-bridge and carrier modulation method thereof
CN102055353B (en) Three-switch double-capacitor three-phase alternating current (AC)-direct current (DC) converter with high power factor
CN106712558B (en) Five level three-phase dual input inverter of high reliability
CN203491923U (en) Five-level voltage source converter
CN202475300U (en) Five-level voltage source inverter
CN102420538B (en) Diode clamping seven-level DC-AC (direct current and alternate current) transformation circuit
CN205356183U (en) Electric current source type three -phase inverter topological structure
CN102437761B (en) Single-phase full bridge three-level inverter and three-phase three-level inverter
CN101976966B (en) Novel auxiliary inverter power supply by using zero-current soft switch technology
CN2829213Y (en) Drive power supply of insulated gate bipolar transistor inverter
CN214851023U (en) Motor driving circuit for power factor correction
CN103595282A (en) Current conversion module circuit of modularized multi-level current converter
CN104836471A (en) Inverter circuit and uninterruptible power supply circuit
CN103187890B (en) Control system of three-phase controlled rectifier
CN205142070U (en) Big power drive system of asynchronous motor
CN204928559U (en) Half -bridge IGBT drive circuit
CN111030489A (en) Flying capacitor type sub-module circuit for modular multilevel converter
NANDHINI et al. New hybrid cascaded multilevel inverter

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20091202

Termination date: 20101030