Nothing Special   »   [go: up one dir, main page]

CN100423245C - Metal silicide nano-wire and its making method - Google Patents

Metal silicide nano-wire and its making method Download PDF

Info

Publication number
CN100423245C
CN100423245C CNB2005101279041A CN200510127904A CN100423245C CN 100423245 C CN100423245 C CN 100423245C CN B2005101279041 A CNB2005101279041 A CN B2005101279041A CN 200510127904 A CN200510127904 A CN 200510127904A CN 100423245 C CN100423245 C CN 100423245C
Authority
CN
China
Prior art keywords
wire
nano
metal silicide
metal
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2005101279041A
Other languages
Chinese (zh)
Other versions
CN1979828A (en
Inventor
顾长志
岳双林
罗强
金爱子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Institute of Physics of CAS
Original Assignee
Institute of Physics of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Institute of Physics of CAS filed Critical Institute of Physics of CAS
Priority to CNB2005101279041A priority Critical patent/CN100423245C/en
Publication of CN1979828A publication Critical patent/CN1979828A/en
Application granted granted Critical
Publication of CN100423245C publication Critical patent/CN100423245C/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Electrodes Of Semiconductors (AREA)

Abstract

The method for preparing metal silicides Nano wire with width being as 7 nm includes following steps: developing a layer of insulation film on substrate of monocrystalline silicon; etching grooves in use for producing metal silicides Nano wires through process technology in Nano scale; using method of metal sputtering and coating by vaporization to deposit layer of metal film on silicon substrate with Nano grooves being prepared; carrying out high temperature annealing to make reaction between metal and monocrystalline silicon exposed on bases of grooves so as to produce metal silicides; using chemical corrosion to eat off unreacted metal on surface; producing discrete metal silicides Nano wires in Nano grooves. The method can control position, shape, and width of wire of metal silicides Nano wire to be made. Thus, the invention is applicable to IC to prepare interconnection wires, source pole, drain pole and grid pole based on need.

Description

Metal silicide nano-wire and preparation method thereof
Technical field
The present invention relates to metal nano wire material and preparation method thereof, particularly relate to and not only have live width less than 100 nanometers (I reaches 7 nanometers), but also have controlled shape and position, the metal silicide nano-wire and the manufacture method of very big application prospect all arranged in fields such as integrated circuit, microelectronic component and nanometer electronic devices.
Background technology
Metal silicide is because low-resistivity, high thermal stability and the characteristics such as thermal coefficient of expansion approaching with silicon, in micro-nano electronic device and integrated circuit, has important use, as leaking as interconnected lead, source and gate electrode etc., particularly along with the minimizing of device size, the metal silicide of making nanoscale becomes more and more important.The technology of existing making metal silicide nano-wire roughly has two kinds: silicon nanowires is converted into metal silicide nano-wire; Utilize the catalyst direct growth to go out metal silicide nano-wire.Now the technology to two kinds of existing making metal silicide nano-wires specifically describes as follows:
1, generate metal silicide nano-wire by the silicon nanowires reaction that has prepared: referring to documents 1, " nano wire of single-crystal metal and metal/semiconductor nanowire heterojunction " (Single-crystal metallic nanowire andmetal/semiconductor nanowire heterostructures), be stated from " Nature " 2004, Vol.430 is on the July1:61-65.It is to utilize the silicon nanowires that has prepared, plated metal nickel thereon, and 550 ℃ of following nickel and pasc reaction growth nickle silicide are removed surperficial unreacted nickel with chemical corrosion method at last, form nickel silicide nano-line.The preparation method of this metal silicide nano-wire is owing to be subjected to the influence of factors such as initial silicon nano wire shape and position, wayward, can't be applied to the compatibility of present semiconductor technology, realization and present integrated circuit technology, thereby limit its extensive use.
2, utilize catalyst direct growth metal silicide nano-wire: growing metal nickel on dielectric substrate at first, promptly as catalyst, again as the source metal of growing metal silicide; Sputter monocrystalline silicon target afterwards, at high temperature grow the nickel silicide nano wire, referring to documents 2, " growth certainly of the formation of self-organizing nanometer bridge and the nano wire of metal inducement " (Self-assembled nanobridge formation and spontaneous growth ofmetal-induced namowire), be stated from " Applied Physics Letters " 2005, Vol.86: 253101-1-3.The growth of this metal silicide nano-wire is chaotic substantially, and is uncontrollable at aspects such as size, position and shapes, can not directly should be used as the lead and the electrode of circuit, also can't with present ic process compatibility.
Defectives such as therefore present making metal silicide nano-wire ubiquity size, shape and growth position are wayward, also can't be applied to present semiconductor technology, remove to make the lead and the electrode of integrated circuit, also be unfavorable for directly adopting metal silicide nano-wire to make nanometer electronic device and its physics of research and chemical characteristic etc.
Summary of the invention:
The objective of the invention is to: both overcome the existing method for preparing metal silicide nano-wire and had the uppity defective of size and dimension; Overcome disorderly and unsystematic, the uncontrollable defective of growth position of metal silicide nano-wire of existing technology of preparing preparation again; Have the metal silicide nano-wire manufacture method of controlled size, shape and growth position and the metal silicide nano-wire of preparation thereby provide a kind of, and both can be used for the interconnected lead of integrated circuit and electrode, also can be used for studying the relation of nano wire physicochemical property and its live width and directly make nanometer electronic device and circuit.
The object of the present invention is achieved like this:
Metal silicide nano-wire provided by the invention comprises: titanium silicide nano line, nickel silicide nano-line, cobalt silicide nano wire, tungsten silicide nano wire, molybdenum silicide nano wire and iron silicide nano wires; The live width of described metal silicide nano-wire is between the 7-100 nanometer, and length is (as required also can be longer) between the 0.1-100 micron.
The manufacture method of metal silicide nano-wire provided by the invention may further comprise the steps:
1) get a monocrystalline substrate 2, adopt traditional hot oxidation technology, chemical vapour deposition technique, magnetron sputtering deposition thin film technique or spin coating method growth one deck dielectric film 1 on it, its dielectric film 1 thickness is the 10-1000 nanometer;
2) utilize the process technology of nanoscale to etch nano wire: monocrystalline substrate 2 surfaces that insulating barrier 1 is promptly arranged in the step 1) growth, etch the groove 3 that is used to make metal silicide nano-wire, groove 3 width are the live width of the nano wire of desire preparation, etching depth is a thickness of insulating layer, and the monocrystalline silicon of the bottom of groove 3 is come out;
3) adopt metal sputtering masking technique and evaporated film method, in step 2) be manufactured with on the monocrystalline substrate 2 of nanometer channel 3, deposition is used for the metallic diaphragm 4 of metal silicide growth, and the thickness of its metallic diaphragm 4 is generally the 5-100 nanometer;
4) then on the monocrystalline substrate 2 that step 3) obtains, the monocrystalline silicon reaction of adopting the high annealing method that metal and channel bottom are exposed, generate metal silicide, its annealing conditions is as follows: feed argon gas or nitrogen, wherein the flow of argon gas or nitrogen is 100-500sccm, substrate heating temperature is in 300-900 ℃ of scope, and reaction pressure is 1-100KPa; Above-mentioned condition will synthesize the metal silicide of function admirable for being fit to the synthetic more wide in range annealing conditions of multiple metal silicide, also needs to remove to optimize annealing conditions at different metal silicide types;
5) adopt chemical corrosion method, the sample of the generation metal silicide that step 4) is obtained erodes surperficial unreacted metal, produces discrete metal silicide nano-wire 5 in nanometer channel 3.
In above-mentioned technical scheme, whether which kind of method no matter reaches the monocrystalline silicon surface below the insulating barrier for judging etching depth, also comprise step 6), in step 2) when carrying out on the insulating barrier of substrate etching groove 3, need apply bias voltage on the substrate, the bias voltage that applies is at least 1V; With the variation of detect ion bundle etching process intermediate ion line, when line begins to increase, show etching near silicon substrate 2 interface with insulating barrier 1, when line no longer increases when reaching capacity, show that insulating barrier carves fully thoroughly.
In above-mentioned technical scheme, the foundation of the insulating barrier of choosing silicon face a kind described in the step 1) must have corresponding ion etching process this insulating barrier 1 material of etching fully, must be to monocrystalline substrate 2 surperficial not damageds; For example: protective layer 1 can be used silicon dioxide, aluminium oxide, aluminium nitride or polyimides etc., and then corresponding lithographic method is an ion beam etching.The live width of the selection of thickness of insulating layer and the metal silicide nano-wire that is equipped with of draw up is relevant with the breadth depth ratio that lithographic method can reach, and under the prerequisite of assurance insulating barrier densification, thickness is generally the 10-100 nanometer.
In above-mentioned technical scheme, step 2) the nanoscale micro-processing technology described in can be the focused-ion-beam lithography method, and the direct etching insulating barrier of the ion beam that this method utilization is focused into nanoscale is made the nanometer channel of arbitrary shape in the position of needs; Also can adopt technology such as electron beam lithography, X-ray lithography and extreme ultraviolet photolithographic on the position that surface of insulating layer needs, to produce the nano-scale linewidth pattern of arbitrary shape, utilize reactive ion etching method to etch nanometer channel again.
The width of etching groove is by the intensity of variation decision of the experiment parameter and the etching process line of above-mentioned nanoscale process equipment, as adopting the focused-ion-beam lithography system; Adjustable experiment parameter has the selection of beam spot size, ion beam current size, the ion beam time of staying and scanning step etc.The time of etching stopping is general select ion beam current near or when reaching capacity.
In above-mentioned technical scheme, the method for depositing metal films can adopt the metallic target sputtering method in the step 3), comprising: magnetron sputtering, DC glow sputter and ion beam sputtering etc., also can adopt the metal evaporation method, and comprising: thermal evaporation, electron beam evaporation etc.; The kind of the metallic film of deposition is decided according to the kind of metal in the draw up metal silicide that is equipped with, it can be any metal that can form metal silicide, as iron, cobalt, nickel, titanium, manganese or tungsten etc., the thickness of metal film is generally the 5-100 nanometer, is as the criterion can form continuous metal silicide film after the reaction.
In above-mentioned technical scheme, the high annealing described in the step 4) can carry out in the equipment of growing metal film, also can take out from the equipment of original growing metal film, carries out in other high temperature furnace again.In the equipment of original growing metal film, anneal and have the high characteristics of metal silication amount that technology is simple, cost is low, reduce pollution and generate.
In above-mentioned technical scheme, the chemical corrosion method described in the step 5) is meant the employing chemical mordant, erode surperficial unreacted metal, and this corrosive agent does not corrode to established metal silicide.For example, make the titanium disilicide nano wire, chemical mordant is 1: 1 sulfuric acid and a hydrogen peroxide; Make nickel silicide nano-line, chemical mordant is 4: 1 sulfuric acid and a hydrogen peroxide; Make the cobalt silicide nano wire, chemical mordant is 1: 1: 5 sulfuric acid, hydrogen peroxide and a water.
The invention has the advantages that:
1. the metal silicide nano-wire of method preparation of the present invention has the controlled characteristics of position, shape and live width, can make the nano wire of arbitrary shape in the position that needs arbitrarily, and minimum feature reaches 7 nanometers.
2. have nano wire by preparation method of the present invention and have the controlled characteristics of position, shape and live width, so the metal silicide nano-wire of preparation can be applied to integrated circuit as metal interconnecting wires, leak and gate electrode in the source, can make according to actual needs fully, characteristic and reliability characteristics with obvious raising integrated circuit also enlarge the application of nano wire simultaneously.
3. the application of substrate bias in the ion etching process can be observed the variation of passing through the ion beam current of substrate in the etching intuitively, controls etching depth effectively, reaches the purpose of the formed metal silicide nano-wire live width of accurate control.
4. the metal silicide nano-wire of preparation can be used for making nanometer electronic device thus, has broad application prospects at micro-nano electronics and message area.
5. method of the present invention is compared with existing method of making metal silicide nano-wire, and it is simple to have manufacture craft, and efficient is high and can produce in batches.The more important thing is that because the introducing of nanoscale process technology and apply the bias voltage of detect ion line on substrate, prepared metal silicide nano-wire has little, the good reproducibility of live width, with present characteristics such as semiconductor technology compatibility.
Description of drawings:
The making schematic flow sheet of Fig. 1 metal silicide of the present invention
The drawing explanation:
1-silicon dioxide insulating layer 2-silicon substrate
The groove 4-metallic film of 3-etching
The 5-metal silicide nano-wire
Fig. 2 is the stereoscan photograph (measurement electrode of bright line for making among Fig. 2 is used for electrology characteristic research) of titanium disilicide nano wire of the present invention on the titanium disilicide nano wire
Concrete execution mode
Below by drawings and Examples metal silicide nano-wire of the present invention is described in detail in conjunction with the preparation method
Embodiment 1
With reference to figure 1, press flow preparation present embodiment titanium disilicide nano wire of the present invention:
1), on the surface of monocrystalline substrate 2, adopt the grow silicon dioxide insulating layer 1 of 50 nanometer thickness of traditional hot oxidizing process, its dielectric film 1 thickness is 50 nanometers;
2), step 1) grown the monocrystalline substrate of silicon dioxide insulating layer 12, puts into the cavity of focused ion beam system, utilizing ion beam to etch length on insulating barrier is that 10 microns, width are the groove 3 of 14 nanometers; The etching condition that is adopted is: ion source voltage 30KV, ion beam current 1pA, the bundle scanning of bundle spot overlapping 50%, the line time of staying of 1 microsecond; When carrying out on the insulating barrier of substrate etching groove 3, and apply bias voltage simultaneously on monocrystalline substrate 2, the bias voltage that applies is 10V; With the variation of detect ion bundle etching process intermediate ion line, when line begins to increase, show etching near the interface of silicon substrate 2 with insulating barrier 1, when the line of surveying reaches capacity, etching stopping, this moment, the degree of depth of groove was 10 microns of 50 nanometers, length;
3), then will be through step 2) substrate that obtains after the etching puts into magnetic control sputtering system, adopts conventional magnetron sputtering thin film technique plated metal titanium thereon, thickness is 50 nanometers, sputtering condition is: 60 watts of sputtering powers, air pressure 1Pa, underlayer temperature are normal temperature, and argon flow amount is 200sccm.
4) also in magnetic control sputtering system, carry out the substrate heating, subsequently, realize the annealing under the high temperature, make Titanium and pasc reaction, in groove, form the sample of titanium disilicide; Wherein annealing conditions is: the flow of nitrogen is 200sccm, and underlayer temperature is in 850 ℃ of scopes, and reaction pressure is 5KPa, and annealing time is 10 minutes;
5), the sample that subsequently step 4) is obtained, utilize the mixed liquor of chemical corrosion liquid sulfuric acid and hydrogen peroxide again, surperficial unreacted metal titanium is removed, make the titanium disilicide nano wire of present embodiment at last, wherein the ratio of the mixed liquor of sulfuric acid and hydrogen peroxide is 1: 1 volume ratio, and the concrete structure of present embodiment is referring to accompanying drawing 2; The live width of this nano wire is 14 nanometers, long 10 microns.
Embodiment 2
Present embodiment prepares the concrete structure of titanium disilicide nano wire referring to accompanying drawing 2; The live width of this nano wire is 100 nanometers, long 30 microns.
With reference to figure 1, the preparation method of present embodiment is undertaken by the technological process of Fig. 1, and concrete technology is as follows:
1, on the surface of monocrystalline substrate 2, adopt the grow aluminium nitride insulating barrier 1 of 100 nanometer thickness of magnetically controlled sputter method, its dielectric film 1 thickness is 100 nanometers;
2, will grow the silicon substrate 2 that aluminium nitride insulating barrier 1 is arranged, and put into the cavity of focused ion beam system, utilizing ion beam to etch length on insulating barrier is that 30 microns, width are 100 nanometers, and the degree of depth is the groove 3 of 100 nanometers; The etching condition that is adopted is: ion source voltage 30KV, ion beam current 20pA, the bundle scanning of bundle spot overlapping 50%, the line time of staying of 1.5 microseconds; When carrying out on the insulating barrier of substrate etching groove 3, and apply bias voltage simultaneously on monocrystalline substrate 2, the bias voltage that applies is 1V; With the variation of detect ion bundle etching process intermediate ion line, when line begins to increase, show etching near the interface of silicon substrate 2 with insulating barrier 1, when the line of surveying reaches capacity, etching stopping, this moment, the degree of depth of groove was 30 microns of 100 nanometers, length;
3, the substrate that will obtain after step 2 etching is then put into thermal evaporation system, plated metal titanium film layer 4 thereon, and thickness is 100 nanometers, evaporation conditions is: filament temperature 2000 degree, air pressure 15Pa, underlayer temperature are normal temperature;
4, in thermal evaporation system, carry out annealing under the high temperature subsequently, make Titanium and pasc reaction, form titanium disilicide.Annealing conditions is: the flow of nitrogen is 250sccm, and substrate heating temperature is 600 ℃, and reaction pressure is 60KPa, and annealing time is 15 minutes;
5, utilize chemical corrosion liquid sulfuric acid and hydrogen peroxide subsequently, the ratio of its mixed liquor is 1: 1 volume ratio, with the unreacted gold in surface
Figure C20051012790400091
Titanium removes, and makes the titanium disilicide nano wire of present embodiment at last, and concrete structure is referring to accompanying drawing 2; The live width of this nano wire is 100 nanometers, long 30 microns.
Embodiment 3
Present embodiment prepares the concrete structure of titanium disilicide nano wire referring to accompanying drawing 2; The live width of this nano wire is 50 nanometers, long 10 microns.
With reference to figure 1, the preparation method of present embodiment is undertaken by the technological process of Fig. 1, and concrete technology is as follows:
1, on the surface of monocrystalline substrate 2, adopt the polyimide insulative layer 1 of coated 50 nanometer thickness of spin coating proceeding, its dielectric film 1 thickness is 50 nanometers;
2, will grow the silicon substrate 2 that polyimide insulative layer 1 is arranged, put into photoetching of conventional electrical bundle and reactive ion etching system, make nanometer channel.Adopt conditional electronic bundle exposure technique, on the P polyimides, make the pattern of nanowires of wide 50 nanometers, long 10 nanometers, utilize the nanometer channel on the reactive ion etching technology making silicon dioxide after the development, by being applied to the bias voltage on the substrate, the flow through ion beam current of substrate of acquisition, judge time of etching stopping according to the variation of line, this moment, the degree of depth of groove was 50 nanometers, long 10 microns;
3, the substrate that will obtain after step 2 etching is then put into the ion beam sputtering system, sputtering sedimentation Titanium rete 4 thereon, and thickness is 20 nanometers, sputtering condition is: sputter line 40mA, air pressure 10Pa, underlayer temperature are normal temperature, and argon flow amount is 100sccm;
4, in high temperature furnace, carry out annealing under the high temperature subsequently, make Titanium and pasc reaction, form titanium disilicide.Annealing conditions is: the flow of nitrogen is 150sccm, and underlayer temperature is in 800 ℃ of scopes, and reaction pressure is 20KPa, and annealing time is 20 minutes;
5, utilize chemical corrosion liquid sulfuric acid and hydrogen peroxide subsequently, the ratio of its mixed liquor is 1: 1 volume ratio, and surperficial unreacted metal titanium is removed, and makes the titanium disilicide nano wire of present embodiment at last, and concrete structure is referring to accompanying drawing 2; The live width of this nano wire is 50 nanometers, long 10 microns.
Embodiment 4
Present embodiment prepares the concrete structure of titanium disilicide nano wire referring to accompanying drawing 2; The live width of this nano wire is 7 nanometers, long 5 microns.
With reference to figure 1, the preparation method of present embodiment is undertaken by the technological process of Fig. 1, and concrete technology is as follows:
1, on the surface of monocrystalline substrate 2, adopt the grow silicon dioxide insulating layer 1 of 50 nanometer thickness of traditional hot oxidation technology, its dielectric film 1 thickness is 50 nanometers;
2, will grow the silicon substrate 2 that silicon dioxide insulating layer 1 is arranged, and put into the cavity of focused ion beam system, utilizing ion beam to etch length on insulating barrier is that 5 microns, width are the groove 3 of 7 nanometers; The etching condition that is adopted is: ion source voltage 30KV, ion beam current 1pA, the bundle scanning of bundle spot overlapping 50%, the line time of staying of 0.1 microsecond; When line value of reaching capacity of surveying 90% the time, etching stopping, the degree of depth of groove was 7 nanometers, grew 5 microns this moment;
3, the substrate that will obtain after step 2 etching is then put into magnetic control sputtering system, sputtering sedimentation Titanium rete 4 thereon, and thickness is 20 nanometers, sputtering condition is: 70 watts of sputtering powers, air pressure 10Pa, underlayer temperature are normal temperature, argon flow amount is 100sccm;
4, in magnetic control sputtering system, carry out annealing under the high temperature subsequently, make Titanium and pasc reaction, form titanium disilicide.Annealing conditions is: the flow of nitrogen is 150sccm, and underlayer temperature is in 800 ℃ of scopes, and reaction pressure is 20KPa, and annealing time is 20 minutes;
5, utilize chemical corrosion liquid sulfuric acid and hydrogen peroxide subsequently, the ratio of its mixed liquor is 1: 1 volume ratio, and surperficial unreacted metal titanium is removed, and makes the titanium disilicide nano wire of present embodiment at last, and concrete structure is referring to accompanying drawing 2; The live width of this nano wire is 7 nanometers, long 5 microns.
Embodiment 5
The live width that present embodiment prepares nickel silicide nano-line is 10 nanometers, long 10 microns.
Present embodiment prepares the method for nickel silicide nano-line to be undertaken by the technological process of Fig. 1, and concrete technology is as follows:
1) get a monocrystalline substrate 2, adopt traditional chemical CVD (Chemical Vapor Deposition) method growth layer of silicon dioxide dielectric film 1 on it, its dielectric film 1 thickness is the 10-50 nanometer;
2) utilize the process technology of nanoscale to etch nano wire: promptly to have on silicon substrate 2 surfaces of insulating barrier 1 in step 1) length, etch the groove 3 that is used to make metal silicide nano-wire, groove 3 width are 10 nanometers, length is 10 microns, etching depth is a thickness of insulating layer, and the monocrystalline silicon of the bottom of groove 3 is come out;
3) adopt sputtering method, in step 2) be manufactured with on the silicon substrate 2 of nanometer channel 3, sputter is used for the metallic nickel rete 4 of metal silicide growth, and its thickness is 30 nanometers, 100 watts of sputtering powers, air pressure 2Pa;
4) then on the silicon substrate 2 that step 3) obtains, the monocrystalline silicon reaction of adopting the high annealing method that metal and channel bottom are exposed, the generation nickle silicide, its annealing conditions is as follows: annealing temperature is in 450 ℃ of scopes, and annealing time is 5 minutes;
5) adopt chemical corrosion method, chemical corrosion liquid is sulfuric acid and hydrogen peroxide, the ratio of its mixed liquor is 4: 1 volume ratios, erodes surperficial unreacted metal, and producing discrete live width in nanometer channel 3 is that 10 nanometers, length are 10 microns metal silication nickel nano wire 5.
Embodiment 6
The live width that present embodiment prepares the cobalt silicide nano wire is 30 nanometers, long 20 microns.
Present embodiment prepares the method for cobalt disilicide nano wire to be undertaken by the technological process of Fig. 1, and concrete technology is as follows:
1) get a monocrystalline substrate 2, adopt magnetically controlled sputter method growth one deck alumina insulating film 1 on it, its dielectric film 1 thickness is 80 nanometers;
2) utilize the process technology of nanoscale to etch nano wire: promptly to have on silicon substrate 2 surfaces of insulating barrier 1 in step 1) length, etch the groove 3 that is used to make metal silicide nano-wire, groove 3 width are 30 nanometers, length is 20 microns, etching depth is a thickness of insulating layer, and the monocrystalline silicon of the bottom of groove 3 is come out;
3) adopt electron beam evaporation method, in step 2) be manufactured with on the silicon substrate 2 of nanometer channel 3, evaporation is used for the metallic cobalt rete 4 of metal silicide growth, and its thickness is 100 nanometers; Electron gun voltage 30KV, air pressure are 5Pa, and underlayer temperature is a normal temperature;
4) then on the silicon substrate 2 that step 3) obtains, the monocrystalline silicon reaction of where adopting the high annealing method that metal and channel bottom are exposed in the electron beam evaporation system, generate metal silicide, its annealing conditions is as follows: annealing temperature is in 750 ℃ of scopes, and annealing time is 15 minutes;
5) adopt chemical corrosion method, chemical corrosion liquid is sulfuric acid, hydrogen peroxide and water, and the ratio of its mixed liquor is 1: 1: 5 volume ratio, erodes surperficial unreacted metal, producing discrete live width in nanometer channel 3 is 30 nanometers, long 20 microns cobalt silicide nano wire.

Claims (7)

1. the manufacture method of a metal silicide nano-wire may further comprise the steps:
1) get a monocrystalline substrate (2), go up in monocrystalline substrate (2) and adopt traditional hot oxidation, chemical vapour deposition (CVD), magnetron sputtering or spin coating method growth one deck dielectric film (1), its dielectric film (1) thickness is the 10-1000 nanometer;
2) utilize the process technology of nanoscale to etch nano wire: going up growth in the monocrystalline substrate (2) that step 1) obtains has on the surface of insulating barrier (1), etch the groove (3) that is used to make metal silicide nano-wire, groove (3) width is the live width of the nano wire of desire preparation, etching depth is a thickness of insulating layer, and the monocrystalline silicon of the bottom of groove (3) is come out;
3) adopt metal sputtering or evaporation coating method, in step 2) be manufactured with on the silicon substrate (2) of nanometer channel (3), deposition is used for the metallic diaphragm (4) of metal silicide growth, and its thickness is the 5-100 nanometer;
4) then on the silicon substrate (2) that step 3) obtains, the monocrystalline silicon reaction of adopting the high annealing method that metal and channel bottom are exposed, generate metal silicide, its annealing conditions is as follows: the flow of argon gas or nitrogen is 100-500sccm, substrate heating temperature is in 300-900 ℃ of scope, and reaction pressure is 1-100KPa;
5) adopt chemical corrosion method, erode the surperficial unreacted metal of dielectric film (1), in nanometer channel (3), produce discrete metal silicide nano-wire (5).
2. by the manufacture method of the described metal silicide nano-wire of claim 1, it is characterized in that, comprising at the metallic diaphragm described in the step 3) (4): Titanium rete, metallic nickel rete or metallic cobalt rete.
3. press the manufacture method of the described metal silicide nano-wire of claim 1, it is characterized in that, also comprise step 6), in step 2) when carrying out on the insulating barrier etching groove, need apply the bias voltage that a detect ion bundle etching process intermediate ion line changes on monocrystalline substrate, the bias voltage that applies is at least 1V; When ion beam current begins to increase, show etching near the interface of monocrystalline substrate and insulating barrier, when line no longer increases when reaching capacity, show that insulating barrier carves fully thoroughly.
4. by the manufacture method of the described metal silicide nano-wire of claim 1, it is characterized in that described insulating barrier comprises: silicon dioxide insulating layer, the aluminium nitride insulating barrier, alumina insulating layer or polyimide insulative layer, thickness is the 10-1000 nanometer.
5. press the manufacture method of the described metal silicide nano-wire of claim 1, it is characterized in that, described nanoscale process technology is to produce the nano-scale linewidth pattern of arbitrary shape on the position that surface of insulating layer needs, utilize reactive ion etching method to etch the routine techniques of nanometer channel again, comprise focused-ion-beam lithography method, electron beam lithography, X-ray lithography or extreme ultraviolet lithography.
6. press the manufacture method of the described metal silicide nano-wire of claim 1, it is characterized in that, the method of described depositing metal films adopts the metallic target sputtering method, comprise: magnetron sputtering, DC glow sputter or ion beam sputtering process, or adopt the metal evaporation method, comprising: thermal evaporation or electron beam evaporation process; The thickness of the metallic diaphragm of deposition is the 5-100 nanometer.
7. by the manufacture method of the described metal silicide nano-wire of claim 1, it is characterized in that described high annealing is to carry out or carry out in the equipment of growing metal film in other high temperature furnace.
CNB2005101279041A 2005-12-07 2005-12-07 Metal silicide nano-wire and its making method Expired - Fee Related CN100423245C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2005101279041A CN100423245C (en) 2005-12-07 2005-12-07 Metal silicide nano-wire and its making method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2005101279041A CN100423245C (en) 2005-12-07 2005-12-07 Metal silicide nano-wire and its making method

Publications (2)

Publication Number Publication Date
CN1979828A CN1979828A (en) 2007-06-13
CN100423245C true CN100423245C (en) 2008-10-01

Family

ID=38130928

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2005101279041A Expired - Fee Related CN100423245C (en) 2005-12-07 2005-12-07 Metal silicide nano-wire and its making method

Country Status (1)

Country Link
CN (1) CN100423245C (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106645357A (en) * 2016-10-17 2017-05-10 南京大学 Preparation method of crystal nanowire bioprobe device

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101550592B (en) * 2008-04-03 2012-01-25 清华大学 Method for preparing iron silicide nano wires
CN101549869B (en) * 2008-04-03 2011-06-22 清华大学 Method for preparing iron silicide nano wires
CN101555016B (en) * 2008-04-09 2011-06-08 清华大学 Method for preparing nickel silicide nano-line
CN101477096B (en) * 2009-01-05 2012-11-21 大连理工大学 Polymer plane nano-channel production method
US20100285358A1 (en) 2009-05-07 2010-11-11 Amprius, Inc. Electrode Including Nanostructures for Rechargeable Cells
US11996550B2 (en) 2009-05-07 2024-05-28 Amprius Technologies, Inc. Template electrode structures for depositing active materials
JP2013511130A (en) 2009-11-11 2013-03-28 アンプリウス、インコーポレイテッド Intermediate layer for electrode manufacturing
US20110143019A1 (en) 2009-12-14 2011-06-16 Amprius, Inc. Apparatus for Deposition on Two Sides of the Web
US9780365B2 (en) 2010-03-03 2017-10-03 Amprius, Inc. High-capacity electrodes with active material coatings on multilayered nanostructured templates
EP2543098B1 (en) 2010-03-03 2019-07-31 Amprius, Inc. Template electrode structures for depositing active materials
CN102184961B (en) * 2011-04-26 2017-04-12 复旦大学 Asymmetrical gate metal oxide semiconductor (MOS) device and manufacturing method thereof
CN103733388A (en) 2011-07-01 2014-04-16 安普雷斯股份有限公司 Template electrode structures with enhanced adhesion characteristics
CN103137450A (en) * 2011-11-22 2013-06-05 上海华虹Nec电子有限公司 Trench type power metal oxide semiconductor (MOS) device and manufacturing process thereof
CN106663786B (en) 2014-05-12 2020-06-16 安普瑞斯股份有限公司 Structurally controlled deposition of silicon on nanowires
DE102014107458B4 (en) * 2014-05-27 2020-02-13 Helmholtz-Zentrum Dresden - Rossendorf E.V. patterning methods
CN104560709A (en) * 2014-12-24 2015-04-29 中国科学院物理研究所 Microscopic biological culture device as well as manufacturing method and using method thereof
CN107202829A (en) * 2017-05-02 2017-09-26 南京大学 A kind of preparation method of crystalline nanowire bioprobe device
CN110373636B (en) * 2019-09-02 2022-04-12 西安邮电大学 Preparation method of molybdenum silicide transition metal compound film material

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6413880B1 (en) * 1999-09-10 2002-07-02 Starmega Corporation Strongly textured atomic ridge and dot fabrication
US6773616B1 (en) * 2001-11-13 2004-08-10 Hewlett-Packard Development Company, L.P. Formation of nanoscale wires
US20050093025A1 (en) * 2002-03-22 2005-05-05 Yong Chen Method for making nanoscale wires and gaps for switches and transistors
US20050128788A1 (en) * 2003-09-08 2005-06-16 Nantero, Inc. Patterned nanoscopic articles and methods of making the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6413880B1 (en) * 1999-09-10 2002-07-02 Starmega Corporation Strongly textured atomic ridge and dot fabrication
US6773616B1 (en) * 2001-11-13 2004-08-10 Hewlett-Packard Development Company, L.P. Formation of nanoscale wires
US20050093025A1 (en) * 2002-03-22 2005-05-05 Yong Chen Method for making nanoscale wires and gaps for switches and transistors
US20050128788A1 (en) * 2003-09-08 2005-06-16 Nantero, Inc. Patterned nanoscopic articles and methods of making the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106645357A (en) * 2016-10-17 2017-05-10 南京大学 Preparation method of crystal nanowire bioprobe device
CN106645357B (en) * 2016-10-17 2019-06-28 南京大学 A kind of preparation method of crystalline nanowire bioprobe device

Also Published As

Publication number Publication date
CN1979828A (en) 2007-06-13

Similar Documents

Publication Publication Date Title
CN100423245C (en) Metal silicide nano-wire and its making method
Decker et al. Directed growth of nickel silicide nanowires
CN100524782C (en) Material with metal silicide nanostructure and method for making the same
TW436836B (en) Field emission electron source
KR20040094065A (en) Method of forming conductive line of semiconductor device using carbon nanotube and semiconductor device manufactured by the method
US20050235906A1 (en) Method for catalytic growth of nanotubes or nanofibers comprising a nisi alloy diffusion barrier
US8652944B2 (en) Method for making side growth semiconductor nanowires and transistors obtained by said method
US20020114949A1 (en) Process for controlled introduction of defects in elongated nanostructures
CN101079331B (en) A tunnel probe for scanning the tunnel microscope and its making method
US6652762B2 (en) Method for fabricating nano-sized diamond whisker, and nano-sized diamond whisker fabricated thereby
US20040240157A1 (en) Method for localized growth of nanotubes and method for making a self-aligned cathode using the nanotube growth method
CN101638781B (en) Method for directly heating metal membrane to grow oxide nanowires in array-type arranged microcavity structure, and application thereof
Taşaltın et al. Simple fabrication of hexagonally well-ordered AAO template on silicon substrate in two dimensions
CN108767108A (en) Hall device preparation method and hall device
KR101027315B1 (en) Method for manufacturing nano wire
KR20010055134A (en) Fabrication method for metal nano-wires by using carbon nanotube mask
CN101060078A (en) Manufacture method of HD Ru nanocrystalline sputtering deposition for flash memory
KR101798283B1 (en) Method of depositing catalyst for vertical growth of carbon nanotube
US8531029B2 (en) Electron beam induced deposition of interface to carbon nanotube
Nagato et al. Local synthesis of tungsten oxide nanowires by current heating of designed micropatterned wires
US20040132242A1 (en) Method for the production of one-dimensional nanostructures and nanostructures obtained according to said method
JP4780546B2 (en) Method for producing carbon nanotube and method for producing current control element
CN110112222A (en) A kind of trench schottky diode and production method
CN114657624B (en) Electrochemical preparation method of metal nanowire array
CN111312806B (en) Preparation method and product of single-layer atomic channel fin field effect transistor

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20081001

Termination date: 20111207