CN109817718A - The high-voltage isolating ring device of gate drive circuit - Google Patents
The high-voltage isolating ring device of gate drive circuit Download PDFInfo
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- CN109817718A CN109817718A CN201910014710.2A CN201910014710A CN109817718A CN 109817718 A CN109817718 A CN 109817718A CN 201910014710 A CN201910014710 A CN 201910014710A CN 109817718 A CN109817718 A CN 109817718A
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 61
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 61
- 239000001301 oxygen Substances 0.000 claims abstract description 61
- 238000000407 epitaxy Methods 0.000 claims abstract description 50
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 238000002955 isolation Methods 0.000 claims abstract description 19
- 230000001413 cellular effect Effects 0.000 claims abstract description 9
- 238000010276 construction Methods 0.000 claims abstract description 9
- 230000005684 electric field Effects 0.000 claims abstract description 7
- 238000002347 injection Methods 0.000 claims abstract 3
- 239000007924 injection Substances 0.000 claims abstract 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 33
- 229920005591 polysilicon Polymers 0.000 claims description 33
- 239000002184 metal Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 230000015572 biosynthetic process Effects 0.000 claims description 13
- 238000002513 implantation Methods 0.000 claims description 6
- 210000003323 beak Anatomy 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims description 4
- 238000000034 method Methods 0.000 claims description 4
- 239000000203 mixture Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- OBNDGIHQAIXEAO-UHFFFAOYSA-N [O].[Si] Chemical compound [O].[Si] OBNDGIHQAIXEAO-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Abstract
The invention discloses a kind of high-voltage isolating ring devices of gate drive circuit, are made of LDMOS, are formed with first to third p type buried layer and n type buried layer at the interface of P type substrate and N-type epitaxy layer；High pressure N trap is formed at the top of first and second p type buried layers, the forming region for the cellular construction that region between two high pressure N traps is LDMOS, the p-well bottom of the cellular construction of LDMOS include the longitudinally connected injection of p-type top and third p type buried layer together and make device non-isolation type structure；Second side of implanted layer also extends transverse in drift region and covers from bottom by the first side of drain region oxygen at the top of p-type, in conjunction with the electric field strength of the first side bottom of the extended structure reduction drain region oxygen of implanted layer at the top of non-isolation type structure and p-type, the pressure-resistant stability and product reliability of device are improved.The present invention can improve the pressure-resistant stability and product reliability of device.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuits, more particularly, to a kind of high-voltage isolating ring device of gate drive circuit
Part.
Background technique
Gate drive circuit generally requires to drive high-pressure side (high side) power device and low-pressure side (low side) simultaneously
Power device, the voltage phase difference between high-pressure side and low-pressure side is larger, and phase difference can reach 600V or more both in some applications.This
Sample, such as in the high pressure lateral circuit application for motor driving, need that high-voltage isolating ring is arranged in gate drive circuit to realize
Isolation between high-pressure side and low-pressure side, and need to be arranged level shifting circuit to realize the electricity between high-pressure side and low-pressure side
Flat turn is changed.It is usually the function for meeting isolation ring and level conversion simultaneously using high-voltage LDMOS (HVLDMOS) on existing structure
Energy.
As shown in Figure 1, being the sectional structure chart of the high-voltage isolating ring device of existing gate drive circuit, existing gate drive circuit
High-voltage isolating ring device be made of LDMOS, comprising:
P type substrate 101 is formed on 101 surface of P type substrate by N-type epitaxy layer 102.
P type buried layer and N are formed in the selection area at the interface of the P type substrate 101 and the N-type epitaxy layer 102
Type buried layer 110.
The p type buried layer includes the first p type buried layer 108a and the second p type buried layer 108b.
Described between top surface of the top surface to the N-type epitaxy layer 102 of the first p type buried layer 108a
The first high pressure p-well 109a is formed in N-type epitaxy layer 102, the second p type buried layer 108b top surface to the N-type
The second high pressure p-well 109b is formed in the N-type epitaxy layer 102 between the top surface of epitaxial layer 102.
The unit knot that region between the first high pressure p-well 109a and the second high pressure p-well 109b is the LDMOS
The cellular construction of the forming region of structure, the LDMOS includes:
P-well 103 is formed in the selection area of the N-type epitaxy layer 102.
Drift region is made of the N-type epitaxy layer 102 outside second side of the p-well 103.
Drain region oxygen 104 is formed on the surface of the drift region, the second of the drain region oxygen 104 and the p-well 103
Side is mutually separated with distance.In general, the drain region oxygen 104 is LOCOS.
Gate structure is formed by stacking by the gate dielectric layer and polysilicon gate 105 for being formed in 103 surface of p-well；It is described more
Second side of crystal silicon grid 105 also extends on the surface of the drain region oxygen 104.
By N+ district's groups at source region 106a be formed in the surface of the p-well 103 and the first side with the polysilicon gate 105
Autoregistration.
By N+ district's groups at drain region 106b be formed in the N-type epitaxy layer outside second side of the drain region oxygen 104
102。
Gate drive circuit is used to drive the circuit of two kinds of operating voltages, and the first operating voltage is greater than the second operating voltage, leads to
Often, the second operating voltage is referred to as low-pressure side (lowside) voltage, and the first operating voltage is referred to as high-pressure side (highside) voltage.
It is the nmosfet formation region of the second operating voltage, second p-type outside the first side of the first p type buried layer 108a
It is the nmosfet formation region of the first operating voltage outside second side of buried layer 108b, second side of the first p type buried layer 108a arrives
It is the forming region of the high-voltage isolating ring device between the first side of the second p type buried layer 108b, realizes first work
Make the isolation between the device of voltage and the device of second operating voltage.
The surface of the N-type epitaxy layer 102 outside the first side of the first p type buried layer 108a is formed with second oxygen
The surface of 104a, the N-type epitaxy layer 102 outside second side of the second p type buried layer 108b are formed with third field oxygen
104b。
The n type buried layer 110 is formed in first operating voltage outside second side of the second p type buried layer 108b
In nmosfet formation region.
The surface of the N-type epitaxy layer 102 outside second side of the second p type buried layer 108b be formed with by N+ district's groups at
Voltage bonding pad 106c, the voltage bonding pad 106c is connected to the institute being made of front metal layer 112 by contact hole 111
State the first electrode end (VB) of the first operating voltage.
The surface of the p-well 103 be also formed with by P+ district's groups at trap draw-out area 107.
The trap draw-out area 107 and the source region 106a are all connected to the source electrode being made of front metal layer 112, described more
The surface of crystal silicon grid 105 is connected to the grid being made of front metal layer 112, and the drain region 106b is connected to by front metal layer
The drain electrode of 112 compositions.
Polysilicon field plate 105a, the polysilicon field plate are formed on the surface of second side of the drain region oxygen 104
105a is also extended on the surface of the drift region outside the oxygen 104 of the drain region, the polysilicon field plate 105a be connected to by
The drain electrode that front metal layer 112 forms.
On vertical view face, the p-well 103, the source region 106a, the polysilicon gate 105, the drain region oxygen 104, institute
It states polysilicon field plate 105a and the drain region 106b circularizes structure respectively.
In structure shown in FIG. 1, the p-well 103 and the P type substrate 101 of the LDMOS of high-voltage isolating ring device are formed
Be isolated, and source region 106a is formed in the p-well 103, therefore the source region 106a is isolated form structure so that device be every
Release LDMOS (Isolated LDMOS), this is consistent with required by level shifting circuit.I.e. level shifting circuit needs to use
Isolated form LDMOS.But the high-voltage isolating ring device shown in FIG. 1 being made of isolated form LDMOS has the drawback that
In general, the doping concentration of the N-type epitaxy layer 102 is uniform, formed at first side in the drain region oxygen 104
There is beak.When device pressure resistance, in channel location LOCOS beak region, can usually exist it is relatively high exhaust electric field, be easy hair
The initial failure of raw device, there are integrity problems.
Summary of the invention
Technical problem to be solved by the invention is to provide a kind of high-voltage isolating ring devices of gate drive circuit, can improve device
The pressure-resistant stability and product reliability of part.
In order to solve the above technical problems, the high-voltage isolating ring device of gate drive circuit provided by the invention, which is characterized in that
High-voltage isolating ring device is made of LDMOS, comprising:
P type substrate is formed with N-type epitaxy layer on the P type substrate surface.
P type buried layer and n type buried layer are formed in the selection area at the interface of the P type substrate and the N-type epitaxy layer.
The p type buried layer includes the first p type buried layer, the second p type buried layer and third p type buried layer.
The N-type extension between top surface of the top surface to the N-type epitaxy layer of first p type buried layer
Layer in be formed with the first high pressure p-well, second p type buried layer top surface to the N-type epitaxy layer top surface it
Between the N-type epitaxy layer in be formed with the second high pressure p-well.
The formation for the cellular construction that region between the first high pressure p-well and the second high pressure p-well is the LDMOS
The cellular construction in region, the LDMOS includes:
P-well is formed in the selection area of the N-type epitaxy layer.
Drift region is made of the N-type epitaxy layer outside second side of the p-well.
It is formed with drain region oxygen on the surface of the drift region, the drain region oxygen is mutually separated with second side of the p-well
Distance.
Gate structure is formed by stacking by the gate dielectric layer and polysilicon gate for being formed in the p-well surface；The polysilicon gate
Second side also extend on the surface of the drain region oxygen.
By N+ district's groups at source region be formed in the p-well surface and with the first side autoregistration of the polysilicon gate.
By N+ district's groups at drain region be formed in the N-type epitaxy layer outside second side of the drain region oxygen.
Third p type buried layer is located at the underface of the p-well, is also formed with implanted layer at the top of p-type in the bottom of the p-well,
The p-well, implanted layer and the third p type buried layer form longitudinal connection structure and make the p-well and described at the top of the p-type
P type substrate is connected to make the source region non-isolation type structure of the LDMOS.
Second side of implanted layer also extends transverse in the drift region and from bottom by the drain region at the top of the p-type
The first side of oxygen covers, and reduces the leakage in conjunction with the extended structure of implanted layer at the top of the non-isolation type structure and the p-type
The electric field strength of the first side bottom of area oxygen, improves the pressure-resistant stability and product reliability of device.
A further improvement is that the drain region oxygen is local field oxygen, at the top of the p-type second side of implanted layer need from
Bottom covers the beak that the drain region oxygen is formed at first side.
A further improvement is that gate drive circuit is used to drive the circuit of two kinds of operating voltages, the first operating voltage is greater than
Second operating voltage.
A further improvement is that be the nmosfet formation region of the second operating voltage outside the first side of first p type buried layer,
It is the nmosfet formation region of the first operating voltage, second side of first p type buried layer outside second side of second p type buried layer
To the forming region between the first side of second p type buried layer being the high-voltage isolating ring device, first work is realized
Isolation between the device of voltage and the device of second operating voltage.
A further improvement is that the surface of the N-type epitaxy layer outside the first side of first p type buried layer is formed with
Two oxygen, the surface of the N-type epitaxy layer outside second side of second p type buried layer are formed with third field oxygen.
A further improvement is that the n type buried layer is formed in first work outside second side of second p type buried layer
Make in the nmosfet formation region of voltage.
A further improvement is that the surface of the N-type epitaxy layer outside second side of second p type buried layer be formed with by
N+ district's groups at voltage bonding pad, the voltage bonding pad is connected to first operating voltage being made of front metal layer
First electrode end.
A further improvement is that the surface of the p-well be also formed with by P+ district's groups at trap draw-out area.
A further improvement is that the trap draw-out area and the source region are all connected to the source electrode being made of front metal layer,
The surface of the polysilicon gate is connected to the grid being made of front metal layer, and the drain region, which is connected to, to be made of front metal layer
Drain electrode.
A further improvement is that being formed with polysilicon field plate, the polycrystalline on the surface of second side of the drain region oxygen
Silicon field plate also extends on the surface of the drift region outside the drain region oxygen, and the polysilicon field plate is connected to by positive gold
Belong to the drain electrode of layer composition.
A further improvement is that on vertical view face, the p-well, the third p type buried layer, implanted layer at the top of the p-type,
The source region, the polysilicon gate, the drain region oxygen, the polysilicon field plate and the drain region all circularize structure respectively.
A further improvement is that the doping concentration of the N-type epitaxy layer is uniform.
A further improvement is that the Implantation Energy of implanted layer is 1000Kev~1500Kev, implantation dosage at the top of the p-type
For 5e11cm-2~2e12cm-2。
A further improvement is that it is 0 that second side of implanted layer, which extends transverse to distance in the drift region, at the top of the p-type
Micron~5 microns.
A further improvement is that the technique of the third p type buried layer and first p type buried layer and the second p type buried layer
Condition is identical.
The present invention has done special design to the structure of the p-well bottom of the LDMOS of composition high-voltage isolating ring device, mainly
Implanted layer and third at the top of implanted layer and p-well, p-type are increased at the top of p type buried layer i.e. third p type buried layer and p-type in the bottom of p-well
P type buried layer, which forms implanted layer at the top of longitudinal connection structure and p-type, will form the structure extended transverse in drift region, increase
Following advantageous effects can be brought after implanted layer at the top of third p type buried layer and p-type by adding:
First, the longitudinal connection structure formed can be such that p-well connects with the P type substrate of bottom, to make the source region of LDMOS
The drift region of non-isolation type structure, the drain region bottom Chang Yang that this non-isolation type structure is conducive to pair exhausts, and reason is p-well
Implanted layer increases and the contact of the drift region of the drain region bottom Chang Yang with third p type buried layer and P type substrate at the top of the p-type of bottom
Area exhausts ability to the drift region of the drain region bottom Chang Yang so as to improve, so as to improve the voltage endurance capability and energy of device
Improve the pressure-resistant stability of device and the reliability of product.
Secondly, the present invention to implanted layer at the top of p-type can also extend to the lateral setting in drift region, work as extended distance
Situation when being 0 micron corresponding to the longitudinal connection structure that only setting is connected with P type substrate；With the cross of implanted layer at the top of p-type
The extension of increase to the size of extension, p-type top implanted layer can be formed from top to bottom the first side of drain region oxygen
Bottom coverage effect, the electric field strength of the first side bottom of drain region oxygen is advantageously reduced, to further increase device
Pressure resistance, and further increase the pressure-resistant stability and product reliability of device.
Detailed description of the invention
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:
Fig. 1 is the sectional structure chart of the high-voltage isolating ring device of existing gate drive circuit；
Fig. 2 is the sectional structure chart of the high-voltage isolating ring device of gate drive circuit of the embodiment of the present invention.
Specific embodiment
As shown in Fig. 2, be the sectional structure chart of the high-voltage isolating ring device of gate drive circuit of the embodiment of the present invention, the present invention
The high-voltage isolating ring device of embodiment gate drive circuit is made of LDMOS, comprising:
P type substrate 1 is formed with N-type epitaxy layer 2 on 1 surface of P type substrate.
P type buried layer is formed in the selection area at the interface of the P type substrate 1 and the N-type epitaxy layer 2 and N-type is buried
Layer 10.
The p type buried layer includes the first p type buried layer 8a, the second p type buried layer 8b and third p type buried layer 8c.
The N-type between top surface of the top surface to the N-type epitaxy layer 2 of the first p type buried layer 8a
The first high pressure p-well 9a is formed in epitaxial layer 2, the second p type buried layer 8b top surface to the N-type epitaxy layer 2
The second high pressure p-well 9b is formed in the N-type epitaxy layer 2 between top surface.
The cellular construction that region between the first high pressure p-well 9a and the second high pressure p-well 9b is the LDMOS
The cellular construction of forming region, the LDMOS includes:
P-well 3 is formed in the selection area of the N-type epitaxy layer 2.
Drift region is made of the N-type epitaxy layer 2 outside second side of the p-well 3.
Drain region oxygen 4 is formed on the surface of the drift region, and second side of the drain region oxygen 4 and the p-well 3 is separated by
There is distance.In the embodiment of the present invention, the drain region oxygen 4 is LOCOS.
Gate structure is formed by stacking by the gate dielectric layer and polysilicon gate 5 for being formed in 3 surface of p-well；The polysilicon
Second side of grid 5 also extends on the surface of the drain region oxygen 4.
By N+ district's groups at source region 6a be formed in the surface of the p-well 3 and with the first side of the polysilicon gate 5 from right
It is quasi-.
By N+ district's groups at drain region 6b be formed in the N-type epitaxy layer 2 outside second side of the drain region oxygen 4.
Third p type buried layer 8c is located at the underface of the p-well 3, is also formed at the top of p-type and injects in the bottom of the p-well 3
Layer 13, the p-well 3, p-type top implanted layer 13 and the third p type buried layer 8c form longitudinal connection structure and make institute
P-well 3 is stated to be connected to make the source region 6a non-isolation type structure of the LDMOS with the P type substrate 1.
Second side of implanted layer 13 also extends transverse in the drift region and from bottom by the drain region at the top of the p-type
The first side covering of field oxygen 4.In the embodiment of the present invention, second side of implanted layer 13 needs to cover from bottom at the top of the p-type
The beak that the drain region oxygen 4 is formed at first side.
The drain region oxygen 4 is reduced in conjunction with the extended structure of implanted layer 13 at the top of the non-isolation type structure and the p-type
First side bottom electric field strength, improve the pressure-resistant stability and product reliability of device.
Gate drive circuit is used to drive the circuit of two kinds of operating voltages, and the first operating voltage is greater than the second operating voltage.
It is the nmosfet formation region of the second operating voltage outside the first side of the first p type buried layer 8a, second p-type is buried
It is the nmosfet formation region of the first operating voltage outside second side of layer 8b, second side of the first p type buried layer 8a to described the
It is the forming region of the high-voltage isolating ring device between the first side of two p type buried layer 8b, realizes first operating voltage
Isolation between device and the device of second operating voltage.
The surface of the N-type epitaxy layer 2 outside the first side of the first p type buried layer 8a is formed with second oxygen 4a,
The surface of the N-type epitaxy layer 2 outside second side of the second p type buried layer 8b is formed with third field oxygen 4b.
The n type buried layer 10 is formed in the device of first operating voltage outside second side of the second p type buried layer 8b
In part forming region.
The surface of the N-type epitaxy layer 2 outside second side of the second p type buried layer 8b be formed with by N+ district's groups at electricity
Bonding pad 6c, the voltage bonding pad 6c is pressed to be connected to the first electricity of first operating voltage being made of front metal layer 12
Extremely.
The surface of the p-well 3 be also formed with by P+ district's groups at trap draw-out area 7.
The trap draw-out area 7 and the source region 6a are all connected to the source electrode being made of front metal layer 12, the polysilicon
The surface of grid 5 is connected to the grid being made of front metal layer 12, and the drain region 6b is connected to be made of front metal layer 12
Drain electrode.
It is formed with polysilicon field plate 5a on the surface of second side of the drain region oxygen 4, the polysilicon field plate 5a also prolongs
On the surface for reaching the drift region outside the drain region oxygen 4, the polysilicon field plate 5a is connected to by front metal layer 12
The drain electrode of composition.
On vertical view face, the p-well 3, the third p type buried layer 8c, implanted layer 13 at the top of the p-type, the source region 6a,
The polysilicon gate 5, the drain region oxygen 4, the polysilicon field plate 5a and the drain region 6b circularize structure respectively.
The doping concentration of the N-type epitaxy layer 2 is uniform.At the top of the p-type Implantation Energy of implanted layer 13 be 1000Kev~
1500Kev, implantation dosage 5e11cm-2~2e12cm-2。
It is 0 micron~5 microns that second side of implanted layer 13, which extends transverse to distance in the drift region, at the top of the p-type.
Wherein, indicate that implanted layer 13 is to extend in the drift region at the top of the p-type for 0 micron, at this time completely by longitudinal connection structure
Realize the promotion for exhausting ability of the drift region of the bottom to the drain region oxygen 4.
The third p type buried layer 8c is identical with the process conditions of the first p type buried layer 8a and the second p type buried layer 8b.
The embodiment of the present invention has been done the structure of 3 bottom of p-well of the LDMOS of composition high-voltage isolating ring device and has particularly been set
Meter, mainly increases implanted layer 13 and p-well 3, p-type at the top of p type buried layer i.e. third p type buried layer 8c and p-type in the bottom of p-well 3
Top implanted layer 13 and third p type buried layer 8c form implanted layer 13 at the top of longitudinal connection structure and p-type and will form and laterally prolong
The structure in drift region is reached, increasing can bring following Advantageous to imitate at the top of third p type buried layer 8c and p-type after implanted layer 13
Fruit:
First, the longitudinal connection structure formed can be such that p-well 3 and the P type substrate of bottom 1 connects, to make the source region of LDMOS
6a is non-isolation type structure, and the drift region for drain region 4 bottom of oxygen that this non-isolation type structure is conducive to pair exhausts, reason
It is increased and drain region 4 bottom of oxygen for implanted layer 13 and third p type buried layer 8c at the top of the p-type of 3 bottom of p-well and P type substrate 1
The contact area of drift region exhausts ability to the drift region of drain region 4 bottom of oxygen so as to improve, so as to improve device
Voltage endurance capability simultaneously can improve the pressure-resistant stability of device and the reliability of product.
Secondly, the embodiment of the present invention to implanted layer 13 at the top of p-type can also extend to the lateral setting in drift region, when
Situation when extended distance is 0 micron corresponding to the longitudinal connection structure that only setting is connected with P type substrate 1；It is infused at the top of p-type
Enter the increase for the size of layer 13 being laterally extended, the extension of implanted layer 13 can be to the first side of drain region oxygen 4 at the top of p-type
Bottom coverage effect from top to bottom is formed, the electric field strength of the first side bottom of drain region oxygen 4 is advantageously reduced, thus into
One step improves the pressure resistance of device, and further increases the pressure-resistant stability and product reliability of device.
The present invention has been described in detail through specific embodiments, but these are not constituted to limit of the invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these are also answered
It is considered as protection scope of the present invention.
Claims (15)
1. a kind of high-voltage isolating ring device of gate drive circuit, which is characterized in that high-voltage isolating ring device is made of LDMOS, packet
It includes:
P type substrate is formed with N-type epitaxy layer on the P type substrate surface；
P type buried layer and n type buried layer are formed in the selection area at the interface of the P type substrate and the N-type epitaxy layer；
The p type buried layer includes the first p type buried layer, the second p type buried layer and third p type buried layer；
In the N-type epitaxy layer between top surface of the top surface to the N-type epitaxy layer of first p type buried layer
It is formed with the first high pressure p-well, between top surface of the top surface to the N-type epitaxy layer of second p type buried layer
The second high pressure p-well is formed in the N-type epitaxy layer；
The formation area for the cellular construction that region between the first high pressure p-well and the second high pressure p-well is the LDMOS
The cellular construction in domain, the LDMOS includes:
P-well is formed in the selection area of the N-type epitaxy layer；
Drift region is made of the N-type epitaxy layer outside second side of the p-well；
It is formed with drain region oxygen on the surface of the drift region, the drain region oxygen is mutually separated with distance with second side of the p-well；
Gate structure is formed by stacking by the gate dielectric layer and polysilicon gate for being formed in the p-well surface；The of the polysilicon gate
Two sides also extend on the surface of the drain region oxygen；
By N+ district's groups at source region be formed in the p-well surface and with the first side autoregistration of the polysilicon gate；
By N+ district's groups at drain region be formed in the N-type epitaxy layer outside second side of the drain region oxygen；
Third p type buried layer is located at the underface of the p-well, is also formed with implanted layer at the top of p-type, the P in the bottom of the p-well
Implanted layer and the third p type buried layer form longitudinal connection structure and serve as a contrast the p-well and the p-type at the top of trap, the p-type
Bottom is connected to make the source region non-isolation type structure of the LDMOS；
Second side of implanted layer also extends transverse in the drift region and from bottom by the drain region oxygen at the top of the p-type
First side covering reduces the drain region in conjunction with the extended structure of implanted layer at the top of the non-isolation type structure and the p-type
The electric field strength of the first side bottom of oxygen improves the pressure-resistant stability and product reliability of device.
2. the high-voltage isolating ring device of gate drive circuit as described in claim 1, it is characterised in that: the drain region oxygen is office
Portion oxygen, second side of p-type top implanted layer need to cover what the drain region oxygen was formed at first side from bottom
Beak.
3. the high-voltage isolating ring device of gate drive circuit as described in claim 1, it is characterised in that: gate drive circuit is for driving
The circuit of dynamic two kinds of operating voltages, the first operating voltage are greater than the second operating voltage.
4. the high-voltage isolating ring device of gate drive circuit as claimed in claim 3, it is characterised in that: first p type buried layer
The first side outside be the second operating voltage nmosfet formation region, be the first work electricity outside second side of second p type buried layer
The nmosfet formation region of pressure, second side of first p type buried layer is to being the height between the first side of second p type buried layer
The forming region of isolation ring device is pressed, is realized between the device of first operating voltage and the device of second operating voltage
Isolation.
5. the high-voltage isolating ring device of gate drive circuit as claimed in claim 4, it is characterised in that: first p type buried layer
The first side outside the surface of the N-type epitaxy layer be formed with second oxygen, the institute outside second side of second p type buried layer
The surface for stating N-type epitaxy layer is formed with third field oxygen.
6. the high-voltage isolating ring device of gate drive circuit as claimed in claim 4, it is characterised in that: the n type buried layer is formed
In the nmosfet formation region of first operating voltage outside second side of second p type buried layer.
7. the high-voltage isolating ring device of gate drive circuit as claimed in claim 6, it is characterised in that: second p type buried layer
Second side outside the N-type epitaxy layer surface be formed with by N+ district's groups at voltage bonding pad, the voltage bonding pad connects
It is connected to the first electrode end for first operating voltage being made of front metal layer.
8. the high-voltage isolating ring device of gate drive circuit as described in claim 1, it is characterised in that: on the surface of the p-well
Be also formed with by P+ district's groups at trap draw-out area.
9. the high-voltage isolating ring device of gate drive circuit as claimed in claim 8, it is characterised in that: the trap draw-out area and institute
The source electrode that source region is all connected to be made of front metal layer is stated, the surface of the polysilicon gate, which is connected to, to be made of front metal layer
Grid, the drain region is connected to the drain electrode being made of front metal layer.
10. the high-voltage isolating ring device of gate drive circuit as claimed in claim 9, it is characterised in that: in the drain region oxygen
The surface of second side be formed with polysilicon field plate, the polysilicon field plate also extends into the drift outside the drain region oxygen
On the surface in area, the polysilicon field plate is connected to the drain electrode being made of front metal layer.
11. the high-voltage isolating ring device of gate drive circuit as claimed in claim 10, it is characterised in that: on vertical view face, institute
State p-well, the third p type buried layer, p-type top implanted layer, the source region, the polysilicon gate, the drain region oxygen, institute
It states polysilicon field plate and the drain region all circularizes structure respectively.
12. the high-voltage isolating ring device of gate drive circuit as described in claim 1, it is characterised in that: the N-type epitaxy layer
Doping concentration is uniform.
13. the high-voltage isolating ring device of gate drive circuit as described in claim 1, it is characterised in that: injection at the top of the p-type
The Implantation Energy of layer is 1000Kev~1500Kev, implantation dosage 5e11cm-2~2e12cm-2。
14. the high-voltage isolating ring device of gate drive circuit as described in claim 1, it is characterised in that: injection at the top of the p-type
It is 0 micron~5 microns that second side of layer, which extends transverse to distance in the drift region,.
15. the high-voltage isolating ring device of gate drive circuit as described in claim 1, it is characterised in that: the third p type buried layer
It is identical with the process conditions of first p type buried layer and the second p type buried layer.
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